JP2022184312A - Infrared led element and method of manufacturing the same - Google Patents

Abstract

To provide an infrared LED element that has a light emission wavelength of 1,000 nm and can have an internal electrode and an upper electrode precisely positioned.SOLUTION: An infrared LED element comprises: an electrically conductive support substrate; an insulation layer which is formed on the support substrate; a semiconductor laminate which includes a first semiconductor layer formed on the insulation layer, an active layer, and a second semiconductor layer formed on the active layer and having a different conductivity type from the first semiconductor layer; an upper electrode which is formed on the semiconductor laminate; and an internal electrode which penetrates the insulation layer at a plurality of positions dispersed in a direction parallel with a principal surface of the support substrate to electrically connect the first semiconductor layer and support substrate. Here, a film thickness T [nm] of the active layer and a peak light emission wavelength λ [nm] of the infrared LED element satisfy the relationship expressed by (1) T≤-3.5×λ+6,375 (where 1,550≤λ≤1,800).SELECTED DRAWING: Figure 12

Description

TECHNICAL FIELD The present invention relates to an infrared LED element, and more particularly to an infrared LED element having an emission wavelength of 1000 nm or more. The present invention also relates to a method for manufacturing such an infrared LED element.

In recent years, semiconductor light-emitting devices that emit light in the infrared region with a wavelength of 1000 nm or longer have been widely used in applications such as security/surveillance cameras, gas detectors, medical sensors, and industrial equipment.

A semiconductor light-emitting device with an emission wavelength of 1000 nm or more has been generally manufactured by the following procedure (see Patent Document 1 below). That is, on an InP substrate as a growth substrate, a semiconductor layer of a first conductivity type, an active layer (sometimes referred to as a “light-emitting layer”), and a semiconductor of a second conductivity type, which are lattice-matched to the InP substrate, are formed. The layers are epitaxially grown in sequence. After that, an electrode for current injection is formed on the semiconductor wafer, and the wafer is cut into chips.

Conventionally, as a semiconductor light emitting device having an emission wavelength of 1000 nm or more, there is a background that the development of a semiconductor laser device has been advanced. On the other hand, the development of LED elements has not progressed as much as that of laser elements, partly because there were not many uses for them.

However, in recent years, with the spread of applications, there has been a demand for an improvement in the light output of infrared LED elements as well. An InP substrate exhibits a high refractive index of 3 or more, like a GaAs substrate used in the visible light region. Therefore, when light is to be extracted through the InP substrate, total reflection occurs due to the difference in refractive index at the interface with air, limiting the light extraction efficiency to a low level. Furthermore, since the InP substrate has a high thermal resistance, the optical output tends to be saturated when driven with a large current. Due to these circumstances, the structure disclosed in Patent Document 1 is not suitable for realizing an LED element that obtains a high light output.

As a method of obtaining a higher light output than the structure disclosed in Patent Document 1, for example, adoption of the structure disclosed in Patent Document 2 is conceivable. That is, it is considered that a structure realized by removing the growth substrate after bonding the growth substrate on which the epitaxial layer is formed to the conductive support substrate exhibiting high heat dissipation is effective. However, the target wavelength of the light-emitting element described in Patent Document 2 is lower than 1000 nm.

JP-A-4-282875 JP 2012-129357 A

In order to increase the luminous efficiency of the LED element, it is important to expand the current flowing through the active layer in the planar direction of the substrate. This is because, when current concentrates at a specific location in the active layer, the brightness varies between the location where the current concentrates and other locations in the active layer, and the amount of light extracted from the entire light extraction surface decreases. be. In addition, another problem is that excessively high temperature at a portion where current concentrates tends to advance the deterioration of the element.

In order to diffuse the current flowing in the active layer in the planar direction of the substrate, it is important to adjust the positions of the electrodes with high accuracy during manufacturing. In this specification, one electrode is arranged above the active layer and the other electrode is arranged below the active layer, and light is emitted by passing a current in the active layer in a direction perpendicular to the surface of the substrate. An LED element is called a "vertical element." In such a vertical device, when the one electrode and the other electrode are in a positional relationship facing each other in the direction orthogonal to the surface of the substrate, when a voltage is applied between the electrodes, the active layer The current tends to concentrate and flow in the area where both electrodes face each other. In order to avoid such a phenomenon, it is preferable to dispose the one electrode and the other electrode so as not to face each other in the direction orthogonal to the surface of the substrate as much as possible.

When manufacturing such a vertical device, the other electrode is formed in a state of being aligned with respect to a wafer on which the semiconductor laminate including the active layer and the one electrode have already been formed. a process is performed. Specifically, the procedure is as follows.

First, the position of one of the electrodes (hereinafter referred to as "internal electrode") formed in the lower layer of the semiconductor laminate is detected from above the wafer through the semiconductor laminate, and the detected position is detected. Based on this, the formation planned position of the other electrode (hereinafter referred to as "upper electrode") is defined. Then, using photolithography, upper electrodes are formed at the defined positions.

However, when detecting the positions where the internal electrodes are formed by the above-described method, the following problems arise when the emission wavelength of the target light-emitting element is 1000 nm or more.

A light-emitting device includes an active layer that emits light. This active layer absorbs much of the light at wavelengths higher in energy than the emission wavelength, that is, light at wavelengths shorter than the emission wavelength. Therefore, when manufacturing an infrared LED element with an emission wavelength of 1000 nm or more, it is not possible to adopt a method of detecting the position of the internal electrode with the human eye using visible light. Moreover, it is difficult to recognize light with a wavelength of 1000 nm or more even when using a CCD sensor or a CMOS sensor made of a Si-based material, which are image recognition devices that are widely used in the world. In other words, even if a light source (for example, a halogen lamp) that exhibits a continuous emission spectrum in a wavelength range of 1000 nm or more is used to irradiate the light emitting element with light, the CCD sensor or CMOS sensor cannot recognize the reflected light. Electrode formation position cannot be detected.

In recent years, an InGaAs-based image sensor capable of receiving infrared light with a long wavelength around 2000 nm has been developed. For this reason, by irradiating the light emitting element with light from the halogen lamp described above, receiving the reflected light with an InGaAs sensor, and analyzing the obtained information, in principle, the formation position of the internal electrode can be determined. can be detected. However, since light from a halogen lamp exhibits a broad spectrum, light with a shorter wavelength than the emission wavelength is absorbed in the active layer, resulting in an insufficient amount of reflected light received by the InGaAs-based sensor, resulting in an increase in sensitivity. becomes lower. Therefore, even if an InGaAs-based sensor is used, the edges of the internal electrodes cannot be clearly recognized, and it is difficult to align the electrodes with high precision.

If the alignment accuracy is low, it is necessary to widen the space between the internal electrodes in the plane direction so that the internal electrodes and the upper electrodes do not face each other in the direction orthogonal to the plane direction of the substrate. As a result, the number of electrodes provided in an LED element of the same size is reduced, and the amount of current that can be injected is reduced. In other words, it becomes difficult to realize a small-sized high-brightness infrared LED element.

SUMMARY OF THE INVENTION In view of the above problems, it is an object of the present invention to provide an infrared LED element having an emission wavelength of 1000 nm or more, in which it is possible to accurately align an internal electrode and an upper electrode. Another object of the present invention is to realize an infrared LED element in which the current flowing in the active layer is expanded in the surface direction by performing such alignment, and the luminous efficiency is enhanced.

The infrared LED element according to the present invention is
a conductive support substrate;
an insulating layer formed on the support substrate;
A p-type or n-type first semiconductor layer formed on the insulating layer, an active layer formed on the first semiconductor layer, and the first semiconductor layer formed on the active layer a semiconductor laminate including a second semiconductor layer having a conductivity type different from the
an upper electrode formed on the upper layer of the semiconductor laminate;
an internal electrode that penetrates the insulating layer at a plurality of positions dispersed in a direction parallel to the main surface of the supporting substrate and electrically connects the first semiconductor layer and the supporting substrate;
It is characterized in that the film thickness T [nm] of the active layer and the peak emission wavelength λ [nm] of the infrared LED element satisfy the relationship of the following formula (1).
T≦−3.5×λ+6375 (1)
However, in formula (1), λ is 1550 ≤ λ ≤ 1800.

In this specification, the "principal surface" of a member such as a substrate refers to a surface having a much larger area than the other surfaces among a plurality of surfaces constituting each member. In addition, the term "rectangular" includes rectangular, square, and substantially quadrangular shapes as a whole. When the overall appearance is substantially quadrilateral, for example, a quadrangle with slightly rounded vertices, a shape with fine unevenness on the sides, or a shape with adjacent sides at 90° This is a concept that includes tilting at an angle within the range of ±5°.

Moreover, in this specification, the "peak emission wavelength" means the wavelength with the highest light intensity on the emission spectrum.

According to the intensive research of the present inventors, when an infrared LED element has an active layer with a film thickness T that satisfies the relationship of the above formula (1), an image sensor such as an InGaAs-based sensor having sensitivity up to a wavelength of around 2000 nm It was found that the internal electrode and the upper electrode can be aligned with a high accuracy of 5 μm or less by photographing using the . Details are described below in the Detailed Description section.

If the film thickness T of the active layer is too thin, the probability of electrons and holes overflowing without recombining in the active layer increases. From the viewpoint of suppressing such a phenomenon, the thickness of the active layer is preferably 20 nm or more, more preferably 150 nm or more.

Preferably, the upper electrode is arranged at a position not facing the internal electrode with respect to the direction orthogonal to the main surface of the support substrate.

As a result, while the voltage is applied between the upper electrode and the internal electrode, the current flowing through the active layer can be expanded in the direction parallel to the main surface of the support substrate. As a result, an infrared LED element with high luminous efficiency is realized.

It is preferable that, when viewed from the direction perpendicular to the main surface of the support substrate, the variation in the separation distance between the upper electrode closest to the internal electrode and the internal electrode is 10 μm or less.

This separation distance variation is defined as follows. When the infrared LED element has a single upper electrode, the separation distance between each internal electrode and the upper electrode is measured when the light emitting element is viewed from the direction perpendicular to the main surface of the supporting substrate, and the maximum By calculating the absolute value of the difference between the value and the minimum value, the value of the variation is obtained.

On the other hand, when the infrared LED element has a plurality of upper electrodes, the variation value is calculated as follows. First, one upper electrode is specified (hereinafter referred to as "upper electrode α1"). Next, when the light-emitting element is viewed from the direction orthogonal to the main surface of the support substrate, the internal electrode whose closest upper electrode is the upper electrode α1 is identified from among the plurality of internal electrodes. A plurality of internal electrodes are usually present, and are hereinafter referred to as an "internal electrode group β (α1)".

Then, when the light-emitting element is viewed from the direction perpendicular to the main surface of the supporting substrate, the distance between each internal electrode belonging to the internal electrode group β (α1) and the upper electrode α1 is measured, and the maximum and minimum values of these distances are measured. Variation Vr(α1) is obtained by calculating the absolute value of the difference between the values.

By performing similar processing on the other upper electrodes (α2, α3, . ) is obtained. The average value of these variations Vr(αi) (1≤i≤n) is used as the variation value.

the second semiconductor layer is InP,
The active layer may comprise one or more materials belonging to the group consisting of GaInAsP, AlGaInAs and InGaAs.

InP has a higher bandgap energy than GaInAsP, AlGaInAs, and InGaAs, so it transmits shorter wavelength light than these materials. That is, when an image is taken from the upper electrode side using an image sensor, light absorption in the second semiconductor layer located above the active layer poses almost no problem. Further, by forming the active layer with the material described above, an infrared LED element with an emission wavelength of 1000 nm or more can be realized. At this time, by forming the active layer with a thickness T that satisfies the above formula (1) according to the peak emission wavelength λ, light absorption in the active layer is suppressed, so that the internal electrode and the upper electrode are accurately aligned. A well-aligned infrared LED device with high luminous efficiency is achieved.

In the infrared LED element, the peak emission wavelength λ may be 1000≦λ<1550, and the film thickness T of the active layer may be 1000 nm or less.

Further, the method for manufacturing an infrared LED element according to the present invention includes:
step (a) of providing a growth substrate;
a step (b) of forming the second semiconductor layer on the growth substrate;
Step (c) of forming the active layer made of a material having a peak emission wavelength of λ [nm] on the second semiconductor layer with a film thickness T [nm] that satisfies the formula (1);
a step (d) of forming the first semiconductor layer and the insulating layer on the active layer;
a step (e) of forming the internal electrode inside the insulating layer;
a step (f) of bonding the supporting substrate to the upper layer of the insulating layer;
a step (g) of exposing the second semiconductor layer by peeling the growth substrate;
After forming a photoresist on the upper layer of the second semiconductor layer, a photomask patterned according to the shape of the upper electrode is positioned and arranged using an image sensor based on the position of the internal electrode. a step (h);
Step (i) of forming a material film of the upper electrode after exposure through the photomask;
and a step (j) of removing the photoresist.

According to the above method, the film thickness T [nm] of the active layer formed during the step (h) satisfies the above equation (1) with respect to the peak emission wavelength λ [nm] of the active layer. is set to Therefore, when an image sensor is used to take an image while irradiating broad light having a light intensity in a wavelength range of 1000 nm or more, the absorption of light in the active layer is suppressed. A sufficient amount of light can be received to accurately detect As a result, in the step (h), the photomask can be aligned with high accuracy, so that the upper electrode remaining after the step (j) is located at a position where there is little overlap with the internal electrode in the direction orthogonal to the surface of the support substrate. can be formed in Therefore, the current flowing through the active layer when energized can be expanded in the direction parallel to the surface of the support substrate, and an infrared LED element with high luminous efficiency can be obtained.

The step (b) is a step of forming a film made of InP,
The step (c) may be a step of forming a film containing one or more materials belonging to the group consisting of GaInAsP, AlGaInAs, and InGaAs.

According to the present invention, even if the emission wavelength is 1000 nm or more, it is possible to align the internal electrode and the upper electrode with high accuracy. is provided.

1 is a cross-sectional view schematically showing the configuration of an embodiment of an infrared LED element of the present invention; FIG. 2 is a schematic plan view when the infrared LED element shown in FIG. 1 is viewed in the -Y direction; FIG. 1. It is typical sectional drawing in 1 process for demonstrating the manufacturing method of the LED element shown in FIG. 1. It is typical sectional drawing in another 1 process for demonstrating the manufacturing method of the LED element shown in FIG. FIG. 5 is a drawing in which the drawing range of FIG. 4 is expanded; FIG. 4 is a schematic plan view of an epitaxial wafer on which alignment marks are formed; 1. It is typical sectional drawing in another 1 process for demonstrating the manufacturing method of the LED element shown in FIG. 1. It is typical sectional drawing in another 1 process for demonstrating the manufacturing method of the LED element shown in FIG. 1. It is typical sectional drawing in another 1 process for demonstrating the manufacturing method of the LED element shown in FIG. 1. It is typical sectional drawing in another 1 process for demonstrating the manufacturing method of the LED element shown in FIG. FIG. 3 is a schematic cross-sectional view in one step for explaining step S7 of the method for manufacturing the LED element shown in FIG. 1; 3 is a schematic cross-sectional view in another step for explaining step S7 of the manufacturing method of the LED element shown in FIG. 1. FIG. 3 is a schematic cross-sectional view in another step for explaining step S7 of the manufacturing method of the LED element shown in FIG. 1. FIG. 3 is a schematic cross-sectional view in another step for explaining step S7 of the manufacturing method of the LED element shown in FIG. 1. FIG. 3 is a schematic cross-sectional view in another step for explaining step S7 of the manufacturing method of the LED element shown in FIG. 1. FIG. 10 is a graph showing the results of Verification 1, and showing the relationship between the peak emission wavelength and the maximum thickness of the active layer at which the internal electrodes could be detected with high accuracy. It is drawing for demonstrating the clearance Ws of an upper electrode and an internal electrode. 4 is a graph showing the current-light output characteristics of the infrared LED elements of sample #1 and sample #2. 4 is a graph showing the current-forward voltage characteristics of the infrared LED elements of sample #1 and sample #2.

An embodiment of an infrared LED element and a method for manufacturing the same according to the present invention will be described with reference to the drawings. Each drawing below is shown schematically, and the dimensional ratio on the drawing does not necessarily match the actual dimensional ratio. Moreover, there are cases where the dimensional ratios do not match between the drawings.

In this specification, the expression "the layer Q2 is formed on the layer Q1" includes not only the case where the layer Q2 is formed directly on the surface of the layer Q1, but also the case where the layer Q2 is formed on the surface of the layer Q1 via a thin film. It is intended to include the case where the layer Q2 is formed over the layer. The term "thin film" as used herein refers to a layer having a thickness of 20 nm or less, preferably a layer having a thickness of 10 nm or less.

In this specification, the description "GaInAsP" means a mixed crystal of Ga, In, As, and P, and the description of the composition ratio is simply omitted. The same applies to other descriptions such as "AlGaInAs".

FIG. 1 is a cross-sectional view schematically showing the structure of the infrared LED element of this embodiment. The infrared LED element 1 shown in FIG. 1 includes a semiconductor laminate 20 formed on the upper layer of the support substrate 11 . The infrared LED element 1 shown in FIG. 1 corresponds to a schematic cross-sectional view taken along the XY plane at a predetermined position. In the following description, the XYZ coordinate system attached to FIG. 1 will be referred to as appropriate.

In the following description, when distinguishing between positive and negative directions when expressing directions, positive and negative signs are added, such as “+X direction” and “−X direction”. Moreover, when expressing a direction without distinguishing between positive and negative directions, it is simply described as “X direction”. That is, in the present specification, the term “X direction” includes both “+X direction” and “−X direction”. The same applies to the Y direction and Z direction. In the following example, the main surface of the support substrate 11 is parallel to the XZ plane, and light is extracted in the normal direction (Y direction).

In the infrared LED element 1 of the present embodiment, infrared light L is generated within the semiconductor laminate 20 (more specifically, within the active layer 25 described later). More specifically, as shown in FIG. 1, the infrared light L (L1, L2) is extracted in the +Y direction with the active layer 25 as a reference. The infrared light L has a peak wavelength of 1000 nm or more.

[Device structure]
The structure of the infrared LED element 1 will be described in detail below.

(Support substrate 11)
The support substrate 11 is made of, for example, a semiconductor such as Si or Ge, or a metal material such as Cu or CuW. When the support substrate 11 is made of a semiconductor, it may be doped with a dopant at a high concentration so as to exhibit conductivity. As an example, the support substrate 11 is a Si substrate doped with boron (B) at a dopant concentration of 1×10 ¹⁹ /cm ³ or more and having a resistivity of 10 mΩcm or less. As a dopant, phosphorus (P), arsenic (As), antimony (Sb), etc. can be used in addition to boron (B). From the viewpoint of achieving both high heat dissipation and low manufacturing cost, a Si substrate is preferably used as the support substrate 11 .

The thickness (length in the Y direction) of the support substrate 11 is not particularly limited, but is, for example, 50 μm to 500 μm, preferably 100 μm to 300 μm.

(Joining layer 13)
The infrared LED element 1 shown in FIG. 1 includes a bonding layer 13 formed on the support substrate 11 . The bonding layer 13 is made of a solder material with a low melting point, such as Au, Au--Zn, Au--Sn, Au--In, Au--Cu--Sn, Cu--Sn, Pd--Sn, and Sn. As will be described later with reference to FIG. 9, the bonding layer 13 is used to bond the growth substrate 3 having the semiconductor laminate 20 formed thereon and the support substrate 11 together. Although the thickness of the bonding layer 13 is not particularly limited, it is, for example, 0.5 μm to 5.0 μm, preferably 1.0 μm to 3.0 μm.

(Reflection layer 15)
The infrared LED element 1 shown in FIG. 1 includes a reflective layer 15 formed on the bonding layer 13 . The reflective layer 15 has a function of reflecting infrared light L2 traveling toward the support substrate 11 (-Y direction) out of the infrared light L generated in the active layer 25 and guiding it in the +Y direction. The reflective layer 15 is made of a material that is a conductive material and exhibits a high reflectance with respect to the infrared light L. As shown in FIG. The reflectance of the reflective layer 15 to the infrared light L is preferably 70% or higher, more preferably 80% or higher, and particularly preferably 90% or higher.

When the peak wavelength of the infrared light L is 1000 nm to 2000 nm, the reflective layer 15 can be made of metal materials such as Ag, Ag alloys, Au, Al, and Cu. The material forming the reflective layer 15 is appropriately selected according to the wavelength of light generated by the active layer 25 .

Although the thickness of the reflective layer 15 is not particularly limited, it is, for example, 0.1 μm to 2.0 μm or less, preferably 0.3 μm to 1.0 μm or less.

Although not shown in FIG. 1 , a barrier layer may be provided between the reflective layer 15 and the bonding layer 13 to suppress the diffusion of the solder material forming the bonding layer 13 . The material of the barrier layer can be material containing, for example, Ti, Pt, W, Mo, Ni, or the like. As an example, it is composed of a laminate of Ti/Pt/Au. Although the thickness of the barrier layer is not particularly limited, it is, for example, 0.05 μm to 3 μm or less, preferably 0.2 μm to 1 μm or less. By interposing this barrier layer, it is possible to prevent the material forming the bonding layer 13 from diffusing toward the reflective layer 15 and lowering the reflectance of the reflective layer 15 . A barrier layer may also be provided between the bonding layer 13 and the support substrate 11 .

From the viewpoint of improving light extraction efficiency, it is preferable for the infrared LED element 1 to have a reflective layer 15 as shown in FIG. or not is arbitrary.

(insulating layer 17)
The infrared LED element 1 shown in FIG. 1 has an insulating layer 17 formed on the reflective layer 15 . The insulating layer 17 is made of a material that is electrically insulating and highly transparent to the infrared light L. As shown in FIG. The transmittance of the insulating layer 17 to the infrared light L is preferably 70% or more, more preferably 80% or more, and particularly preferably 90% or more.

When the peak wavelength of the infrared light L is 1000 nm to 2000 nm, the insulating layer 17 can be made of SiO ₂ , SiN, Al ₂ O ₃ or the like. A material forming the insulating layer 17 is appropriately selected according to the wavelength of light generated in the active layer 25 .

(Semiconductor laminate 20)
The infrared LED element 1 shown in FIG. 1 has a semiconductor laminate 20 formed on an insulating layer 17 . The semiconductor laminate 20 is a laminate of multiple semiconductor layers, and includes, for example, a contact layer 21 , a first clad layer 23 , an active layer 25 and a second clad layer 27 . Each of the semiconductor layers (21, 23, 25, 27) forming the semiconductor laminate 20 is made of a material capable of epitaxial growth with lattice matching with the growth substrate 3 described later.

<<Contact layer 21, first clad layer 23>>
In this embodiment, the contact layer 21 is made of, for example, p-type GaInAsP. Although the thickness of the contact layer 21 is not limited, it is, for example, 10 nm to 1000 nm, preferably 50 nm to 500 nm. The p-type dopant concentration of the contact layer 21 is preferably 5×10 ¹⁷ /cm ³ to 3×10 ¹⁹ /cm ³ , more preferably 1×10 ¹⁸ /cm ³ to 2×10 ¹⁹ /cm 3 . is ³ .

In this embodiment, the first cladding layer 23 is formed above the contact layer 21 and is made of, for example, p-type InP. Although the thickness of the first clad layer 23 is not limited, it is, for example, 1000 nm to 10000 nm, preferably 2000 nm to 5000 nm. The p-type dopant concentration of the first clad layer 23 is preferably 1×10 ¹⁷ /cm ³ to 3×10 ¹⁸ /cm ³ or less, more preferably 5×10 ¹⁷ at a position away from the active layer 25 . /cm ³ to 3×10 ¹⁸ /cm ³ or less.

As the p-type dopant contained in the contact layer 21 and the first clad layer 23, Zn, Mg, Be or the like can be used, with Zn or Mg being preferred, and Zn being particularly preferred. In this embodiment, the contact layer 21 and the first clad layer 23 correspond to the "first semiconductor layer".

<<Active layer 25>>
In this embodiment, the active layer 25 is composed of a semiconductor layer formed above the first clad layer 23 . The active layer 25 is appropriately selected from materials capable of generating light of a target wavelength and epitaxially growing with lattice matching with the growth substrate 3 described later with reference to FIG.

When it is desired to realize the infrared LED element 1 that emits infrared light L having a peak wavelength of 1000 nm to 2000 nm, the active layer 25 may have a single-layer structure of GaInAsP, AlGaInAs, or InGaAs. An MQW (Multiple Quantum Well) structure including well layers made of InGaAs and barrier layers made of GaInAsP, AlGaInAs, InGaAs, or InP having a bandgap energy larger than that of the well layers may be used.

The film thickness T [nm] of the active layer 25 is set so that the relationship with the peak emission wavelength λ satisfies the following formula (1) when the peak emission wavelength λ [nm] is 1550≦λ≦1800.
T≦−3.5×λ+6375 (1)

When the peak emission wavelength λ is 1000≦λ<1550, the film thickness T of the active layer 25 is 1000 nm or less. From the viewpoint of reducing the probability of occurrence of a phenomenon (overflow phenomenon) in which electrons and holes flow into adjacent layers without recombination within the active layer 25, the film thickness T of the active layer 25 does not depend on the peak emission wavelength λ. is preferably 20 nm or more, more preferably 150 nm or more.

As will be described later with reference to FIG. 11C, when manufacturing the infrared LED element 1, an image is captured using an image sensor from above the second cladding layer 27, thereby forming the internal electrode 31 on the XZ plane. A position detection step is performed. By setting the film thickness of the active layer 25 according to the peak emission wavelength λ as described above, the amount of light for imaging absorbed in the active layer 25 is suppressed, and the formation position of the internal electrode 31 can be accurately determined. become recognizable.

The active layer 25 may be doped n-type or p-type, or may be undoped. In the case of n-type doping, Si, for example, can be used as a dopant.

<<Second clad layer 27>>
In this embodiment, the second cladding layer 27 is formed on the active layer 25 and is made of, for example, n-type InP. Although the thickness of the second clad layer 27 is not limited, it is, for example, 100 nm to 10000 nm, preferably 500 nm to 5000 nm. The n-type dopant concentration of the second clad layer 27 is preferably 1×10 ¹⁷ /cm ³ to 5×10 ¹⁸ /cm ³ , more preferably 5×10 ¹⁷ /cm ³ to 4×10 ¹⁸ /cm 3 . is ³ . Sn, Si, S, Ge, Se, etc. can be used as the n-type impurity material with which the second cladding layer 27 is doped, and Si is particularly preferable. The second clad layer 27 corresponds to the "second semiconductor layer".

In the example shown in FIG. 1, an uneven portion 27a is formed on the surface of the second cladding layer 27 on the +Y side. By forming the uneven portion 27a, the amount of infrared light L (L1, L2) traveling in the +Y direction from the active layer 25 and reflected by the surface of the second cladding layer 27 toward the active layer 25 is reduced. Light extraction efficiency is enhanced. However, in the present invention, it is optional whether or not the surface of the second cladding layer 27 is provided with the uneven portion 27a.

The first clad layer 23 and the second clad layer 27 are made of a material that does not absorb the infrared light L generated in the active layer 25, and are epitaxially grown by lattice matching with the growth substrate 3 (see FIG. 3 described later). is appropriately selected from materials capable of When an InP substrate is used as the growth substrate 3, materials such as GaInAsP and AlGaInAs can be used as well as InP for the first clad layer 23 and the second clad layer 27. FIG.

However, as described above, when manufacturing the infrared LED element 1, an image is captured using an image sensor from above the second clad layer 27, thereby detecting the formation position of the internal electrode 31 on the XZ plane. process is performed. From this point of view, in order to suppress the absorption of imaging light in the first clad layer 23 and the second clad layer 27, these layers are preferably made of a material having a sufficiently higher bandgap energy than the active layer 25. , and more preferably InP.

In the above description, the first semiconductor layers (21, 23) are p-type semiconductors and the second semiconductor layer 27 is n-type semiconductors, but the conductivity types of the two may be reversed. do not have.

(Internal electrode 31)
The infrared LED element 1 shown in FIG. 1 has internal electrodes 31 that penetrate through the insulating layer 17 in the Y direction at a plurality of locations. The internal electrode 31 electrically connects the first semiconductor layers ( 21 , 23 ) and the support substrate 11 . The internal electrodes 31 are provided at a plurality of positions distributed in a direction parallel to the XZ plane (that is, a direction parallel to the main surface of the support substrate 11).

The internal electrode 31 is made of a material capable of forming an ohmic connection with the contact layer 21 . As an example, the internal electrode 31 is composed of AuZn, AuBe, or a laminated structure containing at least Au and Zn (for example, Au/Zn/Au, etc.). These materials have a lower reflectance with respect to the infrared light L than the material forming the reflective layer 15 .

FIG. 2, which will be described later, shows a configuration example in which the internal electrodes 31 are regularly aligned in this embodiment, but any shape can be adopted for the arrangement pattern of the internal electrodes 31 when viewed in the Y direction. be able to. However, from the viewpoint of uniform current flow over a wide range in the active layer 25 with respect to the direction parallel to the main surface of the support substrate 11, the internal electrodes 31 have a regular shape in the plane direction and are dispersed. is preferably located.

FIG. 2 is an example of a schematic plan view when the infrared LED element 1 is viewed from above the second clad layer 27 in the Y direction. However, in order to understand the shape pattern of the internal electrodes 31, the internal electrodes 31 are also illustrated in FIG. FIG. 2 will be described later in the description of the upper electrode 32 . FIG. 2 illustrates a case where the semiconductor stacked body 20 has a rectangular shape when viewed from above.

When the infrared LED element 1 is viewed in the Y direction, the total area of all the internal electrodes 31 is 30% or less of the area of the semiconductor laminate 20 (for example, the second clad layer 27) in the planar direction. preferably 20% or less, particularly preferably 15% or less. If the total area of the internal electrodes 31 is relatively large, the infrared light L2 traveling from the active layer 25 toward the support substrate 11 (-Y direction) is absorbed by the internal electrodes 31, resulting in a decrease in extraction efficiency. On the other hand, if the total area of the internal electrodes 31 is too small, the resistance value increases and the forward voltage increases.

(Upper electrode 32)
The infrared LED element 1 shown in FIG. 1 has an upper electrode 32 formed on the upper layer of the semiconductor laminate 20 . A plurality of upper electrodes 32 are typically formed so as to extend in a predetermined direction. In the example shown in FIG. 2, a plurality of upper electrodes 32 extend in the X direction and the Z direction along the sides of the semiconductor stack 20 and have a comb shape. The arrangement pattern shape of the upper electrode 32 is arbitrary, and may be, for example, a lattice shape or a spiral shape. The upper electrode 32 is formed over a wide range on the XZ plane while exposing the surface of the underlying second clad layer 27 . As a result, the current flowing through the active layer 25 can be expanded in the direction parallel to the XZ plane, and light can be emitted over a wide range within the active layer 25 .

As an example, the upper electrode 32 is composed of materials such as AuGe/Ni/Au and AuGe, and may be provided with a plurality of these materials.

As shown in FIG. 2, when viewed in the Y direction, the upper electrodes 32 and the internal electrodes 31 are arranged so as not to overlap in the Y direction. More preferably, when viewed in the Y direction, the separation distance Ws (see FIG. 13) between each internal electrode 31 and the nearest upper electrode 32 is designed to be substantially uniform for almost all internal electrodes 31. It is Typically, when viewed in the Y direction, for 80% or more of the internal electrodes 31, the variation in the distance between the upper electrode 32 closest to each internal electrode 31 and the internal electrode 31 is 10 μm or less. . It is more preferable that 90% or more of the internal electrodes 31 similarly have a variation in the separation distance of 10 μm or less, and 95% or more of the internal electrodes 31 similarly have a variation in the separation distance of 10 μm or less. is more preferred.

When the infrared LED element 1 is viewed in the Y direction, if the upper electrode 32 and the internal electrode 31 overlap each other, the current tends to flow in the Y direction in the region, causing the current to concentrate locally. end up As a result, it becomes difficult for current to flow in a wide range in the active layer 25 in the direction parallel to the XZ plane, resulting in variations in brightness on the surface of the second cladding layer 27 and reduced luminous efficiency. Further, when the infrared LED element 1 is viewed in the Y direction, even if the upper electrode 32 and the internal electrode 31 do not overlap each other, the variation in the separation distance between the internal electrode 31 and the upper electrode 32 is large, a large difference occurs in the amount of current flowing in the direction of the XZ plane. As a result, a portion where the current is locally concentrated may occur, and the same phenomenon as described above may occur. From this point of view, it is preferable to minimize variations in the separation distance between the internal electrode 31 and the upper electrode 32 when the infrared LED element 1 is viewed in the Y direction.

For this reason, it is important to precisely align the upper electrode 32 and the internal electrode 31 when manufacturing the infrared LED element 1 . In more detail, the process of forming the upper electrode 32 is later than the process of forming the internal electrode 31 , which will be described later in the description of the method of manufacturing the infrared LED element 1 . That is, when forming the upper electrode 32, after recognizing the position where the internal electrode 31 is formed, a step of adjusting the planned formation position of the upper electrode 32 is required. In the case of the infrared LED element 1 of the present invention, since the film thickness T of the active layer 25 is designed according to the wavelength λ, it is possible to accurately detect the formation positions of the internal electrodes 31 .

(Pad electrode 34)
As shown in FIG. 2 , the infrared LED element 1 has a pad electrode 34 formed on the upper surface of part of the upper electrode 32 . The pad electrode 34 is composed of, for example, Ti/Au, Ti/Pt/Au, or the like. The pad electrode 34 is provided for the purpose of securing an area for contacting a bonding wire for power supply, but it is optional in the present invention whether or not the pad electrode 34 is provided.

The pad electrode 34 has a circular shape with an inner diameter of about 90 μm to 120 μm when each side (chip size) of the semiconductor laminate 20 is about 800 μm to 2500 μm, for example. The line width of the upper electrode 32 is about 10 μm to 30 μm. In the high-power infrared LED element 1 with a chip size exceeding 800 μm, it is preferable to provide the pad electrodes 34 at a plurality of locations as shown in FIG. 2 from the viewpoint of injecting a high current.

(Back electrode 33)
The infrared LED element 1 shown in FIG. 1 includes a back electrode 33 formed on the surface of the support substrate 11 opposite to the semiconductor laminate 20 (−Y side). Ohmic contact is realized between the back electrode 33 and the support substrate 11 . As an example, the back electrode 33 is made of materials such as Ti/Au and Ti/Pt/Au, and a plurality of these materials may be provided.

[Production method]
An example of a method for manufacturing the infrared LED element 1 described above will be described with reference to FIGS. 3 to 11E. 3 to 5 and 7 to 11E are cross-sectional views in one step in the manufacturing process. FIG. 6 will be described later. The order of the following procedures may be changed appropriately as long as it does not affect the manufacture of the infrared LED element 1 .

(Step S1)
As shown in FIG. 3, a growth substrate 3 made of, for example, InP is transported into a MOCVD (Metal Organic Chemical Vapor Deposition) apparatus, and a second clad layer 27, an active layer 25, and a first clad layer 23 are formed on the growth substrate 3. And the contact layer 21 is epitaxially grown in sequence to form the semiconductor laminate 20 . In this step S1, the type and flow rate of the raw material gas, the processing time, the environmental temperature, etc. are appropriately adjusted according to the material and film thickness of the layer to be grown. Examples of materials for the semiconductor layers (21, 23, 25, 27) are as described above.

InP is preferably used as the growth substrate 3 . However, GaAs may be used as the growth substrate 3 when manufacturing the infrared LED element 1 with a peak emission wavelength of 1070 nm or less.

In this step S1, the active layer 25 has a film thickness T[ nm]. Just to make sure, the formula (1) is re-listed.
T≦−3.5×λ+6375 (1)

When the peak emission wavelength λ is 1000≦λ<1550, the active layer 25 is formed so that the film thickness T is 1000 nm or less. The active layer 25 is preferably formed with a thickness of 100 nm or more regardless of the peak emission wavelength λ.

This step S1 corresponds to steps (a) to (c).

(Step S2)
The epitaxial wafer is taken out from the MOCVD apparatus, and a resist mask patterned by photolithography is formed on the surface of the contact layer 21 . After that, after forming a film of a material (for example, AuZn) for forming the internal electrodes 31 using a vacuum deposition device, the resist mask is removed by a lift-off method. After that, for example, alloy treatment (annealing treatment) is performed by heat treatment at 450° C. for 10 minutes, thereby realizing ohmic contact between the contact layer 21 and the internal electrode 31 .

Next, an insulating layer 17 made of, for example, SiO ₂ is deposited by plasma CVD. Thereafter, the insulating layer 17 positioned above the internal electrodes 31 is removed by photolithography and etching to expose the internal electrodes 31 (see FIG. 4).

As shown in FIG. 5, in this step S2, alignment marks 41 made of the same material as the internal electrodes 31 are formed at the end positions of the epitaxial wafer. FIG. 6 is a schematic plan view of an epitaxial wafer on which alignment marks 41 are formed. In FIG. 6, only the insulating layer 17 formed on the upper surface of the wafer and the alignment marks 41 penetrating through the insulating layer 17 are shown from the viewpoint of facilitating understanding of the alignment marks 41 . Although shown, the patterned internal electrodes 31 are actually also formed at this point.

In FIG. 6, the alignment mark 41 has a cross shape, but the shape of the alignment mark 41 is arbitrary.

This step S2 corresponds to steps (d) to (e).

(Step S3)
As shown in FIG. 7, the reflective layer 15 is formed to cover the insulating layer 17 and the internal electrodes 31, and then the bonding layer 13a is formed. For example, the reflective layer 15 is formed by depositing, for example, Al/Au with a predetermined thickness using a vacuum deposition apparatus, and then, for example, Au—Sn is deposited with a predetermined thickness, thereby forming the bonding layer. 13a is formed. As described above, a barrier layer may be formed between the reflective layer 15 and the bonding layer 13a by depositing, for example, Ti/Pt/Au with a predetermined film thickness.

(Step S4)
As shown in FIG. 8, a support substrate 11 is prepared separately from the growth substrate 3, and a bonding layer 13b made of, for example, Au—Sn is formed on the upper surface thereof. Although not shown, a contact metal layer (for example, Ti) may be formed on the surface of the support substrate 11, and the bonding layer 13b may be formed thereon. Also, the above-described barrier layer may be formed before forming the bonding layer 13b.

(Step S5)
As shown in FIG. 9, the growth substrate 3 and the support substrate 11 are bonded together via the bonding layers 13 (13a, 13b) at a temperature of 280° C. and a pressure of 1 MPa, for example. By this treatment, the bonding layer 13a on the growth substrate 3 and the bonding layer 13b on the support substrate 11 are melted and integrated (bonding layer 13).

This step S5 corresponds to step (f).

(Step S6)
After the surface on the semiconductor laminate 20 side is coated with a resist to protect it, the exposed growth substrate 3 is subjected to a grinding and polishing process or a wet etching process using a hydrochloric acid-based etchant. As a result, the growth substrate 3 is peeled off to expose the second clad layer 27 (see FIG. 10).

This step S6 corresponds to step (g).

(Step S7)
An upper electrode 32 is formed at a predetermined position on the upper surface of the second clad layer 27 . A detailed procedure of this step S7 will be described with reference to FIGS. 11A to 11E.

First, as shown in FIG. 11A, the upper surface of the second clad layer 27 is coated with a photoresist 43 . Here, a case where the photoresist 43 is of a negative type will be described as an example, but a positive photoresist 43 may be used.

Next, as shown in FIG. 11B, a photomask 45 patterned according to the shape of the upper electrode 32 is placed at a predetermined position, and exposure light L40 is applied through the photomask 45 .

The photomask 45 is preferably provided with a mask region 45a for alignment at the end position. That is, as schematically shown in FIG. 11C, the photomask 45 has a mask region 45b patterned according to the shape of the upper electrode 32 and an alignment mask region 45a.

As described above with reference to FIGS. 5 and 6, in step S2, the alignment marks 41 made of the same material as the internal electrodes 31 are formed on the wafer. When adjusting the position of the photomask 45, an image is captured by an image sensor such as an InGaAs sensor while irradiating the photomask 45 with light from, for example, a halogen lamp. Then, while checking the obtained image, the position of the photomask 45 is adjusted so that the alignment mark 41 and the alignment mask region 45a overlap. FIG. 11C shows a state after alignment marks 41 and alignment mask regions 45a have been adjusted so as to overlap in the Y direction.

When the light from the halogen lamp passes through the semiconductor laminate 20 and reaches the formation location of the insulating layer 17, it is reflected by the internal electrode 31 and the alignment mark 41 and received by the image sensor. Based on this captured image, the position where the alignment mark 41 is formed can be detected. As described above, the thickness T of the active layer 25 is adjusted according to the peak emission wavelength λ, and the amount of light emitted from the image sensor absorbed in the active layer 25 is suppressed. Also, the first clad layer 23 and the second clad layer 27 are made of a material having a higher bandgap energy than the active layer 25, and are preferably made of InP. Therefore, the amount of light of 1000 nm or more absorbed in these layers is small, and does not pose a problem when detecting the positions where the internal electrodes 31 are formed. In addition, although there is a possibility that part of the light is absorbed in the contact layer 21 , since the thickness is thin in the first place, there is no problem in detecting the formation position of the internal electrode 31 .

That is, even when the peak emission wavelength of the active layer 25 is 1000 nm or more, the mask region 45 a for alignment provided on the photomask 45 can be adjusted so as to overlap the alignment mark 41 . As a result, the mask region 45b for the upper electrode 32 provided on the photomask 45 can be adjusted to an appropriate position according to the position where the internal electrode 31 is formed.

The alignment mask region 45 a may have a shape corresponding to the shape of the alignment mark 41 . That is, as shown in FIG. 6, when the alignment mark 41 is cross-shaped, the alignment mask region 45a may also be cross-shaped.

By irradiating the wafer with exposure light L40 through the photomask 45 set at a predetermined position, the photoresist 43 existing under the mask regions (45a, 45b) remains. , the photoresist 43 below the openings in the photomask 45 is removed (see FIG. 11D).

Next, as shown in FIG. 11E, a material film for the upper electrode 32 is formed using, for example, a vacuum deposition apparatus. As a result, material films are formed on the upper surface of the remaining photoresist 43 and the exposed upper surface of the second clad layer 27 (32a, 32). After that, the photoresist 43 is stripped off, and annealing is performed as necessary to form the upper electrode 32 at a predetermined position on the upper surface of the second clad layer 27 (see FIGS. 1 and 2).

This step S7 corresponds to steps (h) to (j).

(Later process)
After step S7, for example, the following steps are executed. Note that the following procedures can be interchanged as appropriate.

A pad electrode 34 is formed at a predetermined position on the upper surface of the upper electrode 32 . Also in this case, similarly to the upper electrode 32, it can be realized by a film forming process using a vacuum vapor deposition apparatus and a lift-off process.

Wet etching is applied to the surface of the second cladding layer 27 on which the upper electrode 32 (and the pad electrode 34) are not formed to form an uneven portion 27a. After that, mesa etching is performed for separating each device. Specifically, wet etching is performed with a mixture of bromine and methanol while the non-etching region of the surface of the second cladding layer 27 is masked with a resist patterned by photolithography. This removes a portion of the semiconductor stack 20 located within the unmasked region (see FIG. 1).

After the thickness of the back side of the support substrate 11 is adjusted, the back electrode 33 is formed on the back side of the support substrate 11 . As a specific method of forming the back electrode 33, similarly to the upper electrode 32, it can be formed by forming a film of the material for forming the back electrode 33 (for example, Ti/Pt/Au) using a vacuum deposition device.

Note that the adjustment of the thickness of the back side of the support substrate 11 may be performed as required, and is not necessarily an essential step. Also, the degree of thickness is appropriately set according to the application.

Thereafter, the support substrate 11 is diced into chips.

[Verification 1]
Steps S1 to S6 were performed under the same conditions except that the material and film thickness of the active layer 25 were changed. After that, as in step S7, the photomask 45 was aligned and the upper electrode 32 was formed. Table 1 shows the results at this time. In Table 1, the evaluation "C" indicates that the internal electrode 31 could not be recognized and the alignment of the photomask 45 was impossible, or the alignment of the obtained upper electrode 32 and the internal electrode 31 was difficult. It corresponds to the accuracy exceeding 10 μm. Also, in Table 1, the evaluation "A" corresponds to the obtained alignment accuracy of the upper electrode 32 and the internal electrode 31 being 5 μm or less.

According to Table 1, the longer the peak emission wavelength λ, the thinner the thickness of the active layer 25 is required in order to improve the alignment accuracy between the upper electrode 32 and the internal electrode 31 . It is suggested that the reduction in the thickness of the active layer 25 reduces the amount of light absorbed in the active layer 25 and improves the recognition accuracy of the image sensor. On the other hand, it can be seen that within the range of the peak emission wavelength of 1550 nm or less, the upper electrode 32 and the internal electrode 31 can be aligned with high accuracy if the thickness of the active layer 25 is 1000 nm or less.

FIG. 12 is a graph plotting the thickness of the active layer 25 of the sample having the thickest active layer 25 among the samples evaluated as "A" in Table 1 for each wavelength. This graph also shows that the longer the peak emission wavelength λ is, the more difficult it is to recognize the positions where the internal electrodes 31 are formed unless the thickness of the active layer 25 is reduced.

According to the results of FIG. 12, when the peak emission wavelength λ is in the range of 1550 nm to 1800 nm, more specifically, in the range of 1550 nm to 1750 nm, the thickness T [nm] of the active layer and the peak emission wavelength λ [nm ] is the following (1) formula,
T≦−3.5×λ+6375 (1)
It can be seen that the formation position of the internal electrode 31 can be detected with high accuracy by the image sensor by satisfying . In addition, when the peak emission wavelength λ is in the range of 1000 nm to 1550 nm, more specifically, in the range of 1050 nm to 1550 nm, the film thickness T [nm] of the active layer is set to 1000 nm or less, so that the internal electrode can be detected by the image sensor. It can be seen that the formation position of 31 can be detected with high accuracy.

That is, by setting the film thickness T of the active layer as described above, the photomask 45 can be set at an appropriate position corresponding to the position of the internal electrode 31 in step S7. As a result, by exposing the upper electrodes 32 through the photomask 45 to form the upper electrodes 32, the upper electrodes 32 do not overlap the internal electrodes 31 in the Y direction, and the distances between the internal electrodes 31 are substantially uniform. can be done.

[Verification 2]
Sample #1 was obtained through steps S1 to S7 described above. In this sample #1, the average value of variations in the separation distance Ws between the upper electrode 32 and the internal electrodes 31 when viewed in the Y direction was 2.0 μm, and all variations were suppressed within 5 μm. FIG. 13 is a drawing for explaining the separation distance Ws between the upper electrode 32 and the internal electrode 31, and corresponds to the partially enlarged view of FIG.

As another sample, sample #2 was obtained in the same manner as sample #1, except that the position of the photomask 45 was intentionally shifted in step S7. In this sample #2, the average value of variations in the separation distance Ws between the upper electrode 32 and the internal electrode 31 when viewed in the Y direction was 11 μm, which greatly exceeded 5 μm.

Both sample #1 and sample #2 had a peak emission wavelength of 1300 nm and a thickness of the active layer 25 of 200 nm.

FIG. 14 is a graph showing the current-light output characteristics of the infrared LED elements of sample #1 and sample #2. FIG. 15 is a graph showing the current-forward voltage characteristics of the infrared LED elements of sample #1 and sample #2.

14 and 15, sample #1, in which the separation distance Ws between the upper electrode 32 and the internal electrode 31 was suppressed to 5 μm or less, compared to sample #2, in which the separation distance Ws greatly exceeded 5 μm. , the optical output is high and the forward voltage is low when the same current is supplied. From this result as well, it can be seen that the positional adjustment between the upper electrode 32 and the internal electrode 31 is an important factor in improving the luminous efficiency of the infrared LED element 1 .

Reference Signs List 1: infrared LED element 3: growth substrate 11: support substrate 13 (13a, 13b): bonding layer 15: reflective layer 17: insulating layer 20: semiconductor laminate 21: contact layer 23: first clad layer 25: active layer 27: Second clad layer 27a: Concavo-convex portion 31: Internal electrode 32: Upper electrode 33: Rear electrode 34: Pad electrode 41: Alignment mark 43: Photoresist 45: Photomask 45a, 45b: Mask area

Claims (7)

An infrared LED element,
a conductive support substrate;
an insulating layer formed on the support substrate;
A p-type or n-type first semiconductor layer formed on the insulating layer, an active layer formed on the first semiconductor layer, and the first semiconductor layer formed on the active layer a semiconductor laminate including a second semiconductor layer having a conductivity type different from the
an upper electrode formed on the upper layer of the semiconductor laminate;
an internal electrode that penetrates the insulating layer at a plurality of positions dispersed in a direction parallel to the main surface of the supporting substrate and electrically connects the first semiconductor layer and the supporting substrate;
An infrared LED element, wherein the film thickness T [nm] of the active layer and the peak emission wavelength λ [nm] of the infrared LED element satisfy the relationship of the following formula (1).
T≦−3.5×λ+6375 (1)
(However, λ is 1550 ≤ λ ≤ 1800.) 2. The infrared LED element according to claim 1, wherein said upper electrode is arranged at a position not facing said internal electrode with respect to a direction orthogonal to said main surface of said support substrate. 2. A variation in the distance between said internal electrode and said upper electrode closest to said internal electrode when viewed from a direction orthogonal to said main surface of said support substrate is 10 μm or less. 3. The infrared LED element according to 1 or 2. the second semiconductor layer is InP,
3. The infrared LED device according to claim 1, wherein said active layer comprises one or more materials belonging to the group consisting of GaInAsP, AlGaInAs, and InGaAs. the peak emission wavelength λ is 1000 ≤ λ <1550;
3. The infrared LED element according to claim 1, wherein the film thickness T of said active layer is 1000 nm or less. A method for manufacturing the infrared LED element according to claim 1 or 2,
step (a) of providing a growth substrate;
a step (b) of forming the second semiconductor layer on the growth substrate;
Step (c) of forming the active layer made of a material having a peak emission wavelength of λ [nm] on the second semiconductor layer with a film thickness T [nm] that satisfies the formula (1);
a step (d) of forming the first semiconductor layer and the insulating layer on the active layer;
a step (e) of forming the internal electrode inside the insulating layer;
a step (f) of bonding the supporting substrate to the upper layer of the insulating layer;
a step (g) of exposing the second semiconductor layer by peeling the growth substrate;
After forming a photoresist on the upper layer of the second semiconductor layer, a photomask patterned according to the shape of the upper electrode is positioned and arranged using an image sensor based on the position of the internal electrode. a step (h);
Step (i) of forming a material film of the upper electrode after exposure through the photomask;
and a step (j) of removing the photoresist. The step (b) is a step of forming a film made of InP,
7. The infrared LED element according to claim 6, wherein said step (c) is a step of forming a film containing one or more materials belonging to the group consisting of GaInAsP, AlGaInAs, and InGaAs. manufacturing method.

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