JP2022180811A - Semiconductor light emitting element and method for manufacturing the same - Google Patents

Abstract

To protect a ridge on a side of an end surface emitting light while suppressing a reduction in heat dissipation on the side of the end surface emitting the light.SOLUTION: A semiconductor light emitting element includes: a first conductivity type semiconductor layer; an active layer positioned on the first conductivity type semiconductor layer and having first and second end surfaces parallel to each other; a second conductivity type semiconductor layer positioned on the active layer; a ridge provided in the second conductivity type semiconductor layer from the first end surface to the second end surface and having an area where a width at a position close to the side of the first end surface is wider than that at a position distant from the side of the first end surface; a bank spaced apart from the ridge in the width direction of the ridge and provided in a manner to be convex in the second conductivity type semiconductor layer; and a heat conduction part provided at a position closer to the side of the first end surface than the side of the second end surface and having a thermal conductivity higher than that of the bank.SELECTED DRAWING: Figure 1

Description

The present invention relates to a semiconductor light emitting device and a method for manufacturing a semiconductor light emitting device.

As the output of the edge-emitting semiconductor laser element increases, the temperature of the semiconductor laser increases during operation, and kink and COD (catastrophic optical damage) occur. At this time, the temperature inside the semiconductor laser device is particularly high at the front facet from which the laser beam is emitted, due to the relationship between the light density distribution and the heat dissipation path (path from the facet from which light is emitted). As a result, as disclosed in Patent Document 1, a refractive index distribution occurs in the semiconductor layer in the vicinity of the waveguide, and the effect of confining laser light by the waveguide is locally reduced, resulting in kink. Moreover, when the temperature of the front facet rises, the forbidden band width in the vicinity of the front facet decreases, causing positive feedback that light absorption is more likely to occur, resulting in COD.

In Patent Document 2, a ridge extending in the axial direction of the resonator is formed on the upper surface of the resonator, and the ridges are formed on the output side end, the non-output side end, and from the output side end to the non-output side end. a semiconductor laser device including a tapered portion that tapers the width of the ridge toward the ridge and a stepped portion that is provided on the side of the emission-side end with respect to the non-emission-side end and changes the width of the ridge stepwise; disclosed.

Patent Document 3 discloses a p-type cladding having a striped ridge and wing regions provided with a first groove on one side of the ridge and a second groove on the other side sandwiched therebetween. and the ridge includes a region whose width decreases from the front facet side to the rear facet side.

In Patent Document 4, the upper portion of the clad layer forms a ridge portion extending in a direction connecting the front end surface and the rear end surface, and wing portions arranged on both sides of the ridge portion. is larger than the width of the ridge portion in the region excluding the front end side region, and the distance between the ridge portion and the wing portion in the front end side region is the distance between the ridge portion and the wing portion in the region excluding the front end side region. A semiconductor laser device with greater than minimum spacing is disclosed.

Japanese Patent No. 4573882 Japanese Patent No. 4657337 JP 2009-295680 A JP 2013-4855 A

However, the configuration disclosed in Patent Document 2 may cause problems such as damage to the ridge and unstable posture maintenance when the semiconductor laser element is mounted in a junction-down manner.
In addition, in the configuration disclosed in Patent Document 3, if the distance between the striped ridge and the wing regions on the front facet side becomes narrower, the heat dissipation on the front facet side is reduced, making COD more likely to occur.
In addition, in the configuration disclosed in Patent Document 4, since the distance between the striped ridge and the wing region is wide on the front end face side, the ridge may be directly touched with a tool or the like during the manufacturing process or when handling the laser. As a result, the protection performance of the ridge on the front end face side by the wing region is lowered.

SUMMARY OF THE INVENTION Accordingly, an object of the present invention is to manufacture a semiconductor light-emitting device and a semiconductor light-emitting device capable of protecting a ridge on the light-emitting facet side while suppressing a decrease in heat dissipation on the light-emitting facet side. to provide a method.

According to a semiconductor light emitting device according to an aspect of the present invention, a first conductivity type semiconductor layer, an active layer located on the first conductivity type semiconductor layer and having a first end surface and a second end surface parallel to each other, A second conductivity type semiconductor layer located on the active layer, and a second conductivity type semiconductor layer provided on the second conductivity type semiconductor layer from the first end face to the second end face, and the width of a position near the first end face is the first width. a ridge having a region wider than the width at a position far from the end face side; a bank protrudingly provided on the second conductivity type semiconductor layer at a distance from the ridge in the width direction of the ridge; and the second end face side. a thermally conductive portion provided at a position closer to the first end surface side than the bank and having a thermal conductivity higher than that of the bank.

Here, by providing a convex bank on the second-conductivity-type semiconductor layer with a space between it and the ridge in the width direction of the ridge, the impact on the ridge can be received by the bank, and damage to the ridge can be reduced. In addition, the stability during junction-down mounting can be improved.
Further, by providing the thermally conductive portion having a higher thermal conductivity than the thermal conductivity of the bank on the first end face side, it is possible to improve the heat dissipation on the first end face side. This high heat-conducting portion can suppress heat generation on the first end face side while achieving high output even when the gap between the ridge and the bank is narrowed in order to improve the protection performance of the ridge by the bank.
Furthermore, by increasing the width of the ridge near the first facet, the threshold current density, series resistance, and thermal resistance on the first facet can be reduced. It is possible to suppress heat generation on the one end face side, and by reducing the width of the ridge at a position far from the first end face side, it is possible to stabilize the transverse mode and suppress the occurrence of kinks.

Further, according to the semiconductor light emitting device according to the aspect of the present invention, the widest region of the ridge is located on the first end surface side and the second end surface side, and is located on the first end surface side and the second end surface side. A narrower region is located between the end faces.

Here, if the ridge shape is formed so that the width of the ridge straddling the cleaved position of the wafer does not change in the vicinity of the cleaved position (the widest region continues for a certain length), the cleaved position will be displaced. A constant ridge width can also be secured.

Further, according to the semiconductor light emitting device according to one aspect of the present invention, the height of the ridge and the height of the bank are equal to each other.

Thereby, the ridge and the bank can be collectively formed by etching the second conductivity type semiconductor layer located on the active layer. Therefore, there is no need to provide a process for forming the bank separately from the process for forming the ridge, and the bank can be formed while suppressing an increase in the number of processes.

Further, according to the semiconductor light emitting device according to an aspect of the present invention, the heat conducting portion (for example, the portion M3 shown in FIG. 3 or M3′ shown in FIG. 11) has the first groove, The first groove has a bottom surface lower than the top surface of the bank, extends in the width direction of the ridge, is embedded in the first groove, and is made of a metal having a higher thermal conductivity than the bank. Prepare.

Thereby, a metal having a higher thermal conductivity than the bank can be arranged at a position where heat dissipation from the ridge is blocked by the bank. Therefore, it is possible to improve heat dissipation on the first end face side while narrowing the distance between the ridge and the bank.

Further, according to the semiconductor light emitting device according to an aspect of the present invention, the bank includes a first bank on the side of the first end surface and a second bank on the side of the second end surface separated by the first groove. .

As a result, it is possible to protect the ridge on the first end face side by the first bank while improving the heat dissipation on the first end face side, and to improve the upright stability during junction-down mounting. .

Further, according to the semiconductor light emitting device according to the aspect of the present invention, the ridge and the bank are separated by the second groove extending from the first end face to the second end face at the same depth as the first groove. It is

Thereby, the first groove and the second groove can be collectively formed by etching the second conductivity type semiconductor layer located on the active layer. Therefore, there is no need to provide a step for forming the first grooves separately from the steps for forming the ridge and the bank, and it is possible to form the bank while suppressing an increase in the number of steps. , it is possible to improve the heat dissipation on the first end face side.

Moreover, according to the semiconductor light emitting device according to an aspect of the present invention, the first groove penetrates the active layer in the thickness direction.

As a result, the metal embedded in the first groove can reach a position deeper than the position of the active layer, and the heat dissipation from the active layer on the first end surface side can be further improved.

Further, according to the semiconductor light emitting device according to an aspect of the present invention, the heat conducting portion is made of metal and is part of an electrode that injects current into the active layer through the ridge.

Thereby, the metal can be embedded in the first groove when forming the electrode on the second conductivity type semiconductor layer. For this reason, it is not necessary to provide a step of embedding a metal in the first groove separately from the step of forming the electrode on the second conductivity type semiconductor layer. can be improved.

Further, according to the semiconductor light emitting device according to one aspect of the present invention, the ridge includes a current injection region for injecting a current into the active layer, and the heat conduction portion is positioned closer to the first end surface than the current injection region. located near

As a result, it is possible to suppress heat generation on the first facet side due to current injection from the current injection region, improve heat dissipation on the first facet side, and prevent COD due to a temperature rise on the first facet side. can.

Further, according to the semiconductor light emitting device according to one aspect of the present invention, the length of the bank is equal to or greater than the width of the ridge on the first end surface side.

As a result, the bank can have strength equal to or greater than the strength of the ridge, and the bank can be prevented from collapsing, so that the bank can effectively protect the ridge.

Further, according to the semiconductor light emitting device according to one aspect of the present invention, the banks are provided on both sides of the ridge, and a plurality of ridges are provided between the banks.

As a result, it is possible to improve the heat dissipation on the first end face side while achieving multi-beam laser light emitted from a single chip.

Further, according to a method for manufacturing a semiconductor light emitting device according to an aspect of the present invention, a step of sequentially forming a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer on a semiconductor substrate; By patterning the semiconductor layer of the second conductivity type, a ridge having a region having a width closer to the first end surface than a width farther from the first end surface and a first end surface having the same height as the ridge. and a second bank on the side of the second end face separated from the first bank and equal in height to the ridge; and an insulating film between the first bank and the second bank. and embedding a metal through the

Thereby, the ridge, the first bank and the second bank can be collectively formed by etching the second conductivity type semiconductor layer. Therefore, there is no need to provide a process for forming the first bank and the second bank separately from the process for forming the ridge, and the first bank and the second bank can be formed while suppressing an increase in the number of processes. As well as being able to form it, it becomes possible to improve the heat dissipation on the first end face side.

Moreover, according to the method for manufacturing a semiconductor light emitting device according to an aspect of the present invention, the method includes the step of embedding metal between the first bank and the second bank via an insulating film. forming the insulating film on the second conductivity type semiconductor layer so as to cover the surfaces of the ridge, the first bank and the second bank; an electrode embedded between the first bank and the second bank and electrically connected to the second conductivity type semiconductor layer through the opening on the insulating film; and a step of forming the

Thereby, a metal can be embedded between the first bank and the second bank when forming the electrode on the second conductivity type semiconductor layer. Therefore, there is no need to provide a step of embedding a metal between the first bank and the second bank separately from the step of forming an electrode on the second conductivity type semiconductor layer, thereby suppressing an increase in the number of steps. At the same time, heat dissipation on the first end surface side can be improved.

In one aspect of the present invention, the ridge on the side from which light is emitted is protected while suppressing the deterioration of the heat dissipation on the side from which light is emitted.

1 is a plan view showing the configuration of a semiconductor light emitting device according to a first embodiment; FIG. FIG. 2 is a cross-sectional view taken along line AA of FIG. 1; FIG. 2 is a cross-sectional view taken along line BB of FIG. 1; FIG. 2 is a cross-sectional view taken along line CC of FIG. 1; FIG. 5 is a plan view showing the configuration of a semiconductor light emitting device according to a second embodiment; 4 is a cross-sectional view taken along line BB of FIG. 3; FIG. FIG. 11 is a plan view showing the configuration of a semiconductor light emitting device according to a third embodiment; It is a top view which shows the structure of the semiconductor light-emitting device which concerns on 4th Embodiment. FIG. 11 is a plan view showing the configuration of a semiconductor light emitting device according to a fifth embodiment; FIG. 11 is a plan view showing the configuration of a semiconductor light emitting device according to a sixth embodiment; FIG. 9 is a cross-sectional view taken along line AA of FIG. 8; FIG. 9 is a cross-sectional view taken along line BB of FIG. 8; FIG. 9 is a cross-sectional view taken along line CC of FIG. 8; FIG. 11 is a plan view showing the configuration of a semiconductor light emitting device according to a seventh embodiment; FIG. 21 is a plan view showing the configuration of a semiconductor light emitting device according to a ninth embodiment; FIG. 5 is a plan view showing the configuration of a semiconductor light emitting device according to a second embodiment; FIG. 12 is a cross-sectional view taken along line AA of FIG. 11; FIG. 11 is a cross-sectional view showing an example of a method for manufacturing a semiconductor light emitting device according to a tenth embodiment, taken along line AA of FIG. 1; FIG. 11 is a cross-sectional view showing an example of a method for manufacturing a semiconductor light emitting device according to a tenth embodiment, taken along line BB of FIG. 1; FIG. 11 is a cross-sectional view showing an example of a method for manufacturing a semiconductor light emitting device according to a tenth embodiment, taken along line AA of FIG. 1; FIG. 11 is a cross-sectional view showing an example of a method for manufacturing a semiconductor light emitting device according to a tenth embodiment, taken along line BB of FIG. 1; FIG. 11 is a cross-sectional view showing an example of a method for manufacturing a semiconductor light emitting device according to a tenth embodiment, taken along line AA of FIG. 1; FIG. 11 is a cross-sectional view showing an example of a method for manufacturing a semiconductor light emitting device according to a tenth embodiment, taken along line BB of FIG. 1; FIG. 11 is a cross-sectional view showing an example of a method for manufacturing a semiconductor light emitting device according to a tenth embodiment, taken along line AA of FIG. 1; FIG. 11 is a cross-sectional view showing an example of a method for manufacturing a semiconductor light emitting device according to a tenth embodiment, taken along line BB of FIG. 1;

Hereinafter, embodiments of the present invention will be described in detail with reference to the accompanying drawings. The following embodiments do not limit the present invention, and not all combinations of features described in the embodiments are essential for the configuration of the present invention. The configuration of the embodiment can be appropriately modified or changed according to the specifications of the device to which the present invention is applied and various conditions (use conditions, use environment, etc.). The technical scope of the present invention is defined by the claims and is not limited by the following individual embodiments. In addition, the drawings used in the following description may differ from the actual structure in terms of scale, shape, etc., in order to make each configuration easier to understand.

1 is a plan view showing the configuration of the semiconductor light emitting device according to the first embodiment, FIG. 2A is a cross-sectional view taken along line AA in FIG. 1, and FIG. FIG. 2C is a cross-sectional view taken along line B, and FIG. 2C is a cross-sectional view taken along line CC in FIG.

In the following description, an edge emitting semiconductor laser device is taken as an example of a semiconductor light emitting device. This semiconductor laser element may be an AlGaAs-based semiconductor laser element capable of emitting an infrared laser with a wavelength of 780 nm, or an AlGaInP-based semiconductor laser element capable of emitting a red laser with a wavelength of 650 nm. , an AlGaInN-based semiconductor laser device capable of emitting a blue laser with a wavelength of 405 nm.

1 and 2A to 2C, the semiconductor laser element Z1 includes an n-type semiconductor layer 2, an active layer 3 and a p-type semiconductor layer 4. In FIG. An n-type semiconductor layer 2 , an active layer 3 and a p-type semiconductor layer 4 are sequentially stacked on an n-type semiconductor substrate 1 .

For example, assume that the semiconductor laser element Z1 is an AlGaInP semiconductor laser element. At this time, as the n-type semiconductor layer 2, for example, a laminated structure of an n-type GaAs buffer layer 2A and an n-type AlGaInP clad layer 2B can be used. As the active layer 3, for example, an AlGaInP/GaInP multiple quantum well (MQW) active layer can be used. As the p-type semiconductor layer 4, for example, a p-type AlGaInP first clad layer 4A, a p-type GaInP etch stop layer 4B, a p-type AlGaInP second clad layer 4C, a p-type GaInP interface layer 4D and a p-type GaAs contact layer 4E are laminated. structure can be used.

The active layer 3 has a front end surface (first end surface) EA and a rear end surface (second end surface) EB parallel to each other. At this time, the semiconductor laser element Z1 can form a resonator between the front facet EA and the rear facet EB of the active layer 3 . The front end surface EA can be used as a light emitting surface for emitting laser light from the semiconductor laser element Z1. At this time, the light reflectance on the front facet EA side can be made lower than that on the rear facet EB side. The light reflectance on the front facet EA side and the light reflectance on the rear facet EB side can be adjusted by facet coating.

A ridge RJ and banks BK1 and BK2 are formed in the p-type semiconductor layer 4 in a convex shape. At this time, the ridge RJ and the banks BK1 and BK2 can be provided on the p-type AlGaInP second cladding layer 4C. A ridge RJ can be provided in the n-type semiconductor layer 2 along the optical waveguide direction of the active layer 3 . The ridge RJ has a region where the width Wf near the front end face EA is wider than the width Wr farther from the front end face EA. The widest regions of the ridge RJ are located on the front end surface EA side and the rear end surface EB side, and the narrower regions are located between the front end surface EA side and the rear end surface EB side. A current injection region RN for injecting a current into the active layer 3 via the ridge RJ is provided on the ridge RJ.

The banks BK1 and BK2 are provided in a convex shape on the p-type semiconductor layer 4 with a gap from the ridge RJ in the width direction of the ridge RJ. For example, the banks BK1 and BK2 may be provided in the p-type semiconductor layer 4 in a terrace shape or a stud shape. At this time, in order to form the banks BK1 and BK2 in the p-type semiconductor layer 4 with a gap from the ridge RJ, grooves M2 may be provided along the optical waveguide direction between the ridge RJ and the banks BK1 and BK2. can.

The bank BK1 is located on the front end face EA side, and the bank BK2 is located on the rear end face EB side. A groove M1 extending in the width direction of the ridge RJ is provided between the banks BK1 and BK2. The trench M1 can be positioned closer to the front end face EA than the current injection region RN. At this time, if Wc is the distance from the front end face EA to the current injection region RN, Wa is the length of the bank BK1, and Wh is the width of the trench M1, Wa+Wh<Wc can be established. Also, the length Wa of the bank BK1 is preferably equal to or greater than the width Wf of the ridge RJ on the front end surface EA side.

The height Hr of the ridge RJ and the height Hb of the banks BK1 and BK2 can be made equal to each other. At this time, the height Hr of the ridge RJ and the height Hb of the banks BK1 and BK2 can be made equal to the thickness of the p-type AlGaInP second clad layer 4C. Also, the positions of the bottoms of the trenches M1 and M2 can be set at the positions of the p-type GaInP etch stop layer 4B.

An insulating layer 5 is formed on the p-type semiconductor layer 4 so as to cover the surfaces of the ridge RJ and the banks BK1 and BK2. The insulating layer 5 is, for example, a silicon oxide film or a silicon nitride film. As shown in FIG. 2C, the insulating layer 5 is formed with an opening 7 that serves as the current injection region RN.

An electrode 6 is formed on the insulating layer 5 so as to cover the ridge RJ and the banks BK1 and BK2. The thermal conductivity of the electrode 6 can be greater than that of the banks BK1, BK2. For example, the electrode 6 can be composed of a metal film such as Au. At this time, the electrodes 6 are embedded in the grooves M1 and M2. Here, the groove M1 in which the electrode 6 is embedded can be used as a heat conducting portion having a higher heat conductivity than the banks BK1 and BK2.

Although an example in which the grooves M1 in which the electrodes 6 are embedded is provided as the heat conducting portion whose heat conductivity is higher than the heat conductivity of the banks BK1 and BK2, the heat conductivity of the banks BK1 and BK2 is The trench M1 may be filled with an insulator having a higher modulus than that of the trench M1. Aluminum nitride or silicon carbide, for example, can be used as the insulator having a higher thermal conductivity than the banks BK1 and BK2. At this time, the insulating layer 5 in the groove M1 can be removed, and a decrease in thermal conductivity due to the insulating layer 5 in the groove M1 can be prevented.

Here, by providing the banks BK1 and BK2 spaced apart from the ridge RJ in the width direction of the ridge RJ, the impact on the ridge RJ can be received by the banks BK1 and BK2, thereby reducing damage to the ridge RJ. In addition, it is possible to improve the upright stability at the time of junction-down mounting.

Further, by providing the groove M1 in which the electrode 6 is embedded so as to separate the banks BK1 and BK2 at a position close to the front end surface EA, heat dissipation on the front end surface EA side can be improved. Therefore, in order to improve the protection performance of the ridge RJ by the banks BK1 and BK2, even when the distance between the ridge RJ and the banks BK1 and BK2 is narrowed, the heat generation on the front end face EA side should be suppressed while achieving high output. becomes possible, and COD can be suppressed. At this time, by providing a groove M1 so as to separate the banks BK1 and BK2 and filling it with the electrode 6, the bank BK1 can be prevented from retreating from the front end surface EA, and the ridge RJ on the front end surface EA side can be prevented. damage can be reduced. For example, as shown in FIGS. 2A and 2C, in the heat dissipation path KH from the heat source RH, the positions of the banks BK1 and BK2 hinder heat dissipation to the electrodes 6, but as shown in FIG. 2B, the electrodes 6 are buried. At the position of the recessed groove M1, the heat from the heat source RH can be dissipated to the electrode 6 without hindering the heat dissipation by the banks BK1 and BK2. The heat source RH is mainly the active layer 3 under the ridge RJ on the front end surface EA side.

Furthermore, by increasing the width Wf of the ridge near the front end face EA, the threshold current density, series resistance and thermal resistance on the front end face EA side can be reduced, and high output can be achieved. It is possible to suppress heat generation on the front end surface EA side, and by reducing the width Wr of the ridge farther from the front end surface EA side, the lateral mode can be stabilized and the occurrence of kinks can be suppressed. .
At this time, the current injection amount can be increased on the front facet EA side, where a large number of carriers are consumed in the active layer 3 by stimulated emission, compared to the rear facet EB side. Therefore, it is possible to make constant the magnitude of the carrier density in the active layer 3 with respect to the optical waveguide direction, and to reduce the reactive current on the rear facet EB side. As a result, the carriers injected into the active layer 3 can be efficiently consumed by radiative recombination due to stimulated emission, and the external differential quantum efficiency (slope efficiency) in the current-optical output characteristics can be improved. By improving the slope efficiency, the operating current can be reduced and the temperature characteristics can be improved.

Here, in order to give the ridge RJ a region in which the width Wf at the position closer to the front end face EA is wider than the width Wr at the position farther from the front end face EA, the striped ridge RJ can be given a tapered shape. . At this time, the ridge RJ can be divided into four regions Wd, We, Wg, and Wi in the optical waveguide direction. The region Wd is provided at a position in contact with the front end face EA and has a constant width Wf. The region Wi is provided at a position in contact with the rear end face EB, and is set to have a constant width Wf. The region We connects to the region Wd and gradually widens toward the region Wd. The region Wg is located between the regions We and Wi and is set to have a constant width Wr. The width Wf can be set to the widest width of the ridge RJ and the width Wr can be set to the narrowest width of the ridge RJ.

It is desirable that the width Wr is about 1 to 3 μm. It is difficult to stably manufacture a stripe width of 1 μm or less, and if the stripe width exceeds 3 μm, the transverse mode becomes unstable and kinks are likely to occur.
The width Wf is preferably 1.1 to 3 times the width Wr. If the width Wf is smaller than 1.1 times the width Wr, it becomes difficult to obtain the effect of reducing the threshold current density, the series resistance and the thermal resistance by increasing the area of the region Wd. If the width Wf is more than three times the width Wr, the transverse mode becomes unstable and kinks tend to occur.

In addition, by providing the region Wg, the transverse mode can be stabilized and kink is less likely to occur than when the region Wg is not provided. It is desirable that the length of the region Wg is 10% or more of the resonator length (Wd+We+Wg+Wi). It is desirable that the ratio of the lengths of the regions Wg and We be such that the area is 1.1 to 2 times as large. If the area is less than 1.1 times, it becomes difficult to obtain the effect of reducing the threshold current density, series resistance and thermal resistance. If the area is more than doubled, the increase in threshold current becomes significant and the operating current rises.

It is desirable that the length Wa of the bank BK1 be equal to or greater than the width Wf of the ridge RJ. As a result, it is possible to ensure the strength of the bank BK1 that is equal to or greater than the strength of the ridge RJ, and it is possible to make the bank BK1 less likely to collapse, so that the bank BK1 can effectively protect the ridge RJ. can. At this time, the length Wa of the bank BK1 is desirably 1.1 μm or more, preferably 5 μm or more, in order to secure the independence of the bank BK1. The width Wh of the groove M1 is desirably 5 μm or more so as to obtain a width sufficient to dissipate the heat on the front end surface EA side. The width W1 of the groove M2 may be narrower than the width Wf in order to ensure the effectiveness of protecting the ridge RJ.

As an example, for example, resonator length (Wd+We+Wg+Wi)=2000 μm, Wf=3 μm, Wr=2 μm, Wd=Wi=50 μm, Wg=500 μm, We=140 μm, W1=10 μm, Wh=20 μm, Wa=10 μm, Wc = 40 µm.

3 is a plan view showing the configuration of a semiconductor light emitting device according to the second embodiment, and FIG. 4 is a cross-sectional view taken along line BB in FIG. 1 and 2A to 2C will be described, and the same parts as those in FIGS. 1 and 2A to 2C will be denoted by the same reference numerals and description thereof will be omitted.

3 and 4, the semiconductor laser element Z2 has a groove M3 added to the semiconductor laser element Z1 of FIG. The groove M3 is located inside the groove M1 in the width direction, and the depth of the groove M3 is deeper than the depth of the groove M1. For example, as shown in FIG. 4, the trench M3 can penetrate through the active layer 3 in the thickness direction and reach the n-type semiconductor layer 2 . At this time, the insulating layer 5 can cover the surfaces of the ridge RJ and the banks BK1 and BK2 as well as the inner surfaces of the trenches M1 and M3. The electrode 6 is embedded not only in the groove M1 but also in the groove M3.

At this time, in the heat dissipation path KH from the heat source RH, at the position of the groove M3 in which the electrode 6 is embedded, not only can the banks BK1 and BK2 prevent heat dissipation, but the n-type semiconductor layer 2 also prevents heat dissipation. It is possible to further improve the heat dissipation from the heat source RH to the electrode 6 .

3 and 4 show an example in which the groove M3 is provided inside the groove M1 in the width direction, the depth of the groove M1 itself is set so as to penetrate the active layer 3 in the thickness direction. You may

FIG. 5 is a plan view showing the configuration of a semiconductor light emitting device according to the third embodiment.
In FIG. 5, a semiconductor laser element Z3 has a bank BK3 and a groove M4 in place of the banks BK1, BK2 and groove M1 of the semiconductor laser element Z1 of FIG. The bank BK3 is provided continuously from the front end face EA side to the rear end face EB side with a gap from the ridge RJ in the width direction of the ridge RJ. The groove M1 is provided in the width direction of the ridge RJ so as to separate the banks BK1 and BK2, but the groove M4 is provided concavely in the bank BK3 so as to open on the ridge RJ side. Even with such a configuration, it is possible to improve the heat dissipation on the front end surface EA side.

FIG. 6 is a plan view showing the configuration of a semiconductor light emitting device according to the fourth embodiment.
In FIG. 6, semiconductor laser element Z4 has banks BK4 and BK5 and groove M5 in place of bank BK2 of semiconductor laser element Z1 of FIG. The banks BK4 and BK5 are protrudingly provided on the p-type semiconductor layer 4 with a gap from the ridge RJ in the width direction of the ridge RJ. Bank BK5 is located on the rear end face EB side, and bank BK4 is located between banks BK1 and BK5. A groove M5 extending in the width direction of the ridge RJ is provided between the banks BK4 and BK5. A groove M5 separates the banks BK4 and BK5. An electrode 6 is embedded in the groove M5. At this time, the groove M5 in which the electrode 6 is embedded can be used as a heat conducting portion having a higher heat conductivity than the banks BK1, BK4, and BK5.

Here, by providing the groove M5 in which the electrode 6 is embedded at a position close to the rear end face EB side, the heat dissipation property on the rear end face EB side can be improved, and COD on the rear end face EB side can be prevented. .

FIG. 7 is a plan view showing the configuration of a semiconductor light emitting device according to the fifth embodiment.
In FIG. 7, a semiconductor laser element Z5 has ridges RJ1 and RJ2 instead of the ridge RJ of the semiconductor laser element Z1 in FIG. The ridges RJ1 and RJ2 are arranged in parallel in the width direction. Each ridge RJ1, RJ2 can be configured similarly to ridge RJ.

A bank BK6 is provided at a position sandwiching the ridges RJ1 and RJ2 on the side of the front end surfaces EA1 and EA2 of the ridges RJ1 and RJ2, and a bank BK7 is provided at a position sandwiching the ridges RJ1 and RJ2 on the side of the rear end surfaces EB1 and EB2. is provided. The ridges RJ1 and RJ2 are separated by a groove M7, the ridge RJ1 and the banks BK6 and BK7 are separated by a groove M8, and the ridge RJ2 and the banks BK6 and BK7 are separated by a groove M9. A groove M6 is provided between the banks BK6 and BK7. The groove M6 is provided in the width direction of the ridges RJ1 and RJ2 so as to separate the banks BK6 and BK7. Electrodes 6 are embedded in the grooves M6 to M9. At this time, the groove M6 in which the electrode 6 is embedded can be used as a heat conducting portion having a higher heat conductivity than the banks BK6 and BK7.

As a result, heat radiation from the active layer 3 under the ridges RJ1 and RJ2 on the front end faces EA1 and EA2 can be improved, and laser light emitted from a single chip can be multi-beamed and have a high output. COD can be suppressed while achieving

Although FIG. 7 shows an example in which the semiconductor laser element Z5 has two ridges RJ1 and RJ2, it may have three or more ridges.

8 is a plan view showing the configuration of a semiconductor light emitting device according to the sixth embodiment, FIG. 9A is a cross-sectional view taken along line AA of FIG. 8, and FIG. FIG. 9C is a cross-sectional view taken along line B, and FIG. 9C is a cross-sectional view taken along line CC of FIG.

8 and 9A to 9C, the semiconductor laser device Z6 has a current injection region RN' instead of the current injection region RN of the semiconductor laser device Z1 of FIG. At this time, as shown in FIGS. 9B and 9C, the insulating layer 5 is formed with an opening 7' that will become the current injection region RN'. Other points are the same as the configuration of the semiconductor laser element Z1 in FIG. Here, the end of the current injection region RN' on the front end surface EA side can be positioned closer to the front end surface EA than the trench M1. At this time, Wa>Wc can be satisfied.

In this configuration, the trenches M1 can be arranged so that the current injection regions RN' are adjacent to each other through the trenches M2 in the width direction of the ridge RJ. Therefore, the heat generated by the current injected through the current injection region RN' can be efficiently released through the trench M1.

FIG. 10A is a plan view showing the configuration of a semiconductor light emitting device according to a seventh embodiment;
In FIG. 10A, semiconductor laser element Z7 includes banks BK1' and BK2' and groove M1' instead of banks BK1 and BK2 and groove M1 of semiconductor laser element Z1 of FIG. Other points are the same as the configuration of the semiconductor laser element Z1 in FIG.

Here, in the semiconductor laser element Z1 of FIG. 1, the groove M1 extends straight parallel to the width direction of the ridge RJ so as to separate the banks BK1 and BK2. On the other hand, in the semiconductor laser element Z7 of FIG. 10A, the groove M1' extends straight in the width direction and oblique direction of the ridge RJ so as to separate the banks BK1' and BK2'. An electrode 6 is embedded in the groove M1'. At this time, the groove M1' in which the electrode 6 is embedded can be used as a heat conducting portion having a higher heat conductivity than the banks BK1' and BK2'.

Here, by providing the groove M1' in which the electrode 6 is embedded so as to extend in the width direction and oblique direction of the ridge RJ, the electrode 6 can be formed without lowering the protection performance of the ridge RJ by the banks BK1' and BK2'. can increase the area of the groove M1' in which is embedded, and can improve the heat dissipation on the front end surface EA side.

10B is a plan view showing the configuration of the semiconductor light emitting device according to the eighth embodiment; FIG.
In FIG. 10B, semiconductor laser element Z8 has banks BK1'', BK2'' and groove M1'' instead of banks BK1, BK2 and groove M1 of semiconductor laser element Z1 in FIG. Other points are the same as the configuration of the semiconductor laser element Z1 in FIG.

Here, in the semiconductor laser element Z1 of FIG. 1, the groove M1 extends straight parallel to the width direction of the ridge RJ so as to separate the banks BK1 and BK2. On the other hand, in the semiconductor laser element Z8 of FIG. 10B, the groove M1'' extends in the width direction of the ridge RJ with an uneven shape so as to separate the banks BK1'' and BK2''. An electrode 6 is embedded in the groove M1''. At this time, the groove M1'' in which the electrode 6 is embedded can be used as a heat conducting portion having a higher heat conductivity than the banks BK1'' and BK2''.

Here, the protection performance of the ridge RJ by the banks BK1'' and BK2'' is reduced by providing the groove M1'' in which the electrode 6 is embedded so as to extend in the width direction of the ridge RJ with an uneven shape. Instead, the area of the groove M1'' in which the electrode 6 is embedded can be increased, and the heat dissipation on the front end surface EA side can be improved.

11 is a plan view showing the configuration of a semiconductor light emitting device according to the ninth embodiment, and FIG. 12 is a cross-sectional view taken along line AA of FIG. 11. As shown in FIG.

11 and 12, the semiconductor laser element Z9 has a groove M3' added to the semiconductor laser element Z2 of FIG. The groove M3' is located inside the front end face EA side of the groove M2, and the depth of the groove M3' is deeper than the depth of the groove M2. For example, as shown in FIG. 12, the groove M3' can penetrate the active layer 3 in the thickness direction and reach the n-type semiconductor layer 2. As shown in FIG. At this time, the depths of the grooves M3 and M3' can be the same. The insulating layer 5 can cover the surfaces of the ridge RJ and the banks BK1 and BK2 as well as the inner surfaces of the trenches M1, M3 and M3'. The electrodes 6 are embedded not only in the groove M1, but also in the grooves M3 and M3'.

At this time, at the position of the groove M3' where the electrode 6 is embedded, the heat from the heat source RH can be dissipated through the electrode 6 embedded in the groove M3', and the heat is dissipated from the heat source RH to the electrode 6. It is possible to further improve the property.

In the configurations of FIGS. 11 and 12, the groove M3' is located inside the front end surface EA of the groove M2, but it may be formed so as to reach the front end surface EA, or may be formed so as to reach the front end surface EA. It may be formed from the surface EA to the rear end surface EB.

13A1 to 13A4 are cross-sectional views showing an example of a method for manufacturing a semiconductor light emitting device according to the tenth embodiment, taken along line AA in FIG. 1, and FIGS. 13B1 to 13B4 are the tenth embodiment. 2 is a cross-sectional view showing an example of the method for manufacturing a semiconductor light emitting device according to FIG. 1 taken along line BB of FIG.

13A1 and 13B1, an n-type semiconductor layer 2, an active layer 3 and a p-type semiconductor layer 4 are successively laminated on an n-type semiconductor substrate 1 by epitaxial growth. In the p-type semiconductor layer 4, a p-type AlGaInP first clad layer 4A, a p-type GaInP etch stop layer 4B and a p-type AlGaInP second clad layer 4C can be formed. The p-type GaInP etch stop layer 4B has a smaller etching rate than the p-type AlGaInP first clad layer 4A and the p-type AlGaInP second clad layer 4C.

Next, as shown in FIGS. 13A2 and 13B2, the p-type AlGaInP second cladding layer 4C is patterned by using photolithography and dry etching techniques, and the ridge RJ and the banks BK1 and BK2 are p-type AlGaInP first cladding layers. It is formed on the clad layer 4A. At this time, the etching of the p-type AlGaInP second cladding layer 4C in the depth direction can be stopped at the position of the p-type GaInP etch stop layer 4B, and the height of the ridge RJ and the banks BK1 and BK2 is reduced to the p-type AlGaInP second cladding layer 4C. 2 It can be defined by the thickness of the clad layer 4C.
1 can be formed during etching of the p-type AlGaInP second cladding layer 4C for forming the grooves M2 between the ridge RJ and the banks BK1 and BK2. can be prevented.

Next, as shown in FIGS. 13A3 and 13B3, an insulating layer 5 made of a silicon oxide film, a silicon nitride film, or the like is formed by a method such as CVD (Chemical Vapor Deposition) on the surfaces of the ridge RJ and the banks BK1 and BK2 and p-type. It is formed on the GaInP etch stop layer 4B.

Next, as shown in FIGS. 13A4 and 13B4, the insulating layer 5 is patterned by using a photolithographic technique and a dry etching technique to form the opening 7 in the insulating layer 5 as shown in FIG. 2C. Then, by using a method such as sputtering or vapor deposition, electrodes 6 connected to the ridges RJ through the openings 7 and embedded in the grooves M1 and M2 are formed on the insulating layer 5 .
At this time, by depositing the electrode 6 on the insulating layer 5, the electrode 6 can be connected to the ridge RJ through the opening 7, and the electrode 6 can be embedded in the grooves M1 and M2. An increase in the number of steps can be prevented.

Reference Signs List 1 n-type semiconductor substrate 2 n-type semiconductor layer 3 active layer 4 p-type semiconductor layer 5 insulating layer 6 electrode RJ ridge RN current injection regions BK1, BK2 banks M1, M2 grooves

Claims (13)

a first conductivity type semiconductor layer;
an active layer positioned on the semiconductor layer of the first conductivity type and having a first end surface and a second end surface parallel to each other;
a second conductivity type semiconductor layer located on the active layer;
a ridge provided in the second conductivity type semiconductor layer from the first end surface to the second end surface and having a region having a width closer to the first end surface than a width farther from the first end surface;
a bank provided in a convex shape on the second conductivity type semiconductor layer with a gap from the ridge in the width direction of the ridge;
A semiconductor light emitting device, comprising: a heat conductive portion provided at a position closer to the first end face side than to the second end face side and having a thermal conductivity higher than that of the bank. The widest regions of the ridge are positioned on the first end face side and the rear end face side, and a narrower region is positioned between the first end face side and the second end face side. The semiconductor light emitting device according to claim 1. 3. The semiconductor light emitting device according to claim 1, wherein the height of said ridge and the height of said bank are equal to each other. The heat conducting part has a first groove,
the first groove has a bottom surface lower than the top surface of the bank and extends in the width direction of the ridge;
2. The semiconductor light emitting device according to claim 1, further comprising a metal buried in said first groove and having a higher thermal conductivity than said bank. 5. The semiconductor light-emitting device according to claim 4, wherein said bank comprises a first bank on said first end face side and a second bank on said second end face side separated by said first groove. 6. The semiconductor light emitting device according to claim 5, wherein said ridge and said bank are separated by a second groove extending from said first end face to said second end face at the same depth as said first groove. element. 5. The semiconductor light emitting device of claim 4, wherein the first groove penetrates the active layer in a thickness direction. 2. The semiconductor light emitting device according to claim 1, wherein the heat conducting portion is made of metal and is a part of an electrode for injecting current into the active layer through the ridge. the ridge includes a current injection region for injecting current into the active layer;
2. The semiconductor light emitting device according to claim 1, wherein the heat conducting portion is positioned closer to the first end surface than the current injection region. 2. The semiconductor light emitting device according to claim 1, wherein the length of said bank is equal to or greater than the width of said ridge on said first end face side. 2. The semiconductor light emitting device according to claim 1, wherein said bank is provided on both sides of said ridge, and a plurality of said ridges are provided between said banks. sequentially forming a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer on a semiconductor substrate;
a ridge having a region in which a width of a position close to a position corresponding to a first end face is wider than a width of a position far from a position corresponding to the first end face by patterning the second conductivity type semiconductor layer; and forming a first bank on the side of the first end face having the same height and a second bank on the side of the second end face that is spaced apart from the first bank and has the same height as the ridge;
A method of manufacturing a semiconductor light emitting device, comprising: embedding a metal between the first bank and the second bank through an insulating film. The step of embedding a metal through an insulating film between the first bank and the second bank includes:
forming the insulating film on the second conductivity type semiconductor layer so as to cover the surfaces of the ridge, the first bank and the second bank;
a step of forming an opening to be a current injection region in the insulating film on the ridge;
forming, on the insulating film, an electrode embedded between the first bank and the second bank and electrically connected to the second conductivity type semiconductor layer through the opening. 13. The method for manufacturing a semiconductor light emitting device according to claim 12.

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