JP2022154920A - Quantum computing device and manufacturing method for the same - Google Patents

Abstract

To provide a quantum computing device capable of increasing the number of quantum bits without improving the cooling capacity of a cooling source, and a manufacturing method for the same.SOLUTION: The quantum computing device includes: a first substrate; a second substrate; a quantum chip provided on the first substrate and including a plurality of quantum bit units functioning as a quantum bit; a transmission unit provided on the second substrate and transmitting a microwave control signal controlling the plurality of quantum bit units to the plurality of quantum bits through a space; a first cooling source for cooling the first substrate; and a second cooling source for cooling the second substrate.SELECTED DRAWING: Figure 1

Description

The present disclosure relates to a quantum arithmetic device and a manufacturing method thereof.

Quantum computing devices using superconducting qubits are being investigated. In order to achieve superconductivity and to reduce heat-induced noise, a cooling source with extremely high cooling capacity, such as a dilution refrigerator, is used.

JP 2020-61554 A JP 2020-61447 A WO2020/075150

Increasing the number of built-in qubits is effective in increasing the functionality of quantum arithmetic devices. However, as the number of qubits increases, the number of control lines for controlling the qubits also increases, and heat tends to flow into the quantum chip including the qubits through the control lines. For this reason, with conventional technology, it is difficult to increase the number of qubits without further improving the cooling capacity.

An object of the present disclosure is to provide a quantum arithmetic device capable of increasing the number of quantum bits without improving the cooling capacity of a cooling source, and a method of manufacturing the same.

According to one aspect of the present disclosure, a first substrate, a second substrate, a quantum chip provided on the first substrate and including a plurality of qubit units each functioning as a quantum bit, and on the second substrate a sending unit provided to send a microwave control signal for controlling the plurality of qubit units toward the plurality of qubits through space; a first cooling source for cooling the first substrate; and a second cooling source for cooling the second substrate.

According to the present disclosure, the number of qubits can be increased without increasing the cooling capacity of the cooling source.

1 is a diagram showing a quantum arithmetic device according to a first embodiment; FIG. It is a figure which shows the quantum arithmetic apparatus which concerns on 2nd Embodiment. It is a figure which shows the quantum arithmetic apparatus which concerns on 3rd Embodiment. It is a figure which shows the quantum arithmetic apparatus which concerns on 4th Embodiment.

Embodiments of the present disclosure will be specifically described below with reference to the accompanying drawings. In the present specification and drawings, constituent elements having substantially the same functional configuration may be denoted by the same reference numerals, thereby omitting redundant description.

(First embodiment)
First, the first embodiment will be described. The first embodiment relates to a quantum arithmetic device. FIG. 1 is a diagram showing a quantum arithmetic device according to the first embodiment.

As shown in FIG. 1, the quantum arithmetic device 100 according to the first embodiment has a quantum circuit board 110, a control waveform transmission board 120, and a control section .

A quantum chip 111 is provided on the quantum circuit board 110 . Quantum circuit board 110 includes a circuit to which quantum chip 111 is connected. Quantum chip 111 includes a plurality of quantum bit units 112 each functioning as a quantum bit, and a plurality of reception patterns 113 each connected to quantum bit unit 112 . The reception pattern 113 functions as a reception antenna. The number of quantum bit units 112 and the number of reception patterns 113 are equal. The qubit unit 112 and the reception pattern 113 are connected to each other via a coplanar line (CPW) 114, for example. The number of sets of quantum bit units 112 and reception patterns 113 is not limited, and may be 16 or 64, for example. Quantum circuit board 110 is an example of a first board.

A control waveform transmission board 120 is provided with a transmission section 121 . The sending unit 121 includes a plurality of sending patterns 123 each corresponding to the qubit unit 112 . The transmission pattern 123 functions as a transmission antenna. The number of transmission patterns 123 is equal to the number of quantum bit units 112 . The control waveform delivery board 120 has the same number of coaxial connectors 124 as delivery patterns 123 . The control waveform sending board 120 is an example of a second board.

The quantum circuit board 110 and the control waveform delivery board 120 are arranged apart from each other, and the quantum circuit board 110 and the control waveform delivery board 120 face each other. The distance between the quantum circuit board 110 and the control waveform transmission board 120 is, for example, about 100 μm to 1 mm. A space exists between the quantum circuit board 110 and the control waveform delivery board 120 . This space is normally a vacuum.

The control unit 130 includes the same number of waveform generators 131 as the qubit units 112 . One end of coaxial cable 141 is connected to each waveform generator 131 , and the input of attenuator 151 is connected to the other end of coaxial cable 141 . One end of the coaxial cable 142 is connected to the output of the attenuator 151 , and the input of the attenuator/filter 152 is connected to the other end of the coaxial cable 142 . One end of the coaxial cable 143 is connected to the output of the attenuator/filter 152 , and the other end of the coaxial cable 143 is connected to the coaxial connector 124 of the control waveform transmission board 120 .

The quantum computing device 100 further has a first cooling source 161 , a second cooling source 162 and a third cooling source 163 . The first cooling source 161 cools the quantum circuit board 110 . The first cooling source 161 is, for example, a dilution refrigerator, and cools the quantum circuit board 110 to a temperature of about 10 mK. The second cooling source 162 primarily cools the controlled waveform delivery board 120 and the attenuator and filter 152 . A second cooling source 162 cools the controlled waveform delivery board 120 and attenuator/filter 152 to a temperature on the order of 100 mK. The third cooling source 163 mainly cools the attenuator 151 . The third cooling source cools the attenuator 151 to a temperature of about several K. The temperature of the controller 130 including the waveform generator 131 is, for example, room temperature.

Thus, the first cooling source 161 cools the quantum circuit board 110 to a first temperature (eg, about 10 mK), and the second cooling source 162 cools the controlled waveform delivery board 120 to a second temperature higher than the first temperature (eg, about 10 mK). 100 mK). The second cooling source 162 may be coupled to the controlled waveform delivery board 120 to cool the controlled waveform delivery board 120 directly or indirectly cool the controlled waveform delivery board 120 via the ground conductor of the coaxial cable 143 . may

In the quantum arithmetic device 100 , the waveform generator 131 generates and outputs a microwave control signal for controlling the quantum bit unit 112 . The frequency of the control signal is, for example, approximately 5 GHz. A control signal output from the waveform generator 131 is input to the sending section 121 via the coaxial cable 141 , the attenuator 151 , the coaxial cable 142 , the attenuator/filter 152 , the coaxial cable 143 and the coaxial connector 124 . The sending unit 121 sends out the input control signal from the sending pattern 123 . The control signal transmitted from the transmission pattern 123 reaches the quantum chip 111 through the space between the control waveform transmission board 120 and the quantum circuit board 110 . The control signal that has reached the quantum chip 111 is input to the quantum bit section 112 via the reception pattern 113, and the quantum bit section 112 is controlled.

In the quantum arithmetic device 100, the control waveform transmission board 120 and the quantum circuit board 110 are separated by a space, and control signals are transmitted through the space. Therefore, it is not necessary to connect a coaxial cable to the quantum circuit board 110, and heat from the control waveform transmission board 120 is less likely to flow into the quantum circuit board 110 even if the number of the quantum bit units 112 increases. Therefore, the number of quantum bit units 112 provided on the quantum circuit board 110 can be increased without enhancing the cooling capacity.

Moreover, since it is not necessary to connect a coaxial cable to the quantum circuit board 110, noise transmitted through the coaxial cable can be suppressed.

If the quantum bit unit 112 has a function of receiving the control signal transmitted from the transmission pattern 123, the reception pattern 113 may not be provided.

When manufacturing the quantum arithmetic device 100 having such a configuration, first, the quantum circuit board 110 provided with the quantum chip 111 and the control waveform transmission board 120 equipped with the transmission section 121 are prepared and positioned. . A first cooling source 161 is provided to cool the quantum circuit board 110 and a second cooling source 162 is provided to cool the control waveform transmission board 120 . Connection of the coaxial cable 143 to the control waveform transmission board 120 may be performed before the above steps or after the above steps.

Also, the number of transmission patterns 123 and the number of quantum bit units 112 do not need to match. For example, the number of transmission patterns 123 may be less than the number of qubit units 112 when multiplexed control signals can be transmitted to a plurality of qubit units 112 from one transmission pattern 123 . Also, when a certain quantum bit unit is controlled via another coupled quantum bit unit, the number of transmission patterns 123 may be less than the number of quantum bit units 112 .

(Second embodiment)
Next, a second embodiment will be described. FIG. 2 is a diagram showing a quantum arithmetic device according to the second embodiment.

As shown in FIG. 2, in the quantum arithmetic device 200 according to the second embodiment, a surface 110A of the quantum circuit board 110 facing the control waveform transmission board 120 and a surface of the control waveform transmission board 120 facing the quantum circuit board 110 A plurality of spacers 201 are provided between 120A. For example, three or more spacers 201 are provided. When the shape of the control waveform transmitting substrate 120 is a square when viewed from the direction perpendicular to the surface 120A, a total of four spacers 201 may be provided at the four corners. Also, a total of five spacers 201 may be provided in the center in addition to the four corners. Arrangement of the spacer 201 is arbitrary.

Spacer 201 is preferably made of a material with low thermal conductivity. Examples of the material of the spacer 201 include a niobium titanium (NbTi) alloy and solder that become superconducting at a temperature (about 100 mK) cooled by the second cooling source 162 or higher. An organic resin may be used as the material of the spacer 201 . The shape of the spacer 201 may be, for example, spherical or columnar. The diameter of the spacer 201 is, for example, approximately 100 μm to 1 mm.

For example, the spacers 201 can be fused to the surface 120A of the control waveform transmitting substrate 120 in advance, attached to the quantum circuit substrate 110 while being aligned, and pressed to fix the spacers 201 to the quantum circuit substrate 110 . .

A heat block 210 is attached to the surface 110B of the quantum circuit board 110 opposite to the surface 110A. The heat block 210 is, for example, a copper (Cu) material. A gold (Au) plating film may be provided on the surface of the Cu material. The heat block 210 and the quantum circuit board 110 are in contact with the first cooling source 161 . The first cooling source 161 has a plate-like shape, and a through hole 261 is formed in the first cooling source 161 .

Attenuator and filter 152 is in contact with secondary cooling source 162 . Also, the ground conductor of the coaxial cable 143 is in contact with the second cooling source 162 . The coaxial cable 143 passes through the through hole 261 of the first cooling source 161, extends to the opposite side of the second cooling source 162 from the first cooling source 161, and connects to the coaxial connector 124 of the controlled waveform output board 120 (see FIG. 1). It is connected to the. A heat insulating support member 262 that supports the coaxial cable 143 is provided in the through hole 261 . The insulating support member 262 is preferably constructed of a material with low thermal conductivity. Examples of the material of the heat insulating support member 262 include organic resins such as polytetrafluoroethylene (PTFE).

Other configurations are the same as those of the first embodiment. For example, although only one set of the coaxial cable 142, the attenuator/filter 152, the coaxial cable 143, the through hole 261, and the heat insulating support member 262 is shown in FIG. It is

Effects similar to those of the first embodiment can also be obtained by the second embodiment. In addition, since the spacer 201 is provided, it is easy to adjust the distance between the transmission pattern 123 and the reception pattern 113 with high accuracy, and it is easy to reduce signal loss and crosstalk of control waveforms between a plurality of qubit units. .

Furthermore, the quantum circuit board 110 is arranged on the side opposite to the second cooling source 162 as viewed from the first cooling source 161 . Therefore, the quantum circuit board 110 is less likely to be affected by the second cooling source 162 . Furthermore, the portion of the coaxial cable 143 inside the through hole 261 is thermally separated from the first cooling source 161 by the heat insulating support member 262 . Therefore, the first cooling source 161 is less susceptible to heat from the coaxial cable 143 .

(Third embodiment)
Next, a third embodiment will be described. FIG. 3 is a diagram showing a quantum arithmetic device according to the third embodiment.

As shown in FIG. 3 , in the quantum processor 300 according to the third embodiment, a reception pattern 313 is provided outside the quantum chip 111 instead of the reception pattern 113 . In this example, the number of quantum bit units 112 included in the quantum chip 111 is 16, and 16 reception patterns 313 are provided on the surface 110A of the quantum circuit substrate 110. FIG. Each reception pattern 313 is connected to the quantum bit section 112 in the quantum chip 111 via a coplanar line 314 . The 16 reception patterns 313 are arranged to surround the quantum chip 111 in plan view from the direction perpendicular to the surface 110A.

A transmission pattern 123 is arranged on the surface 120A of the control waveform transmission substrate 120 so as to face the reception pattern 313 . An opening 325 is formed in the control waveform delivery substrate 120 so as to be surrounded by the 16 delivery patterns 123 in plan view from the direction perpendicular to the surface 120A. The opening 325 is, for example, larger than the quantum chip 111 when viewed from above in a direction perpendicular to the surface 110A of the quantum circuit substrate 110, and the entire quantum chip 111 can be seen through the opening 325.

Other configurations are the same as those of the second embodiment. For example, although illustration is omitted, a spacer 201 and the like are provided.

Effects similar to those of the second embodiment can also be obtained by the third embodiment. In addition, since the control waveform transmission substrate 120 has the opening 325 , the quantum chip 111 can be made less susceptible to the signals transmitted through the control waveform transmission substrate 120 .

(Fourth embodiment)
Next, a fourth embodiment will be described. FIG. 4 is a diagram showing a quantum arithmetic device according to the fourth embodiment.

As shown in FIG. 4 , in a quantum arithmetic device 400 according to the fourth embodiment, a quantum circuit board 110 is provided with a plurality of, for example, nine quantum chips 111 . Of the nine quantum chips 111, five quantum chips 111 are provided on the surface 110A and four quantum chips 111 are provided on the surface 110B. When the quantum circuit board 110 is seen through, the nine quantum chips 111 are arranged in a lattice. Although illustration is omitted, as in the third embodiment, a plurality of reception patterns 313 (see FIG. 3) are provided around each quantum chip 111 and connected to the quantum bit unit 112 within the quantum chip 111. .

The quantum circuit board 110 is made of Si, for example, and includes, for example, three wiring layers. One of the three wiring layers is provided on the surface 110A, another layer is provided on the surface 110B, and another layer is provided between the surfaces 110A and 110B. Wiring layers adjacent in the thickness direction are connected to each other through through-hole vias. The through-hole via is preferably made of a material that becomes superconducting at a temperature (approximately 10 mK) cooled by the first cooling source 161 . A plurality of quantum chips 111 are connected to each other via such multilayer wiring.

Five openings 325 are formed in the control waveform transmitting substrate 120 so as to correspond to the five quantum chips 111 provided on the surface 110A of the quantum circuit substrate 110, respectively, as in the third embodiment. ing. Although not shown, a plurality of transmission patterns 123 (see FIG. 3) are provided for each opening 325 on the surface 120A of the control waveform transmission substrate 120 facing the quantum circuit substrate 110 so as to surround the opening 325. ing. For example, the sending patterns 123 provided on the surface 120A face the receiving patterns 313 provided on the surface 110A.

Quantum arithmetic unit 400 further includes a control waveform delivery board 420 . Control waveform delivery board 420 has a configuration similar to control waveform delivery board 120, except for the placement of the openings. The control waveform transmission board 420 is formed with four openings 325 corresponding to the four quantum chips 111 provided on the surface 110B of the quantum circuit board 110, respectively, as in the third embodiment. ing. Although not shown, a plurality of transmission patterns 123 (see FIG. 3) are provided for each opening 325 on the surface 420A of the control waveform transmission substrate 420 facing the quantum circuit substrate 110 so as to surround the opening 325. ing. For example, the sending patterns 123 provided on the surface 420A face the receiving patterns 313 provided on the surface 110B, respectively.

A heat transfer frame 410 is provided instead of the heat block 210 . The heat transfer frame 410 is in contact with part of the outer circumference of the quantum circuit board 110 and in contact with the first cooling source 161 (see FIG. 2). The heat transfer frame 410 is, for example, a copper (Cu) material. A gold (Au) plating film may be provided on the surface of the Cu material.

Other configurations are the same as those of the third embodiment.

Effects similar to those of the third embodiment can also be obtained by the fourth embodiment. In addition, since a plurality of quantum chips 111 are provided on the quantum circuit board 110, the quantum bit units 112 can be integrated with higher density.

Although the preferred embodiments and the like have been described in detail above, the present invention is not limited to the above-described embodiments and the like, and various modifications can be made to the above-described embodiments and the like without departing from the scope of the claims. Modifications and substitutions can be made.

Hereinafter, various aspects of the present disclosure will be collectively described as appendices.

(Appendix 1)
a first substrate;
a second substrate;
a quantum chip provided on the first substrate and including a plurality of qubit units each functioning as a qubit;
a sending unit provided on the second substrate for sending a microwave control signal for controlling the plurality of qubit units toward the plurality of qubits through space;
a first cooling source that cools the first substrate;
a second cooling source that cools the second substrate;
A quantum arithmetic device characterized by comprising:
(Appendix 2)
the first cooling source cools the first substrate to a first temperature;
2. The quantum processing device according to claim 1, wherein said second cooling source cools said second substrate to a second temperature higher than said first temperature.
(Appendix 3)
the first substrate and the second substrate face each other;
The quantum chip is provided on a surface of the first substrate facing the second substrate,
3. The quantum arithmetic device according to appendix 1 or 2, wherein the sending unit is provided on a surface of the second substrate facing the first substrate.
(Appendix 4)
3. The quantum arithmetic device according to claim 3, further comprising a spacer provided between the first substrate and the second substrate.
(Appendix 5)
5. The quantum arithmetic device according to appendix 3 or 4, wherein an opening is formed in a portion of the second substrate facing the quantum chip.
(Appendix 6)
6. The quantum arithmetic device according to any one of appendices 1 to 5, wherein the sending unit has a plurality of sending patterns each corresponding to the quantum bit unit.
(Appendix 7)
7. The quantum arithmetic device according to any one of appendices 1 to 6, further comprising a plurality of reception patterns provided on the first substrate and each connected to the quantum bit unit.
(Appendix 8)
The second cooling source is arranged on one side of the first cooling source,
8. The quantum processing device according to any one of appendices 1 to 7, wherein the first substrate and the second substrate are arranged on the other side of the first cooling source.
(Appendix 9)
A plurality of the quantum chips are provided on the first substrate,
9. The quantum arithmetic device according to any one of additional notes 1 to 8, wherein the sending unit sends the control signal to each of the plurality of quantum bit units included in the plurality of quantum chips.
(Appendix 10)
preparing a first substrate provided with a quantum chip including a plurality of qubit units each functioning as a qubit;
A step of preparing a second substrate provided with a sending unit for sending a microwave control signal for controlling the plurality of qubit units toward the plurality of qubits through space;
aligning the first substrate and the second substrate with each other;
providing a first cooling source for cooling the first substrate and a second cooling source for cooling the second substrate;
A method of manufacturing a quantum arithmetic device, comprising:

100, 200, 300, 400: Quantum arithmetic device 110: Quantum circuit board 110A, 110B: Surface 111: Quantum chip 112: Quantum bit unit 113, 313: Receiving pattern 120, 420: Control waveform sending substrate 120A, 420A: Surface 121 : Delivery part 123: Delivery pattern 130: Control part 161: First cooling source 162: Second cooling source 201: Spacer 325: Opening

Claims (9)

a first substrate;
a second substrate;
a quantum chip provided on the first substrate and including a plurality of qubit units each functioning as a qubit;
a sending unit provided on the second substrate for sending a microwave control signal for controlling the plurality of qubit units toward the plurality of qubits through space;
a first cooling source that cools the first substrate;
a second cooling source that cools the second substrate;
A quantum arithmetic device characterized by comprising: the first cooling source cools the first substrate to a first temperature;
2. The quantum processing device according to claim 1, wherein said second cooling source cools said second substrate to a second temperature higher than said first temperature. the first substrate and the second substrate face each other;
The quantum chip is provided on a surface of the first substrate facing the second substrate,
3. The quantum arithmetic device according to claim 1, wherein the sending section is provided on a surface of the second substrate facing the first substrate. 4. The quantum arithmetic device according to claim 3, further comprising a spacer provided between said first substrate and said second substrate. 5. The quantum arithmetic device according to claim 3, wherein an opening is formed in a portion of said second substrate facing said quantum chip. 6. The quantum arithmetic device according to any one of claims 1 to 5, wherein the sending unit has a plurality of sending patterns each corresponding to the quantum bit unit. 7. The quantum arithmetic device according to claim 1, further comprising a plurality of reception patterns provided on said first substrate and each connected to said quantum bit unit. The second cooling source is arranged on one side of the first cooling source,
8. The quantum processing device according to claim 1, wherein the first substrate and the second substrate are arranged on the other side of the first cooling source. preparing a first substrate provided with a quantum chip including a plurality of qubit units each functioning as a qubit;
A step of preparing a second substrate provided with a sending unit for sending a microwave control signal for controlling the plurality of qubit units toward the plurality of qubits through space;
aligning the first substrate and the second substrate with each other;
providing a first cooling source for cooling the first substrate and a second cooling source for cooling the second substrate;
A method of manufacturing a quantum arithmetic device, comprising:

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