JP2022140978A - Electro-optical device and electronic apparatus - Google Patents

Abstract

To provide an electro-optical device and an electronic apparatus that prevent the occurrence of display defects due to ionic impurities.SOLUTION: A liquid crystal device 100 comprises: an element substrate 10 that has a display area E; a counter substrate 20 that has a common electrode 21; and a liquid crystal layer 50 that is arranged between the element substrate 10 and the counter substrate 20. In a plain view, the element substrate 10 is provided with a first peripheral electrode 108 that surrounds the display area E in a frame-like manner and a second peripheral electrode 109 that surrounds the first peripheral electrode 108 in a frame-like manner. The first peripheral electrode 108 is applied with a direct potential having a polarity positive to a common electrode potential applied to the common electrode 21, and the second peripheral electrode 109 is applied with a direct potential having a polarity negative to the common electrode potential.SELECTED DRAWING: Figure 5

Description

The present invention relates to electro-optical devices and electronic equipment.

Conventionally, a projector using an electro-optical device such as a liquid crystal device has been known as an optical modulation device. In such a projector, the luminous flux density incident on the liquid crystal device is higher than that of a direct-view liquid crystal device. Therefore, ionic impurities originating from sealing materials and the like are easily eluted into the liquid crystal layer of the liquid crystal device. The ionic impurities remain in the liquid crystal layer and induce disturbance in the alignment of the liquid crystal and a decrease in driving speed and voltage holding ratio, which may be a factor in deteriorating the display quality of the liquid crystal device.

For example, Patent Document 1 discloses a liquid crystal device having a first alignment film including two layers, a first inorganic layer and a second inorganic layer. Further, Patent Document 2 discloses a liquid crystal device in which the surface of an alignment film is surface-treated with a silane compound. The surface treatment is expected to have the effect of suppressing the photochemical reaction between the liquid crystal molecules and the alignment film.

JP 2011-154158 A JP-A-2007-25530

However, when the surface treatment of the liquid crystal device of Patent Document 2 is applied to the liquid crystal device of Patent Document 1, there is a problem that diffusion of ionic impurities is promoted. Specifically, in the first alignment film, when the thickness of the second inorganic layer is thinner than the thickness of the first inorganic layer, the second inorganic layer has less thickness than when the thickness of the second inorganic layer is thick. Hydroxyl groups are reduced. In this state, surface treatment with a silane compound increases the smoothness of the surface of the first alignment film. Therefore, in the liquid crystal layer, the ionic impurities eluted from the sealing material or the like easily move in the vicinity of the first alignment film. As a result, the ionic impurities may move from the outside to the inside of the display area, degrading the display quality. In other words, there has been a demand for an electro-optical device that suppresses display defects caused by ionic impurities more than ever before.

The electro-optical device comprises: a first substrate having a pixel region in which a plurality of pixel electrodes are arranged; a second substrate having a common electrode and arranged opposite to the first substrate with a sealing material interposed therebetween; a liquid crystal layer containing liquid crystal disposed between the substrate and the second substrate; a second peripheral electrode surrounding the first peripheral electrode in a frame shape, wherein a positive DC potential is applied to the first peripheral electrode with respect to the common electrode potential applied to the common electrode; A DC potential having a negative polarity with respect to the common electrode potential is applied to the second peripheral electrode.

An electronic device includes the electro-optical device described above.

1 is a schematic plan view showing the configuration of a liquid crystal device as an electro-optical device according to the first embodiment; FIG. 1 is a schematic cross-sectional view showing the configuration of a liquid crystal device; FIG. FIG. 2 is an equivalent circuit diagram showing the electrical configuration of the liquid crystal device; FIG. 2 is a schematic cross-sectional view showing the structure of an alignment film; FIG. 2 is a schematic plan view showing the arrangement of first peripheral electrodes and second peripheral electrodes; FIG. 4 is a schematic diagram showing an attraction state of ionic impurities. FIG. 5 is a schematic plan view showing the arrangement of first peripheral electrodes and second peripheral electrodes according to a second embodiment; FIG. 10 is a schematic diagram showing the configuration of a projection display device as an electronic device according to a third embodiment; FIG. 4 is a schematic diagram showing a transition state of ionic impurities according to a comparative example; FIG. 4 is a schematic diagram showing a transition state of ionic impurities according to a comparative example;

In the following figures, XYZ axes are used as mutually orthogonal coordinate axes as necessary, the direction indicated by each arrow is the + direction, and the direction opposite to the + direction is the - direction. The +Z direction is sometimes referred to as upward and the −Z direction is referred to as downward, and viewing from the +Z direction is called planar view or planar view. Also, in order to make each layer and each member recognizable, the scale of each layer and each member is different from the actual scale. The thickness of a structure such as a film or layer provided on a substrate refers to the distance in the direction along the Z-axis, which is the normal direction of the main surface of the substrate.

1. First Embodiment In the present embodiment, an active drive liquid crystal device including a thin film transistor (TFT) is exemplified as an electro-optical device. A configuration of a liquid crystal device 100 as an electro-optical device according to this embodiment will be described with reference to FIGS. 1 to 3. FIG. FIG. 2 shows a cross section along the YZ plane including the line segment HH' of FIG. In FIG. 2, for convenience of illustration, the size and number of liquid crystals contained in the liquid crystal layer are different from the actual ones.

As shown in FIG. 1, a liquid crystal device 100 includes an element substrate 10 as a first substrate, a counter substrate 20 as a second substrate, and a liquid crystal layer, which will be described later. The element substrate 10 and the opposing substrate 20 are substantially rectangular in plan view. The element substrate 10 and the counter substrate 20 are overlapped and joined together with a sealing material 60 disposed along the outer edge of the counter substrate 20 interposed therebetween. A display region E as a pixel region including a plurality of pixels P is provided inside the sealing material 60 . A plurality of pixels P are arranged in a matrix in directions along the X-axis and the Y-axis. Dummy pixels that do not contribute to display may be arranged outside the display area E. FIG.

The raw material of the sealing material 60 includes resin having curable properties such as thermosetting and ultraviolet curable properties. Thus, the raw material of the sealing material 60 can be applied to the element substrate 10 and the counter substrate 20 and then the resin can be cured to form the sealing material 60 in a desired shape. The sealing material 60 contains ionic impurities derived from raw materials such as resins and curing agents for resins. Such ionic impurities may be eluted into the liquid crystal layer. In the liquid crystal device 100 of the present embodiment, diffusion of ionic impurities into the display area E is suppressed by the attraction action of the first peripheral electrode and the second peripheral electrode (not shown).

The element substrate 10 has a data line driving circuit 101, a plurality of external connection terminals 104, and a scanning line driving circuit and inspection circuit (not shown). The element substrate 10 is planarly larger than the opposing substrate 20 . The element substrate 10 is provided with a plurality of external connection terminals 104 in a region that does not overlap with the counter substrate 20 , and a data line driving circuit 101 is provided between the plurality of external connection terminals 104 and the sealing material 60 .

A parting portion 24 surrounding the display area E is provided between the sealing material 60 and the display area E. As shown in FIG. The parting portion 24 has a substantially rectangular shape with two sides along the Y-axis and the other two sides along the X-axis. The two scanning line driving circuits and the inspection circuit are arranged so as to overlap the parting portion 24 in a plan view. The two scanning line driving circuits are arranged, for example, along two sides along the Y-axis and electrically connected via wiring (not shown).

The inspection circuit is electrically connected to a data line, which will be described later. The data line driving circuit 101 and the two scanning line driving circuits are electrically connected to external connection terminals 104 . Vertical conducting portions 106 are provided at the four corners of the opposing substrate 20 . A first peripheral electrode and a second peripheral electrode, which will be described later, are provided on the element substrate 10 and arranged between the display area E and the sealing material 60 in a plan view.

As shown in FIG. 2, the element substrate 10 and the counter substrate 20 are arranged to face each other in the direction along the Z-axis with the sealing material 60 interposed therebetween. The liquid crystal layer 50 is arranged between the element substrate 10 and the counter substrate 20 and is surrounded by the element substrate 10 , the counter substrate 20 and the sealing material 60 . The liquid crystal layer 50 includes liquid crystal 50a. The liquid crystal 50a has positive or negative dielectric anisotropy. In this embodiment, a liquid crystal 50a having negative dielectric anisotropy is employed. Here, the liquid crystal 50a refers to individual liquid crystal molecules forming the liquid crystal 50a, or aggregates of individual liquid crystal molecules.

The element substrate 10 has a substrate 10s as a substrate body, wiring layers including TFTs 30 as transistors, a plurality of pixel electrodes 15, and an alignment film 18 as a first alignment film. In the element substrate 10, the substrate 10s, the wiring layer, the pixel electrode 15, and the alignment film 18 are arranged in this order toward the liquid crystal layer 50. FIG. Further, the element substrate 10 has the aforementioned display area E in which a plurality of pixel electrodes 15 are arranged.

The alignment film 18 is arranged in contact with the sealing material 60 and has a region in contact with the lower surface of the sealing material 60 and a region facing the liquid crystal layer 50 . The alignment film 18 is arranged between the plurality of pixel electrodes 15 and the liquid crystal layer 50 . The alignment film 18 includes a first vapor deposition film 18a and a second vapor deposition film 18b.

The counter substrate 20 has a substrate 20s as a substrate body, a parting portion 24, an insulating layer 25, a common electrode 21, and an alignment film 22 as a second alignment film. In the opposing substrate 20, the substrate 20s, the parting portion 24, the insulating layer 25, the common electrode 21, and the alignment film 22 are arranged in this order toward the liquid crystal layer 50. FIG.

The alignment film 22 is arranged in contact with the sealing material 60 and has a region in contact with the upper surface of the sealing material 60 and a region facing the liquid crystal layer 50 . The alignment film 22 is arranged between the common electrode 21 and the liquid crystal layer 50 . The alignment film 22 includes a third vapor deposition film 22a and a fourth vapor deposition film 22b.

The alignment films 18 and 22 are formed based on the optical design of the liquid crystal device 100 . The alignment films 18 and 22 orient the liquid crystal 50 a of the liquid crystal layer 50 . The alignment state of the liquid crystal 50a changes depending on the voltage applied according to the image signal described later.

The alignment films 18 and 22 substantially vertically align the liquid crystal 50a having negative dielectric anisotropy. An inorganic material such as silicon oxide is employed for the alignment films 18 and 22, for example. The alignment film 18 is not limited to being composed of two layers, the first vapor deposition film 18a and the second vapor deposition film 18b. The alignment film 22 is not limited to being composed of two layers, the third vapor deposition film 22a and the fourth vapor deposition film 22b. Each of the alignment films 18 and 22 may have three or more layers.

The alignment films 18 and 22 provide a pretilt to vertically align the liquid crystal 50a. The tilt direction of the pretilt is along the direction crossing the X-axis and the Y-axis. When the liquid crystal layer 50 is driven, the alignment state of the liquid crystal 50a vertically aligned by giving a pretilt to the alignment films 18 and 22 changes in the tilt direction. When the liquid crystal layer 50 is repeatedly turned on and off, the liquid crystal 50a repeats the behavior of tilting in the tilt direction of the pretilt and returning to the initial alignment state. Here, the orientation state in which the liquid crystal 50a having negative dielectric anisotropy is inverted with respect to the XY plane along which the surfaces of the orientation films 18 and 22 are given a pretilt angle of less than 90° is called substantially vertical orientation. Details of the alignment films 18 and 22 will be described later.

For the substrates 10s and 20s, for example, flat plates having translucency and insulating properties such as glass substrates and quartz substrates are employed. In this specification, translucency means that the visible light transmittance is 50% or more.

The liquid crystal device 100 is of a transmissive type, and the light L is incident from the +Z direction on the counter substrate 20 side and emitted from the element substrate 10 via the liquid crystal layer 50 . When the light L is transmitted through the liquid crystal layer 50, it is modulated according to the alignment state of the liquid crystal 50a. The incident direction of the light L with respect to the liquid crystal device 100 is not limited to the above. Further, the liquid crystal device 100 is not limited to being of a transmissive type, and may be of a reflective type. The liquid crystal device 100 employs a normally white mode or a normally black mode optical design. The liquid crystal device 100 may include polarizing elements on the light L incident side and the light L emitting side.

As shown in FIG. 3, the liquid crystal device 100 has a plurality of data lines 6, scanning lines 3, and capacitor lines 8 as mutually insulated signal wirings. Scanning lines 3 extend along the X-axis, and data lines 6 and capacitance lines 8 extend along the Y-axis. Note that the capacitance line 8 is not limited to the configuration along the Y-axis, and may be configured along the X-axis.

A pixel electrode 15, a TFT 30 and a capacitive element 16 are provided for each pixel P in a region divided by the scanning line 3, the data line 6 and the capacitive line 8, and constitute a pixel circuit of the pixel P. FIG. Signal wirings such as the scanning lines 3, the data lines 6 and the capacitor lines 8 are provided in the wiring layer described above.

The scanning line 3 is electrically connected to the gate of the TFT 30, which is a switching element. The data line 6 is electrically connected to the data line side source/drain region of the TFT 30 . The scanning line 3 simultaneously controls ON/OFF of the TFTs 30 provided in the same row. The pixel electrode 15 is electrically connected to the pixel electrode side source/drain region of the TFT 30 .

The data lines 6 are electrically connected to the data line driving circuit 101 described above, and supply the pixels P with image signals supplied from the data line driving circuit 101 . The image signal may be supplied line-sequentially to each data line 6, or may be supplied to a plurality of adjacent data lines 6 in groups.

The scanning lines 3 are electrically connected to the scanning line driving circuit described above, and supply the pixels P with scanning signals supplied from the scanning line driving circuit. A scanning signal is supplied to the scanning lines 3 line-sequentially in pulses at predetermined timings.

By inputting a scanning signal, the TFT 30 is turned on for a predetermined period, and an image signal is applied to the pixel electrode 15 at a predetermined timing. An image signal is written at a predetermined level to the liquid crystal layer 50 via the pixel electrode 15 and held for a certain period between the pixel electrode 15 and the common electrode 21 with the liquid crystal layer 50 interposed therebetween. At this time, the orientation state of the liquid crystal 50a changes depending on the voltage applied according to the image signal. To prevent the held image signal from leaking, the capacitive element 16 is electrically connected in parallel with the liquid crystal capacitor provided between the pixel electrode 15 and the common electrode 21 . The capacitive element 16 is provided in a layer between the TFT 30 and the capacitive line 8 .

The configuration of the alignment films 18, 22 and the like in the liquid crystal device 100 will be described with reference to FIG. FIG. 4 is a cross section of a region including the sealing material 60 and the liquid crystal layer 50 in the vicinity of the data line driving circuit 101 in the display region E of the liquid crystal device 100 shown in FIG. The cross section planarly includes the direction of oblique deposition of the second vapor deposition film 18b and the fourth vapor deposition film 22b and is along a plane perpendicular to the XY plane. The direction of oblique vapor deposition is, for example, a direction including the upper right corner and the lower left corner of the display area E in plan view. 4, illustration of a part of the configuration of the element substrate 10 and the counter substrate 20 is omitted.

As shown in FIG. 4 , the alignment film 18 of the element substrate 10 includes a first vapor deposition film 18 a and a second vapor deposition film 18 b arranged between the first vapor deposition film 18 a and the liquid crystal layer 50 . The first vapor deposition film 18a covers the pixel electrode 15 (not shown) and the first peripheral electrode 108 and the second peripheral electrode 109 provided in the same layer as the pixel electrode 15, and is disposed above them.

The alignment film 22 of the counter substrate 20 includes a third vapor deposition film 22 a and a fourth vapor deposition film 22 b arranged between the third vapor deposition film 22 a and the liquid crystal layer 50 . The third deposition film 22a covers the common electrode 21 and is arranged in the -Z direction of the common electrode 21. As shown in FIG.

The first vapor deposition film 18a is formed on the main surface of the element substrate 10 by vacuum vapor deposition from the +Z direction. The first deposited film 18a includes a plurality of columns whose long axis direction is along the Z-axis. The third vapor deposition film 22a is formed on the main surface of the opposing substrate 20 by vacuum vapor deposition from the -Z direction. The third vapor deposition film 22a includes a plurality of columns whose long axis direction is along the Z-axis. Silicon oxide, aluminum oxide, magnesium oxide, or the like is adopted as a material for forming the first vapor deposition film 18a and the third vapor deposition film 22a.

The second vapor deposition film 18b is arranged to cover the top of the first vapor deposition film 18a. The thickness of the second vapor deposition film 18b, that is, the distance along the Z-axis is thinner than the thickness of the first vapor deposition film 18a. The second vapor deposition film 18b includes a plurality of columns whose long axis direction intersects the main surface of the element substrate 10 at an angle θα. The long axis direction of the column of the second evaporated film 18b intersects the direction along the Z-axis, which is the thickness direction of the liquid crystal layer 50, at an angle of (90-θα)°.

The columns of the second deposited film 18b are columnar crystals of silicon oxide. The column is formed by a vacuum deposition method. Specifically, a column of the second vapor deposition film 18b is formed by obliquely vapor-depositing silicon oxide from a direction forming an acute angle with the direction of the angle θα.

The fourth vapor deposition film 22b is arranged to cover the −Z direction of the third vapor deposition film 22a. The thickness of the fourth vapor deposition film 22b, that is, the distance along the Z-axis is thinner than the thickness of the third vapor deposition film 22a. The fourth evaporated film 22b includes a plurality of columns whose long axis direction intersects the main surface of the counter substrate 20 at an angle θβ. The long axis direction of the column of the fourth evaporated film 22b intersects the direction along the Z-axis, which is the thickness direction of the liquid crystal layer 50, at an angle of (90-θβ)°.

The columns of the fourth deposited film 22b are columnar crystals of silicon oxide. The column is formed by a vacuum deposition method. Specifically, columns of the fourth vapor deposition film 22b are formed by obliquely vapor-depositing silicon oxide from a direction forming an acute angle with the direction of the angle θβ. Note that the angle θβ may be an angle equal to the angle θα.

According to the configuration of the alignment films 18 and 22, the liquid crystal 50a can be aligned by the plurality of columns of the second vapor deposition film 18b and the fourth vapor deposition film 22b. Also, the alignment films 18 and 22 can be formed by a dry process.

The tilt direction of the pretilt of the liquid crystal 50a is set, for example, so that the azimuth angle formed with the Y-axis is 45°. The inclination direction of the pretilt is defined by the vapor deposition direction when forming the second vapor deposition film 18b and the fourth vapor deposition film 22b by oblique vapor deposition.

In the liquid crystal device 100, polarizing elements (not shown) are arranged on the incident side and the emitting side of the light L described above. The two polarizing elements are arranged in the liquid crystal device 100 such that the transmission axis or absorption axis of one of the polarizing elements is parallel to the X axis or the Y axis, and the transmission axes or absorption axes of the two polarizing elements are orthogonal to each other. .

The vapor deposition direction of the oblique vapor deposition when forming the second vapor deposition film 18b and the fourth vapor deposition film 22b is planarly matched with the desired tilt direction of the pretilt of the liquid crystal 50a. In this embodiment, the second vapor deposition film 18b and the fourth vapor deposition film 22b are arranged such that the pretilt azimuth angle of the liquid crystal 50a intersects the transmission axis or absorption axis of the two polarizing elements at 45°. . As a result, when the liquid crystal layer 50 is driven by applying a drive voltage between the pixel electrode 15 and the common electrode 21, the liquid crystal 50a is tilted in the pretilt direction to obtain high transmittance.

The surfaces of the element substrate 10 and the counter substrate 20 are treated with a silane coupling agent. Specifically, an organopolysiloxane film is formed on the surfaces of the second vapor deposition film 18b of the element substrate 10 and the fourth vapor deposition film 22b of the counter substrate 20 using a silane coupling agent.

The silane coupling agent causes dehydration condensation by binding silanol groups to the silicon oxide of the second vapor deposition film 18b and the fourth vapor deposition film 22b. As a result, an organopolysiloxane film in which hydrophobic groups are aligned is formed at the interface with the liquid crystal layer 50 on the surface side. This surface treatment increases the contact angle of the surfaces of the second vapor deposition film 18b and the fourth vapor deposition film 22b with respect to water, so that the light resistance of the liquid crystal device 100 can be improved. A known method can be employed as a method of surface treatment with a silane coupling agent.

By the above-mentioned surface treatment, the contact angle to water on the surfaces of the alignment films 18 and 22 facing the liquid crystal layer 50 is set to 50° or more. As a result, the photochemical reaction between the liquid crystal 50a and the alignment films 18 and 22 is suppressed, and the light resistance of the liquid crystal device 100 can be improved. The contact angle is preferably 60° or more and 90° or less. When the contact angle is 60° or more, the water repellency of the alignment films 18 and 22 is increased, and the light resistance can be further improved. When the contact angle is 90° or less, uneven distribution of impurity ions can be suppressed, and deterioration of display quality can be prevented. The water contact angle of the alignment films 18 and 22 is measured according to JIS R3257;1999.

The pixel electrode 15, the first peripheral electrode 108, and the second peripheral electrode 109 are formed by forming a transparent conductive film such as ITO (Indium Tin Oxide) or IZO (Indium Zinc Oxide) and then patterning the film. . That is, the first peripheral electrode 108 and the second peripheral electrode 109 do not have light shielding properties. Therefore, the light shielding layer 19 is arranged on the element substrate 10 in order to prevent the light L from leaking from the regions of the first peripheral electrode 108 and the second peripheral electrode 109 .

The light shielding layer 19 is formed of the same layer and the same material as the metal film having the light shielding property among the wiring layers of the substrate 10s in the element substrate 10 . The light shielding layer 19 is arranged below the first peripheral electrode 108 and the second peripheral electrode 109 at a position overlapping them in a plane. Note that the light shielding layer 19 may be omitted.

The opposing substrate 20 has a parting portion 24 formed of a metal film or the like having a light shielding property. The parting portion 24 is arranged in the +Z direction from the common electrode 21 . In a plan view, the first peripheral electrode 108 overlaps the parting portion 24 . Although the details will be described later, a positive DC current is applied to the first peripheral electrode 108 with respect to the common electrode potential applied to the common electrode 21 . Then, ionic impurities in the liquid crystal layer 50 are attracted to the first peripheral electrode 108 . Therefore, the ionic impurities move to the parting portion 24 that does not contribute to the display of the liquid crystal device 100 in plan view, and the occurrence of display failure is suppressed.

In addition, in FIG. 4, the first peripheral electrode 108 planarly overlaps the parting portion 24 over the entire region, but the present invention is not limited to this. It is sufficient that the first peripheral electrode 108 has a region that overlaps the parting portion 24 in plan view. Specifically, in a plan view, the outer edge of the parting portion 24, that is, the end on the side of the sealing material 60, is opposed to the inner edge of the first peripheral electrode 108, that is, the end on the side of the display region E (not shown), with the sealing material 60. should be located close to Details of the first peripheral electrode 108 and the second peripheral electrode 109 will be described later.

The configuration of the first peripheral electrode 108 and the second peripheral electrode 109 will be described with reference to FIG. In FIG. 5, the outer edge of the opposing substrate 20 is indicated by a dashed line, and the illustration of a part of the liquid crystal device 100 is omitted for the sake of clarity. In addition, the following description regarding FIG. 5 shall describe the state seen planarly, unless there is a notice in particular.

As shown in FIG. 5, the first peripheral electrodes 108 are arranged to surround the display area E in a frame shape. The second peripheral electrode 109 is arranged to surround the first peripheral electrode 108 in a frame shape. The second peripheral electrode 109 is surrounded by a sealing material 60 arranged in a frame shape along the outer edge of the opposing substrate 20 . The first peripheral electrode 108, the second peripheral electrode 109, and the sealing material 60 do not overlap each other. The first peripheral electrode 108 and the second peripheral electrode 109 need not overlap, and the second peripheral electrode 109 and the sealing material 60 may overlap.

The width of the first peripheral electrode 108 is shorter than the width of the second peripheral electrode 109 . The width here is the distance across the first peripheral electrode 108 and the second peripheral electrode 109 at right angles. Also, the width of the first peripheral electrode 108 is shorter than the width of the second peripheral electrode 109 at each of the four corners of the first peripheral electrode 108 and the second peripheral electrode 109 .

That is, the width of the first peripheral electrode 108 is shorter than the width of the second peripheral electrode 109 over the entire circumference. This can suppress the occurrence of a phenomenon in which ionic impurities are burned into the first peripheral electrode 108 . If the burn-in phenomenon progresses, it spreads to the inside of the display area E and becomes a factor of deteriorating the display quality.

Although not particularly limited, the width of the pixel electrode 15 (not shown) is about 3 μm, the width of the first peripheral electrode 108 is about 300 μm, and the width of the second peripheral electrode 109 is about 600 μm in the direction along the X-axis. .

The above-described common electrode 21 of the counter substrate 20 is electrically connected to one of the plurality of external connection terminals 104 of the element substrate 10 via the vertical conduction portion 106 . A common electrode potential is applied to the external connection terminal 104 . The common electrode potential is, for example, approximately 6.5V.

On the other hand, the first peripheral electrode 108 and the second peripheral electrode 109 are each electrically connected to one of the external connection terminals 104 different from the one electrically connected to the vertical conducting portion 106. . As a result, a positive DC potential is applied to the first peripheral electrode 108 with respect to the common electrode potential applied to the common electrode 21 . A negative DC potential is applied to the second peripheral electrode 109 with respect to the common electrode potential. The application of the DC potential to the first peripheral electrode 108 and the second peripheral electrode 109 may be performed all the time during the operation of the liquid crystal device 100, or may be performed intermittently.

The positive DC potential applied to the first peripheral electrode 108 is a fixed potential with reference to the common electrode potential, and is +0.5 V or more and +3.0 V or less. The negative DC potential applied to the second peripheral electrode 109 is a fixed potential based on the common electrode potential, and is -3.0 V or more and -0.5 V or less. According to this, it is possible to suppress the occurrence of electrolysis in the liquid crystal 50a and to attract ionic impurities. The effect of attracting ionic impurities by the first peripheral electrode 108 and the second peripheral electrode 109 will be described later.

The external connection terminals 104 are mounted with, for example, a flexible wiring board on which a driver semiconductor device is mounted in a plane. The driver semiconductor device includes a control circuit. The driver semiconductor device generates a common electrode potential, a positive DC potential, and a negative DC potential using a power supply input from the outside, and supplies them via the external connection terminal 104 . Either the positive DC potential or the negative DC potential may be an internally generated DC potential that does not depend on an external power source.

The effect of attracting ionic impurities by the first peripheral electrode 108 and the second peripheral electrode 109 will be described with reference to FIG. Further, as a liquid crystal device of a comparative example, the behavior of ionic impurities in a structure having one peripheral electrode will be described with reference to FIGS. 9 and 10. FIG. Here, the upper diagram of FIG. 6 is a cross section including the line segment J-J' in FIG. 5 and perpendicular to the XY plane. The lower diagram in FIG. 6 is a graph showing the number of ionic impurities in correspondence with the upper diagram and the position along the X-axis. 9 and 10 are diagrams corresponding to FIG. 6 in the liquid crystal device of the comparative example. In the upper diagrams of FIGS. 6, 9, and 10, illustration of a part of the configuration is omitted, and the ionic impurities are schematically circular. In this embodiment, anionic ionic impurities are assumed as ionic impurities.

During operation of the liquid crystal device 100, when a positive DC potential is applied to the first peripheral electrode 108 and a negative DC potential is applied to the second peripheral electrode 109, the voltage between the pixel electrode 15 and the first peripheral electrode 108 is reduced. A transverse electric field is generated between them. As a result, the ionic impurities Im in the liquid crystal layer 50 are attracted to the first peripheral electrode 108, as shown in FIG. In the distribution of the ionic impurities Im at this timing T1, the number peak is located near the end of the first peripheral electrode 108 in the +X direction, as shown in the graph below.

Next, when the operation of the liquid crystal device 100 is stopped, the application of the DC potential is also stopped. At timing T2 when the application of the DC potential is stopped, the number peak moves to the middle of the first peripheral electrode 108 in the direction along the X-axis. That is, the ionic impurities Im are attracted to the first peripheral electrode 108 when the DC potential is applied, and further move in the -X direction when the DC potential is stopped.

Next, at timing T3 when a sufficient time has passed after the application of the DC potential is stopped, the ionic impurities Im are attracted to the second peripheral electrode 109 in the -X direction due to ion concentration distribution diffusion. Therefore, at the timing T3, it becomes difficult for the ionic impurities Im to stay in the first peripheral electrode 108, and the occurrence of the sticking phenomenon of the ionic impurities Im to the first peripheral electrode 108 is suppressed. In addition, diffusion of the ionic impurities Im to the pixel electrode 15 side is suppressed when a DC potential is applied next time.

On the other hand, in the liquid crystal devices of the two comparative examples described below, the attraction of the ionic impurities Im is insufficient, or the above-described burn-in phenomenon is likely to occur.

As shown in FIG. 9, a single peripheral electrode 808 is provided on the element substrate 810 of the liquid crystal device 800 of the comparative example. A negative DC potential is applied to the peripheral electrode 808 in the same manner as the second peripheral electrode 109 of the liquid crystal device 100 .

At timing T1 when a DC potential is applied to the peripheral electrode 808 as the liquid crystal device 800 operates, the ionic impurities Im repel the peripheral electrode 808 and move toward the pixel electrode 15 . At this time, the number peak is located between the peripheral electrode 808 and the most −X direction pixel electrode 15 . That is, the ionic impurities Im diffuse into the display region E described above.

Next, at timing T2 when the operation of the liquid crystal device 800 is stopped and the application of the DC potential is stopped, the peak of the number returns slightly to the peripheral electrode 808 side. Then, even at the timing T3 when a sufficient time has passed after the application of the DC potential is stopped, the number peaks near the pixel electrode of the peripheral electrode 808 . Therefore, the next application of the DC potential facilitates diffusion of the ionic impurities Im into the display region E again.

As shown in FIG. 10, a single peripheral electrode 909 is provided on the element substrate 910 of the liquid crystal device 900 of the comparative example. A positive DC potential is applied to the peripheral electrode 909 in the same manner as the first peripheral electrode 108 of the liquid crystal device 100 .

The ionic impurities Im are attracted to the peripheral electrode 909 at timing T1 when a DC potential is applied to the peripheral electrode 909 as the liquid crystal device 900 operates. In the distribution of the ionic impurities Im at this timing T1, the number peak is located near the edge of the peripheral electrode 909 in the +X direction. That is, the attracting action of the ionic impurities Im up to this point is the same as that of the liquid crystal device 100 .

Next, at timing T2 when the operation of the liquid crystal device 900 is stopped and the application of the DC potential is stopped, the peak of the number moves in the +X direction. That is, in the liquid crystal device 100, the behavior is opposite to the movement of the number peak in the -X direction at the timing T2. Then, at timing T3 after a sufficient amount of time has elapsed since the application of the DC potential was stopped, the peak of the number further moves slightly in the +X direction. However, the ionic impurities Im remain in the vicinity of the peripheral electrode 909 from timing T1 through timing T3. Therefore, the ionic impurities Im are likely to stick to the peripheral electrode 909, and there is a possibility that a display defect may be induced due to the sticking phenomenon.

According to this embodiment, the following effects can be obtained.

Diffusion of the ionic impurities Im can be suppressed more than before. Specifically, the ionic impurities Im are attracted to the first peripheral electrode 108 by the positive DC potential and collect there. When the operation of the liquid crystal device 100 is stopped, the application of the DC potential to the first peripheral electrode 108 and the second peripheral electrode 109 is also stopped. Then, the ionic impurities Im collected around the first peripheral electrode 108 move to the second peripheral electrode 109 . Therefore, by repeating operation and stop of the liquid crystal device 100, even if the ionic impurities Im diffused to the display area E of the liquid crystal layer 50 are present, they are removed outside the display area E. FIG.

Moreover, even if the ionic impurities Im are present outside the display area E of the liquid crystal layer 50, diffusion into the display area E is suppressed. Furthermore, since the ionic impurities Im move to the second peripheral electrode 109 when the liquid crystal device 100 is stopped, display defects due to the burn-in phenomenon in which the ionic impurities are adsorbed to the first peripheral electrode 108 are reduced. That is, it is possible to provide the liquid crystal device 100 that suppresses the occurrence of display defects due to the ionic impurities Im.

2. Second Embodiment In this embodiment, an active driving liquid crystal device having TFTs is exemplified as an electro-optical device. The liquid crystal device 200 according to this embodiment differs from the liquid crystal device 100 according to the first embodiment in the shape of the second peripheral electrode. In the following description, the same symbols are used for the same components as in the first embodiment, and duplicate descriptions are omitted.

The form of the second peripheral electrode 209 included in the liquid crystal device 200 of this embodiment will be described with reference to FIG. In FIG. 7, the counter substrate 20 is omitted and the illustration of part of the configuration of the liquid crystal device 200 is omitted for the sake of clarity. In addition, the following description regarding FIG. 7 shall describe the state seen planarly, unless there is a notice in particular.

As shown in FIG. 7, the first peripheral electrodes 108 are arranged to surround the display area E in a frame shape. The second peripheral electrode 209 is arranged to surround the first peripheral electrode 108 in a frame shape. The sealing material 60 is arranged in a frame shape along the outer edge of the opposing substrate 20 (not shown).

The second peripheral electrode 209 has a region overlapping with the sealing material 60 . In other words, the outer edge 209o of the second peripheral electrode 209 is positioned to overlap the sealing material 60 . This point is different from the second peripheral electrode 109 of the first embodiment.

The width of the second peripheral electrode 209 is longer than the width of the first peripheral electrode 108 . The width here is the distance across the first peripheral electrode 108 and the second peripheral electrode 209 at right angles. Also, the width of the second peripheral electrode 209 is shorter than the width of the first peripheral electrode 108 at each of the four corners of the first peripheral electrode 108 and the second peripheral electrode 209 .

According to this embodiment, in addition to the effects of the first embodiment, the second peripheral electrode 209 can further suppress the diffusion of the ionic impurities derived from the sealing material 60 into the display region E.

3. Third Embodiment A projection display device 1000 is illustrated as an electronic device according to this embodiment.

As shown in FIG. 8, the projection type display device 1000 includes a lamp unit 1001, dichroic mirrors 1011 and 1012 of a color separation optical system, three liquid crystal devices 1B, 1G and 1R, reflection mirrors 1111, 1112 and 1113, and a relay lens. 1121, 1122, 1123, a dichroic prism 1130 of a color synthesizing optical system, and a projection lens 1140 of a projection optical system.

The lamp unit 1001 is, for example, a discharge-type light source. The light source system is not limited to this, and solid-state light sources such as light-emitting diodes and lasers may be employed.

Light emitted from the lamp unit 1001 is separated by dichroic mirrors 1011 and 1012 into three color lights of different wavelength ranges. The three colors of light are red light R of substantially red color, green light G of substantially green color, and blue light B of substantially blue color.

Dichroic mirror 1011 transmits red light R and reflects green light G and blue light B, which have shorter wavelengths than red light R. FIG. The red light R transmitted through the dichroic mirror 1011 is reflected by the reflecting mirror 1111 and enters the liquid crystal device 1R. The green light G reflected by the dichroic mirror 1011 is reflected by the dichroic mirror 1012 and then enters the liquid crystal device 1G. Blue light B reflected by dichroic mirror 1011 passes through dichroic mirror 1012 and enters relay lens system 1120 .

The relay lens system 1120 has relay lenses 1121 , 1122 and 1123 and reflecting mirrors 1112 and 1113 . Since the blue light B has a longer optical path than the green light G and the red light R, the luminous flux tends to increase. Therefore, the relay lens 1122 is used to suppress the expansion of the luminous flux. The blue light B incident on the relay lens system 1120 is converged by the relay lens 1121 , reflected by the reflecting mirror 1112 , and converged in the vicinity of the relay lens 1122 . Blue light B then passes through reflecting mirror 1113 and relay lens 1123 and enters liquid crystal device 1B.

The liquid crystal devices 1R, 1G, and 1B, which are light modulation devices, in the projection display device 1000 are applied to the liquid crystal devices as the electro-optical devices of the above-described embodiments. The liquid crystal device of the above embodiment may be applied to one or more of the liquid crystal devices 1R, 1G, and 1B, and more preferably applied to all of them.

Each of the liquid crystal devices 1R, 1G, and 1B is electrically connected to the upper circuit of the projection display device 1000. FIG. Therefore, when each image signal designating the gradation level of red light R, green light G, and blue light B is supplied from an external circuit to the host circuit and processed, the liquid crystal devices 1R, 1G, and 1B are driven and each color Light is modulated.

The red light R, green light G, and blue light B modulated by the liquid crystal devices 1R, 1G, and 1B enter the dichroic prism 1130 from three directions. The dichroic prism 1130 synthesizes the incident red light R, green light G, and blue light B. FIG. Dichroic prism 1130 reflects red light R and blue light B at 90 degrees, and green light G is transmitted. As a result, the red light R, the green light G, and the blue light B are synthesized as display light for displaying a color image and enter the projection lens 1140 .

The projection lens 1140 is arranged to face the outside of the projection display device 1000 . The display light is magnified and emitted through the projection lens 1140, and a projection image is projected onto the screen 1200, which is the projection target.

In this embodiment, the projection display device 1000 is exemplified as an electronic device, but the present invention is not limited to this. The electro-optical device of the present invention may be applied to electronic equipment such as a projection HUD (Head-Up Display), a direct-view HMD (Head Mounted Display), a personal computer, a digital camera, and a liquid crystal television.

According to this embodiment, the diffusion of ionic impurities in the liquid crystal layer 50 is suppressed, and the occurrence of display defects in the liquid crystal devices 1R, 1G, and 1B is suppressed. Therefore, it is possible to provide the projection display device 1000 with excellent display quality of the projected image.

[Application/Modification]
The above-described first to third embodiments (hereinafter referred to as embodiments, etc.) can be modified or applied in various ways as follows.

In the embodiment and the like, the first peripheral electrode 108 and the second peripheral electrodes 109 and 209 that surround the pixel region E in a frame shape have a closed square shape that surrounds the four sides of the pixel region E, but the present invention is not limited to this. . For example, a square-shaped electrode may be open at one or a plurality of locations, or a U-shaped shape surrounding at least three continuous sides of the pixel region E may be employed.

DESCRIPTION OF SYMBOLS 10... Element substrate as a 1st board|substrate, 15... Pixel electrode, 18... Alignment film as a 1st alignment film, 18a... 1st vapor deposition film, 18b... 2nd vapor deposition film, 20... Counter substrate as a 2nd board|substrate, 21 Common electrode 22 Alignment film as second alignment film 22a Third vapor deposition film 22b Fourth vapor deposition film 24 Parting part 50 Liquid crystal layer 50a Liquid crystal 60 Sealing material 100 , 200... Liquid crystal device as an electro-optical device 108... First peripheral electrode 109, 209... Second peripheral electrode 1B, 1G, 1R... Liquid crystal device 1000... Projection type display device as electronic equipment E... Pixel Display area as area.

Claims (9)

a first substrate having a pixel region in which a plurality of pixel electrodes are arranged;
a second substrate having a common electrode and arranged to face the first substrate with a sealing material interposed therebetween;
a liquid crystal layer disposed between the first substrate and the second substrate and containing liquid crystal;
The first substrate is provided with a first peripheral electrode that surrounds the pixel region in a frame shape and a second peripheral electrode that surrounds the first peripheral electrode in a frame shape in plan view,
A positive DC potential is applied to the first peripheral electrode with respect to the common electrode potential applied to the common electrode,
An electro-optical device in which a negative DC potential is applied to the second peripheral electrode with respect to the common electrode potential. 2. The electro-optical device according to claim 1, wherein the width of said first peripheral electrode is shorter than the width of said second peripheral electrode in plan view. 3. The electro-optical device according to claim 1, wherein the second peripheral electrode has a region overlapping with the sealing material in plan view. The first substrate has a first alignment film,
the first alignment film includes a first vapor deposition film and a second vapor deposition film disposed between the first vapor deposition film and the liquid crystal layer;
the second deposited film includes a column whose long axis direction intersects the thickness direction of the liquid crystal layer;
The thickness of the first vapor deposition film is thicker than the thickness of the second vapor deposition film,
The second substrate has a second alignment film,
the second alignment film includes a third vapor deposition film and a fourth vapor deposition film disposed between the third vapor deposition film and the liquid crystal layer;
the fourth deposited film includes a column whose long axis direction intersects the thickness direction of the liquid crystal layer;
4. The electro-optical device according to claim 1, wherein the thickness of the third vapor deposition film is thicker than the thickness of the fourth vapor deposition film. the column of the second deposited film and the column of the fourth deposited film are made of silicon oxide;
The first alignment film and the second alignment film are provided with an organopolysiloxane film by surface treatment,
5. The electro-optical device according to claim 4, wherein a water contact angle of surfaces of said first alignment film and said second alignment film facing said liquid crystal layer is 50[deg.] or more. 6. The electro-optical device according to claim 5, wherein the contact angle on the first alignment film and the second alignment film is 60[deg.] or more and 90[deg.] or less. The positive DC potential is +0.5 V or more and +3.0 V or less,
7. The electro-optical device according to claim 1, wherein the negative DC potential is -3.0 V or more and -0.5 V or less. The second substrate has a parting part,
8. The electro-optical device according to claim 1, wherein the first peripheral electrode has a region that overlaps the parting portion in plan view. An electronic apparatus comprising the electro-optical device according to claim 1 .

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