JP2022138849A - Power supply control device and electronic device - Google Patents

Abstract

To provide a power supply control device capable of quickly reducing a voltage supplied to a load when an output voltage output from a conversion circuit is reduced due to a reduction in input voltage, etc.SOLUTION: A power supply control device includes a conversion circuit that converts an input voltage into a DC output voltage and outputs it to an output path, a load switch that is inserted in series into the output path, a capacitor connected to the output path in parallel between the conversion circuit and the load switch, and a power good circuit that outputs a power good signal that becomes active when the output voltage exceeds a set voltage and becomes inactive when the output voltage drops below the set voltage. The load switch shuts off the output path when the power good signal becomes inactive and connects the output path when the power good signal becomes active.SELECTED DRAWING: Figure 2

Description

The present disclosure relates to power control devices and electronic devices.

2. Description of the Related Art A power supply circuit is known that includes a circuit that generates a power good signal indicating that a power supply voltage to be input to a control circuit is an operation-guaranteed voltage (see, for example, Patent Document 1). In Japanese Unexamined Patent Application Publication No. 2002-100002, when the control circuit receives a power good signal, it resets the entire device, performs initialization processing, and starts operation.

JP-A-2007-68351

FIG. 1 is a diagram showing a configuration example of a power supply circuit according to one comparative form. The power supply circuit 101 shown in FIG. 1 generates a voltage (output voltage Vout in this example) to be supplied to the load circuit 104 based on the input voltage Vin. The power supply circuit 101 includes a conversion circuit 102 that converts an input voltage Vin into an output voltage Vout and outputs the output voltage to an output path 106, and a capacitor 107 that is connected in parallel to the output path 106 between the conversion circuit 102 and the load circuit 104. Prepare.

In such a power supply circuit 101, when the output voltage Vout output from the conversion circuit 102 drops due to a drop in the input voltage Vin or the like, the voltage supplied to the load circuit 104 drops relatively slowly due to the existence of the capacitor 107. . Therefore, when the output voltage Vout output from the conversion circuit 102 temporarily drops due to a momentary interruption of the input voltage Vin or the like, the voltage supplied to the load circuit 104 will drop halfway before sufficiently dropping to near zero volts. The voltage may turn upward. If the voltage supplied to the load circuit 104 turns from a decrease to an increase at such an incomplete voltage, there is a possibility that the load circuit 104 may malfunction, such as the power-on reset of the load circuit 104 not operating normally.

The present disclosure provides a power control device capable of rapidly reducing the voltage supplied to a load when the output voltage output from a conversion circuit drops due to a drop in the input voltage or the like, and an electronic device comprising the power control device. I will provide a.

According to one aspect of the present disclosure,
a conversion circuit that converts an input voltage into a DC output voltage and outputs the voltage to an output path;
a load switch inserted in series in the output path;
a capacitor connected in parallel to the output path between the conversion circuit and the load switch;
a power good circuit that outputs a power good signal that becomes active when the output voltage exceeds a set voltage and becomes inactive when the output voltage falls below the set voltage,
A power control device is provided, wherein the load switch disconnects the output path when the power good signal becomes inactive and connects the output path when the power good signal becomes active.

According to the technology of the present disclosure, when the output voltage output from the conversion circuit drops due to a drop in the input voltage or the like, the voltage supplied to the load can be quickly dropped.

It is a figure which shows the structural example of the power supply circuit which concerns on one comparative form. 1 is a diagram illustrating a configuration example of an electronic device including a power control device according to an embodiment; FIG. 4 is a timing chart showing an operation example of the power supply control device according to one embodiment; 1 is a diagram illustrating a specific configuration example of an electronic device including a power control device according to an embodiment; FIG.

Hereinafter, embodiments of the present disclosure will be described with reference to the drawings.

FIG. 2 is a diagram illustrating a configuration example of an electronic device including a power control device according to one embodiment. The electronic device 200 shown in FIG. 2 is a device that operates with an input voltage Vin supplied from the outside of the electronic device 200, and includes a power supply control device 1 and a load circuit 4. FIG.

The power supply control device 1 is a circuit that generates a voltage (voltage Vout2 in this example) to be supplied to the load circuit 4 based on the input voltage Vin, and supplies the generated voltage Vout2 to the load circuit 4 . The load circuit 4 is an example of a load that operates with the voltage Vout2 supplied from the power supply control device 1 . A voltage Vout2 is a power supply voltage for the load circuit 4 to operate. The power supply control device 1 includes, for example, a conversion circuit 2, a load switch 3, a capacitor 7, and a power good circuit 5.

The conversion circuit 2 converts the input voltage Vin into a DC output voltage Vout1 and outputs it to the output path 6 . For example, the conversion circuit 2 is a DC/DC converter that converts a DC input voltage Vin into a DC output voltage Vout1 and outputs the DC output voltage Vout1 to an output path 6 (DC: Direct Current). The conversion circuit 2 may be a step-down circuit that generates an output voltage Vout that is lower than the input voltage Vin, a step-up circuit that generates an output voltage Vout that is higher than the input voltage Vin, or a step-up/step-down circuit that has both step-down and step-up functions. good. The conversion circuit 2 may be a regulator that generates an output voltage Vout that follows a target voltage value from the input voltage Vin. When the input voltage Vin is an AC voltage, the conversion circuit 2 may be an AC/DC converter that converts the AC input voltage Vin into a DC output voltage Vout1 and outputs the DC output voltage Vout1 to the output path 6. (AC: Alternative Current).

The load switch 3 is arranged in a state of being inserted in series with the output path 6 . The load switch 3 switches connection and disconnection of the output path 6 which is a power supply line connecting the conversion circuit 2 and the load circuit 4 .

A capacitor 7 is a capacitive element connected in parallel to the output path 6 between the conversion circuit 2 and the load switch 3 . In this example, capacitor 7 has one end electrically connected to output path 6 and the other end electrically connected to ground (GND). A capacitor 7 smoothes the output voltage Vout, and a specific example thereof is an electrolytic capacitor.

The power good circuit 5 outputs a power good signal PG that becomes active when the output voltage Vout1 exceeds a set voltage (hereinafter also referred to as "set voltage Vs") and becomes inactive when it falls below the set voltage Vs. The set voltage Vs may have hysteresis or may be a voltage without hysteresis. The power good circuit 5 may be a circuit separate from the conversion circuit 2 or a circuit provided in the conversion circuit 2 .

The load switch 3 switches between disconnection and connection of the output path 6 between the capacitor 7 and the load circuit 4 based on the logic of the power good signal PG. The load switch 3 cuts off the output path 6 when the power good signal PG becomes inactive, and connects the output path 6 (releases cutoff of the output path 6) when the power good signal PG becomes active.

FIG. 3 is a timing chart showing an operation example of the power control device according to one embodiment. FIG. 3 illustrates a case where the input voltage Vin is the DC power supply voltage Vdc in the power supply control device 1 shown in FIG. Also, FIG. 3 illustrates a case where the power good signal PG is a high active signal (low level indicates non-active, high level indicates active). Next, an operation example of the power control device 1 will be described with reference to FIGS. 2 and 3. FIG.

The power good circuit 5 makes the power good signal PG active (high level) when the output voltage Vout1 exceeds the set voltage Vs, and makes the power good signal PG inactive (low level) when the output voltage Vout1 drops below the set voltage Vs. level).

When the output voltage Vout1 drops below the set voltage Vs at timing t1, the power good signal PG becomes inactive, so the output path 6 is cut off between the capacitor 7 and the load circuit 4 by turning off the load switch 3. . As a result, the supply of energy from the capacitor 7 and the conversion circuit 2 to the load circuit 4 is cut off, so that the voltage Vout2 supplied to the load circuit 4 rapidly drops during the drop time td. That is, the decrease time td can be shortened. After that, when the output voltage Vout1 turns from a drop to a rise and rises above the set voltage Vs, the power good signal PG becomes active. connected by As a result, the voltage Vout2 supplied to the load circuit 4 begins to rise to become approximately equal to the output voltage Vout1.

Therefore, according to the power supply control device 1, even if the output voltage Vout1 starts to rise to a halfway voltage Vh before the output voltage Vout1 is sufficiently reduced to near zero volts due to an instantaneous interruption of the power supply voltage Vdc, the voltage Vout2 is maintained at zero volts. It can be lowered sufficiently to the vicinity. As a result, for example, the voltage Vout2 supplied to the load circuit 4 via the load switch 3 can be lowered to the reset voltage Vm or less which is lower than the minimum operating voltage VPDR of the load circuit 4 (VPDR>Vh>Vm>0 ). As a result, the power-on reset of the load circuit 4 at the next activation works normally, and the operation of the load circuit 4 can be resumed normally.

Note that the minimum operating voltage VPDR is a voltage at which the operation of the load circuit 4 stops due to a drop in the voltage Vout2 supplied to the load circuit 4. FIG. The reset voltage Vm is a voltage (for example, load circuit 4 reset voltage).

The power good circuit 5 may delay the timing of activating the power good signal PG by the delay time tr after the output voltage Vout1 exceeds the set voltage Vs. As a result, even if the decrease time td becomes longer, the time for the voltage Vout2 to decrease to the reset voltage Vm or less can be ensured, so that the operation of the load circuit 4 can be resumed normally. For example, the power good circuit 5 outputs the power good signal PG when the state within a predetermined voltage range (hereinafter also referred to as "voltage range A") after the output voltage Vout1 exceeds the set voltage Vs continues for a delay time tr or longer. Activate. For example, when the set voltage Vs is the first set voltage Vs1 and the set voltage higher than the first set voltage Vs1 is the second set voltage Vs2, the voltage range A is from the first set voltage Vs1 to the second set voltage Vs2. Range. The voltage range A may be a range without the second set voltage Vs2, which is the upper limit.

FIG. 4 is a diagram illustrating a specific configuration example of an electronic device including a power control device according to one embodiment. FIG. 4 shows in more detail a configuration example of the electronic device 200 shown in FIG. The electronic device 200 is a device that operates with a DC voltage Vdc, which is an example of an input voltage Vin, and includes a power control device 1 and a load circuit 4 . The power control device 1 includes, for example, a conversion circuit 2, a load switch 3, a capacitor C2, and a power good circuit 5. Capacitor C2 corresponds to capacitor 7 described above. FIG. 4 illustrates the case where the conversion circuit 2 and the load switch 3 are integrated circuits. The conversion circuit 2 is an integrated circuit with a power good circuit 5 .

The conversion circuit 2 is a DC/DC converter that converts an input DC voltage Vdc into a DC output voltage Vout1 and outputs the DC output voltage Vout1 to an output path 6 . The power supply voltage Vdc is smoothed by the capacitor C1 and input to the conversion circuit 2 .

The conversion circuit 2 includes a switch Q1, a switch Q2, an inductor L1, and a conversion control circuit 10 to step down the input voltage Vin. The inductor L1 is connected in series between an intermediate connection point between the high-side switch Q1 and the low-side switch Q2 and a connection point between one end of the capacitor C2 and the output path 6 .

The conversion control circuit 10 controls switching of the switches Q1 and Q2 so that the output voltage Vout1 follows the reference voltage Vref1. The conversion control circuit 10 has a comparator 11 , control logic 12 and gate drive 13 . The comparator 11 has a non-inverting input to which the detected value of the output voltage Vout1 is input and an inverting input to which the reference voltage Vref1 is input. The control logic 12 obtains from the comparator 11 the result of the magnitude comparison between the output voltage Vout1 and the reference voltage Vref1, thereby generating a pulse width modulated signal for causing the output voltage Vout1 to follow the reference voltage Vref1. The gate drive 13 drives the gates of the switches Q1 and Q2 according to the pulse width modulated signal generated by the control logic 12 such that the output voltage Vout1 follows the reference voltage Vref1.

The conversion control circuit 10 includes a power good circuit 5 that generates a power good signal PG. The power good signal PG, in the example shown in FIG. 4, is a logic signal that indicates whether the output voltage Vout1 is within the regulation voltage range. The regulation voltage range is an example of voltage range A described above. The power good circuit 5 outputs an active level (high level in this example) power good signal PG when the output voltage Vout1 is within the regulation voltage range. On the other hand, the power good circuit 5 outputs a power good signal PG at an inactive level (low level in this example) when the output voltage Vout1 is outside the regulation voltage.

The output voltage Vout1 is feedback-controlled by the control logic 12 of the conversion control circuit 10 so as to follow the reference voltage Vref1 within the regulation voltage range. Therefore, the reference voltage Vref1 is set higher than the reference voltage Vref3 and lower than the reference voltage Vref2. That is, when the regulation voltage range corresponds to the voltage range A described above, the reference voltage Vref3 corresponds to the first set voltage Vs1 described above, and the reference voltage Vref2 corresponds to the second set voltage Vs2 described above.

The power good circuit 5 has, for example, a comparator 14, a comparator 15, an OR circuit 16 and a switch Q4. The comparator 14 has a non-inverting input to which the detected value of the output voltage Vout1 is input and an inverting input to which the reference voltage Vref2 is input, and outputs the comparison result to the OR circuit 16 . The comparator 15 has an inverting input to which the detected value of the output voltage Vout1 is input and a non-inverting input to which the reference voltage Vref3 is input, and outputs the comparison result to the OR circuit 16 . The output of OR circuit 16 is input to switch Q4. Switch Q4 is pulled up to output path 6 via resistor 19 . A resistor 19 is an element externally attached to the conversion circuit 2 .

With the power-good circuit 5 having such a configuration, the OR circuit 16 maintains a low level when the output voltage Vout1 is within the regulation voltage range (higher than the reference voltage Vref3 and lower than the reference voltage Vref2). Output a signal. As a result, the switch Q4 is turned off, and the power good signal PG becomes high level. On the other hand, the OR circuit 16 outputs a high-level signal when the output voltage Vout1 is outside the regulation voltage range (lower or higher than the regulation voltage range). As a result, the switch Q4 is turned on, and the power good signal PG becomes low level.

In the example shown in FIG. 4, the power good circuit 5 has a switch Q4 pulled up through a resistor 19 in the output path 6, and outputs a power good signal PG from the switch Q4. The switch Q4 is an example of an open-drain output section, more specifically, an N-channel MOSFET (Metal Oxide Semiconductor Field Effect Transistor). Since the switch Q4 is pulled up to the output path 6 via the resistor 19, the error of the power good signal PG is reduced compared to the configuration not shown in which the switch Q4 is pulled up to, for example, the DC voltage Vdc via the resistor 19. output can be prevented. This is because the stable output voltage Vout1 is applied to the output path 6 by the conversion circuit 2 even if the DC voltage Vdc fluctuates.

The power good circuit 5 may comprise a filter 17 such as a glitch filter that produces a delay time tr (see FIG. 3). Filter 17 is arranged, for example, between OR circuit 16 and switch Q4.

In FIG. 4, the load switch 3 comprises a switch control circuit 20 and a switch Q3. The switch control circuit 20 turns on or off the switch Q3 according to the logic of the power good signal PG. The switch control circuit 20 has, for example, control logic 21 and gate drive 22 . The control logic 21 outputs a switch control signal according to the logic of the power good signal PG to the gate drive 22, and the gate drive 22 turns on or off the gate of the switch Q3 according to the switch control signal.

The switch Q3 is, for example, an N-channel MOSFET. The switch control circuit 20 connects the output path 6 by turning on the switch Q3, and cuts off the output path 6 by turning off the switch Q3. Diode D1 is a parasitic diode of switch Q3 or a diode externally connected in parallel with switch Q3.

The electronic device 200 may have a capacitive component C3 connected in parallel to the output path 6 on the side opposite to the capacitor C2 with respect to the switch Q3 of the load switch 3 . The capacitive component C3 may be a capacitor element connected between the load switch 3 and the load circuit 4, the load capacitance of the load circuit 4, or both.

The drop time td (see FIG. 3) of the output voltage Vout2 increases as the capacity of the capacitive component C3 increases. Therefore, in order to shorten the decrease time td, the capacitive component C3 is preferably as small as possible, for example, preferably has a smaller capacitance than the capacitor C2. Since the load circuit 4 is connected to the capacitor C2 when the switch Q3 is on, the voltage Vout2 supplied to the load circuit 4 can be smoothed by the capacitor C2 even if the capacity of the capacitive component C3 is relatively small.

The load switch 3 may include a soft start circuit that limits the current flowing through the output path 6 when the output path 6 is connected. By providing the soft start circuit, it is possible to suppress the rush current that instantaneously flows into the capacitance component C3 when the output path 6 is connected. In the example shown in FIG. 4, switch Q3 is an N-channel MOSFET, so the soft start circuit has a capacitor C4 connected between the gate of switch Q3 and ground.

Although not shown in FIG. 4, if the switch Q3 is a P-channel MOSFET, the soft start circuit has a capacitor connected between the gate and source of the switch Q3 to suppress the inrush current. can.

The power supply control device 1 may include a discharge circuit 24 that discharges the capacitive component C3 when the power good signal PG becomes inactive. As a result, the decrease time td (see FIG. 3) can be further shortened compared to the case where the capacitive component C3 is naturally discharged. In the example shown in FIG. 4, the discharge circuit 24 is a circuit arranged between the switch Q3 and the load circuit 4, and has a series circuit of a resistor R1 and a switch Q5 between the output path 6 and the ground. The switch Q5 is, for example, an N-channel MOSFET.

The control logic 21 turns off the switch Q5 via the buffer 23 while the power good signal PG is active. As a result, the capacitance component C3 is not discharged by the discharge circuit 24, so that the load circuit 4 can be supplied with a sufficient voltage Vout2. On the other hand, the control logic 21 turns on the switch Q5 via the buffer 23 while the power good signal PG is inactive. As a result, the capacitive component C3 is discharged by the discharge circuit 24, so that the voltage Vout2 can be quickly lowered to near zero volts.

Note that the discharge circuit 24 may be a circuit provided in the load switch 3 or an external circuit of the load switch 3 . The resistor R1 may be an internal resistor of the load switch 3 or an external resistor.

The load circuit 4 is a module having a microcomputer 8 and a communication circuit 9, for example. A microcomputer 8 controls the operation of the communication circuit 9 . The communication circuit 9 communicates predetermined data with an external device (not shown) of the electronic device 200 using a predetermined communication method. The communication method is not particularly limited, but includes, for example, BLE (Bluetooth Low Energy (trademark or registered trademark)).

The communication circuit 9 transmits, for example, data detected from an external device (not shown) having a DC voltage Vdc supply source (for example, data indicating the operating state of the external device) to an external device (not shown) of the electronic device 200. . Specific examples of external devices include gateways and servers. Since the electronic device 200 according to the present embodiment includes the power good circuit 5 and the load switch 3, the microcomputer 8 and the communication circuit 9 are can resume normal operation. Therefore, for example, the communication circuit 9 can prevent erroneous transmission of the data to an external device (not shown) even if an instantaneous interruption or the like occurs in the DC voltage Vdc.

A specific example of the external device is a machine tool for performing processing such as cutting on a material such as metal. A DC voltage Vdc supplied from a machine tool is likely to undergo fluctuations such as momentary interruption. Therefore, providing the power good circuit 5 and the load switch 3 is particularly advantageous in preventing malfunction of the microcomputer 8 and the communication circuit 9 when the electronic device 200 receives the DC voltage Vdc from the machine tool.

Although the embodiments have been described above, the present invention is not limited to the above embodiments. Various modifications and improvements such as combination or replacement with part or all of other embodiments are possible.

1 power control device 2 conversion circuit 3 load switch 4 load circuit 5 power good circuit 6 output path 7 capacitor 8 microcomputer 9 communication circuit 10 conversion control circuit 17 filter 19 resistor 20 switch control circuit 24 discharge circuit 101 power supply circuit 200 electronic device C2 capacitor C3 Capacitance component PG Power good signal

Claims (14)

a conversion circuit that converts an input voltage into a DC output voltage and outputs the voltage to an output path;
a load switch inserted in series in the output path;
a capacitor connected in parallel to the output path between the conversion circuit and the load switch;
a power good circuit that outputs a power good signal that becomes active when the output voltage exceeds a set voltage and becomes inactive when the output voltage falls below the set voltage,
The power control device, wherein the load switch cuts off the output path when the power good signal becomes inactive, and connects the output path when the power good signal becomes active. 2. The power control device according to claim 1, wherein said power good circuit delays the timing of activating said power good signal after said output voltage exceeds said set voltage. 3. The power control device according to claim 2, wherein said power good circuit activates said power good signal when said output voltage exceeds said set voltage and remains within a predetermined voltage range. When the set voltage is set as a first set voltage and a set voltage higher than the first set voltage is set as a second set voltage,
4. The power control device according to claim 3, wherein said predetermined voltage range is a range from said first set voltage to said second set voltage. 5. The power control device according to claim 4, wherein said output voltage is feedback-controlled so as to follow a reference voltage higher than said first set voltage and lower than said second set voltage. 6. A discharge circuit for discharging a capacitive component connected to the output path on the opposite side of the load switch from the capacitor when the power good signal becomes inactive, according to any one of claims 1 to 5. The power control device according to . 7. The power supply control device according to claim 1, wherein a capacitive component connected to said output path on the side opposite to said capacitor with respect to said load switch has a smaller capacity than said capacitor. 8. The power good circuit according to any one of claims 1 to 7, wherein said power good circuit has an open drain output section pulled up via a resistor in said output path, and outputs said power good signal from said open drain output section. The power control device according to . The conversion circuit is an integrated circuit comprising the power good circuit,
9. The power control device according to claim 8, wherein said resistor is an element externally attached to said integrated circuit. 10. The power control device according to any one of claims 1 to 9, wherein said load switch has a soft start circuit that limits current flowing through said output path when said output path is connected. An electronic device, comprising: the power control device according to claim 1 ; and a load that operates with a voltage supplied via the load switch. 12. The electronic device according to claim 11, wherein the load switch cuts off the output path to lower the voltage supplied through the load switch below a reset voltage of the load. 13. The electronic device according to claim 11, wherein said load comprises a communication circuit for transmitting data detected from a device having said input voltage supply source to the outside of said electronic device. 14. The electronic device of claim 13, wherein the equipment is a machine tool.

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