JP2022134687A - Semiconductor drive circuit and power conversion device - Google Patents

Abstract

To reduce a reverse conduction voltage drop at reverse current conduction from a source to a drain of a switching element and reduce a reverse conduction loss, in a case where there is a low risk of erroneous ignition of the switching element caused by noise or the like.SOLUTION: A power conversion device such as an LLC circuit has a semiconductor drive circuit. The semiconductor drive circuit comprises: an arm in which switching elements 32 and 33 are connected in series; and drive circuits 34 and 35 that perform on/off driving in a complementary manner while putting a dead time during which the switching elements 32 and 33 are simultaneously in an off state. Each drive circuit 34, 35 changes a bias amount of negative bias for turning off the switching element 32 or 33 on the basis of information on the likelihood of occurrence of erroneous ignition of the switching element 32 or 33.SELECTED DRAWING: Figure 1

Description

The present invention relates to a semiconductor drive circuit for driving switching elements and a power converter using the semiconductor drive circuit.

A power conversion device is a device that converts electric energy such as alternating current (AC) to direct current (DC), direct current to alternating current, or alternating current frequency conversion, direct current power conversion, etc. For example, AC / DC converter, DC / AC Various devices are known, such as inverters, DC/DC converters, LLC-type DC/DC converters (hereinafter referred to as "LLC circuits"), and phase-shifting full bridge circuits (hereinafter referred to as "phase shift circuits"). .

Patent Literature 1 describes a power converter (for example, a phase shift circuit). Examples of normally-off GaN transistors and SiC transistors using compound semiconductors are described as switching elements constituting the phase shift circuit. In particular, GaN transistors are attracting attention as power semiconductor devices that are superior in electrical and physical characteristics to Si transistors and that have high power, small size, and low loss.
In Patent Documents 2 and 3, normally-off type GaN transistors, SiC transistors, etc. are connected in series as switching elements, an arm formed of an upper arm and a lower arm, and a drive circuit for driving these switching elements. A semiconductor drive circuit is described.
In Patent Document 4, a main switching unit having a bridge configuration composed of field effect transistors (hereinafter referred to as "FET"), a transformer for driving the gate of the FET, and a primary winding of the transformer are connected, and a driving portion for driving the primary winding.

6A, 6B, and 6C are diagrams showing a conventional single-phase half-bridge LLC circuit having a circuit configuration similar to the phase shift circuit described in Patent Document 1. FIG. 6A to 6C, (a) is the circuit diagram of the entire LLC circuit, (b) is the circuit diagram of the driving circuit in (a), and (c) is the output of the driving circuit. It is a voltage waveform diagram.

The single-phase half-bridge type LLC circuit of FIG. , 3 and two drive circuits 4 and 5 for turning on/off the switching elements 2 and 3 of the arms. The switching elements 2 and 3 are composed of, for example, normally-off GaN transistors, and their gates (G) are complementarily driven on/off by drive circuits 4 and 5 with a dead time in which they are simultaneously turned off. be done. In a normally-off GaN transistor, when the gate is at a low level (hereinafter referred to as "L level"), for example, 0 V or less, the drain (D) and source (S) are in an off state and at a high level (hereinafter referred to as "H level"). is turned on between the drain and the source. The arm configurations of the switching elements 2 and 3 are also described in Patent Documents 2 and 3. A series resonance circuit composed of a resonance capacitor 6, a leakage inductance 7a of a transformer 7, and an exciting inductance 7b is connected to the output sides of the switching elements 2 and 3. FIG. A full-wave rectifier circuit consisting of four diodes 8, 9, 10, and 11 is connected to the output side of the transformer 7, and an output capacitor 12 for smoothing is connected to the output side thereof. DC power is supplied to the

The drive circuits 4 and 5 in FIG. 6B have the same circuit configuration, and are composed of a Zener circuit having a DC power supply 21, a resistor 22, a Zener diode 23, and a capacitor 24, and a pulse signal source 25. there is The Zener circuit generates a Zener voltage Vz higher than 0V and supplies it to the sources (S) of the switching elements 2 and 3 . The pulse signal source 25 receives, for example, a frequency signal that makes the voltage error between the target voltage and the output voltage zero. A drive pulse GP having a crest value Vh higher than the peak value Vh is generated and supplied to the gates (G) of the switching elements 2 and 3 . As shown in FIG. 6C, in the output voltage waveforms of the drive circuits 4 and 5, the Zener voltage Vz corresponds to the amount of negative bias when the switching elements 2 and 3 are turned off. The output voltages of the driving circuits 4 and 5 are used to complementarily turn on/off the switching elements 2 and 3 with a certain dead time.

FIG. 7 is an operation waveform diagram of the LLC circuit of FIG. 6(a). Ic is the resonant current flowing through the resonant capacitor 6, Vgs1 is the voltage between the gate and source of the switching element 2 composed of a GaN transistor, Vgs2 is the voltage between the gate and source of the switching element 3 composed of a GaN transistor, and Id1 is the switching element. 2 drain current and Vds1 is the drain-source voltage of the switching element 2 .

The LLC circuit in FIG. 6 operates as follows during periods (1) to (4) shown in FIG.
Period (1): When switching element 2 is on and switching element 3 is off Switching element 2 is on, positive electrode of DC power supply 1→switching element 2→resonance capacitor 6→leakage inductance 7a→excitation inductance 7b and transformation A positive drain current Id1 flows through the switching element 2 and a positive resonance current Ic flows through the resonance capacitor 6 along the path from the primary winding of the device 7 to the negative electrode of the DC power supply 1 .
Period (2): When the switching element 2 is off and the switching element 3 is in the freewheeling operation When the switching element 2 is turned off, resonance occurs in the path of the resonance capacitor 6→leakage inductance 7a→excitation inductance 7b→switching element 3→resonance capacitor 6. A current Ic flows. After the resonance current Ic flows from the source to the drain of the switching element 3 and the parasitic capacitance between the drain and source is discharged, the switching element 3 is turned on by the gate-source voltage Vgs2 raised to H level.

Period (3): When switching element 2 is off and switching element 3 is on When the resonance current Ic changes from positive to negative due to LC resonance, switching element 3→excitation inductance 7b and primary winding of transformer 7→ A forward drain current flows through the switching element 3 along the path of the leakage inductance 7 a →the resonance capacitor 6 →the switching element 3 .
Period (4): Freewheeling operation of switching element 2, switching element 3 off Switching element 3 is turned off by gate-source voltage Vgs2 falling to L level in a state in which the drain current of switching element 3 is in the positive direction. Then, the drain current Id1 of the switching element 2 flows in the opposite direction along the path of the negative pole of the DC power supply 1→the exciting inductance 7b→the leakage inductance 7a→the resonant capacitor 6→the switching element 2→the positive pole of the DC power supply 1. Therefore, a reverse conduction voltage drop ΔV occurs in the drain-source voltage Vds1 of the switching element 2 . After a period in which the current is flowing through the switching element 2, the switching element 2 is turned on.

In the above operation, in the period (2), a current first flows from the source to the drain of the switching element 3 to discharge the parasitic capacitance between the drain and the source. , the voltage between the drain and the source of is approximately 0 V, a zero-volt switching (hereinafter referred to as "ZVS") operation for turning on the switching element 3 is performed. A similar ZVS operation is performed even after the period (4) has elapsed.

The GaN transistors that constitute the switching elements 2 and 3 are used as elements capable of high-speed switching, but have a low gate threshold value and may be erroneously fired due to noise or the like. As a specific example of false firing, a rapid change in the switch drain voltage due to hard switching, which is not ZVS operation, causes the gate voltage to rise via the drain-gate parasitic capacitance in the GaN transistor. Arc is fired. As a countermeasure against this, erroneous ignition can be prevented by negatively biasing the gate voltage when the switch is turned off.

International Publication No. 2012/153676 International Publication No. 2013/046420 Chinese Patent Application Publication No. 102611288 JP-A-1-122373

In the GaN transistors that constitute the switching elements 2 and 3 in FIG. 6(a), when a current flows from the source to the drain (reverse conduction), the original voltage drop between the source and the drain is added to the negative bias of the gate. It has some peculiarities. Therefore, when a current flows from the source to the drain of the switching elements 2 and 3 during the dead time period (reverse conduction) as in the LLC circuit or the phase shift circuit, the reverse conduction of the drain-source voltage Vds1 in FIG. As shown by the voltage drop ΔV, there is a detrimental effect of increasing the conduction loss.

A semiconductor drive circuit of the present invention has a first switching element and a second switching element, and the first switching element and the second switching element are connected in series between a positive power supply side and a negative power supply side. an arm; and two drive circuits that complementarily drive on/off with a dead time during which the first switching element and the second switching element are turned off at the same time, and each of the drive circuits Based on information (for example, information on whether the load state is heavy load or light load, etc.) that erroneous firing of the first switching element or the second switching element is likely to occur, the first switching element or the second switching element 2, the bias amount of the negative bias for turning off the switching element is changed.

For example, when the state of the load is the heavy load, the bias amount of the negative bias for turning off the first switching element or the second switching element is decreased. Alternatively, when the load state is the light load, the bias amount of the negative bias for turning off the first switching element or the second switching element is increased.

A power conversion device according to the present invention is characterized by using the above semiconductor drive circuit.

In the present invention, in conventional power converters such as LLC circuits and phase shift circuits, ZVS becomes difficult when the load is light. Focusing on the fact that noise is less likely to occur due to ZVS, information that makes it easier for erroneous firing of the first switching element or the second switching element to occur (for example, information on whether the load state is heavy load or light load, etc.) Based on this, the bias amount of the negative bias for turning off the first switching element or the second switching element is changed. As a result, when there is a low risk of erroneous firing due to noise or the like, by changing the amount of negative bias when the switch is turned off, it is possible to reduce the amount of noise from the source to the drain that occurs during the dead time period of LLC circuits, phase shift circuits, and the like. can reduce the voltage drop during reverse current conduction and reduce the reverse conduction loss.

1 is a diagram showing a power conversion device (for example, a half-bridge LLC circuit) in Embodiment 1 of the present invention; FIG. Operating waveform diagram of the LLC circuit of FIG. 1(a) The figure which shows the power converter device (for example, half bridge type LLC circuit) in Example 2 of this invention. A circuit diagram showing a power conversion device (for example, a full-bridge LLC circuit) in Embodiment 3 of the present invention A circuit diagram showing a power conversion device (for example, a phase shift circuit) in Embodiment 4 of the present invention Diagram showing a conventional half-bridge LLC circuit Operating waveform diagram of the LLC circuit of FIG. 6(a)

Modes for carrying out the invention will become apparent from the following description of preferred embodiments, read in conjunction with the accompanying drawings. However, the drawings are for illustrative purposes only and do not limit the scope of the invention.

(Configuration of Embodiment 1)
1(a), (b), and (c) are diagrams showing a power converter (for example, a single-phase half-bridge LLC circuit) according to Embodiment 1 of the present invention, and FIG. 3B is a circuit diagram of the drive circuit in FIG. 3A, and FIG. 3C is an output voltage waveform diagram of the drive circuit.

The single-phase half-bridge LLC circuit of FIG. 1(a) is similar to the conventional single-phase half-bridge LLC circuit shown in FIG. an arm composed of first and second switching elements 32 and 33 connected in series between the negative power supply side) and two drive circuits 34 and 35 for driving the switching elements 32 and 33 on/off. A semiconductor driving circuit for generating a rectangular wave is provided. The switching elements 32 and 33 are composed of, for example, normally-off GaN transistors, and their gates (G) are complementarily driven on/off by drive circuits 34 and 35 with a dead time in which they are turned off at the same time. be. In a normally-off GaN transistor, when the gate is L level (for example, 0 V or less), the drain (D) and source (S) are in the OFF state, and when the H level is higher than 0 V, the drain and source are in the ON state. Between the connection point of the switching element 32 and the switching element 33 and the source of the switching element 33 and the negative electrode of the DC power supply 31, there is a series resonance capacitor 36 composed of a resonance capacitor 36, a leakage inductance 37a of a transformer 37, and an exciting inductance 37b. Circuit is connected.
A resonance inductor may be provided instead of the leakage inductance 37a. An AC resonance current Ic flows through the resonance capacitor 36 .

Transformer 37 has a primary winding and a secondary winding. A full-wave rectifier circuit consisting of four diodes 38, 39, 40 and 41 is connected to the secondary winding of the transformer 37, and a smoothing output capacitor 42 is connected to the output side of the transformer 37 to 43 is supplied with a DC load current Ir.

A current detection circuit 44 such as a shunt resistor is connected in series with the load 43 . The current detection circuit 44 is a circuit for detecting the load current Ir flowing through the load 43, and the comparator 45 is connected to its output side. Comparator 45 compares the magnitudes of detected load current Ir and threshold current Ith. When load current Ir exceeds threshold current Ith, comparator 45 determines that load 43 is a “heavy load” and outputs a load determination signal S45. , and two isolation circuits 46 and 47 are connected to its output side. Each isolation circuit 46, 47 is a circuit that isolates the load determination signal S45 and feeds it back to each drive circuit 34, 35 in the form of each control signal S46, S47. It is composed of

The drive circuits 34 and 35 in FIG. 1(b) have the same circuit configuration, and include a DC power supply 51, a resistor 52, a Zener diode 53, a normally-off switch 54 that is turned on by a control signal S46 (S47), and an NPN transistor 55. , a capacitor 56, and a dropper circuit, which is a step-down circuit having a discharge resistor 57 for the capacitor 56, and a pulse signal source 58.

As shown in FIG. 1(c), the switch 54 is off when the control signal S46 (S47) is not output from the isolation circuit 46 (47). A Zener voltage Vz of a Zener diode 53 higher than 0 V is applied to the base of the transistor 55, and a DC output voltage (Vz-Vbe) of the dropper circuit is generated at the emitter of the transistor 55 (Vbe; base-emitter voltage). The output voltage (Vz-Vbe) is supplied to the source (S) of the switching element 32 (33). The pulse signal source 58 receives, for example, a frequency signal that makes the voltage error between the target voltage and the output voltage zero, and PWMs the frequency signal with a carrier wave such as a triangular wave to obtain a crest value Vh higher than 0V. It has a function of generating a driving pulse GP and supplying it to the gate (G) of the switching element 32 (33).

When the control signal S46 (S47) is output from the isolation circuit 46 (47), the switch 54 is turned on and the base of the transistor 55 is short-circuited. Therefore, the transistor 55 is turned off, and the output voltage (Vz-Vbe) of the dropper circuit supplied to the source of the switching element 32 (33) is discharged with the discharge time constant of the capacitor 56 and the resistor 57. The configuration is such that the amount of negative bias (Vz-Vbe) of the gate when turned off is reduced.

(Operation of Embodiment 1)
FIG. 2 is an operation waveform diagram of the LLC circuit of FIG. 1(a). 2, Ic is the resonant current flowing through the resonant capacitor 36, Vgs1 is the voltage between the gate and source of the switching element 32 composed of the GaN transistor, and Vgs2 is the switching element composed of the GaN transistor. 33 , Id 1 is the drain current of the switching element 32 , and Vds 1 is the drain-source voltage of the switching element 32 .

The LLC circuit in FIG. 1 operates as follows during periods (1) to (4) shown in FIG.
Period (1): When the switching element 32 is on, the switching element 33 is off, and the load current Ir is less than the threshold current Ith, the load is light. And since the control signal S46 (S47) is not output from the isolation circuit 46 (47) via the comparator 45, the switch 54 in the drive circuit 34 (35) is in the OFF state. Therefore, the output voltage (Vz-Vbe) of the dropper circuit in the drive circuit 34 (35) is supplied to the source of the switching element 32 (33), and the drive pulse GP having the crest value Vh output from the pulse signal source 58 is high. A level is supplied to the gate of switching element 32 (33).

Since the gate-source voltage Vgs1 of the switching element 32 is at the H level higher than 0V, the switching element 32 is on. Since the gate-source voltage Vgs2 of the switching element 33 is at L level, which is lower than 0V, the switching element 33 is turned off. Therefore, the positive electrode of the DC power supply 31→the switching element 32 in the ON state→the resonance capacitor 36→the leakage inductance 37a→the exciting inductance 37b and the primary winding of the transformer 37→the negative electrode of the DC power supply 31→the positive electrode of the switching element 32. A positive-direction resonance current Ic flows through the resonance capacitor 36 while the direction drain current Id1 flows. When a current flows through the primary winding of the transformer 37, an induced current flows through the secondary winding of the transformer 37. The induced current is full-wave rectified by the diodes 38 to 41 and smoothed by the output capacitor 42. be. The smoothed DC load current Ir is supplied to the load 43 . Since the load 43 is a light load, the resonance current Ic and the drain current Id1 flowing through the switching element 32 have small amplitudes.

Period (2): When the switching element 32 is off, the switching element 33 is freewheeling, and the load current Ir is smaller than the threshold current Ith. The switch 54 inside (35) is off. Therefore, the output voltage (Vz−Vbe) of the dropper circuit in the drive circuit 34 (35) is supplied to the source of the switching element 32 (33), and the drive pulse GP output from the pulse signal source 58 is at L level (= 0V) is supplied to the gate of the switching element 32 (33).

Since the gate-source voltage Vgs1 of the switching element 32 becomes L level lower than 0V, the switching element 32 is turned off. The gate-source voltage Vgs2 of the switching element 33 remains at the L level, which is lower than 0V, and is therefore turned off. When the switching element 32 is turned off, the resonance current Ic flows through the path of the resonance capacitor 36→leakage inductance 37a→excitation inductance 37b→switching element 33→resonance capacitor 36. FIG. The resonance current Ic flows from the source to the drain of the switching element 33, but since the load is light and the current value is small, the gate-source voltage Vgs2 rises to the H level in a state in which the parasitic capacitance between the drain and the source is not sufficiently discharged. As a result, the switching element 33 is turned on. At this time, since the drain-source voltage of the switching element 33 suddenly drops to 0 V, the drain-source voltage Vds1 of the switching element 32 connected in series with the DC power supply 31 also suddenly rises to the voltage of the DC power supply 31 at the same time. Rise. Then, a positive spike noise NS is generated in the gate-source voltage Vgs1 of the switching element 32 via the drain-gate parasitic capacitance of the switching element 32 . However, since the gate-source voltage Vgs1 of the switching element 32 is negatively biased, it does not exceed the gate threshold value and cause erroneous ignition.

Period (3): When the switching element 32 is turned off, the switching element 33 is turned on, and the load current Ir changes from a light load smaller than the threshold current Ith to a heavy load larger than the threshold current Ith, the resonant current Ic becomes positive due to LC resonance. , the switching element 33→the exciting inductance 37b and the primary winding of the transformer 37→the leakage inductance 37a→the resonant capacitor 36→the switching element 33. A positive drain current flows through the switching element 33. flow. When the load current Ir changes to a heavy load, this is detected and determined by the current detection circuit 44 and the comparator 45, and the control signal S46 (S47) is output from the isolation circuit 46 (47). Then, the switch 54 in the drive circuit 34 is turned on and the base of the transistor 55 is short-circuited. Therefore, the transistor 55 is turned off, and the output voltage (Vz-Vbe) of the dropper circuit supplied to the source of the switching element 32 is discharged with the discharge time constant of the capacitor 56 and the resistor 57. The amount of negative bias (Vz-Vbe) of the gate decreases, and the gate-source voltage Vgs1 of the switching element 32 rises to 0V.

Period (4): Freewheeling operation of switching element 32, switching element 33 off, load current Ir is heavy. Gate-source voltage dropped to L level with drain current of switching element 33 in the positive direction. When the switching element 33 is turned off by Vgs2, the drain current Id1 of the switching element 32 is reversed along the path of the negative electrode of the DC power supply 31→excitation inductance 37b→leakage inductance 37a→resonant capacitor 36→switching element 32→positive electrode of the DC power supply 31. flow in the direction Since the load is heavy and the current value is large, the parasitic capacitance between the drain and source of the switching element 32 is sufficiently discharged. However, since the gate-source voltage Vgs1 of the switching element 32 rises to 0 V, the reverse conduction voltage drop ΔV occurring in the drain-source voltage Vds1 of the switching element 32 is reduced compared to the conventional case. Then, after the period in which the current is flowing through the switching element 32, the switching element 32 is turned on. At this time, since the drain-source voltage Vds1 of the switching element 32 is approximately 0 V, the drain-source voltage of the switching element 33 does not change abruptly, and the gate-source voltage Vgs2 of the switching element 33 does not change. In addition, the positive spike noise NS is suppressed.

In subsequent periods, the gate-source voltage Vgs1 of the switching element 32 transitions between the H level and the L level (=0 V), and similarly, the drain-source voltage Vds2 of the switching element 33 also changes between the H level and the L level. It transitions between the L level (=0V) and performs DC/DC conversion operation with a heavy load.

(Effect of Example 1)
According to the present embodiment 1, in a conventional power conversion device such as an LLC circuit, ZVS becomes difficult at light load, and erroneous firing of the gate is likely to occur due to noise generated by hard switching. Focusing on the fact that noise is less likely to occur due to ZVS, the amount of negative bias (Vz-Vbe) of the gate is reduced during a heavy load based on information on the load current Ir. As a result, when the risk of false firing due to noise or the like is low, by reducing the negative bias amount of the gate when the switch is turned off, the reverse current from the source to the drain that occurs during the dead time period of the LLC circuit can be reduced. The reverse conduction voltage drop ΔV during conduction can be reduced, and the reverse conduction loss can be reduced.

(Configuration of Embodiment 2)
3A, 3B, and 3C are diagrams showing a power converter (for example, a single-phase half-bridge LLC circuit) according to Embodiment 2 of the present invention, and FIG. 3B is a circuit diagram of the drive circuit in FIG. 3A, and FIG. 3C is an output voltage waveform diagram of the drive circuit. In FIG. 3, elements common to those in FIG. 1 of Embodiment 1 are denoted by common reference numerals.

In the half-bridge LLC circuit of FIG. 3A in the second embodiment, instead of the comparator 45 in the half-bridge LLC circuit of FIG. ) 48 is provided. The comparator 48 outputs a load determination signal S48 having a voltage proportional to the magnitude of the load current Ir detected by the current detection circuit 44 similar to that of the first embodiment to the isolation circuits 46 and 47 similar to that of the first embodiment. have a function. The isolation circuits 46 and 47 isolate the input load determination signal S48, output control signals S46 and S47 having levels corresponding to the magnitude of the load current Ir, and feed them back to the drive circuits 34 and 35. there is

In the drive circuit 34 (35) of FIG. 3B in the second embodiment, instead of the resistor 52, the Zener diode 53 and the switch 54 in the drive circuit 34 (35) of the first embodiment, for example, an operational amplifier (hereinafter referred to as (referred to as an "operational amplifier") 59 is provided. The operational amplifier 59 is a circuit that changes the base voltage Vic of the transistor 55 forming the dropper circuit based on the control signal S46 (S47) output from the isolation circuit 46 (47). A voltage (Vic-Vbe) (where Vbe is the voltage between the base and the emitter of the transistor 55) is output from the emitter of the transistor 55 and supplied to the source (S) of the switching element 32 (33) in FIG. be done. A driving pulse GP having a peak value Vh output from the pulse signal source 58 is supplied to the gate (G) of the switching element 32 (33).

(Operation of Embodiment 2)
In the half-bridge LLC circuit of FIG. 3(a), the operational amplifier 48 outputs a load determination signal S48 having a voltage proportional to the magnitude of the load current Ir to the isolation circuits 46 (47). The isolation circuit 46 (47) isolates the load determination signal S48 and outputs to the operational amplifier 59 a control signal S46 (S47) having a level corresponding to the magnitude of the load current Ir, as shown in FIG. . Then, the base voltage Vic of the transistor 55 output from the operational amplifier 59 changes, and the output voltage (Vic-Vbe) of the dropper circuit output from the emitter of the transistor 55 changes. It is possible to linearly (freely) adjust the amount of negative bias (Vic-Vbe) of the gate to be applied.

(Effect of Example 2)
In the drive circuit 34 (35) of the first embodiment, the switch 54 is used only to switch the presence or absence of the negative bias of the gate, and there is no function of adjusting the voltage level of the negative bias, but the circuit configuration is simple. On the other hand, the driving circuit 34 (35) of the second embodiment can adjust the amount of negative bias (Vic-Vbe) of the gate when the switch is turned off by changing the output voltage (Vic-Vbe) of the dropper circuit. . As a result, for example, the negative bias amount can be adjusted to the extent that the gate does not erroneously fire according to the magnitude of noise or the like.

(Configuration of Example 3)
Embodiment 3 FIG. 4 is a circuit diagram showing a power converter (for example, a single-phase full-bridge LLC circuit) according to Embodiment 3 of the present invention. ) are denoted by common reference numerals.

In the single-phase full-bridge LLC circuit of the third embodiment, in the arm (first arm) having the first and second switching elements 32 and 33 connected in series in the half-bridge LLC circuits of the first and second embodiments, In parallel therewith, a second arm having third and fourth switching elements 62, 63 connected in series is added. Each switching element 32, 33, 62, 63 is composed of, for example, a normally-off GaN transistor, and its gate is driven by drive circuits 34, 35, 64, 65 having the same circuit configuration, respectively. Each drive circuit 34, 35, 64, 65 is configured by a circuit similar to FIG. 1(b) of the first embodiment or FIG. 3(b) of the second embodiment.

A series resonance circuit composed of a resonance capacitor 36, a leakage inductance 37a (or a resonance inductor) of a transformer 37, and an exciting inductance 37b is connected to the output sides of the first and second arms, as in the first and second embodiments. Further, a full-wave rectifier circuit composed of diodes 38 to 41, an output capacitor 42, a load 43, and a current detection circuit 44 are connected to the output side. The output side of the current detection circuit 44 is connected to the comparator 45 of the first embodiment or the operational amplifier 48 of the second embodiment. The comparator 45 of the first embodiment compares the magnitude of the load current Ir detected by the current detection circuit 44 with the threshold current Ith. It is composed of a circuit that determines that there is a load and outputs a load determination signal S45. Further, the operational amplifier 48 of the second embodiment is composed of a circuit that outputs the load determination signal S48 having a voltage proportional to the magnitude of the load current Ir.

An isolation circuit 66 for outputting four control signals S66 is connected to the output side of the comparator 45 (48) in substantially the same manner as the isolation circuits 46 and 47 of the first and second embodiments. The four control signals S66 output from the isolation circuit 66 are supplied to the four drive circuits 34, 35, 64, 65, respectively. Other configurations are the same as those of the first and second embodiments.

(Operation of Example 3)
In the full-bridge LLC circuit of the third embodiment, the driving circuits 34, 35, 64, 65 cause the first and fourth switching elements 32, 63 and the second and third switching elements 33, 62 to set dead time. are complementarily turned on/off to convert the DC power output from the DC power supply 31 into AC power. The converted AC power, like the LLC circuits of Embodiments 1 and 2, resonates in a subsequent resonance circuit, is rectified and smoothed by rectifying diodes 38 to 41 and an output capacitor 42 via a transformer 37, and is sent to a load 43. supplied.

For example, when the load current Ir flowing through the load 43 changes from a light load to a heavy load, this is detected and determined by the current detection circuit 44 and the comparator 45 (48), and four control signals S66 are output from the isolation circuit 66. . Thereby, each drive circuit 34, 35, 64, 65 performs the same operation as the drive circuits 34, 35 of the first and second embodiments.

(Effect of Example 3)
According to the third embodiment, as in the first and second embodiments, the amount of negative bias (Vz-Vbe) of the gate is reduced during a heavy load based on the information of the load current Ir. The reverse conduction voltage drop ΔV during reverse current conduction from source to drain, such as occurs during the dead time period, can be reduced to reduce reverse conduction losses.

(Configuration of Example 4)
Embodiment 4 FIG. 5 is a circuit diagram showing a power converter (for example, a single-phase phase shift circuit) according to Embodiment 4 of the present invention. Elements are given common reference numerals.

In the single-phase phase shift circuit of the fourth embodiment, as in the third embodiment, a first arm having first and second switching elements 32 and 33 connected in series, and third and fourth switching elements connected in series. and a second arm having switching elements 62 and 63 are connected in parallel. In place of the resonant capacitor 36 of the third embodiment, in the fourth embodiment, output resonant capacitors 36a, 36b, 36c, and 36d are connected in parallel between the drains and sources of the switching elements 32, 33, 62, and 63, respectively. ing.
Parasitic capacitance between the drain and source of each switching element 32, 33, 62, 63 may be used instead of the output resonance capacitors 36a, 36b, 36c, 36d. Also, the leakage inductance 37a of the transformer 37 may be composed of another resonant inductor.

As in the third embodiment, each switching element 32, 33, 62, 63 is composed of, for example, a normally-off GaN transistor, and gates thereof are driven by drive circuits 34, 35, 64, 65 having the same circuit configuration. It has become so. Each drive circuit 34, 35, 64, 65 is configured by a circuit similar to FIG. 1(b) of the first embodiment or FIG. 3(b) of the second embodiment.
Further, as in the third embodiment, a current detection circuit 44 for detecting the load current Ir is provided, and a comparator 45 (or an operational amplifier 48) and an isolation circuit 66 are connected to its output side. Other configurations are the same as those of the third embodiment.

(Operation of Example 4)
In the phase shift circuit of the fourth embodiment, the switching elements 32, 33 and the switching elements 62, 63 are alternately turned on/off, and the first arm having the switching elements 32, 33 and the switching elements 62, 63 are The output voltage can be controlled by changing the phase of the second arm. When the switching elements 32, 33, 62, 63 are turned on/off, output resonance capacitors (or parasitic capacitances between drain and source) 36a to 36d and leakage inductances (or resonance inductors) of the switching elements 32, 33, 62, 63 ) 37a, resulting in ZVS operation. In the LLC circuit of Example 3, resonance occurs at a cycle close to the switching cycle (that is, the current waveform becomes sinusoidal), whereas in the phase shift circuit of Example 4, the switching elements 32, 33, 62 , 63 resonate (partial resonance) only for a short time at turn-on/turn-off.
As in the third embodiment, for example, when the load current Ir flowing through the load 43 changes from a light load to a heavy load, this is detected and determined by the current detection circuit 44 and the comparator 45 (or the operational amplifier 48). Four control signals S66 are output. As a result, each drive circuit 34, 35, 64, 65 performs the same operation as in the third embodiment.

(Effect of Example 4)
According to the fourth embodiment, as in the first to third embodiments, the negative bias (Vz-Vbe) or (Vic-Vbe) of the gate is reduced during heavy load based on the information of the load current Ir. Therefore, the reverse conduction voltage drop .DELTA.V during reverse current conduction from source to drain, which occurs during the dead time period of the phase shift circuit, can be reduced, thereby reducing the reverse conduction loss.

(Modifications of Examples 1 to 4)
The present invention is not limited to Examples 1 to 4 above, and various forms of use and modifications are possible. Examples of usage patterns and modifications include the following (a) to (e).
(a) The present invention can also be applied to Si transistors other than GaN transistors as switching elements.
(b) In the first embodiment, for example, when the load state is light, the configuration is modified such that the bias amount of the negative bias for turning off the first switching element 32 or the second switching element 33 is reduced. You can Similar modifications are possible for Examples 2 to 4 as well. Even with this modification, substantially the same effects as those of the first embodiment can be obtained.

(c) In the semiconductor drive circuits of Examples 1 to 4, whether the load 43 is in a heavy load state or a light load state depends on the switching current flowing through the first switching element 32 (62) or the second switching element 33 (63). If the detection result exceeds the threshold, it is determined that the load is heavy, and if the detection result does not exceed the threshold, it is determined that the load is light. In this case, it becomes possible to change the bias amount of the negative bias for turning off the first switching element 32 (62) or the second switching element 33 (63) at a speed corresponding to the switching frequency. It is possible to provide a semiconductor driving circuit that has an advantageous effect in terms of performance.

(d) In each of the drive circuits 34, 35, 65, 66 of Examples 1 to 4, the switching element 32 or Although the bias amount of the negative bias for turning off 33 etc. is changed, it is not limited to this. Information as to whether the load 43 is heavy or light may be detected from input voltage, frequency, load voltage, drooping conditions, etc., other than the load current Ir. Further, even if the configuration is changed to change the bias amount of the negative bias for turning off the switching element 32 or 33 or the like based on the information that erroneous firing of the switching element 32 or 33 or the like is likely to occur, Approximately the same effects as those of Examples 1 to 4 can be obtained.
(e) The present invention is also applicable to other power converters such as a single-phase LLC circuit, a polyphase LLC circuit such as a three-phase phase shift circuit other than a single-phase phase shift circuit, and a polyphase phase shift circuit such as a three-phase circuit. is possible.

31 DC power supply 32, 33, 62, 63 switching element 34, 35, 64, 65 drive circuit 36 resonance capacitor 36a-36d output capacitance 37 transformer 37a leakage inductance 37b exciting inductance 38-41 diode 42 output capacitor 43 load 44 current detection Circuit 45 Comparator 46, 47, 66 Insulation circuit 48 Operational amplifier

Claims (10)

an arm having a first switching element and a second switching element, wherein the first switching element and the second switching element are connected in series between a positive power supply side and a negative power supply side;
two driving circuits for complementary on/off driving with a dead time in which the first switching element and the second switching element are turned off at the same time;
In a semiconductor drive circuit comprising
Each drive circuit is
Varying the bias amount of the negative bias for turning off the first switching element or the second switching element based on information that false firing of the first switching element or the second switching element is likely to occur. let
A semiconductor drive circuit characterized by: The information that the erroneous firing of the first switching element or the second switching element is likely to occur is
information as to whether the load state is heavy load or light load,
2. The semiconductor drive circuit according to claim 1, wherein: Whether the state of the load is the heavy load or the light load,
detecting the load current flowing through the load, determining the heavy load when the detection result exceeds the threshold, and determining the light load when the detection result does not exceed the threshold;
3. The semiconductor drive circuit according to claim 2, wherein: Whether the state of the load is the heavy load or the light load,
A switching current flowing through the first switching element or the second switching element is detected, and if the detection result exceeds a threshold, the heavy load is determined, and if the detection result does not exceed the threshold, the light load is determined. ,
3. The semiconductor drive circuit according to claim 2, wherein: when the state of the load is the heavy load, reducing the bias amount of the negative bias for turning off the first switching element or the second switching element;
5. The semiconductor driving circuit according to claim 2, wherein: when the load state is the light load, increasing the bias amount of the negative bias for turning off the first switching element or the second switching element;
5. The semiconductor driving circuit according to claim 2, wherein: The bias amount of the negative bias is changed linearly,
The semiconductor driving circuit according to any one of claims 1 to 6, characterized in that: The arm is
having a plurality of arms connected in parallel,
Each arm is
Having the first switching element and the second switching element that are complementarily on/off driven by the two drive circuits,
8. The semiconductor driving circuit according to any one of claims 1 to 7, characterized in that: The first switching element and the second switching element are
An element using a compound semiconductor,
The semiconductor driving circuit according to any one of claims 1 to 8, characterized in that: Using the semiconductor drive circuit according to any one of claims 1 to 9,
A power conversion device characterized by:

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