JP2022128018A - Amplification device - Google Patents

Abstract

To provide an amplification device capable of stabilizing a common-mode voltage of an auto-zero amplifier.SOLUTION: A common-mode detection amplifier 2 outputs a common-mode output voltage such that the common-mode voltage of two common-mode inputs becomes a reference common-mode voltage Vcm. A common-mode control amplifier 361 amplifies the input and outputs an output signal that controls the common-mode voltage of a transconductance amplifier 34. Common-mode detection capacitors C21 and C22 are connected between the output of transconductance amplifier 34 and the input of the common-mode control amplifier 361. A switch S6 controls the connection between the input of the common-mode control amplifier 361 and the common-mode output of the common-mode detection amplifier 2. Second switches S51 and S52 control the connection between the output of the transconductance amplifier 34 and the common-mode input of the common-mode detection amplifier 2.SELECTED DRAWING: Figure 3

Description

The present invention relates to an amplification device.

Amplifiers are widely used for amplifying sensor signals and the like, and some applications require very low offset and low frequency noise components inside the amplifier. In conventional amplifiers, the offset and low-frequency noise components cannot meet the requirements, so there are many techniques for reducing the offset and low-frequency noise components.

An auto-zero amplifier is known as a technique for reducing offset components and low-frequency noise components (Patent Document 1, Non-Patent Document 1). An auto-zero amplifier is a technique for reducing the offset component and low-frequency noise component of the amplifier with a built-in calibration circuit. Auto-zero amplifiers typically operate alternately between a calibration mode and an amplification mode. In calibration mode, the amplifier contained in the auto-zero amplifier has its inverting and non-inverting inputs shorted and its output connected to the sampling capacitor. Thereby, the calibration voltage for reducing the offset component and the low frequency noise component is sampled in the sampling capacitor. In the amplification mode, an input signal is input to an amplifier built into the auto-zero amplifier, and the amplifier outputs an output signal obtained by amplifying the input signal. Also, in the amplification mode, the sampled calibration voltage reduces the offset and low frequency noise components contained in the output signal.

Therefore, a single auto-zero amplifier cannot amplify the input signal when in calibration mode. Therefore, a Ping-Pong auto-zero amplifier is employed in which two auto-zero amplifiers are provided, and when one auto-zero amplifier is in calibration mode, the other is in amplification mode to amplify the input signal.

This auto-zero amplifier may be provided with a common mode feedback circuit. Conventionally, a common mode feedback circuit is provided for each of the two auto-zero amplifiers. However, since each common mode feedback circuit has an offset component, the output common mode voltage fluctuates each time the auto-zero amplifier is switched. Due to this common-mode voltage fluctuation, a sawtooth-shaped differential noise is generated. Since the differential noise contains a DC component, it causes residual offset voltage of the amplifier, and thus it is necessary to reduce this differential noise.

Therefore, a method has been proposed in which two auto-zero amplifiers share one common mode feedback circuit. According to this approach, a common mode feedback circuit is connected to the auto-zero amplifier in calibration mode. Also, at this time, the output voltage of the common mode feedback circuit is sampled by the sampling capacitor. As a result, even when the mode is switched to the amplification mode and the common mode feedback circuit is disconnected from the auto-zero amplifier, the output voltage of the common mode feedback circuit sampled by the sampling capacitor can be continuously input to the auto-zero amplifier.

However, the output voltage of the common-mode feedback circuit sampled by the sampling capacitor corresponds to the common-mode voltage of the auto-zero amplifier during calibration mode, not to the current common-mode voltage of the auto-zero amplifier. Therefore, there is a problem that the common-mode voltage of the auto-zero amplifier becomes unstable.

U.S. Pat. No. 6,476,671

Ion E. Opris and Gregory T.A. Kovacs, "A Rail-to-Rail Ping-Pong Op-Amp", IEEE J. Solid-State Circuits, vol. 31, no 9, pp. 1320-1324, Sep. 1996.

SUMMARY OF THE INVENTION An object of the present invention is to provide an amplifying device capable of stabilizing the common-mode voltage of an auto-zero amplifier.

In order to achieve the above object, an amplifier according to the present invention is characterized by the following [1] to [11].
[1]
an amplifier;
a calibration circuit including a sampling capacitor;
A calibration mode in which a calibration voltage for calibrating an offset component and a low-frequency noise component of the amplifier is sampled into the sampling capacitor, and an input signal is amplified by the amplifier in which the offset component and the low-frequency noise component are reduced by the calibration voltage. and a first changeover switch for switching an amplification mode for outputting an output signal with a plurality of auto-zero amplifiers,
Equipped with a common-mode detection amplifier that outputs a common-mode output voltage such that the common-mode voltage of the two common-mode inputs becomes the reference common-mode voltage,
The plurality of auto-zero amplifiers,
a common-mode controlled amplifier that amplifies an input and outputs an output signal that controls the common-mode voltage of the amplifier;
a common mode sensing capacitance connected between the output of the amplifier and the input of the common mode controlled amplifier;
a first switch for controlling connection between the input of the common-mode control amplifier and the common-mode output of the common-mode detection amplifier;
a second switch controlling the connection between the output of the amplifier and the common mode input of the common mode sense amplifier;
Must be an amplifier.
[2]
In the amplification device according to [1],
A first control unit that controls the first changeover switch,
The first control unit controls the first selector switch so that the auto-zero amplifier alternately switches between the calibration mode and the amplification mode, and at least one of the plurality of auto-zero amplifiers switches to the Controlling the first changeover switch to operate in an amplification mode and one or more other autozero amplifiers to operate in the calibration mode;
Must be an amplifier.
[3]
In the amplification device according to [1],
Three auto-zero amplifiers are provided,
each of the three auto-zero amplifiers has a first input path and a second input path respectively receiving the input signal;
having a first output path and a second output path through which the output signals are respectively output;
In the amplification mode, the first selector switch connects the amplifier to the first input path and the first output path in a first path mode, and connects the amplifier to the second input path and the second output path. Having a route changeover switch for switching between the connecting second route mode,
Must be an amplifier.
[4]
In the amplification device according to [3],
A first control unit that controls the first changeover switch,
The first control unit controls the first selector switch so that the auto-zero amplifier alternately switches between the calibration mode and the amplification mode, and one of the three auto-zero amplifiers switches to the calibration mode. and controlling the first changeover switch such that the remaining autozero amplifier operates as the first path mode or the second path mode.
Must be an amplifier.
[5]
In the amplification device according to [1],
A first control unit that controls the first changeover switch, the first switch, and the second switch,
The first control unit is
controlling the first selector switch to alternately operate the calibration mode and the amplification mode;
ON-controlling the first switch and the second switch of the auto-zero amplifier in the calibration mode;
turning off the first switch and the second switch of the auto-zero amplifier in the amplification mode;
Must be an amplifier.
[6]
In the amplification device according to [1],
A first control unit that controls the first changeover switch, the first switch, and the second switch,
The first control unit is
controlling the first selector switch to alternately operate the calibration mode and the amplification mode;
turning on the first switch and the second switch of the auto-zero amplifier switched from the amplification mode to the calibration mode;
turning off the first switch and the second switch while the auto-zero amplifier is in the calibration mode;
keeping the first switch and the second switch off of the auto-zero amplifier in the amplification mode;
Must be an amplifier.
[7]
In the amplification device according to any one of [1] to [6],
The common mode sense capacitance is connected between a first common mode sense capacitance connected between the positive output of the amplifier and the input of the common mode controlled amplifier, and between the negative output of the amplifier and the input of the common mode controlled amplifier. a second common mode sensing capacitor connected thereto, and a third common mode sensing capacitor and a fourth common mode sensing capacitor having one end connected to the input of the common mode controlled amplifier;
The auto-zero amplifier has a second changeover switch that switches the connection destination of the other end of the third common-mode detection capacitor and the fourth common-mode detection capacitor to a positive output of the amplifier or a negative output of the amplifier,
Must be an amplifier.
[8]
In the amplification device according to [7],
A second control unit that controls the second changeover switch,
The second control unit switches the second changeover switch at the timing when the auto-zero amplifier switches from the calibration mode to the amplification mode or at the timing when the amplification mode switches to the calibration mode.
Must be an amplifier.
[9]
In the amplification device according to any one of [1] to [6],
The common-mode detection amplifier includes an auxiliary capacitor connected in parallel to the common-mode detection capacitor when the first switch and the second switch are turned on; a third changeover switch that switches a common-mode output mode that outputs an output voltage;
Must be an amplifier.
[10]
In the amplification device according to [9],
A third control unit that controls the third changeover switch,
The third control unit switches to the common-mode output mode when the first switch and the second switch are turned on, and switches to the charge mode when the first switch and the second switch are turned off. controlling the third changeover switch;
Must be an amplifier.

According to the present invention, it is possible to provide an amplifier device capable of stabilizing the common-mode voltage of an auto-zero amplifier.

The present invention has been briefly described above. Furthermore, the details of the present invention will be further clarified by reading the following detailed description of the invention (hereinafter referred to as "embodiment") with reference to the accompanying drawings. .

FIG. 1 is a block diagram showing the configuration of a Ping-Pong auto-zero amplifier as an amplifying device of the present invention in the first embodiment. FIG. 2 is a diagram showing a transistor configuration example of the common-mode detection amplifier shown in FIG. FIG. 3 is a circuit diagram showing the configuration of the auto-zero amplifier shown in FIG. 1 in the first state of calibration mode. FIG. 4 is a circuit diagram showing the configuration of the auto-zero amplifier shown in FIG. 1 in the second state of calibration mode. FIG. 5 is a circuit diagram showing the configuration of the auto-zero amplifier shown in FIG. 1 in amplification mode. FIG. 6 is a diagram showing a transistor configuration example of the common-mode control amplifier shown in FIG. FIG. 7 is a diagram showing a transistor configuration example of the transconductance amplifier shown in FIGS. 3 and 4. FIG. FIG. 8 is a time chart of clocks supplied to the switches of the auto-zero amplifiers shown in FIGS. FIG. 9 is a modified time chart of clocks supplied to the switches of the auto-zero amplifiers shown in FIGS. FIG. 10 is a block diagram showing the configuration of a phase-inverting auto-zero amplifier as the amplifying device of the present invention in the second embodiment. FIG. 11 is a block diagram showing the configuration of an amplifier sharing auto-zero amplifier as an amplifying device of the present invention in the third embodiment. FIG. 12 is a circuit diagram showing the configuration of the auto-zero amplifier shown in FIG. 11 in the first state of calibration mode. FIG. 13 is a circuit diagram showing the configuration of the auto-zero amplifier shown in FIG. 11 in the second state of calibration mode. 14 is a circuit diagram showing the configuration of the auto-zero amplifier shown in FIG. 11 in the first path mode of the amplification mode; FIG. 15 is a circuit diagram showing the configuration of the auto-zero amplifier shown in FIG. 11 in the second path mode of the amplification mode; FIG. FIG. 16 is a time chart of clocks supplied to the switches of the auto-zero amplifiers shown in FIGS. 12-15. FIG. 17 is a time chart of operation modes of three auto-zero amplifiers that constitute the amplifier sharing auto-zero amplifier shown in FIG. FIG. 18 is a modified time chart of clocks supplied to the switches of the auto-zero amplifiers shown in FIGS. 12-15. FIG. 19 is a configuration diagram of the common-mode feedback section in the third state shown in FIGS. 3 to 4 or 12 to 15 in the fourth embodiment. FIG. 20 is a configuration diagram of the common-mode feedback section in the fourth state shown in FIGS. 3 to 4 or FIGS. 12 to 15 in the fourth embodiment. FIG. 21 is a configuration diagram of the auto-zero amplifier in the second state of the calibration mode in the fifth embodiment. FIG. 22 is a configuration diagram of the auto-zero amplifier in the first state of the calibration mode in the fifth embodiment. 23 is a diagram showing a transistor configuration of a common-mode detection amplifier forming the auto-zero amplifier shown in FIG. 21. FIG. FIG. 24 is a diagram showing a transistor configuration of a common-mode detection amplifier forming the auto-zero amplifier shown in FIG. 22. In FIG. FIG. 25 is an operation mode of the Ping-Pong auto-zero amplifier in the fifth embodiment, and a time chart of on/off of switches constituting the auto-zero amplifier. FIG. 26 is a circuit diagram showing an amplifier device including the Ping-Pong auto-zero amplifier shown in the first embodiment in the sixth embodiment. FIG. 27 is a circuit diagram showing a chopper-stabilized amplifier including the Ping-Pong auto-zero amplifier shown in the first embodiment or the phase-reversal auto-zero amplifier shown in the second embodiment in the seventh embodiment. 28 is a circuit diagram showing an example of the chopper output circuit shown in FIG. 27. FIG. 29 is a circuit diagram showing an example of the chopper output circuit shown in FIG. 27. FIG. FIG. 20 is a characteristic diagram showing an example of time waveforms and frequency identification of signal components, noise components, and offset components by the amplifier of the seventh embodiment. FIG. 31 is a circuit diagram showing a modification of the amplifier that constitutes the chopper-stabilized amplifier shown in FIG. FIG. 32 is a circuit diagram showing an example using the amplifier sharing auto-zero amplifier of the third embodiment for the chopper output circuit shown in FIG.

Specific embodiments relating to the present invention will be described below with reference to each drawing.

(First embodiment)
FIG. 1 is a block diagram showing the configuration of a Ping-Pong auto-zero amplifier, which is an example of the amplifying device of the present invention. As shown in the figure, the Ping-Pong auto-zero amplifier 1A includes one common-mode detection amplifier 2 and two auto-zero amplifiers 31 and 32. FIG. The common-mode detection amplifier 2 is an amplifier that outputs a common-mode output voltage such that an intermediate value (=common-mode voltage) of voltages of two common-mode inputs becomes a reference common-mode voltage Vcm. The two auto-zero amplifiers 31 and 32 have a common-mode detection path for inputting two common-mode input voltages to the common-mode detection amplifier 2 and a common-mode feedback path for inputting the common-mode output voltage output from the common-mode detection amplifier 2. is doing.

An example of the common mode detection amplifier 2 will be described with reference to FIG. As shown in the figure, the common-mode detection amplifier 2 has two current sources I1 and I2, four MOS transistors M11 to M14, and a current mirror circuit 21. FIG. The MOS transistors M11 to M14 are composed of P-type MOS transistors. The sources of the MOS transistors M11 and M12 are connected together and connected to the current source I1. The sources of the MOS transistors M13 and M14 are connected together and connected to the current source I2. One of the common-mode inputs is input to the gate of the MOS transistor M11, and the other of the common-mode inputs is input to the gate of the MOS transistor M14. The drains of the MOS transistors M11 and M14 are connected to each other and connected to the input side of the current mirror circuit 21 . The gates of the MOS transistors M12 and M13 are connected to each other and receive the reference common-mode voltage Vcm. The drains of the MOS transistors M12 and M13 are connected to each other and connected to the output side of the current mirror circuit 21 . A connection point between the drain of the MOS transistor M13 and the output side of the current mirror circuit 21 provides a common-mode output.

The autozero amplifiers 31, 32 are connected in parallel with each other. That is, the positive input and output of the Ping-Pong autozero amplifier 1A are connected to the positive input and output of the autozero amplifiers 31 and 32, and the negative input and output of the Ping-Pong autozero amplifier 1A are connected to the autozero amplifier. 31 and 32 are connected to the input and output of the negative side. Since the auto-zero amplifiers 31 and 32 have the same configuration, the auto-zero amplifier 31 will be described here as a representative.

As shown in FIGS. 3 to 5, the auto-zero amplifier 31 includes a transconductance amplifier 34 (amplifier), a calibration circuit 35, and a common-mode feedback section . The transconductance amplifier 34 inverts and amplifies the input signal Vin supplied to the input end, and outputs it as an output signal Vout from the output end. The calibration circuit 35 is a circuit that reduces the offset component and low-frequency noise component of the transconductance amplifier 34 contained in the input signal Vin. The calibration circuit 35 includes switches S1, S2, S31, S32, S41, and S42 (first changeover switches), a mutual conductance amplifier 351, and sampling capacitors C11 and C12.

Switch S 1 is connected between the positive input and the inverting input of transconductance amplifier 34 . Switch S2 is connected between the inverting and non-inverting inputs of transconductance amplifier 34 . The switches S31 and S32 are connected between the two outputs of the transconductance amplifier 34 and the two output ends, respectively.

The switches S41 and S42 are connected between the two outputs of the transconductance amplifier 34 and one ends of the sampling capacitors C11 and C12, respectively. The transconductance amplifier 351 has inputs connected to one ends of the sampling capacitors C11 and C12. Also, the output of transconductance amplifier 351 is connected to the output of transconductance amplifier 34 . The other ends of the sampling capacitors C11 and C12 are grounded.

With this calibration circuit 35, the auto-zero amplifier 31 has a calibration mode and an amplification mode as operation modes. The calibration mode is a mode in which a calibration voltage for reducing the offset component and low-frequency noise component of the transconductance amplifier 34 is sampled to the sampling capacitors C11 and C12.

As shown in FIGS. 3 and 4, in the calibration mode, the switches S1, S31 and S32 are turned off, the switches S2, S41 and S42 are turned on, and the output and input of the transconductance amplifier 34 are separated from the output and input terminals. be Also, the inverting input and non-inverting input of the transconductance amplifier 34 are short-circuited, and the transconductance amplifier 34 outputs an offset component and a low-frequency noise component. Also, the output of the transconductance amplifier 34 and the sampling capacitors C11 and C12 are connected. As a result, the offset component and low-frequency noise component output from the transconductance amplifier 34 can be sampled to the sampling capacitors C11 and C12 as calibration voltages.

The amplification mode is a mode in which an input signal Vin is input to the mutual conductance amplifier 34 and an output signal Vout obtained by amplifying the input signal Vin is output from the mutual conductance amplifier 34 . Also, in the amplification mode, the sampled calibration voltage reduces the offset and low-frequency noise components contained in the output signal Vout.

As shown in FIG. 5, in the amplification mode, switches S2, S41 and S42 are turned off and switches S1, S31 and S32 are turned on. As a result, the mutual conductance amplifier 34 is connected to the input terminal and the output terminal, and the output signal Vout obtained by amplifying the input signal Vin by the mutual conductance amplifier 34 is output from the output terminal. Also, the calibration voltages sampled by the sampling capacitors C11 and C12 are applied to the output of the transconductance amplifier 34 via the transconductance amplifier 351, thereby reducing the offset component and low frequency noise component contained in the output signal Vout.

The common-mode feedback section 36 has switches S51, S52, S6, a common-mode control amplifier 361, and common-mode detection capacitors C21, C22. Switches S51 and S52 (second switches) are connected between the two outputs of transconductance amplifier 34 and the two common mode inputs of common mode detection amplifier 2 . That is, the switches S51 and S52 are provided on the common-mode detection path. A switch S6 (first switch) is connected between the input of the common-mode control amplifier 361 and the common-mode output of the common-mode detection amplifier 2 . That is, the switch S6 is provided on the common-mode feedback path.

Common-mode control amplifier 361 has a non-inverting input connected to the common-mode output of common-mode detection amplifier 2 via switch S6. Common-mode control amplifier 361 amplifies the input signal and outputs an output signal that controls the common-mode voltage of transconductance amplifier 34 . The two outputs of common-mode control amplifier 361 are connected to the two outputs of transconductance amplifier 34, respectively.

FIG. 6 shows a transistor configuration example of the common-mode control amplifier 361 . As shown in the figure, the common-mode control amplifier 361 is composed of eight MOS transistors M21, M22, M31, M32, M41, M42, M51, M52. The MOS transistors M21 and M22 are composed of P-type MOS transistors and are cascode-connected. The MOS transistors M31 and M32 are composed of P-type MOS transistors and are cascode-connected. The MOS transistors M41 and M42 are composed of N-type MOS transistors and are cascode-connected. The MOS transistors M51 and M52 are composed of N-type MOS transistors and are cascode-connected. The cascode-connected MOS transistors M21 and M22 and the MOS transistors M41 and M42 are connected in series, and the MOS transistors M31 and M32 and the MOS transistors M51 and M52 are connected in series.

Gates of the MOS transistors M21 and M31 are connected to each other and supplied with a reference voltage Vb1. Gates of the MOS transistors M22 and M32 are connected to each other and supplied with a reference voltage Vb2. Gates of the MOS transistors M41 and M51 are connected to each other and supplied with a reference voltage Vb3. The gates of MOS transistors M42 and M52 are connected to each other and supplied with the common mode output voltage of common mode detection amplifier 2 via switch S6. A connection point between the MOS transistors M22 and M41 and a connection point between the MOS transistors M32 and M51 serve as outputs and are connected to the switches S51 and S52.

The common-mode detection capacitors C21 and C22 have one end commonly connected to the input of the common-mode control amplifier 361 and the other end connected to two outputs of the common-mode control amplifier 361, as shown in FIGS. A common mode feedback circuit is configured by the common mode feedback section 36 and the common mode detection amplifier 2 described above.

Further, as shown in FIG. 7, the outputs of the transconductance amplifiers 34 and 351 are connected to the input terminal in1, which is the connection point of the MOS transistors M41 and M42 constituting the common-mode control amplifier 361, and the connection point of the MOS transistors M51 and M52. is connected to the input terminal in2. The transconductance amplifiers 34, 351 include current sources I3, I4 and P-type MOS transistors M61, M62, M71, M72. The sources of the MOS transistors M61, M62, M71 and M72 are connected to the current sources I3 and I4, and the gates of the MOS transistors M61, M62, M71 and M72 are the inputs. The drains of the MOS transistors M61, M62, M71 and M72 serve as outputs and are connected to the input terminals in1 and in2, respectively.

Due to the common-mode feedback section 36, the auto-zero amplifier 31 has a first state and a second state. In the first state, as shown in FIG. 3, switches S51, S52 and S6 are turned on. As a result, the output of transconductance amplifier 34 is connected to the common-mode input of common-mode detection amplifier 2, and common-mode detection amplifier 2 outputs a common-mode output voltage. In addition, the common mode output voltage of common mode detection amplifier 2 is connected to the input of common mode control amplifier 361 . Common mode control amplifier 361 amplifies the common mode output voltage and feeds it back to the output of transconductance amplifier 34 to set the common mode voltage to the reference common mode voltage Vcm. Also, at this time, a voltage corresponding to the common-mode output voltage of the common-mode detection amplifier 2 is sampled in the common-mode detection capacitors C21 and C22.

In the second state, as shown in FIGS. 4 and 5, switches S51, S52 and S6 are turned off. As a result, the output of transconductance amplifier 34 and the common-mode input of common-mode detection amplifier 2 are disconnected, and the common-mode output of common-mode detection amplifier 2 and the input of common-mode control amplifier 361 are disconnected. At this time, the input of the common-mode control amplifier 361 can be held at the common-mode output voltage in the first state by the voltage sampled by the common-mode detection capacitors C21 and C22.

The other ends of the common-mode detection capacitors C21 and C22 are connected to two outputs of the transconductance amplifier 34, respectively. One ends of the common-mode detection capacitors C21 and C22 connected to each other fluctuate according to fluctuations in the common-mode voltage of the transconductance amplifier . Therefore, a common-mode output voltage matching the current common-mode voltage of the transconductance amplifier 34 can be input to the common-mode control amplifier 361, and the common-mode voltage of the auto-zero amplifier 31 can be stabilized. In addition, since the common-mode detection capacitors C21 and C22 also function as Miller compensation capacitors, it is possible to prevent the common-mode feedback circuit formed by the common-mode detection amplifier 2 and the common-mode feedback section 36 from oscillating.

Next, the operation of the Ping-Pong auto-zero amplifier 1A having the above configuration will be described with reference to the time chart shown in FIG. The clock CLK1 is supplied to the switches S1, S31 and S32 of the auto-zero amplifier 31, the clock CLK2 is supplied to the switches S2, S41 and S42, and the clock CLK3 is supplied to the switches S51, S52 and S6. The clocks CLK1 and CLK2 alternately switch the operation mode of the auto-zero amplifier 31 between the calibration mode (FIGS. 3 and 4) and the amplification mode (FIG. 5). In addition, the clock CLK3 causes the auto-zero amplifier 31 to enter the first state when switching from the amplification mode to the calibration mode (FIG. 3), enter the second state while in the calibration mode (FIG. 4), and enter the amplification mode. The inside is maintained in the second state (Fig. 5). A circuit (not shown) that supplies the clocks CLK1 to CLK3 constitutes a first control section.

The clocks CLK1 to CLK3 supplied to the auto-zero amplifiers 31 and 32 are 180 degrees out of phase. Thereby, when the auto-zero amplifier 31 is in the calibration mode, the auto-zero amplifier 32 is in the amplification mode. Also, when the auto-zero amplifier 31 is in the amplification mode, the auto-zero amplifier 32 is in the calibration mode. As a result, the Ping-Pong auto-zero amplifier 1A can constantly output the output signal Vout obtained by amplifying the input signal Vin.

By the way, when the switches S51, S52 and S6 are turned off simultaneously with the switching from the calibration mode to the amplification mode to disconnect the common-mode detection amplifier 2, the sampling capacitors C21 and C22 are calibrated by the charging injection of these switches S51, S52 and S6. Voltage fluctuates. Therefore, the offset component and the low frequency noise component cannot be removed with high accuracy. According to the first embodiment described above, the second state in which the common-mode detection amplifier 2 is disconnected during the calibration mode is set, and then the mode is switched to the amplification mode. Therefore, the auto-zero amplifier 31 remains in the calibration mode even after the switches S51, S52, and S6 are turned off and the calibration voltages of the sampling capacitors C21 and C22 fluctuate. values, and offset components and low-frequency noise components can be removed with high accuracy.

In addition, in the first embodiment described above, the first state is switched to the second state during the calibration mode, but the present invention is not limited to this. For example, the first state may be switched to the second state at the same time as the calibration mode is switched to the amplification mode. In this case, clocks CLK1 to CLK3 shown in FIG. According to clocks CLK1 to CLK3 shown in FIG. 9, clocks CLK2 and CLK3 are the same clock. Therefore, the control circuits of the auto-zero amplifiers 31 and 32 can be configured with simple clock generators.

Further, in the above-described first embodiment, switching to the first state is performed in the calibration mode, and switching to the second state is performed in the amplification mode, but the present invention is not limited to this. It may be switched to the first state when in the amplification mode and to the second state when in the calibration mode.

(Second embodiment)
Next, a second embodiment will be described. As shown in FIG. 10, a phase-reversing auto-zero amplifier 1B as an amplifying device of the second embodiment includes the common-mode detection amplifier 2 described in the first embodiment and two auto-zero amplifiers 31 and 32. As shown in FIG. A difference between the first embodiment and the second embodiment is that the input ends of the two auto-zero amplifiers 31 and 32 are inverted. That is, the positive input end of one of the two auto-zero amplifiers 31 and 32 is connected to the negative input end of the other, and the negative input end of one is connected to the positive input end of the other.

The phase-reversing auto-zero amplifier 1B, like the Ping-Pong auto-zero amplifier 1A, switches one of the two auto-zero amplifiers 31, 32 to calibration mode, the other to amplification mode. When one of the two auto-zero amplifiers 31, 32 is switched to amplification mode, the other is switched to calibration mode. As a result, the phase-inverting auto-zero amplifier 1B always outputs the output signal Vout in which the offset component and the low frequency component are reduced, and the output signal Vout is inverted each time the amplification mode is switched to the calibration mode.

(Third embodiment)
Next, a third embodiment will be described. As shown in FIG. 11, an amplifier sharing auto-zero amplifier 1C as an amplifier device of the third embodiment has a first path mode input from a first input path and output from a first output path, and a second input path mode. and a second path mode that is input from and output from a second output path. The amplifier-sharing auto-zero amplifier 1C includes the common-mode detection amplifier 2 described in the first embodiment and three auto-zero amplifiers 31C, 32C, and 33C. Since the common-mode detection amplifier 2 is the same as the common-mode detection amplifier 2 described in the first embodiment, detailed description thereof is omitted here.

The autozero amplifiers 31C, 32C, 33C are connected in parallel with each other. Since the auto-zero amplifiers 31C, 32C, and 33C have the same configuration, the auto-zero amplifier 31C will be described here as a representative. The auto-zero amplifier 31C has a common-mode detection path and a common-mode feedback path as in the first embodiment. Also, the auto-zero amplifier 31C has two first and second input paths for inputting the input signal Vin and two first and second output paths for outputting the output signal Vout. As shown in FIGS. 12 to 15, the auto-zero amplifier 31C includes two transconductance amplifiers 341 and 342 (amplifiers), a calibration circuit 35C, and a common-mode feedback section 36. FIG.

The calibration circuit 35C includes switches S11 to S14, S21 to S24, and S31 to S34 as first changeover switches and path changeover switches, S41 and S42 as first changeover switches, a mutual conductance amplifier 351, a sampling capacitor C11, C12. Switches S 11 , S 12 are connected between the first input path and the input of transconductance amplifier 341 . Switches S 13 , S 14 are connected between the second input path and the input of transconductance amplifier 342 . Switches S21 and S22 are connected between the reference common mode voltage Vcm and the input of transconductance amplifier 341 . Switches S23 and S24 are connected between the input of transconductance amplifier 341 and the input of transconductance amplifier 342 .

The outputs of transconductance amplifiers 341, 342 are connected together. The switches S31, S32 are connected between the outputs of the mutually connected transconductance amplifiers 341, 342 and the first output path. The switches S33, S34 are connected between the outputs of the mutually connected transconductance amplifiers 341, 342 and the second output path. The switches S41 and S42 are connected between the outputs of the mutually connected transconductance amplifiers 341 and 342 and one ends of the sampling capacitors C11 and C12. The other ends of the sampling capacitors C11 and C12 are grounded. Transconductance amplifier 351 has its output connected to the outputs of transconductance amplifiers 341 and 342 .

The common mode feedback section 36 is connected to the outputs of the two transconductance amplifiers 341,342. Since the common-mode feedback unit 36 is similar to that of the first embodiment, detailed description thereof is omitted here.

The auto-zero amplifier 31C has a calibration mode and an amplification mode, first path mode and second path mode. In the calibration mode, as shown in FIGS. 12 and 13, switches S11-S14 and S31-S34 are turned off and switches S21-S24, S41 and S42 are turned on. This disconnects the inputs and outputs of the transconductance amplifiers 341 and 342 from the first and second input paths and the first and second output paths. Also, the inputs of the mutual conductance amplifiers 341 and 342 are short-circuited, and the mutual conductance amplifiers 341 and 342 output offset components and low-frequency noise components. Also, the offset components and low-frequency noise components output from the transconductance amplifiers 341 and 342 are sampled as calibration voltages in the sampling capacitors C11 and C12.

In the first path mode, as shown in FIG. 14, switches S11, S12, S23, S24, S31 and S32 are turned on, and switches S13, S14, S21, S22, S33, S34, S41 and S42 are turned off. This connects the inputs and outputs of the transconductance amplifiers 341 and 342 to the first input path and the first output path. As a result, the mutual conductance amplifiers 341 and 342 amplify the input signal Vin input from the first input path and output it as the output signal Vout from the first output path.

In the second path mode, as shown in FIG. 15, switches S13, S14, S21, S22, S33, and S34 are turned on, and switches S11, S12, S23, S24, S31, and S32 are turned off. This connects the input and output of the transconductance amplifier 342 to the second input path and the second output path. Also, the inverting and non-inverting inputs of transconductance amplifier 341 are shorted. Thereby, the mutual conductance amplifier 342 amplifies the input signal Vin input from the second input path and outputs it as the output signal Vout from the second output path.

Also, as in the first embodiment, in the first state, as shown in FIG. 12, the switches S51, S52, and S6 are turned on, the common-mode detection amplifier 2 is connected to the common-mode feedback section 6, and the common-mode detection capacitor C21 is connected. , C22 is sampled with a voltage corresponding to the common-mode output voltage. In the second state, the switches S51, S52, and S6 are turned off to disconnect the common-mode detection amplifier 2 from the common-mode feedback section 6, as shown in FIGS. Further, the input of the common-mode control amplifier 361 is held at the common-mode output voltage output from the common-mode detection amplifier 2 by the voltage sampled by the common-mode detection capacitors C21 and C22.

Next, the operation of the amplifier sharing auto-zero amplifier 1C having the configuration described above will be described with reference to the time chart shown in FIG. The clock CLK1 is supplied to the switches S11, S12, S31 and S32 of the auto-zero amplifier 31C, the clock CLK2 is supplied to the switches S13, S14, S33 and S34, and the clock CLK3 is supplied to the switches S23 and S24. be. The clock CLK4 is supplied to the switches S21 and S22, the clock CLK5 is supplied to the switches S41 and S42, and the clock CLK6 is supplied to the switches S51, S52 and S6.

With these clocks CLK1 to CLK6, the auto-zero amplifier 31C sequentially goes through the calibration mode (FIGS. 12 and 13), the first path mode of the amplification mode (FIG. 14), the calibration mode, and the second path mode of the amplification mode (FIG. 15). The operation mode is switched, and this switching is repeated.

The clocks CLK1 to CLK6 supplied to the auto-zero amplifiers 31C, 32C and 33C are 120 degrees out of phase. Thus, as shown in FIG. 17, when one of the auto-zero amplifiers 31C, 32C, 33C is in calibration mode, the other two are in first path mode or second path mode. Also, the auto-zero amplifiers 31C, 32C, and 33C sequentially enter the calibration mode. Thereby, the amplifier sharing auto-zero amplifier 1C can always output the output signal Vout obtained by amplifying the input signal Vin from one or both of the first output path and the second output path.

In the above-described third embodiment, the first state is switched to the second state while in the calibration mode, but the present invention is not limited to this. For example, the first state may be switched to the second state at the same time as the calibration mode is switched to the amplification mode. In this case, the clocks CLK1 to CLK6 shown in FIG. 18 are supplied to the switches S11 to S14, S21 to S24, S31 to S34, S41, S42, S51, S52 and S6 of the auto-zero amplifier 31C. According to clocks CLK1 to CLK6 shown in FIG. 18, clocks CLK5 and CLK6 are the same clock. Therefore, the control circuits of the auto-zero amplifiers 31C, 32C, and 33C can be configured with simple clock generators.

(Fourth embodiment)
In the first to third embodiments, the common-mode detection capacitors C21 and C22 are charged with the differential voltages output from the mutual conductance amplifiers 34, 341 and 342 in the amplification mode. When the mode is switched to the calibration mode in this state, it is necessary to discharge the differential voltage accumulated in the common-mode detection capacitors C21 and C22, so the time until the transient response of the voltage of the common-mode detection capacitors C21 and C22 converges becomes longer. .

Therefore, in the fourth embodiment, a common-mode feedback section 36D as shown in FIGS. 19 and 20 is used instead of the common-mode feedback section 36 described in the first to third embodiments. The common-mode feedback section 36D has switches S51, S52, S6, a common-mode control amplifier 361, common-mode detection capacitors C21 to C24, and switches S71 to S74 (second selector switches). Since the switches S51, S52, S6 and the common-mode control amplifier 361 are the same as those already described in the first to third embodiments, detailed description thereof will be omitted here.

The common-mode detection capacitor C21 (first common-mode detection capacitor) is connected to the positive outputs of the mutual conductance amplifiers 34, 341, and 342 of the two outputs of the common-mode control amplifier 361 (hereinafter abbreviated as “+ output”). , and the input of the common-mode control amplifier 361 . The common-mode detection capacitor C22 (second common-mode detection capacitor) is in-phase with the output of the common-mode control amplifier 361 that is connected to the negative outputs of the transconductance amplifiers 34, 341, and 342 (hereinafter abbreviated as “−output”). It is connected between the input of the control amplifier 361 . The common-mode detection capacitor C23 (third common-mode detection capacitor) has one end connected to the input of the common-mode control amplifier 361, the other end connected to the + output via the switch S71, and the - output via the switch S72. . The common-mode detection capacitor C24 (fourth common-mode detection capacitor) has one end connected to the input of the common-mode control amplifier 361, the other end connected to the − output through the switch S73, and the + output through the switch S74. . That is, the switches S71 to S74 switch the connection destinations of the common-mode detection capacitors C23 and C24 to +output or -output.

This allows the common-mode feedback section 36D to switch between the third state shown in FIG. 19 and the fourth state shown in FIG. In the third state, as shown in FIG. 19, switches S71 and S73 are turned on and switches S72 and S74 are turned off. As a result, common-mode detection capacitors C 21 and C 23 are connected in parallel between the + output and the input of common-mode control amplifier 361 . Common-mode detection capacitors C 22 and C 24 are connected in parallel between the − output and the input of the common-mode control amplifier 361 . In the fourth state, as shown in FIG. 20, switches S72 and S74 are turned on and switches S71 and S73 are turned off. As a result, the common-mode detection capacitors C21 and C24 are connected in parallel between the + output and the input of the common-mode control amplifier 361 . Common-mode detection capacitors C 22 and C 23 are connected in parallel between the − output and the input of the common-mode control amplifier 361 . A circuit (not shown) that outputs a clock for on/off control of the switches S71 to S74 constitutes a second control section.

Next, the operation of the common-mode feedback section 36D in the fourth embodiment will be described. If the common-mode feedback unit 36D is in the third state in the amplification mode, it switches from the third state to the fourth state at the timing of switching from the amplification mode to the calibration mode. In the third state in the amplification mode, the voltage at the other ends of the common-mode detection capacitors C21 and C23 connected to the + output is higher than the voltage at the other ends of the common-mode detection capacitors C22 and C24 connected to the - output. Become. After that, when switching to the fourth state at the timing of switching to the calibration mode, the common-mode detection capacitors C21 and C24 are connected in parallel, and the common-mode detection capacitors C22 and C23 are connected in parallel. Therefore, charge transfer occurs from the common-mode detection capacitor C21 to the common-mode detection capacitor C24, and from the common-mode detection capacitor C23 to the common-mode detection capacitor C22. converges faster.

Further, if the common-mode feedback unit 36D is in the fourth state in the amplification mode, it is switched from the fourth state to the third state when the amplification mode is switched to the calibration mode. For the same reason, the convergence of the transient response of the voltages of the common-mode detection capacitors C21 to C24 when switching from the amplification mode to the calibration mode is accelerated.

According to the above-described fourth embodiment, switching from the third state to the fourth state or from the fourth state to the third state is performed at the timing of switching from the amplification mode to the calibration mode. not a thing At the timing of switching from the calibration mode to the amplification mode, the third state may be switched to the fourth state or the fourth state to the third state.

(Fifth embodiment)
Next, a fifth embodiment will be described. In order to speed up the convergence of the transient response described above, the auto-zero amplifier 31 shown in the fifth embodiment is replaced with the common-mode detection amplifier 2 explained in the first to third embodiments as shown in FIGS. A common-mode detection amplifier 2E is used.

As shown in FIGS. 23 and 24, the common-mode detection amplifier 2E includes two current sources I1 and I2, four MOS transistors M11 to M14, a current mirror circuit 21, auxiliary capacitors C31 and C32, a switch S81, It has S82 and S83 (third switch). Since the current sources I1 and I2, the four MOS transistors M11 to M14, and the current mirror circuit 21 have already been described in the first embodiment, detailed description thereof will be omitted here.

As shown in FIGS. 21 and 22, when the switches S51, S52, and S6 are turned on, the auxiliary capacitors C31 and C32 are connected in parallel to the common-mode detection capacitors C21 and C22, and are in-phase with the common-mode input of the common-mode detection amplifier 2E. connected between the output. As shown in FIGS. 23 and 24, the switch S81 is connected between one end of the common-mode input side of the auxiliary capacitor C31 and the reference common-mode voltage Vcm. The switch S82 is connected between one end of the common-mode input side of the auxiliary capacitor C32 and the reference common-mode voltage Vcm. The switch S83 is connected between the gate and drain of the transistor on the output side of the current mirror circuit 21 . When the switches S81 and S82 are turned on, the reference common-mode voltage Vcm is supplied to one ends of the auxiliary capacitors C31 and C32. When the switch S83 is turned on, the output side transistor of the current mirror circuit 21 is diode-connected, the impedance between the other end of the auxiliary capacitors C31 and C32 and the ground is lowered, and the auxiliary capacitors C31 and C32 are charged to the reference common mode voltage Vcm. be.

That is, the common-mode detection amplifier 2E is switched between a charge mode in which the auxiliary capacitors C31 and C32 are charged to the reference common-mode voltage Vcm and a common-mode output mode in which the common-mode output voltage is output by turning on/off the switches S81 to S83. A circuit (not shown) that outputs a clock for controlling on/off of the switches S81 to S83 constitutes a third control section.

Next, the operation of the fifth embodiment described above will be described. The switches S81 to S83 are turned on while the switches S51, S52 and S6 are turned off to disconnect the common-mode feedback section 36 from the common-mode detection amplifier 2E. Thereby, the auxiliary capacitors C31 and C32 are charged to the reference common-mode voltage Vcm. After that, when the switches S51, S52 and S6 are turned on to connect the common-mode feedback unit 36 and the common-mode detection amplifier 2E, the switches S81 to S83 are turned off. When the switches S51, S52, and S6 are turned on, the auxiliary capacitor C31 is connected in parallel to the common-mode detection capacitor C21, and the auxiliary capacitor C32 is connected in parallel to the common-mode detection capacitor C22. The auxiliary capacitors C31 and C32 can cancel the differential voltage of the common-mode detection capacitors C21 and C22 to quickly approach the reference common-mode voltage Vcm, thereby speeding up the convergence of the transient response. By making the capacitance of the auxiliary capacitors C31 and C32 larger than the common-mode detection capacitors C21 and C22, the voltage across the common-mode detection capacitors C21 and C22 can be brought closer to the reference common-mode voltage Vcm more quickly, thereby further improving the transient response. can hasten the convergence of Since the phase compensation capacitance of the common mode feedback circuit is determined as the sum of the common mode detection capacitances C21, C22 and the auxiliary capacitances C31, C32, the common mode detection capacitances C21, C22 can be designed to be small, and the circuit area can also be reduced.

Next, the operation when the common-mode detection amplifier 2E described above is applied to the auto-zero amplifiers 31 and 32 constituting the Ping-Pong auto-zero amplifier 1A of the first embodiment will be described with reference to FIG. As shown in the figure, the switches S81 to S83 are turned off when either one of the auto-zero amplifiers 31 and 32 is connected to the common-mode detection amplifier 2E. Also, the switches S81-83 are turned on when both the auto-zero amplifiers 31 and 32 are disconnected from the common-mode detection amplifier 2E.

(Sixth embodiment)
Next, a sixth embodiment will be described. As shown in FIG. 26, in the sixth embodiment, the Ping-Pong auto-zero amplifier 1A described in the first embodiment is used to construct an amplifier device 100 having two or more stages of amplifiers. The amplifier device 100 includes a Ping-Pong auto-zero amplifier 1A serving as an input stage, and an amplifier 101 that amplifies the output of the Ping-Pong auto-zero amplifier 1A. An input signal Vin input to the Ping-Pong auto-zero amplifier 1A is amplified by the Ping-Pong auto-zero amplifier 1A and the amplifier 101 and output as an output signal Vout. With this configuration, the precision of the amplifier 100 can be improved.

(Seventh embodiment)
Next, a seventh embodiment will be described. As shown in FIG. 27, in the seventh embodiment, the Ping-Pong auto-zero amplifier 1A described in the first embodiment or the phase-inverting auto-zero amplifier 1B described in the second embodiment is used to stabilize three or more stages of choppers. Configure amplifier 102 . Chopper stabilized amplifier 102 comprises chopper modulator 103 , transconductance amplifier 104 , chopper output circuit 105 , amplifier 106 and transconductance amplifier 107 .

A chopper modulator 103 modulates the signal Vin in a high frequency band. A transconductance amplifier 104 amplifies and outputs the signal modulated by the chopper modulator 103 . The chopper output circuit 105 is configured, for example, as shown in FIG. As shown in the figure, the chopper output circuit 105 has a chopper modulator 108 and a noise reduction loop circuit 109 . The chopper modulator 108 demodulates the signal component of the output of the transconductance amplifier 104 to a low frequency band, modulates the offset component and the low frequency noise component to a high frequency band, and outputs them.

A noise reduction loop circuit 109 extracts the offset component of the mutual conductance amplifier 104 and negatively feeds back the extracted offset component to the output of the mutual conductance amplifier 104 . This noise reduction loop circuit 109 can reduce the offset component and low-frequency noise component generated in the transconductance amplifier 104 and reduce the ripple noise contained in the output of the chopper output circuit 105 (Fig. 30(B), Fig. 30 (C)).

In the example shown in FIG. 28, the noise reduction loop circuit 109 includes the Ping-Pong auto-zero amplifier 1A described in the first embodiment, which amplifies the input of the noise reduction loop circuit 109, and the high-frequency signal output from the Ping-Pong auto-zero amplifier 1A. This configuration has a filter circuit 110 that reduces components and a transconductance amplifier 111 that amplifies the output of the filter circuit 110 . The output of the transconductance amplifier 104 is input to the Ping-Pong auto-zero amplifier 1A. The filter circuit 110 has a function of amplifying the low frequency signal component of the output of the Ping-Pong auto-zero amplifier 1A and reducing the high frequency signal component. The filter circuit 110 can reduce high frequency signal components and feed back the offset components of the amplifier.

Also, the chopper output circuit 105 may be configured as shown in FIG. 29, for example. As shown in the figure, the chopper output circuit 105 has a chopper modulator 112 and a ripple calibration circuit 113 . Chopper modulator 112 is similar to chopper modulator 108 shown in FIG.

The ripple calibration circuit 113 has an input connected to the output of the chopper modulator 112 and an output connected to the input of the chopper modulator 112 . Ripple calibration circuit 113 extracts a high-frequency noise component (ripple noise) from the output of chopper modulator 112 , modulates the extracted ripple noise into an offset component, and converts the modulated offset component into transconductance amplifier 104 . This is a circuit that provides negative feedback to the output. Ripple calibration circuit 113 can reduce the offset component included in the output of transconductance amplifier 104 to reduce the ripple noise included in the output of chopper modulator 112 (see FIGS. 30B and 30C). .

In this embodiment, the ripple calibration circuit 113 includes a high-pass filter 114 that reduces the low-frequency noise component input to the ripple calibration circuit 113 and detects the ripple noise, and converts the ripple noise output from the high-pass filter 114 into the low-frequency component. A configuration having a phase-inverting auto-zero amplifier 1B that demodulates and modulates to an offset component, a filter circuit 115 that reduces the high-frequency component of the output of the phase-inverting auto-zero amplifier 1B, and a transconductance amplifier 118 that amplifies the output of the filter circuit 115. be.

As shown in FIG. 27, amplifier 106 amplifies the signal component output from chopper output circuit 105 . In this embodiment, the output of amplifier 106 is the output terminal of chopper-stabilized amplifier 102, and output signal Vout is output. Amplifier 106 has transconductance amplifier 117 , amplifier 118 , and phase compensation circuit 119 that performs phase compensation for amplifiers 117 and 118 . The output of transconductance amplifier 117 is connected to the input of amplifier 118 , and the output of amplifier 118 is the output of amplifier 106 , that is, the output of chopper-stabilized amplifier 102 .

The phase compensation circuit 119 is composed of capacitors Cc1 to Cc3. Capacitor Cc1 is connected between the input and output of amplifier 118 . Capacitor Cc2 is connected between the inverting input of transconductance amplifier 117 and the output of amplifier 118 . Capacitor Cc3 is connected between the non-inverting input of transconductance amplifier 117 and ground.

Transconductance amplifier 107 is connected between the input end and the input of amplifier 118 and functions as a feedforward amplifier. In this way, by using the Ping-Pong auto-zero amplifier 1A described in the first embodiment and the phase-inverting auto-zero amplifier 1B described in the second embodiment, the chopper-stabilized amplifier 102 with three or more stages can be made highly accurate. be able to.

It should be noted that the present invention is not limited to the above-described embodiments, and can be modified, improved, etc. as appropriate. In addition, the material, shape, size, number, location, etc. of each component in the above-described embodiment are arbitrary and not limited as long as the present invention can be achieved.

For example, although the output-stage amplifier 106 shown in the above-described seventh embodiment is composed of the transconductance amplifier 117 and the amplifier 118, it is not limited to this. For example, as shown in FIG. 31, two transconductance amplifiers 120 and 121 may be provided instead of the transconductance amplifier 117 . In the example shown in FIG. 31, the phase compensation circuit 122 is composed of two capacitors Cc4 and Cc5. Capacitor Cc4 is connected between the inverting input of transconductance amplifier 121 and the output on the positive electrode side. Capacitor Cc5 is connected between the non-inverting input of transconductance amplifier 121 and the negative output.

Also, the noise reduction loop circuit 109 shown in FIG. 28 described in the seventh embodiment may be configured as shown in FIG. In the example shown in FIG. 32, instead of the Ping-Pong auto-zero amplifier 1A shown in FIG. 28 and the amplifier 102 connected to the output of the chopper modulator 106, mutual Conductance amplifiers 341 and 342 are used. As shown in the figure, the output of chopper modulator 106 is connected to the first input path of amplifier sharing auto-zero amplifier 1C, and the first output path serves as the output terminal. Also, the output of the transconductance amplifier 104 is connected to the second input path and the filter circuit 110 is connected to the second output path.

1A Ping-Pong auto-zero amplifier (amplifier)
1B phase reversal auto-zero amplifier (amplifier)
1C amplifier sharing auto-zero amplifier (amplifier)
2, 2E common mode detection amplifier 31, 32 autozero amplifier 31C, 32C, 33C autozero amplifier 34 transconductance amplifier (amplifier)
35 calibration circuit 35C calibration circuit 100 amplifier 341, 342 transconductance amplifier (amplifier)
361 common mode control amplifier C11, C12 sampling capacitor C21 common mode detection capacitor (first common mode detection capacitor)
C22 common mode detection capacitor (second common mode detection capacitor)
C23 common mode detection capacitor (third common mode detection capacitor)
C24 common mode detection capacitor (fourth common mode detection capacitor)
C31, C32 Auxiliary capacitor S1 Switch (first selector switch)
S2 switch (first selector switch)
S11 to S14 (first changeover switch, route changeover switch)
S21 to S24 (first changeover switch, route changeover switch)
S31 to S34 (first changeover switch, route changeover switch)
S41, S42 switch (first changeover switch)
S51, S52 switch (second switch)
S6 switch (first switch)
S71 to S74 switch (second selector switch)
S81 to S83 switch (third selector switch)

Claims (10)

an amplifier;
a calibration circuit including a sampling capacitor;
A calibration mode in which a calibration voltage for calibrating an offset component and a low-frequency noise component of the amplifier is sampled into the sampling capacitor, and an input signal is amplified by the amplifier in which the offset component and the low-frequency noise component are reduced by the calibration voltage. and a first changeover switch for switching an amplification mode for outputting an output signal with a plurality of auto-zero amplifiers,
Equipped with a common-mode detection amplifier that outputs a common-mode output voltage such that the common-mode voltage of the two common-mode inputs becomes the reference common-mode voltage,
The plurality of auto-zero amplifiers,
a common-mode controlled amplifier that amplifies an input and outputs an output signal that controls the common-mode voltage of the amplifier;
a common mode sensing capacitance connected between the output of the amplifier and the input of the common mode controlled amplifier;
a first switch for controlling connection between the input of the common-mode control amplifier and the common-mode output of the common-mode detection amplifier;
a second switch controlling the connection between the output of the amplifier and the common mode input of the common mode sense amplifier;
amplifier. The amplifier device according to claim 1,
A first control unit that controls the first changeover switch,
The first control unit controls the first selector switch so that the auto-zero amplifier alternately switches between the calibration mode and the amplification mode, and at least one of the plurality of auto-zero amplifiers switches to the Controlling the first changeover switch to operate in an amplification mode and one or more other autozero amplifiers to operate in the calibration mode;
amplifier. The amplifier device according to claim 1,
Three auto-zero amplifiers are provided,
each of the three auto-zero amplifiers has a first input path and a second input path respectively receiving the input signal;
having a first output path and a second output path through which the output signals are respectively output;
In the amplification mode, the first selector switch connects the amplifier to the first input path and the first output path in a first path mode, and connects the amplifier to the second input path and the second output path. Having a route changeover switch for switching between the connecting second route mode,
amplifier. The amplifier device according to claim 3,
A first control unit that controls the first changeover switch,
The first control unit controls the first selector switch so that the auto-zero amplifier alternately switches between the calibration mode and the amplification mode, and one of the three auto-zero amplifiers switches to the calibration mode. and controlling the first changeover switch such that the remaining autozero amplifier operates as the first path mode or the second path mode.
amplifier. The amplifier device according to claim 1,
A first control unit that controls the first changeover switch, the first switch, and the second switch,
The first control unit is
controlling the first selector switch to alternately operate the calibration mode and the amplification mode;
ON-controlling the first switch and the second switch of the auto-zero amplifier in the calibration mode;
turning off the first switch and the second switch of the auto-zero amplifier in the amplification mode;
amplifier. The amplifier device according to claim 1,
A first control unit that controls the first changeover switch, the first switch, and the second switch,
The first control unit is
controlling the first selector switch to alternately operate the calibration mode and the amplification mode;
turning on the first switch and the second switch of the auto-zero amplifier switched from the amplification mode to the calibration mode;
turning off the first switch and the second switch while the auto-zero amplifier is in the calibration mode;
keeping the first switch and the second switch off of the auto-zero amplifier in the amplification mode;
amplifier. In the amplification device according to any one of claims 1 to 6,
The common mode sense capacitance is connected between a first common mode sense capacitance connected between the positive output of the amplifier and the input of the common mode controlled amplifier, and between the negative output of the amplifier and the input of the common mode controlled amplifier. a second common mode sensing capacitor connected thereto, and a third common mode sensing capacitor and a fourth common mode sensing capacitor having one end connected to the input of the common mode controlled amplifier;
The auto-zero amplifier has a second changeover switch that switches the connection destination of the other end of the third common-mode detection capacitor and the fourth common-mode detection capacitor to a positive output of the amplifier or a negative output of the amplifier,
amplifier. In the amplifier device according to claim 7,
A second control unit that controls the second changeover switch,
The second control unit switches the second changeover switch at the timing when the auto-zero amplifier switches from the calibration mode to the amplification mode or at the timing when the amplification mode switches to the calibration mode.
amplifier. In the amplification device according to any one of claims 1 to 6,
The common-mode detection amplifier includes an auxiliary capacitor connected in parallel to the common-mode detection capacitor when the first switch and the second switch are turned on; a third changeover switch that switches a common-mode output mode that outputs an output voltage;
amplifier. The amplifier device according to claim 9,
A third control unit that controls the third changeover switch,
The third control unit switches to the common-mode output mode when the first switch and the second switch are turned on, and switches to the charge mode when the first switch and the second switch are turned off. controlling the third changeover switch;
amplifier.

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