JP2022117572A - Image sensor and camera using the same - Google Patents

Abstract

To provide a technique that prevents the influence of threshold voltage shift ΔVth in an amplification transistor included in a pixel circuit in an image sensor using a SiCMOSFET.SOLUTION: An image sensor composed of a SiC element including a SiCMOSFET has: a pixel circuit 10 including a photodiode PD, an amplification transistor MD that converts electric charges generated in the photodiode into voltage signals, first and second transfer transistors M1, M2 that output the voltage signals, and a reset transistor MRST that has a source-drain path between a power supply potential and the amplification transistor. The reset transistor is turned on prior to a first read-out timing to read out reference voltage, and a period during which the reset transistor is turned on is set based on the time required for shift of a threshold voltage of the SiCMOSFET to be saturated.SELECTED DRAWING: Figure 4

Description

The present invention relates to an image sensor composed of SiC elements including SiCMOSFETs and a camera using the same.

Patent Document 1 discloses a solid-state imaging device capable of setting a reset level so as to reduce a margin for in-plane characteristic fluctuation in a two-dimensional array of unit pixels. Patent Document 2 discloses a solid-state imaging device capable of high-speed reading of pixel signals while suppressing column-fixed pattern noise and shading that degrade image quality. As a specific application example of these, a CMOS image sensor using a SiMOSFET is assumed.

SiC elements have higher radiation resistance than Si elements. Therefore, by configuring the image sensor with SiC elements, it is possible to realize a camera that can be used in a strong radiation environment.

JP 2011-229120 A WO2012/144218

FIG. 1 shows a circuit diagram of a pixel circuit 10 and a readout circuit 11 that constitute an image sensor using SiCMOSFETs. As will be described later, the image sensor has pixel circuits arranged in a matrix, and a readout circuit is provided in common for a plurality of pixel circuits. Here, for ease of understanding, a state in which the pixel circuits 10 and the readout circuits 11 are connected one-to-one is shown.

The pixel circuit 10 and the readout circuit 11 are composed of SiC elements formed on a SiC substrate. Although the magnitude of the power supply potential _VDD is not particularly limited, it is, for example, 4V. The pixel circuit 10 includes a photodiode PD. When the photodiode PD is irradiated with light, charges are generated in the photodiode PD due to photoelectric conversion. The amount of charge generated depends on the amount of light applied to the photodiode PD. The pixel circuit 10 converts the charge generated in the photodiode PD into a voltage signal, and the readout circuit 11 selectively reads out the voltage converted by the pixel circuit 10 to detect the amount of light applied to each pixel.

FIG. 2 shows readout waveforms (schematic diagrams) of the pixel circuit 10 and the readout circuit 11 shown in FIG. FIG. 2 shows the voltages applied to the respective gates of the transistors shown in FIG. _Waveform 21 is the gate potential of the amplification transistor MD, waveform 21a shows a change when the amount of light is large (bright), and waveform 21b shows a change when the amount of light is small (dark). Note that the transistors are all _SiCMOSFETs that operate on the power supply voltage _VDD , but in FIG. It is drawn emphasized compared to the waveforms of other transistors.

First, by turning on (conducting) the reset transistor _MRST , the gate potential of the amplification transistor _MD is pulled up to the power supply potential _VDD . At this time, the drain potential and the gate potential of the _amplifying transistor MD are equal, and the source-drain path is in a conductive state. After that, the reset transistor _{M_RST} is turned off (non-conducting) and the _row select transistor M1 is turned on. The row select transistor M1 is kept on while the pixel circuit ₁₀ is being read out. A period during which the row select transistor M1 is turned on is called _a readout period.

At the beginning of the read period, the _first transfer transistor M2 is turned on for a predetermined period of time, so that the capacitor C1 is charged from the power supply potential V _DD through the source _- drain paths of the transistors M _D , M ₁ and M ₂ . is retained. Thus, the voltage generated in the capacitor C1 is called _a reference voltage, and the timing for turning on the _first transfer transistor M2 is called a reference voltage read timing _Tr . On the other hand, at the end of the read period, the second transfer transistor M3 is turned on for a predetermined period of time, so that the power supply potential V _DD passes through the source _- drain paths of the transistors M _D , M ₁ and M ₃ to the capacitor C ₂ . holds charge. Thus, the voltage generated in the capacitor _C2 is called signal voltage, and the timing for turning on the _second transfer transistor M3 is called signal voltage read timing _TS .

The difference in _magnitude between the reference voltage and the signal voltage depends on the gate potential of the amplification transistor MD, that is, the cathode potential of the photodiode PD. When the amount of light is large, the amount of charge generated in the photodiode PD is large, so that the gate potential of the amplification transistor _MD approaches the ground potential (GND, assumed to be 0 V) as shown in the waveform 21a, and the source potential of the amplification transistor _MD approaches. As the resistance value of the drain path increases, the differential voltage between the reference voltage and the signal voltage increases. On the other hand, when the amount of light is small, the amount of charge generated in the _{photodiode PD} is _small . By keeping the resistance of the source-drain path of , the difference between the reference voltage and the signal voltage is small. After the readout period ends, the column selection transistors M ₄ and M ₅ are turned on, the reference voltage and the signal voltage are input to the two input terminals (+, −) of the differential circuit 12, respectively, and the differential voltage is output from the output terminal OUT. output.

In a strong radiation environment, exposure to strong gamma rays shifts the threshold voltage of the SiCMOSFET. Therefore, the threshold voltage of the SiCMOSFET varies greatly for each pixel circuit forming the image sensor. In the circuit configuration shown in FIG. 1, both the reference voltage and the signal voltage depend on the threshold voltage of the _{amplification} transistor _MD . be done. Therefore, there is an advantage that the amount of light can be detected without being affected by variations in the threshold voltage of the amplification transistor _MD for each pixel.

However, as a result of studies by the inventors, in the pixel circuit 10 of FIG. 1, a phenomenon occurs in which the threshold voltage _Vth of the amplification transistor _MD is largely shifted between the reference voltage readout timing _Tr and the signal voltage readout timing Ts. was seen 3A and 3B show the shift ΔVth of the threshold voltage of the SiCMOSFET prototyped by the inventors.

FIG. 3A shows an example of the threshold voltage shift ΔVth of a SiCMOFET. The shift ΔVth of the threshold voltage was measured while changing the time for applying the gate voltage with the source potential and the drain potential of the prototyped SiCMOFET set to 0 V and the gate potential of 4 V. FIG. The horizontal axis indicates time (logarithmic display), and the vertical axis indicates the threshold voltage shift ΔVth (linear display). In this example, when there is a difference of approximately 0.5 ms between the reference voltage readout timing _Tr and the signal voltage readout timing Ts, the threshold voltage is shifted by approximately _7.9mV .

FIG. 3B shows the cumulative frequency distribution of the threshold voltage shift ΔVth for 30 SiCMOSFET samples thus measured. Comparing the outlier and median values of the samples, the threshold voltage shift ΔVth was as large as 8 gray scales for a 256 gray scale image sensor.

As described above, in an image sensor using SiCMOSFET, the SiCMOSFET has a relatively large threshold voltage shift ΔVth, and its variation is large. Therefore, even with a circuit configuration that is less susceptible to variations in the threshold voltage of the amplification transistor _{M D} for each pixel as shown in FIG. Detection accuracy may decrease.

An image sensor composed of a SiC element including a SiCMOSFET, which is one embodiment of the present invention, includes a photodiode, an amplifying transistor that converts the charge generated in the photodiode into a voltage signal, and first and first transistors that output the voltage signal. 2, a reset transistor having a source-drain path between the power supply potential and the gate of the amplification transistor, and turning on the first transfer transistor at the first read timing, A first capacitor that holds a voltage signal read out from the pixel circuit as a reference voltage and a second transfer transistor that is turned on at a second readout timing later than the first readout timing enable the pixel circuit to a second capacitor for holding the voltage signal read out from the second capacitor as a signal voltage; The period during which the reset transistor is turned on prior to the read timing of is set based on the time required for the shift of the threshold voltage of the SiCMOSFET to be saturated.

An image sensor using a SiCMOSFET suppresses the influence of a threshold voltage shift ΔVth of an amplification transistor included in a pixel circuit.

Other problems and novel features will become apparent from the description of the specification and the accompanying drawings.

3 is a circuit diagram of a pixel circuit and a readout circuit; FIG. It is a read-out waveform of a pixel circuit and a read-out circuit. It is an example of shift ΔVth of the threshold voltage of SiCMOSFET. FIG. 10 is a diagram showing variations in the shift ΔVth of the threshold voltage of SiCMOSFET; 1 is a circuit diagram of an image sensor; FIG. It is a readout waveform of the image sensor. It is a figure for demonstrating the effect of a present Example. It is a figure for demonstrating the effect of a present Example. It is an example of shift ΔVth of the threshold voltage of SiCMOSFET at room temperature. It is an example of shift ΔVth of the threshold voltage of SiCMOSFET at 50°C. It is a figure which shows a 1st relational expression. It is a figure which shows a 2nd relational expression. It is a figure which shows the saturation time of SiCMOSFET. 1 is a configuration diagram of a camera; FIG.

FIG. 4 shows a circuit diagram of the image sensor of this embodiment. Since the configurations of the pixel circuit and the readout circuit are the same as the circuit configuration shown in FIG. 1, redundant description will be omitted. The pixel circuits 10 are arranged in an n×n matrix, and FIG. 4 shows an example of n=4. Note that the number of pixel circuits arranged in the vertical direction and the number of pixel circuits arranged in the horizontal direction may be different. The column select transistors _M4 , _M5 and capacitors C1, _C2 of the readout circuit 11 are provided in common for _each column of the pixel matrix, and the column select transistors M4, _M5 are _respectively differential. The two inputs of circuit 12 are connected in parallel.

The vertical scanning circuit 31 and the horizontal scanning circuit 32 are collectively referred to as driver circuits. The vertical scanning circuit 31 controls the reset transistor M _RST , row selection transistor M ₁ , transfer transistors M ₂ and M ₃ included in the pixel circuit 10 . To avoid complicating the drawing, the number of control lines is omitted, but since the control lines are common to the pixel circuits in the same row, the pixel circuits 10 in the same row are the same. work on time. The horizontal scanning circuit 32 controls column select transistors _M4 and _M5 included in the readout circuit.

FIG. 5 shows operation waveforms of the image sensor of FIG. The circuit operation is as described with reference to FIGS. 1 and 2, but the readout circuit is shared by the pixel circuits arranged in a matrix. The timing is adjusted so that the output is continuously output from the differential circuit 12 .

That is, the output from the pixel circuit in the first column of the (i+1)-th row (1≤i≤(n-1)) follows the output from the pixel circuit in the first column to the n-th column in the i-th row (1≤i≤(n-1)). is started, the interval between the control timing for the i-th row and the control timing for the (i+1)-th row by the vertical scanning circuit 31 is adjusted. Further, the vertical scanning circuit 31 controls the vertical scanning circuit 31 so that the output from the pixel circuits in the first column of the first row is started again following the output from the pixel circuits of the first column to the first column of the n-th row. The interval between the start timing of the j cycle (1≦j) and the start timing of the (j+1)th cycle is adjusted.

In this embodiment, in order to suppress variations in the threshold voltage shift ΔVth of the _SiCMOSFET , electrical stress is applied to the gate of the amplification transistor MD before the start of the readout period of each pixel circuit. Specifically, the time t _RST (referred to as stress application time) for turning on the reset transistor M _RST is set to a predetermined time or longer. The function of the reset transistor _{M_RST} is to pull up the gate potential of the amplification transistor _{M_D} to the power supply potential _VDD , so from this point of view, the time during which the reset transistor _{M_RST} is turned on is the same as the other transistors in the pixel circuit. The time required to turn it on is the same (see FIG. 2). On the other hand, in the present embodiment, the time t _RST for turning on the reset transistor M _RST is extended in order to suppress variations in the threshold voltage shift ΔVth of the amplifying transistor M _D in each pixel circuit.

PBTI (Positive Bias Temperature Instability) is considered to be the cause of the threshold voltage shift ΔVth of the SiCMOSFET. PBTI is a phenomenon that occurs when the gate voltage of a MOSFET is positively biased at high temperatures, and it is said that a threshold voltage shift ΔVth occurs due to the behavior of charges trapped in the gate insulating film. Although PBTI is not a phenomenon limited to SiCMOSFETs, its influence appears more prominently in SiCMOSFETs than in SiMOSFETs. The reason is as follows. First, the gate insulating film of the SiCMOSFET has more defects than the gate insulating film of the SiMOSFET, and charges are easily trapped. Furthermore, since the driving time of the SiC element is slow, in order to properly detect the change in the cathode potential of the photodiode PD, it is necessary to take a longer readout time (for example, 0.5 ms) compared to an image sensor composed of a SiMOSFET. degree).

The effect of applying electrical stress to the gate of the amplification transistor _MD before the start of the readout period of the pixel circuit will be described with reference to FIGS. 6A and 6B.

For the shift ΔVth of the threshold voltage of the SiCMOFET shown in FIG. 3A, the stress application time t _RST is set to 0.5 ms, and the interval between the reference voltage read timing _Tr and the signal voltage read timing T _s is set to 0.5 ms. FIG. 6A shows the shift ΔVth of the threshold voltage when In this case, the threshold voltage shift _ΔVth between the reference voltage read timing _Tr and the signal voltage read timing Ts is suppressed to 0.4 mV.

FIG. 6B shows a cumulative frequency distribution 42 of the threshold voltage shift ΔVth when the read timing is the same as in FIG. 6A for the 30 SiCMOSFET samples measured in FIG. 3B. For comparison, it is shown together with the cumulative frequency distribution 41 of the threshold voltage shift ΔVth shown in FIG. 3B. In the case of the cumulative frequency distribution 41, the maximum variation corresponds to 8 gradations, but in the case of the cumulative frequency distribution 42, the maximum variation is suppressed to 1 gradation.

Even if the time during which the reset transistor _MRST is turned on is extended, the difference between the end point of the read time of cycle i (the period during which the transistor M1 is turned on) and the start point of the read time of cycle (i+ ₁ ) shown in FIG. As long as it is within the interval, there is no delay in the operation of the entire image sensor, so detection accuracy can be improved without degrading the operation speed of the image sensor.

By lengthening the reset transistor _MRST , it is possible to obtain the effect of suppressing variations in the shift ΔVth of the threshold voltage. Since the change becomes small (saturates), it is desirable that the stress application time t _RST is at least the time at which the shift ΔVth of the threshold voltage is saturated or longer.

FIGS. 7A and 7B show the measured shift ΔVth of the threshold voltage for each different gate voltage of the prototype SiCMOSFET. The measurement method is the same as in FIG. 3A. 7A and 7B linearly represent the gate voltage application time. FIG. 7A was measured at room temperature (25° C.), and FIG. 7B was measured at 50° C. FIG. In either case, the shift ΔVth in the threshold voltage greatly increases immediately after the start of application of the gate voltage, and the increase in the shift ΔVth in the threshold voltage is suppressed as the application time elapses. Therefore, the first relational expression showing the correlation between the gate voltage application time and the threshold voltage shift ΔVth in the time period immediately after the gate voltage application is started, as shown in FIG. 8A, and the threshold voltage as shown in FIG. A second relational expression showing the correlation between the gate voltage application time and the shift ΔVth of the threshold voltage in the time zone (around 1 ms in FIG. 8B) in which the shift ΔVth of the threshold voltage can be regarded as saturated. The gate voltage application time at the intersection of the first relational expression and the second relational expression is defined as the saturation time of the SiCMOSFET, and the stress application time t _RST is set to be equal to or longer than the saturation time of the SiCMOSFET.

FIG. 9 shows the calculated saturation time of the SiCMOSFET based on the measurement results shown in FIGS. 7A and 7B. The stress application time t _RST is set based on the specifications of the image sensor. The time t _RST is set to be 8.4 μs or longer.

FIG. 10 shows the configuration of a camera to which the image sensor 50 of this embodiment is applied. The image sensor 50 includes pixel circuits 51, readout circuits 52, and driver circuits 53, and corresponds to FIG. The image sensor 50 is composed of SiCMOSFETs, and the other circuit blocks are composed of SiMOSFETs.

A power supply circuit 71 supplies a power supply voltage _VDD for the image sensor 50 via a step-down regulator 72 . The control section 60 outputs a control signal. The pulse generator 61 outputs a pulse signal to the driver circuit 53 according to the control signal from the controller 60 so that the driver circuit 53 operates the pixel circuit 51 and the readout circuit 52 at the timings shown in FIG. An output signal from the readout circuit 52 is amplified by an amplifier 62 and converted to a digital signal by an analog-to-digital converter (ADC) 63 . An FPGA (Field Programmable Gate Array) 64 receives an output from the ADC 63 according to a control signal from the control section 60 and calculates luminance information for each pixel position. The encoder 65 encodes the luminance information for each pixel position calculated by the FPGA 64 and outputs it as an image.

10: pixel circuit, 11: readout circuit, 12: differential circuit, 21: waveform, 31: vertical scanning circuit, 32: horizontal scanning circuit, 41, 42: cumulative frequency distribution, 50: image sensor, 51: pixel circuit, 52: readout circuit, 53: driver circuit, 60: control unit, 61: pulse generation unit, 62: amplifier, 63: AD converter, 64: FPGA, 65: encoder, 71: power supply circuit, 72: step-down regulator.

Claims (6)

An image sensor composed of SiC elements including SiCMOSFETs,
a photodiode, an amplification transistor that converts the charge generated in the photodiode into a voltage signal, first and second transfer transistors that output the voltage signal, and a source between a power supply potential and the gate of the amplification transistor. - a pixel circuit comprising a reset transistor having a drain path;
By turning on the first transfer transistor at the first readout timing, a first capacitor that holds the voltage signal read out from the pixel circuit as a reference voltage and a voltage higher than the first readout timing. A second capacitor for holding the voltage signal read from the pixel circuit as a signal voltage by turning on the second transfer transistor at a later second readout timing, the reference voltage and the signal a readout circuit comprising a differential circuit that outputs a differential voltage from the voltage,
The reset transistor is turned on prior to the first read timing, and the period during which the reset transistor is turned on is set based on the time required for the shift of the threshold voltage of the SiCMOSFET to be saturated. . In claim 1,
The period in which the reset transistor is turned on is set to be equal to or longer than the saturation time of the SiCMOSFET,
The saturation time is defined by a first relational expression showing the correlation between the gate voltage application time in the time period immediately after the start of gate voltage application to the SiCMOSFET and the shift of the threshold voltage of the SiCMOSFET, and the threshold value of the SiCMOSFET. The image sensor is determined as the gate voltage application time at the intersection of the second relational expression showing the correlation between the gate voltage application time in the time zone in which the voltage shift is considered to be saturated and the shift of the threshold voltage of the SiCMOSFET. In claim 1,
the pixel circuit includes a row selection transistor connected in series with the amplification transistor and the first transfer transistor or the second transfer transistor;
A period in which the first transfer transistor is turned on and a period in which the second transfer transistor is turned on are included in a period in which the row selection transistor is turned on. In claim 3,
a plurality of the pixel circuits are arranged in a matrix,
The readout circuit is provided corresponding to the set of the first and second capacitors and the set of the first and second capacitors provided for each of the pixel circuits arranged in the same column, and the differential a first column select transistor for selecting the first capacitor connected to the first input of the circuit; and a second column select transistor for selecting the second capacitor connected to the second input of the differential circuit. ,
a first scanning circuit that controls the first and second transfer transistors, the reset transistor, and the row selection transistor for each of the pixel circuits arranged in the same row;
and a second scanning circuit that controls the first and second column select transistors and connects either one of the first and second sets of capacitors to the differential circuit. In claim 4,
The first scanning circuits are arranged in the same row so that the differential voltage between the reference voltage and the signal voltage is continuously output from the pixel circuits arranged in a matrix. The timing to control the pixel circuit is adjusted,
The image sensor, wherein the period during which the reset transistor is turned on is set between the end point of the period during which the row selection transistor is turned on and the start point of the next period during which the row selection transistor is turned on. an image sensor according to claim 4 or 5;
a voltage circuit that supplies the power supply potential to the image sensor;
an amplifier that amplifies the output from the readout circuit;
an analog-to-digital converter that converts the output from the amplifier into a digital signal;
a control unit that generates a control signal;
a pulse generator for outputting a pulse signal giving timing for the first scanning circuit to control the pixel circuit and for the second scanning circuit to control the readout circuit according to the control signal;
an FPGA that receives the output from the analog-to-digital converter in accordance with the control signal and calculates luminance information for each pixel position;
and an encoder that encodes the brightness information for each pixel position calculated by the FPGA and outputs it as an image.

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