JP2022104196A - Protection circuit - Google Patents

Abstract

To provide a protection circuit in which an excessive voltage can be suppressed from being output to a subsequent circuit before the completion of the adjustment of a voltage level of an input signal, the input signal being received after power activation.SOLUTION: A protection circuit 100 includes: a level adjustment circuit 11 which outputs an adjustment signal obtained by adjusting the voltage level of an input signal; an APC (Automatic Power Control) circuit 15 which suppresses the adjustment amount of the input signal to reduce the voltage level of an amplified signal to a predetermined level or less, the amplified signal being obtained by amplifying the adjustment signal; a switch 18 which switches between a state where the amplified signal is output to an external circuit and a state where the amplified signal is not output to the external circuit; and a reset circuit 16 which generates a reset signal to maintain the switch 18 in a state where the amplified signal is not output to the external circuit, from the time of power activation to the level adjustment circuit 11 until a predetermined period has passed.SELECTED DRAWING: Figure 1

Description

The present invention relates to a protection circuit.

Conventionally, a protection circuit that is connected to the front stage of a receiving circuit that receives a signal and suppresses damage to the receiving circuit by attenuating the voltage level of the signal when the voltage level of the signal becomes excessive is known. (See, for example, Patent Document 1).

Japanese Unexamined Patent Publication No. 2010-161879

The conventional protection circuit has an attenuator for adjusting the voltage level of the input signal in order to prevent damage to the receiving circuit in the subsequent stage. The conventional protection circuit may output a signal that has not been attenuated to an appropriate voltage level until the voltage level of the input signal received after the power is turned on is adjusted to an appropriate level. In such a case, there is a problem that the signal output by the protection circuit may damage the receiving circuit.

Therefore, the present invention has been made in view of these points, and it is possible to suppress an excessive voltage from being output to the subsequent circuit until the adjustment of the voltage level of the input signal received after the power is turned on is completed. The purpose is to provide a protection circuit.

The protection circuit according to the aspect of the present invention includes a level adjustment circuit that outputs an adjustment signal that adjusts the voltage level of the input signal, and the input for reducing the voltage level of the amplified signal that amplifies the adjustment signal to a predetermined level or less. To the level adjustment circuit, an APC (Automatic Power Control) circuit that suppresses the amount of signal adjustment, a switch that switches between a state in which the amplified signal is output to the external circuit, and a state in which the amplified signal is not output to the external circuit. It has a reset circuit that generates a reset signal for maintaining the switch in a state where the amplified signal is not output to the external circuit from the time when the power is turned on until a predetermined period elapses.

Even if the reset circuit is stopped after a predetermined time has elapsed from the time when the voltage level of the amplified signal is switched from the state where the voltage level of the amplified signal exceeds the predetermined level to the state where the voltage level does not exceed the predetermined level. good.

The length of the reset signal generated by the reset circuit may be set longer than the maximum value of the convergence time of the level adjustment circuit.

According to the present invention, there is an effect that an excessive voltage can be suppressed from being output to the subsequent circuit until the adjustment of the voltage level of the input signal received after the power is turned on is completed.

It is a figure which shows the structure of the protection circuit 100 which concerns on this embodiment. It is a figure for demonstrating the operation which the protection circuit 100 outputs an amplified signal.

[Configuration of protection circuit 100]
FIG. 1 is a diagram showing a configuration of a protection circuit 100 according to the present embodiment. The protection circuit 100 includes a level adjustment circuit 11, an amplifier 12, a coupler 13, a detection circuit 14, an APC (Automatic Power Control) circuit 15, a reset circuit 16, a switch control circuit 17, and a switch 18. The protection circuit 100 includes a terminal a and a terminal b, and outputs an input signal input to the terminal a from the terminal b. The terminal b is connected to a circuit in the subsequent stage, and the protection circuit 100 controls the voltage output from the terminal b so that an overvoltage is not input to the circuit in the subsequent stage.

The level adjustment circuit 11 is, for example, an attenuator or a variable gain amplifier. The level adjustment circuit 11 outputs an adjustment signal that adjusts the voltage level of the input signal input to the terminal a. The level adjustment circuit 11 adjusts the voltage level of the input signal based on the signal indicating the adjustment amount output by the APC circuit 15, and outputs the adjustment signal adjusted to the voltage level of the input signal to the amplifier 12. The adjustment amount is, for example, a damping amount.

The amplifier 12 outputs an amplified signal obtained by amplifying the adjustment signal to the coupler 13. The coupler 13 is, for example, a branch coupler, and the amplification signal input from the amplifier 12 is divided into a detection circuit 14 and a switch 18 and output.

The detection circuit 14 is a circuit that detects the voltage level of the amplified signal. The detection circuit 14 outputs the voltage level of the detected amplified signal to the APC circuit 15.

The APC circuit 15 is a circuit for causing the level adjusting circuit 11 to adjust the voltage level of the input signal based on the voltage level of the amplified signal. The APC circuit 15 controls the adjustment amount of the input signal in order to bring the voltage level of the amplified signal amplified by the adjustment signal to a predetermined level or less. The predetermined level is, for example, an upper limit of the level required to make the voltage level of the amplified signal output from the terminal b an allowable level as the voltage input to the circuit in the subsequent stage. For example, when the voltage level of the amplified signal exceeds a predetermined level, the APC circuit 15 adjusts the voltage level of the input signal to the level adjusting circuit 11 so that the voltage level of the amplified signal becomes a level equal to or lower than the predetermined level. Let me adjust.

The reset circuit 16 is a circuit that generates a reset signal for maintaining the switch 18 in a state where the amplification signal is not output to the external circuit from the time when the power is turned on to the level adjustment circuit 11 until a predetermined period elapses. The predetermined period is the maximum period required for the APC circuit 15 to make the level adjustment circuit 11 adjust the voltage level of the input signal so that the voltage level of the amplified signal converges to the above-mentioned predetermined level or less. be. The reset circuit 16 generates a reset signal, for example, based on a predetermined period stored in a storage unit (not shown).

The switch control circuit 17 is a circuit that generates a switching signal for controlling the switch 18 based on the reset signal generated by the reset circuit 16. When the switch control circuit 17 acquires the reset signal, the switch 18 outputs a switching signal for switching to a state in which the amplified signal is not output to the external circuit. On the other hand, when the reset signal is not acquired, the switch control circuit 17 outputs a switching signal for switching to a state in which the switch 18 outputs the amplified signal to the external circuit.

The switch 18 is a switch that switches between a state in which an amplified signal is output to an external circuit based on the switching signal output by the switch control circuit 17, and a state in which the amplified signal is not output to the external circuit. The switch 18 includes a terminal c for receiving an amplified signal, a terminal d for outputting an amplified signal to a terminal b connected to an external circuit, and a terminal e connected to a terminating resistor. The switch 18 connects the terminal c and the terminal d when the amplified signal is output, and connects the terminal c and the terminal e when the amplified signal is not output.

As described above, in the reset circuit 16, for example, from the time when the power is turned on to the level adjustment circuit 11, the level adjustment circuit 11 adjusts the voltage level of the input signal so that the voltage level of the amplification signal is not excessive. A reset signal is generated until the time of convergence. Then, the switch 18 switches to a state in which the amplified signal is not output based on the reset signal. As a result, the reset circuit 16 can control, for example, to output an amplified signal having an excessive voltage level generated until the adjustment of the voltage level of the input signal received at the time of turning on the power is completed to the external circuit in the subsequent stage.

In the above description, the case where the reset circuit 16 generates the reset signal from the time when the power is turned on until a predetermined period elapses has been illustrated, but the period during which the reset circuit 16 generates the reset signal is not limited to this. The reset circuit 16 may stop the reset signal after a predetermined time has elapsed from the time when the voltage level of the amplified signal is switched from the state where the voltage level exceeds the predetermined level to the state where the voltage level does not exceed the predetermined level. The predetermined time is, for example, the time from the time when the amplified signal falls below the predetermined level to the time when the voltage level of the amplified signal converges to a certain level. By operating the reset circuit 16 in this way, the protection circuit 100 can output an amplified signal whose voltage level has converged to the external circuit.

Further, the length of the reset signal generated by the reset circuit 16 may be set longer than the maximum value of the convergence time of the level adjustment circuit 11. By generating a reset signal longer than the maximum value of the convergence time of the level adjustment circuit 11, the reset circuit 16 can prevent the external circuit from outputting the amplified signal during the period when the voltage level of the amplified signal is not constant. ..

FIG. 2 is a diagram for explaining an operation in which the protection circuit 100 outputs an amplified signal. Time T1 is the time when the power is turned on to the level adjustment circuit 11. Time T2 is the time when the level adjustment circuit 11 starts adjusting the voltage level of the input signal because the voltage level of the amplified signal exceeds the level L. The level L is an upper limit value of a level allowed as a voltage level of a signal input to a subsequent circuit. The time T3 is, for example, the time when the voltage level of the input signal adjusted by the level adjustment circuit 11 converges.

The amplified signal is an amplified signal output by the amplifier 12. The reset signal is a reset signal generated by the reset circuit 16. The output signal is a signal output from the terminal b by the protection circuit 100. The reset circuit 16 generates a reset signal whose voltage level is level L1, and stops the reset signal by changing the voltage level of the reset signal from level L1 to level L2.

At time T1, the reset circuit 16 generates a reset signal. The switch 18 switches to a state in which the amplified signal is not output to the external circuit based on the reset signal. At time T3, the reset circuit 16 stops the output of the reset signal when a predetermined time has elapsed from the time when the power is turned on to the level adjustment circuit 11. The switch 18 switches to a state in which the amplification signal is output to the external circuit based on the fact that the output of the reset signal is stopped.

By operating the reset circuit 16 in this way, the protection circuit 100 is between the time T2, which is the time when the voltage level of the amplified signal exceeds the level L, and the time T3, which is the time when the voltage level of the amplified signal converges. The output of the amplified signal can be suppressed.

[Effect of protection circuit 100]
As described above, the protection circuit 100 is a level adjustment circuit 11 that outputs an adjustment signal that adjusts the voltage level of the input signal, and inputs in order to bring the voltage level of the amplified signal that amplifies the adjustment signal to a predetermined level or less. It has an APC circuit 15 that controls a signal adjustment amount, and a switch 18 that switches between a state in which an amplified signal is output to an external circuit and a state in which the amplified signal is not output to an external circuit.

Then, the reset circuit 16 generates a reset signal for maintaining the switch 18 in a state where the amplification signal is not output to the external circuit from the time when the power is turned on to the level adjustment circuit 11 until a predetermined period elapses. As a result, the protection circuit 100 can suppress the output of an excessive voltage to the circuit connected to the subsequent stage until the voltage level of the input signal received after the power is turned on converges to a certain level.

Although the present invention has been described above using the embodiments, the technical scope of the present invention is not limited to the scope described in the above embodiments, and various modifications and changes can be made within the scope of the gist thereof. be. For example, all or part of the device can be functionally or physically distributed / integrated in any unit. Also included in the embodiments of the present invention are new embodiments resulting from any combination of the plurality of embodiments. The effect of the new embodiment produced by the combination has the effect of the original embodiment together.

11 Level adjustment circuit 12 Amplifier 13 Coupler 14 Detection circuit 15 APC circuit 16 Reset circuit 17 Switch control circuit 18 Switch

Claims (3)

A level adjustment circuit that outputs an adjustment signal that adjusts the voltage level of the input signal, and
An APC (Automatic Power Control) circuit that suppresses the adjustment amount of the input signal in order to bring the voltage level of the amplified signal amplified by the adjustment signal to a predetermined level or less.
A switch that switches between a state in which the amplified signal is output to the external circuit and a state in which the amplified signal is not output to the external circuit.
A reset circuit that generates a reset signal for maintaining the switch in a state where the amplified signal is not output to the external circuit from the time when the power is turned on to the level adjustment circuit until a predetermined period elapses.
Protection circuit with. The reset circuit stops the reset signal after a predetermined time has elapsed from the time when the voltage level of the amplified signal is switched from the state where the voltage level exceeds the predetermined level to the state where the voltage level does not exceed the predetermined level.
The protection circuit according to claim 1. The length of the reset signal generated by the reset circuit is set to be longer than the maximum value of the convergence time of the level adjustment circuit.
The protection circuit according to claim 1 or 2.

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