JP2022041509A - Motor driving control device, fan unit, and motor driving control method - Google Patents

Abstract

To allow stable rotation of a motor to be continued with one of two driving systems even in a case in which a malfunction occurs in the other driving system.SOLUTION: A motor driving control device 1 includes two motor drive circuits 10 that respectively drive a first system coil and a second system coil of a motor 3, and a driving control circuit 20. Each of the motor driving circuits 10 has a control circuit 11 that generates a driving control signal Sd, an inverter circuit 12 that drives a coil 6 based on the driving control signal Sd, and a signal interruption circuit 13. In a case in which an abnormality on one of the first system side and the second system side is detected, the driving control circuit 20 controls the signal interruption circuit 13 on the normal system side to enable input of a driving control signal from the control circuit 11 to the inverter circuit 12, and controls the signal interruption circuit 13 on the system side where the abnormality has been detected to interrupt input of the driving control signal Sd from the control circuit 11 to the inverter circuit 12.SELECTED DRAWING: Figure 1

Description

The present invention relates to a motor drive control device, a fan unit, and a motor drive control method, and more particularly to a motor drive control device having two drive systems.

Generally, in a fan for cooling the inside of an electronic device such as a server (hereinafter, also referred to as "fan motor"), the motor is rotated in a predetermined direction (forward rotation) due to a failure of the drive circuit for driving the motor. If it becomes impossible to make the motor rotate, an external force may act to force the motor to rotate (reverse rotation) in the direction opposite to the forward rotation.

For example, in a server with multiple fan motors inside the housing, if one fan motor fails and the wind generated by the rotation of the other fan motors flows into the failed fan motor, the failed fan motor May rotate in the opposite direction. When one fan motor in the server rotates in the reverse direction, the cooling function is deteriorated due to the decrease in the internal pressure of the server, which may adversely affect the operation of the server. Therefore, fan motors mounted on electronic devices such as servers are required to continue forward rotation as much as possible.

In order to solve the above-mentioned problems, a motor drive control device having two drive systems is known. For example, Patent Document 1 discloses that, in a motor drive control device for driving a motor having two systems of coils, two drive circuits for independently driving the coils of each system of the motor are provided. There is. According to this motor drive control device, even if one drive circuit fails, it is possible to continue driving the motor using the other drive circuit.

Japanese Unexamined Patent Publication No. 2020-54187

By the way, a commercially available general-purpose IC for motor drive control is often used as the motor drive control device. The inventor of the present application adopts a general-purpose IC as a motor drive circuit for independently driving the coils of each system in order to realize a motor drive control device for driving a motor having the above-mentioned two systems of coils. It was investigated. As a result of the examination, it became clear that there are the following problems.

Generally, a general-purpose IC for controlling the drive of a brushless motor or the like rotates a motor at a target rotation speed specified by the drive command signal when a drive command signal specifying the target rotation speed of the motor is input from the outside. The motor is driven based on the position detection signal from the position detection device such as the Hall element.

A lock protection function is known as a function provided in a general-purpose IC. When the lock protection function outputs a drive signal of the motor but does not generate an appropriate position detection signal according to the rotational state of the motor, the general-purpose IC determines that the motor is in the locked state. , Is a function of stopping the drive of the motor (see, for example, Patent Document 1).

In a general general-purpose IC, when the locked state of the motor is detected, the motor is inappropriate by turning on at least one switch element (transistor) on the low side of the inverter circuit for energizing the coil of the motor. The rotation operation is not performed.

When a general-purpose IC having such a lock protection function is applied to the above-mentioned motor drive control device, the following problems occur. For example, if the Hall element on the first system side of the motor fails and an appropriate position detection signal cannot be input to the general-purpose IC, the general-purpose IC on the first system side activates the lock protection function to activate the coil of the motor. Turn on at least one switch element (transistor) on the low side of the inverter circuit for energizing. As a result, one end of the coil on the first system side of the motor is connected to the ground potential.

At this time, since the drive circuit and the Hall element on the second system side are operating normally, the general-purpose IC on the second system side energizes the coil on the second system side to continue the rotation of the motor. At this time, since the rotor is rotated by energization of the coil on the second system side, when a counter electromotive voltage of a predetermined value or more is generated in the coil on the first system side due to a change in the magnetic field due to the rotation of the rotor. A circulating current flows through the coil on the first system side, and a magnetic field is generated in the direction of stopping the rotation of the motor. That is, although the drive circuit on the second system side controls the motor to rotate, the drive circuit on the first system side controls the inverter circuit so as to brake the motor. Therefore, the motor May not rotate stably.

The present invention has been made in view of the above-mentioned problems, and an object of the present invention is that in a motor drive control device having two drive systems, even if a defect occurs in one drive system, the other The purpose is to maintain stable rotation of the motor by the drive system.

The motor drive control device for driving the motor having the coils of the first system and the second system according to the typical embodiment of the present invention corresponds to the coils of the first system and the coils of the second system, respectively. Two motor drive circuits that control the energization of the coils of the corresponding system, and drive control that controls the operation of the motor drive circuit on the first system side and the operation of the motor drive circuit on the second system side. Each of the motor drive circuits on the first system side and the second system side includes a circuit, and a drive command signal input from the drive control circuit and a position detection signal generated according to the rotation of the motor. A control circuit that generates a drive control signal based on the above, an inverter circuit that drives the coil based on the drive control signal, and a control circuit to the inverter circuit according to control from the drive control circuit. It has a signal cutoff circuit that switches between input and cutoff of the drive control signal, and when the drive control circuit detects an abnormality on either the first system side or the second system side, it is normal. The signal cutoff circuit is controlled on a certain system side to enable input of the drive control signal from the control circuit to the inverter circuit, and the signal cutoff circuit is controlled on the system side where an abnormality is detected. It is characterized in that the input of the drive control signal from the control circuit to the inverter circuit is cut off.

According to the motor drive control device having two drive systems according to the present invention, it is possible to continue the stable rotational operation of the motor by the other drive system even if a problem occurs in one drive system. Become.

It is a block diagram which shows the structure of the motor drive control system which concerns on Embodiment 1 of this invention. It is a figure which shows the structure of the signal cutoff circuit 13_1, 13_2 and the circuit around it in the motor drive control device 1 which concerns on Embodiment 1. FIG. It is a flowchart which shows the flow of the process at the time of abnormality detection by the motor drive control device 1 which concerns on Embodiment 1. FIG. It is a flowchart which shows the flow of the process at the time of abnormality detection by the motor drive control device 1 which concerns on Embodiment 1. FIG. As a prior study example of the motor drive control device 1 according to the first embodiment, the drive transistors Q2, Q4, Q6, Q8 on the low side of the inverter circuit 12 in the motor drive control device not provided with the signal cutoff circuits 13_1 and 13_2. It is a figure for demonstrating the state of. It is a figure for demonstrating the state of the drive transistor Q2, Q4, Q6, Q8 on the low side of the inverter circuit 12 in the motor drive control device 1 which concerns on Embodiment 1. FIG. Another example of the signal cutoff circuit 13 is shown. It is a block diagram which shows the structure of the motor drive control system which concerns on Embodiment 2 of this invention. It is a figure which shows the structure of the signal cutoff circuit 13_1, 13_2 and the circuit around it in the motor drive control device 1A which concerns on Embodiment 2. FIG. It is a flowchart which shows the flow of the process at the time of abnormality detection by the motor drive control device 1A which concerns on Embodiment 2. FIG. It is a flowchart which shows the flow of the process at the time of abnormality detection by the motor drive control device 1A which concerns on Embodiment 2. FIG. It is a flowchart which shows the flow of the process at the time of abnormality detection by the motor drive control device 1A which concerns on Embodiment 2. FIG. It is a figure for demonstrating the state of the drive transistor Q2, Q4, Q6, Q8 on the low side of the inverter circuit 12 in the motor drive control device 1A which concerns on Embodiment 2. FIG. It is a block diagram which shows the structure of the motor drive control system which concerns on Embodiment 3 of this invention. It is a figure which shows the structure of the signal cutoff circuit 13_1, 13_2 and the circuit around it in the motor drive control device 1B which concerns on Embodiment 3. FIG. It is a flowchart which shows the flow of the process at the time of abnormality detection by the motor drive control device 1B which concerns on Embodiment 3. FIG. It is a flowchart which shows the flow of the process at the time of abnormality detection by the motor drive control device 1B which concerns on Embodiment 3. FIG. It is a flowchart which shows the flow of the process at the time of abnormality detection by the motor drive control device 1B which concerns on Embodiment 3. FIG. It is a figure for demonstrating the state of the drive transistor Q2, Q4, Q6, Q8 on the low side of the inverter circuit 12 in the motor drive control device 1B which concerns on Embodiment 3. FIG. It is a figure which shows another example of the control signal generation circuit.

1. 1. Outline of Embodiment First, an outline of a typical embodiment of the invention disclosed in the present application will be described. In the following description, as an example, reference numerals on the drawings corresponding to the components of the invention are described in parentheses.

[1] A motor drive control device (1,1A) for driving a motor (3) having a coil (6_1) of the first system and a coil (6_1) of the second system according to a typical embodiment of the present invention. , 1B) are provided corresponding to the coil of the first system and the coil of the second system, respectively, and two motor drive circuits (10_1, 10_2) for controlling energization of the coil of the corresponding system, and the first. A drive control circuit (20, 20A, 20B) for controlling the operation of the motor drive circuit on the 1st system side and the operation of the motor drive circuit on the 2nd system side is provided, and the 1st system side and the 2nd system side are provided. The motor drive circuits (10_1,10_2) of the above are drive control signals based on the drive command signals (Sc1, Sc2) input from the drive control circuit and the position detection signal generated according to the rotation of the motor, respectively. A control circuit (11_1,11_2) that generates (Sd1, Sd2), an inverter circuit (12_1,12_2) that drives the coil based on the drive control signal (Sd1, Sd2), and control from the drive control circuit. The drive control circuit has a signal cutoff circuit (13_1, 13_2) for switching the input and cutoff of the drive control signal from the control circuit to the inverter circuit, and the drive control circuit has the first system side and the first system. When an abnormality on either one of the two systems is detected, the signal cutoff circuit (13) is controlled on the normal system side to transfer the control circuit (11) to the inverter circuit (12). The drive control signal (Sd) can be input, and on the system side where an abnormality is detected, the signal cutoff circuit (13) is controlled to control the drive from the control circuit (11) to the inverter circuit (12). It is characterized by blocking the input of a signal.

[2] In the motor drive control device (1,1A, 1B) according to the above [1], the control circuits (11_1,11_2) on the first system side and the second system side output the drive control signal, respectively. The inverter circuits (12_1, 12_2) having output terminals (Pd1 to Pd4) to operate and the first system side and the second system side have output terminals (Pd1 to Pd4), respectively, from the first fixed potential (Vdc) and the first fixed potential. High-side drive transistors (Q1, Q3, Q5, Q7) and low-side drive transistors (Q1, Q3, Q5, Q7) that are connected in series with a low second fixed potential (GND) and perform switching operations according to the input drive control signal. A node in which the drive transistor (Q2, Q4, Q6, Q8), the high-side drive transistor, and the low-side drive transistor are commonly connected, and connected to one end of the coil of the corresponding system. It has a load drive terminal (16_1 / 16_2 / 17_1 / 17_2), and on the first system side and the second system side, the signal cutoff circuit is the output terminal (Pd2, Pd4) of the control circuit. ) And the control electrode of the low-side drive transistor (Q2, Q4, Q6, Q8) of the inverter circuit.

[3] In the motor drive control device (1,1A, 1B) according to the above [2], the signal cutoff circuit (13_1, 13_2) on the first system side and the second system side is the control, respectively. Breaking switches (Q11, Q12, Q15, Q11, Q12, Q15, connected between the output terminals (Pd2, Pd4) of the circuit and the control electrodes of the low-side drive transistors (Q2, Q4, Q6, Q8) of the inverter circuit. You may have Q16).

[4] In the motor drive control device (1,1A, 1B) according to the above [2], the signal cutoff circuits (13A_1,13A_2) on the first system side and the second system side are the inverters, respectively. It may have a breaking switch (Q20) connected between the control electrode of the low-side driving transistor (Q2, Q4, Q6, Q8) of the circuit and the second fixed potential (GND).

[5] In the motor drive control device according to any one of the above [2] to [4], the control of the motor drive circuit (10_2) on the second system side by the drive control circuit (20A, 20B) is assisted. The drive control circuit further includes an auxiliary circuit (26), and the drive control circuit supplies the first drive command signal (Sc1) as the drive command signal to the motor drive circuit (10_1) on the first system side. By controlling the operation of the motor drive circuit (10_1) on the 1st system side and supplying the 2nd drive command signal (Sc2) as the drive command signal to the motor drive circuit on the 2nd system side, the 2nd system side The operation of the motor drive circuit (10_2) is controlled, and the auxiliary circuit (26) replaces the drive control circuit with the second drive command signal (20A, 20B) when the operation of the drive control circuit (20A, 20B) is stopped. Sc2) may be generated and supplied to the motor drive circuit (10_2) on the second system side.

[6] In the motor drive control device according to the above [5], the drive control circuit (20A) is a first control terminal (P1) for controlling the signal cutoff circuit (13_1) on the first system side. And a second control terminal (P2) for controlling the signal cutoff circuit (13_2) on the second system side, and the drive control circuit (20A) is when the first system side is normal. When a voltage corresponding to a predetermined logic level (high level) is output to the first control terminal (P1) and an abnormality on the first system side is detected, the first control terminal (P1) is opened. The state (Hi-Z) is set, and the auxiliary circuit (26) is driven by the second drive when a voltage corresponding to the predetermined logic level (high level) is output to the first control terminal (P1). When the generation of the command signal (Sc2) is stopped and the first control terminal is in the open state (Hi-Z), the second drive command signal (Sc2) is generated to drive the motor on the second system side. It may be supplied to the circuit (10_2).

[7] In the motor drive control device according to the above [6], the first drive command signal (Sc1) and the second drive command signal (Sc2) have a duty ratio corresponding to the target rotation speed of the motor. The drive control circuit is a PWM signal, further has a signal output terminal (P5) for outputting the second drive command signal (Sc2), and the auxiliary circuit (26) has one end at the ground potential. The connected switch element (Q26), one end of which is connected to the other end of the switch element, the other end of which is connected to the signal output terminal (P5) of the drive control circuit, from the one end side to the other end side. A rectifying element (D26) through which a current flows and a load (R26) having one end connected to a third fixed potential (Vdc3) larger than the ground potential and the other end connected to the other end of the switch element. The switch element is turned on when a voltage (high level) corresponding to the power supply voltage (Vdc1) of the drive control circuit is output to the first control terminal (P1), and the first control terminal is in an open state. It may be turned off when it is (Hi-Z).

[8] In the motor drive control device (1B) according to the above [5], the first control signal (St1) for controlling the signal cutoff circuit (13_1) on the first system side and the second system side. A control signal generation circuit (30) for generating a second control signal (St2) for controlling the signal cutoff circuit (13_2) is further provided, and the first drive command signal (Sc1) and the second drive command signal are provided. (Sc2) is a PWM signal having a duty ratio corresponding to the target rotation speed of the motor, and the drive control circuit (20B) is a signal output terminal (P5) for outputting the second drive command signal. And a control terminal (P3) for controlling the signal cutoff circuit (13_1, 13_2) on the first system side and the second system side, and the drive control circuit (20B) is the first. When the system side and the second system side are normal, a voltage corresponding to the first logic level (high level) is output to the control terminal (P3), and an abnormality on the first system side is detected. When the control terminal (P3) is set to the open state (Hi-Z) and an abnormality on the second system side is detected, the control terminal (P3) has a second logic level (low) opposite to the first logic level. The control signal generation circuit outputs the voltage corresponding to the level), and the control signal generation circuit outputs the voltage corresponding to the first logic level from the control terminal (P3) of the drive control circuit. The first control signal (St1) and the second control signal that enable input of the drive control signal (Sd) from the control circuit (11) to the inverter circuit (12) on the side and the second system side. (St2) is output, and the control signal generation circuit is the inverter circuit (11_1) from the control circuit (11_1) on the first system side when the control terminal (P3) of the drive control circuit is in the open state. The first control signal (St1) that blocks the input of the drive control signal (Sd1) to 12_1) is output, and the control circuit (11_2) on the second system side is connected to the inverter circuit (12_2). The second control signal (St2) that enables input of the drive control signal (Sd2) is output, and the control signal generation circuit outputs a voltage corresponding to the second logic level from the control terminal (P3). The first control signal (St1) enables the input of the drive control signal (Sd1) from the control circuit (11_1) to the inverter circuit (12_1) on the first system side. And outputs the second control signal (St2) that blocks the input of the drive control signal (Sd2) from the control circuit (11_2) to the inverter circuit (12_2) on the second system side. The auxiliary circuit (26) enables the control signal generation circuit (30) to input the drive control signal (Sd1) from the control circuit (11_1) to the inverter circuit (12_1) on the first system side. When the first control signal (St1) is being output, the supply of current to the signal output terminal (P5) is stopped, and the control circuit (11_1) on the first system side to the inverter circuit (12_1). ), When the first control signal (St1) that cuts off the input of the drive control signal (Sd1) is output, a current is supplied to the signal output terminal (P5).

[9] The fan unit (101, 101A, 101B) according to a typical embodiment of the present invention is the motor drive control device (1, 1A, 1B) according to any one of the above [1] to [8]. The motor (3) and the impeller (4) rotated by the rotational force of the motor are provided.

[10] The motor drive control method according to a typical embodiment of the present invention is a motor drive control device (1,) for driving a motor (3) having coils (6_1,6_2) of the first system and the second system. It is a motor drive control method by 1A, 1B). The motor drive control device (1,1A, 1B) is provided corresponding to the coil (6_1) of the first system and the coil (6_1) of the second system, respectively, and controls to energize the coil of the corresponding system. It includes two motor drive circuits (10_1, 10_2), and a drive control circuit (20) that controls the operation of the motor drive circuit on the first system side and the operation of the motor drive circuit on the second system side. The motor drive circuits (10_1,10_2) on the first system side and the second system side are generated in response to the drive command signals (Sc1, Sc2) input from the drive control circuit and the rotation of the motor, respectively. A control circuit (11_1,11_2) that generates a drive control signal (Sd1, Sd2) based on the position detection signal, and an inverter circuit (12_1, 1) that drives the coil based on the drive control signal (Sd1, Sd2). 12_2) and a signal cutoff circuit (13_1, 13_2) for switching between input and cut of the drive control signal from the control circuit to the inverter circuit in response to control from the drive control circuit. In this motor drive control method, the drive control circuit (20, 20A, 20B) has a first step (S7, S11, S18) for determining the state of the first system side and the second system side, and the first step. In one step, when at least one of the first system side and the second system side is normal, the drive control circuit controls the signal cutoff circuit (13) on the normal system side. The second step (S1, S2, S8) that enables the input of the drive control signal (Sd) from the control circuit (11) to the inverter circuit (12), and the first system side in the first step. When any one of the abnormalities on the second system side is detected, the drive control circuit (20, 20A, 20B) controls the signal cutoff circuit (13) on the system side where the abnormality is detected. The third step (S14, S15, S21, S22) of blocking the input of the drive control signal (Sd) from the control circuit (11) to the inverter circuit (12) is included. ..

2. 2. Specific Examples of Embodiments Hereinafter, specific examples of embodiments of the present invention will be described with reference to the drawings. In the following description, the same reference numerals will be given to the components common to each embodiment, and the repeated description will be omitted.

<< Embodiment 1 >>
FIG. 1 is a block diagram showing a configuration of a motor drive control system according to the first embodiment of the present invention.

The motor drive control system 100 shown in FIG. 1 includes a motor 3 as a load to be driven, a motor drive control device 1 for driving the motor 3, and a host device 2 for controlling the motor drive control device 1. ..

The motor drive control system 100 is used in, for example, an electrical equipment system, and constitutes a fan system in which the operation of a plurality of fans is controlled by one control device and air is blown to each of the plurality of cooling targets. It is assumed that the motor drive control system 100 according to the present embodiment is arranged in a closed space in the server and constitutes a cooling system for cooling various electronic components and the like constituting the server. ..

For example, an impeller (impeller) 4 is connected to an output shaft (not shown) of a motor 3, and the motor 3 and the impeller 4 rotate the impeller 4 by the rotational force of the motor 3 to generate wind. It constitutes one fan (fan motor) 5 to be made to rotate.

The fan 5 can be used as one of the cooling devices for discharging the heat generated inside the device to the outside and cooling the inside of the device. For example, in addition to the information processing device such as a server, an oil mist, etc. It can be mounted on machine tools used in environments where cutting chips, smoke, dust, etc. are generated. The fan 5 is, for example, an axial fan.

The fan 5 and the motor drive control device 1 constitute one fan unit 101. Although only one fan unit 101 is shown in FIG. 1 as an example, the number of fan units 101 included in the motor drive control system 100 is not particularly limited.

The host device 2 (host device) is, for example, a program processing device such as a CPU in a server equipped with a fan 5. The host device 2 controls the rotation of the motor 3 via the motor drive control device 1 by outputting the drive command signal Sc to the motor drive control device 1, and the motor drive control device 1 to the motor 3 (fan 5). The operation of the motor 3 (fan 5) is monitored by acquiring the motor drive information signal So regarding the drive state of the motor.

The drive command signal Sc is a signal including a command related to driving the motor 3. The drive command signal Sc includes, for example, a command for instructing a target rotation speed (target rotation speed) of the motor 3. For example, the drive command signal Sc is a PWM (pulse width modulation) signal having a duty ratio corresponding to the target rotation speed of the motor 3. The drive command signal Sc may be a signal of another type such as a PFM signal having a frequency corresponding to the target rotation speed or a torque command signal indicating a target value of the torque of the motor.

The motor 3 is, for example, a brushless DC motor. For example, the motor 3 is a single-phase brushless motor including two systems of coils (an example of coils of the first and second systems) 6_1, 6_2 wound around a tooth (not shown). Position detectors 7_1 and 7_2 are provided around each coil 6_1 and 6_2.

In the following description, the coil 6_1 is also referred to as a “first system coil 6_1”, and the coil 6_2 is also referred to as a “second system coil 6_1”. Further, the coil 6_1 side is also referred to as a “first system side”, and the coil 6_1 side is also referred to as a “second system side”.

The position detectors 7_1 and 7_2 are devices that output a position detection signal according to the position of the rotor of the motor 3. The position detectors 7_1 and 7_2 are configured to include, for example, a Hall element. The Hall element outputs, for example, a Hall signal having a positive polarity as a position detection signal.

The position detector 7_1 is arranged at a position corresponding to the coil 6_1 of the first system, and outputs a position detection signal to the control circuit 11_1 of the motor drive circuit 10_1 described later. The position detector 7_2 is arranged at a position corresponding to the coil 6_2 of the second system, and outputs a position detection signal to the control circuit 11_2 of the motor drive circuit 10_2 described later. The position detector 7_1 and the position detector 7_2 are arranged, for example, at positions where the relative positions are π / 2 (90 degrees) in terms of the electric angle.

The motor drive control device 1 is a device for controlling the rotation of the motor 3. The motor drive control device 1 rotates the motor 3 by periodically passing a drive current through the coils 6_1 and 6_2 of each single phase constituting the motor 3.

A DC power supply voltage Vdc is supplied to the motor drive control device 1 from the outside, and the circuit in the motor drive control device 1 is configured to be operable by the power supply voltage Vdc. The motor drive control device 1 receives various commands from the host device 2 by transmitting / receiving data to / from the host device 2 (for example, by serial communication), and also receives various commands from the host device 2 and receives a response to the received commands. Send to.

The motor drive control device 1 drives the motor 3 according to the drive command signal Sc output from the host device 2. Further, the motor drive control device 1 outputs information regarding the state of the motor 3 to the host device 2. For example, as will be described later, the motor drive control device 1 outputs a signal corresponding to the actual rotation speed of the motor 3 and a signal indicating an abnormal state of the motor, which will be described later, to the host device 2 as a motor drive information signal So. As a result, the host device 2 can know the rotational state of the motor 3 and the presence / absence of an abnormality in the motor 3.

The motor drive control device 1 is, for example, a motor drive circuit 10_1,10_2 provided corresponding to each of the two coils 6_1, 6_2 of the motor 3, and a drive control circuit 20 that controls the operation of the motor drive circuit 10_1,10_2. And a power supply circuit 23. In addition to the circuit described above, the motor drive control device 1 may include a protection circuit for suppressing inrush current and preventing circuit failure due to reverse connection of the power supply.

A power supply voltage Vdc (direct current voltage) as a main power source for driving the motor 3 and the motor drive control device 1 is supplied to the power supply terminal Pv of the motor drive control device 1. The power supply voltage Vdc is supplied from the power supply terminal Pv to the power supply line Lp. The power supply line Lp is a power supply path for supplying electric power for driving the motor 3 via the motor drive circuits 10_1 and 10_2.

The power supply circuit 23 is a circuit that generates a power supply voltage to be supplied to a part of the circuits in the motor drive control device 1. The power supply circuit 23 is realized by, for example, a series regulator, a switching regulator, or the like. For example, the power supply circuit 23 steps down the power supply voltage Vdc supplied to the power supply terminal Pv to generate a DC voltage, and supplies the DC voltage to the drive control circuit 20 as the power supply voltage Vdc1.

The drive control circuit 20 is a circuit that comprehensively controls the operation of the motor drive control device 1. The drive control circuit 20 operates by supplying the power supply voltage Vdc1 from the power supply circuit 23. In the present embodiment, the drive control circuit 20 includes, for example, a processor such as a CPU, various storage devices such as RAM, ROM, and a flash memory, a counter (timer), an A / D conversion circuit, and a D / A conversion circuit. It is a program processing device having a configuration in which a clock generation circuit and peripheral circuits such as an input / output interface circuit are connected to each other via a bus or a dedicated line, and is, for example, a microcontroller (MCU: MicroController Unit).

In the present embodiment, the drive control circuit 20 is packaged as one semiconductor device (IC: Integrated Circuit), but is not limited thereto.

The drive control circuit 20 has a plurality of external terminals for transmitting and receiving signals to and from the outside (upper device 2, motor drive circuits 10_1, 10_2, etc.). In FIG. 1, as an example of a plurality of external terminals, control terminals P1, P2, signal output terminals P4, P5, and signal input terminals P6, P7 are shown together with reference numerals.

The drive control circuit 20 has, as main functions, a drive control function for controlling the operation of the motor drive circuits 10_1 and 10_2, and an abnormality determination function for determining the presence or absence of an abnormality in the motor 3 and the like. Specifically, the drive control circuit 20 has a drive control unit 21 and a monitoring unit 22 as functional units for realizing the above functions. In the drive control unit 21 and the monitoring unit 22, for example, in the program processing device constituting the drive control circuit 20, the processor executes various arithmetic processes according to the program stored in the memory, and the counter, the A / D conversion circuit, and the like are used. It is realized by controlling the peripheral circuit of.

The monitoring unit 22 is a functional unit that monitors the operating state of the motor 3 (fan 5). The monitoring unit 22 determines whether or not there is an abnormality in the fan 5 based on the signals FG1 and FG2 generated by the motor drive circuits 10_1 and 10_2 described later, and sends the motor drive information signal So indicating the state of the fan 5 to the host device 2. Output to. Further, as will be described later, the monitoring unit 22 cuts off the input of the drive control signal Sd to the inverter circuits 12_1 and 12_2 based on the monitoring result of the fan 5. The details of the monitoring unit 22 will be described later.

The drive control unit 21 generates a first drive command signal Sc1 and a second drive command signal Sc2 for instructing the drive of the motor 3 based on the drive command signal Sc from the host device 2, and from the signal output terminals P4 and P5. Output each. The first drive command signal Sc1 and the second drive command signal Sc2 are input to the motor drive circuits 10_1 and 10_2, respectively.

The drive control unit 21 may output one drive command signal from, for example, one external terminal, and supply the drive command signal to each of the motor drive circuits 10_1 and 10_2 via two lines. ..

In the following description, the first drive command signal Sc1 and the second drive command signal Sc2 are also simply referred to as "drive command signal Sc1" and "drive command signal Sc2".

Here, the drive command signals Sc1 and Sc2 include commands for instructing the target rotation speed (target rotation speed) of the motor 3, as in the above-mentioned drive command signal Sc, and correspond to, for example, the target rotation speed of the motor 3. It is a PWM signal of the duty ratio.

When instructing the stop of rotation of the motor 3, the drive control unit 21 outputs, for example, drive command signals Sc1 and Sc2 having a duty ratio of 0% to rotate the motor 3 at a set maximum rotation speed. When instructed to, the drive command signals Sc1 and Sc2 having a duty ratio of 100% are output. In this way, the drive control circuit 20 instructs each motor drive circuit 10_1, 10_2 to control the motor 3 by changing the duty ratios of the drive command signals Sc1 and Sc2.
The drive command signals Sc1 and Sc2 may be signals of other formats, such as a PFM signal having a frequency corresponding to the target rotation speed.

The motor drive circuits 10_1 and 10_2 are circuits that control energization of the motor 3 based on the drive command signals Sc1 and Sc2. The motor drive circuits 10_1 and 10_2 are configured to be operable by supplying electric power (power supply voltage Vdc) from the power supply line Lp. The motor drive circuit 10_1 and the motor drive circuit 10_1 have, for example, the same circuit configuration as each other.

The motor drive circuit 10_1 includes a control circuit 11_1, an inverter circuit (energization circuit) 12_1 that energizes the coil 6_1 based on control by the control circuit 11_1, and a signal cutoff circuit 13_1. The motor drive circuit 10_2 includes a control circuit 11_2, an inverter circuit (energization circuit) 12_2 that energizes the coil 6_2 based on control by the control circuit 11_2, and a signal cutoff circuit 13_2.

In the following description, the position detector 7_1 and the position detector 7_2, the motor drive circuit 10_1 and the motor drive circuit 10_1, the control circuit 11_1 and the control circuit, which are components common to the first system side and the second system side, are used. When 11_2, the inverter circuit 12_1 and the inverter circuit 12_1, and the signal cutoff circuit 13_1 and the signal cutoff circuit 13_1 are not distinguished from each other, simply, "position detector 7", "motor drive circuit 10", "control circuit 11", They may be referred to as "inverter circuit 12" and "signal cutoff circuit 13", respectively.

The motor drive circuits 10_1 and 10_2 each have a fuse 19 having one end connected to the power supply line Lp. The power supply voltage Vdc is supplied from the power supply line Lp to the inverter circuits 12_1, 12_2, the control circuits 11_1, 11_2, and the signal cutoff circuits 13_1, 13_2 constituting the motor drive circuits 10_1, 10_2 via the fuse 19.

The control circuit 11_1 and the control circuit 11_2 are each realized by different integrated circuits (ICs). In the present embodiment, both the control circuit 11_1 and the control circuit 11_2 are configured by using a commercially available general-purpose IC for motor drive control having the same circuit configuration as hardware. The control circuit 11_1 and the control circuit 11_2 are not limited to the configuration using a general-purpose IC, and may be configured by, for example, a microcontroller (MCU). Further, the control circuits 11_1 and 11_2 may be realized as one IC including the corresponding inverter circuits 12_1 and 12_2.

The inverter circuit 12_1 drives the coil 6_1 of the motor 3 connected to the load drive terminals 16_1 and 17_1 based on the drive control signal Sd1 output from the control circuit 11_1. Similar to the inverter circuit 12_1, the inverter circuit 12_2 drives the coil 6_2 of the motor 3 connected to the load drive terminals 16_2, 17_2 based on the drive control signal Sd2 output from the control circuit 11_2. The drive control signals Sd1 and Sd2 are, for example, PWM (Pulse Width Modulation) signals. In the following description, when the drive control signal Sd1 and the drive control signal Sd2 are not distinguished from each other, they are also referred to as "drive control signal Sd".

The inverter circuits 12_1 and 12_2 are, for example, H-bridge circuits including transistors as a plurality of switch elements. Specifically, the inverter circuits 12_1 and 12_2 are located between the power supply line Lp to which the power supply voltage Vdc as the first fixed potential is supplied and the ground potential (GND) as the second fixed potential lower than the first fixed potential. Are connected in series with. The inverter circuit 12_1 is in series between a power supply line Lp and a ground potential, a switching leg including a high-side drive transistor Q1 and a low-side drive transistor Q2 that perform switching operations in response to an input drive control signal Sd1. It has a switching leg including a high-side drive transistor Q3 and a low-side drive transistor Q4 which are connected to and perform a switching operation according to the input drive control signal Sd1. Further, the inverter circuits 12_1 and 12_2 include a switching leg including a high-side drive transistor Q5 and a low-side drive transistor Q6 that perform switching operations according to the input drive control signal Sd2, a power supply line Lp, and a ground potential. It has a switching leg including a high-side drive transistor Q7 and a low-side drive transistor Q8 which are connected in series between the two and perform a switching operation according to the input drive control signal Sd2.

The high-side drive transistors Q1, Q3, Q5, and Q7 are, for example, P-channel MOSFETs, and the low-side drive transistors Q2, Q4, Q6, and Q8 are, for example, N-channel MOSFETs. As shown in FIG. 1, each switching leg may be connected to the ground potential via the current detection resistors Rs1 and Rs2.

Further, the inverter circuit 12_1 has load drive terminals 16_1 and 17_1 for driving the coil 6_1 as a load, and the inverter circuit 12_1 has load drive terminals 16_1 and 17_1 for driving the coil 6_1 as a load. is doing.

The load drive terminal 16_1 is a node to which the drive transistor Q1 and the drive transistor Q2 of the inverter circuit 12_1 are commonly connected, and is connected to one end of the coil 6_1 of the first system. The load drive terminal 17_1 is a node to which the drive transistor Q3 and the drive transistor Q4 of the inverter circuit 12_1 are commonly connected, and is connected to the other end of the coil 6_1 of the first system.

The load drive terminal 16_2 is a node to which the drive transistor Q5 and the drive transistor Q6 of the inverter circuit 12_2 are commonly connected, and is connected to one end of the coil 6_2 of the second system. The load drive terminal 17_2 is a node to which the drive transistor Q7 and the drive transistor Q8 of the inverter circuit 12_2 are commonly connected, and is connected to the other end of the coil 6_2 of the second system.

The drive transistors Q1 to Q4 and Q5 to Q8 constituting the inverter circuits 12_1 and 12_2 are turned on and off by the drive control signals (PWM signals) Sd1 and Sd2 output from the control circuits 11_1 and 11_2, respectively. ..

The control circuit 11_1 generates a drive control signal Sd1 based on the drive command signal Sc1 supplied from the drive control circuit 20 and the position detection signal output from the position detector 7_1, and drives the inverter circuit 12_1. The control circuit 11_2 generates a drive control signal Sd2 based on the drive command signal Sc2 supplied from the drive control circuit 20 and the position detection signal output from the position detector 7_2, and drives the inverter circuit 12_2. The control circuits 11_1 and 11_2 each have output terminals Pd1 to Pd4 for outputting the generated drive control signals Sd1 and Sd2 (see FIG. 2).

For example, the control circuit 11_1 detects the rotation speed (actual rotation speed) of the motor 3 based on the position detection signal from the position detector 7_1, and the rotation speed of the motor 3 is the target rotation speed specified by the drive command signal Sc1. A PWM signal whose duty ratio is adjusted so as to match the above is generated, and is output as a drive control signal Sd1 from the output terminals Pd1 to Pd4. Similarly, the control circuit 11_2 generates a PWM signal so that the rotation speed of the motor based on the position detection signal from the position detector 7_2 matches the target rotation speed specified by the drive command signal Sc2, and the drive control signal Sd2. Is output from the output terminals Pd1 to Pd4. The drive control signals Sd1 and Sd2 output from the control circuits 11_1 and 11_2 are supplied to the inverter circuits 12_1 and 12_2 via the signal cutoff circuit 13, respectively.

The drive transistors Q1 to Q4 and Q5 to Q8 of the inverter circuits 12_1 and 12_2 perform switching operations based on the input drive control signals Sd1 and Sd2. As a result, the energization of the coils 6_1 and 6_2 is controlled so that the direction of the current flowing through the coils 6_1 and 6_2 of the motor 3 is switched at the timing corresponding to the position detection signal.

The control circuits 11_1 and 11_2 generate PWM signals having a duty ratio corresponding to the target rotation speed specified by the drive command signals Sc1 and Sc2, respectively, as the drive control signals Sd1 and Sd2, regardless of the actual rotation speed. It may be supplied to the inverter circuits 12_1 and 12_2 (feedforward control).

Further, the control circuit 11_1 is a first FG (Frequency Generator) signal which is a rotation speed signal having a frequency corresponding to the actual rotation speed (actual rotation speed) of the motor 3 based on the position detection signal from the position detector 7_1. (Hereinafter referred to as "signal FG1") is generated and output. The control circuit 11_2 generates and outputs a second FG signal (hereinafter, referred to as “signal FG2”) corresponding to the actual rotation speed of the motor 3 based on the position detection signal from the position detector 7_2.

The signals FG1 and FG2 are, for example, rectangular wavy signals having a predetermined duty ratio, and their phases are different from each other. For example, the signals FG1 and FG2 are binary signals (digital signals) having a frequency corresponding to the actual rotation speed of the motor 3 and being generated so that the duty ratio becomes 50% when the rotation speed is constant. ..

Further, the control circuits 11_1 and 11_2 determine whether or not the motor 3 is in the locked state based on the position detection signal from the position detector 7_1 as a lock protection function, and determine that the motor 3 is in the locked state. In that case, the energization of the coil 6 is stopped. Specifically, when the control circuit 11 is instructed to rotate at the target rotation speed of the motor 3 by the drive command signal Sc1 or the drive command signal Sc2, the position detection signal is input from the position detector 7. If not, it is determined that the motor 3 is in the locked state. In this case, in the control circuit 11, for example, like the general-purpose IC described above, the high-side drive transistors Q1, Q3, Q5 and Q7 of the inverter circuit 12 are turned off, and the low-side drive transistors Q2 and Q6 are turned off. Alternatively, the drive control signal Sd is generated so that one of Q4 and Q8 is off and the other is on.

The signal cutoff circuits 13_1 and 13_2 are circuits that control whether or not the drive control signals Sd1 and Sd2 can be input from the control circuits 11_1 and 11_2 to the inverter circuits 12_1 and 12_2 in response to the control from the drive control circuit 20.

FIG. 2 is a diagram showing a configuration of signal cutoff circuits 13_1 and 13_2 and circuits around them in the motor drive control device 1 according to the first embodiment.

As shown in FIG. 2, the signal cutoff circuit 13_1 on the first system side controls the output terminals Pd2 and Pd4 from which the drive control signal Sd1 in the control circuit 11_1 is output and the low-side drive transistors Q2 and Q4 of the inverter circuit 12_1. It is provided between the gate electrode and the gate electrode as an electrode. Similarly, the signal cutoff circuit 13_2 on the second system side is a gate as a control electrode of the output terminals Pd2 and Pd4 from which the drive control signal Sd2 in the control circuit 11_2 is output and the low-side drive transistors Q6 and Q8 of the inverter circuit 12_2. It is provided between the electrode and the electrode.

In the present embodiment, since the signal cutoff circuit 13_1 and the signal cutoff circuit 13_2 have the same circuit configuration, the circuit configuration of the signal cutoff circuit 13_1 will be described as a representative.

Specifically, the signal cutoff circuit 13_1 includes a cutoff switch element Q11 connected between the output terminal Pd2 of the control circuit 11_1 and the control electrode (gate electrode) of the low-side drive transistor Q2 of the inverter circuit 12_1. It has a cutoff switch element Q12 connected between the output terminal Pd4 of the control circuit 11_1 and the control electrode (gate electrode) of the low-side drive transistor Q4 of the inverter circuit 12_1. Further, the signal cutoff circuit 13_1 has switching switch elements Q13 and Q14 for switching on / off of the cutoff switch elements Q11 and Q12.

The cutoff switch elements Q11 and Q12 are, for example, PNP type bipolar transistors, and the switching switch elements Q13 and Q14 are, for example, NPN type bipolar transistors. As shown in FIG. 2, resistors may be connected to the electrodes of the transistors as the cutoff switch elements Q11 and Q12 and the switching switch elements Q13 and Q14. For example, in each transistor, a resistor may be connected to the base electrode, and a resistor may be connected between the emitter electrode and the base electrode.

The first main electrode (for example, emitter electrode) of the cutoff switch element Q11 is connected to the output terminal Pd2 of the control circuit 11_1, and the second main electrode (for example, collector electrode) of the cutoff switch element Q11 is the control electrode of the drive transistor Q2. It is connected to (gate electrode). The first main electrode (for example, emitter electrode) of the cutoff switch element Q12 is connected to the output terminal Pd4 of the control circuit 11_1, and the second main electrode (for example, collector electrode) of the cutoff switch element Q12 is the control electrode of the drive transistor Q4. It is connected to (gate electrode).

The first main electrode (for example, emitter electrode) of the switching switch element Q13 is connected to the ground potential, and the second main electrode (for example, collector electrode) of the switching switch element Q13 is the control electrode (base electrode) of the breaking switch element Q11. It is connected to the. The first main electrode (for example, emitter electrode) of the switching switch element Q14 is connected to the ground potential, and the second main electrode (for example, collector electrode) of the switching switch element Q14 is the control electrode (base electrode) of the breaking switch element Q12. It is connected to the.

The control electrodes (base electrodes) of the switching switch elements Q13 and Q14 in the signal cutoff circuit 13_1 are connected to the control terminal P1 of the drive control circuit 20, and the control electrodes (base) of the switching switch elements Q13 and Q14 in the signal cutoff circuit 13_2 are connected. The electrode) is connected to the control terminal P2 of the drive control circuit 20.
The cutoff switch elements Q15 and Q16 and the changeover switch elements Q17 and Q18 in the signal cutoff circuit 13_1 correspond to the cutoff switch elements Q11 and Q12 and the changeover switch elements Q13 and Q14, respectively, in the signal cutoff circuit 13_1.

The on / off switching of the cutoff switch elements Q11, Q12, Q15, and Q16 in the signal cutoff circuits 13_1 and 13_2 is controlled by the control terminals P1 and P2 of the drive control circuit 20.

Here, the operation of the drive control unit 21 and the monitoring unit 22 in the drive control circuit 20 will be described in detail.

In the drive control circuit 20, the monitoring unit 22 determines the presence or absence of an abnormality in the fan 5 based on the signals FG1 and FG2 as rotation speed signals corresponding to the actual rotation speed of the motor 3 input to the signal input terminals P6 and P7. judge.

More specifically, in the monitoring unit 22, when the drive control unit 21 outputs the drive command signals Sc1 and Sc2 instructing the motor 3 to rotate at the target rotation speed, one of the signals FG1 and FG2 is output. When it is detected that no input has been made, it is determined that either the first system side or the second system side is abnormal.

For example, the monitoring unit 22 outputs signals FG1 and Sc2, which are periodic signals of a constant frequency, when the drive control unit 21 outputs drive command signals Sc1 and Sc2 instructing the motor 3 to rotate at a target rotation speed. When FG2 is input, it is determined that the first system side and the second system side are normal.

On the other hand, when the drive control unit 21 outputs the drive command signals Sc1 and Sc2 instructing the motor 3 to rotate at the target rotation speed, the monitoring unit 22 inputs a periodic signal as the signal FG1 and signals. When the periodic signal is not input to the drive control circuit 20 as FG2 (the signal FG2 is a constant voltage), it is determined that the first system side is normal and the second system side is out of order. Similarly, when the drive control unit 21 outputs the drive command signals Sc1 and Sc2 instructing the motor 3 to rotate at the target rotation speed, the monitoring unit 22 inputs a periodic signal as the signal FG2 and When the periodic signal is not input to the drive control circuit 20 as the signal FG1 (the signal FG1 has a constant voltage), the monitoring unit 22 is normal on the second system side and has failed on the first system side. Is determined.

When the first system side and the second system side are normal, the monitoring unit 22 controls the signal cutoff circuits 13_1 and 13_2 on both the first system and the second system sides to control the signals from the control circuits 11_1 and 11_2. The drive control signals Sd1 and Sd2 can be input to the inverter circuits 12_1 and 12_2. Specifically, the monitoring unit 22 sets the control terminals P1 and P2 to a high level (voltage corresponding to the power supply voltage Vdc1), so that the switch elements Q13, Q14, Q17, and Q18 for switching the signal cutoff circuits 13_1 and 13_2 are set. Turns on, and the cutoff switch elements Q11, Q12, Q15, and Q16 turn on. As a result, the signals output from the output terminals Pd2 and Pd4 of the control circuits 11_1 and 11_2 can be input to the control electrodes (gate electrodes) of the driving transistors Q2, Q4, Q6 and Q8 of the inverter circuits 12_1 and 12_2. At this time, the drive control unit 21 continues to output the drive command signals Sc1 and Sc2 instructing the target rotation speed.

On the other hand, when the monitoring unit 22 detects an abnormality on either the first system side or the second system side, the monitoring unit 22 inputs the drive control signals Sd1 and Sd2 to the normal system side inverter circuits 12_1 and 12_2. While making it possible, the input of the drive control signals Sd1 and Sd2 to the inverter circuits 12_1 and 12_2 on the system side on the side where the abnormality is detected is cut off.

For example, consider a case where the first system side is normal and the second system side is abnormal. In this case, the monitoring unit 22 controls the signal cutoff circuit 13_1 to enable the input of the drive control signal Sd from the control circuit 11_1 to the inverter circuit 12_1 on the normal first system side, and an abnormality is detected. On the second system side, the signal cutoff circuit 13_2 is controlled to cut off the input of the drive control signal Sd2 from the control circuit 11_2 to the inverter circuit 12_2. More specifically, the monitoring unit 22 sets, for example, the normal control terminal P1 on the first system side to a high level (≈Vdc1), and opens the control terminal P2 on the second system side in which an abnormality is detected (≈Vdc1). Set to open) or low level (≈ground potential). As a result, in the signal cutoff circuit 13_1 on the first system side, the cutoff switch elements Q11 and Q12 are turned on, while in the signal cutoff circuit 13_2 on the second system side, the changeover switch elements Q17 and Q18 are turned off and cut off. Switch elements Q15 and Q16 are turned off.

As a result, on the first system side, the signals output from the output terminals Pd2 and Pd4 of the control circuit 11_1 are input to the control electrodes (gate electrodes) of the driving transistors Q2 and Q4 of the inverter circuit 12_1, while the second On the system side, the signals output from the output terminals Pd2 and Pd4 of the control circuit 11_2 are cut off by the cutoff switch elements Q15 and Q16, and the control electrodes (gate electrodes) of the drive transistors Q6 and Q8 of the inverter circuit 12_2 are cut off. Is not entered in.

At this time, the drive control unit 21 instructs the normal motor drive circuit 10_1 on the first system side to rotate the motor 3 at the target rotation speed according to the abnormality detection result by the monitoring unit 22. On the other hand, the drive command signal Sc2 (for example, the drive command signal Sc2 having a duty ratio of 0%) instructing the stop of the motor 3 is output to the motor drive circuit 10_2 on the second system side where the abnormality is detected. .. As a result, the rotation of the motor 3 is controlled by the motor drive circuit 10_1 on the first system side.

Next, the flow of processing when an abnormality is detected by the motor drive control device 1 will be described.

3A and 3B are flowcharts showing the flow of processing at the time of abnormality detection by the motor drive control device 1 according to the first embodiment.

First, the power supply voltage Vdc is supplied from the outside to the power supply terminal Pv of the motor drive control device 1, the power supply circuit 23 generates the power supply voltage Vdc1 and supplies it to the motor drive control device 1, and the drive control circuit 20 is activated. After the drive control circuit 20 is activated, the monitoring unit 22 sets the control terminals P1 and P2 to a high level (V = Vdc1) (step S1). As a result, the cutoff switch elements Q11, Q12, Q15, and Q16 of the signal cutoff circuit 13 on both sides of the first system and the second system are turned on, and the control circuit 11 to the inverter circuit 12 (specifically, for driving). The drive control signal Sd can be input to the transistors (control electrodes Q2, Q4, Q6, Q8) (step S2).

Next, the host device 2 outputs a drive command signal Sc instructing the motor 3 to rotate at the target rotation speed, and the drive control circuit 20 receives the drive command signal Sc (step S3).

The drive control unit 21 of the drive control circuit 20 generates, for example, a PWM signal having a duty ratio corresponding to the target rotation speed specified by the received drive command signal Sc, and the drive command signal (first and second drive commands). Signals) Sc1 and Sc2 are output to the control circuits 11_1 and 11_2, respectively (step S4).

Next, the drive control circuit 20 determines the state of the motor drive control device 1 on the first system side (step S5). Specifically, the monitoring unit 22 determines whether or not the first system side is normal based on the presence or absence of input of a periodic signal as the signal FG1 on the first system side by the above-mentioned method.

Further, the drive control circuit 20 determines the state of the motor drive control device 1 on the second system side (step S6). Specifically, the monitoring unit 22 determines whether or not the second system side is normal based on the presence or absence of input of a periodic signal as the signal FG2 on the second system side by the above-mentioned method.

Next, the drive control circuit 20 determines whether or not both the first system side and the second system side are normal (step S7). Specifically, the monitoring unit 22 is normal on both the first system side and the second system side based on the determination result on the first system side in step S5 and the determination result on the second system side in step S6. Determine if it exists.

When both the first system side and the second system side are normal (step S7: YES), the drive control circuit 20 continues to output the drive command signals Sc1 and Sc2, so that the motor drive circuit 10_1 and the motor drive circuit 10_1 and the drive control circuit 20 continue to output. The motor drive circuit 10_2 energizes the coils 6_1 and 6_2 of the two systems to rotate the motor 3 at the target rotation speed (step S8). The case where both the first system side and the second system side are not normal will be described later.

After step S8, the drive control circuit 20 determines whether or not there is a stop command for driving the motor 3 from the outside (for example, the host device 2) (step S9). For example, when the host device 2 outputs a drive command signal Sc instructing to stop driving the motor 3 and the drive control circuit 20 receives the drive command signal Sc (step S9: YES), the drive control unit 21 Stops the output of the drive command signals Sc1 and Sc2 indicating the target rotation speed (step S10). For example, the drive control unit 21 sets the duty ratio of the drive command signals Sc1 and Sc2 to 0% (for example, 0V). As a result, the motor drive circuits 10_1 and 10_2 of each system stop the energization of the coils 6_1 and 6_2 of each system and stop the rotation of the motor 3.

On the other hand, when the drive control circuit 20 has not received the drive command signal Sc instructing to stop driving the motor 3 (step S9: NO), the drive control circuit 20 returns to step S1 and returns to step S1 described above. The process of ~ S9 is executed again.

Here, a case where at least one of the first system side and the second system side is not normal in step S7 will be described.

When at least one of the first system side and the second system side is not normal in step S7 (step S7: NO), as shown in FIG. 3B, the drive control circuit 20 is normal on the first system side. Whether or not it is determined (step S11). Specifically, the monitoring unit 22 determines whether or not the first system side is normal based on the determination result of the first system side in step S5.

When the first system side is normal (step S11: YES), the monitoring unit 22 determines that the second system side is abnormal (step S12). The drive control unit 21 stops the output of the drive command signal Sc2 to the motor drive circuit 10_2 on the second system side according to the monitoring result of the monitoring unit 22 in step S12 (step S13). For example, the drive control unit 21 sets the duty ratio of the drive command signal Sc2 to 0%. At this time, the drive control unit 21 continues to output the drive command signal Sc1 having a duty ratio according to the target rotation speed on the first system side.

Next, the monitoring unit 22 opens or sets the control terminal P2 for controlling the signal cutoff circuit 13_2 on the second system side to a low level (≈ground potential) (step S14). As a result, the cutoff switch elements Q15 and Q16 of the signal cutoff circuit 13_2 on the second system side are turned off, and the signal input from the control circuit 11_2 to the drive transistors Q6 and Q8 of the inverter circuit 12_2 is cut off (step S15). ). As a result, all the driving transistors Q5 to Q8 of the inverter circuit 12_2 on the second system side are turned off (step S16). After that, the motor 3 is continued to be driven by the motor drive circuit 10_1 on the first system side to which the drive command signal Sc1 is input (step S17).

According to this, even when the lock protection function of the control circuit 11_2 is activated and the drive control signal Sd2 for turning on at least one of the drive transistors Q6 and Q8 of the inverter circuit 12_2 is output, step S16. Since all the driving transistors Q5 to Q8 of the inverter circuit 12_2 on the second system side are in the off state, it is possible to prevent the circulation current from being generated in the coil 6_2 on the second system side of the motor 3. This makes it possible to prevent the generation of a magnetic field that applies a brake to the motor 3 rotating by being driven by the motor drive circuit 10_1 on the first system side.

On the other hand, in step S11, when the first system side is not normal (step S11: NO), the monitoring unit 22 determines whether or not the second system side is normal (step S18). Specifically, the monitoring unit 22 determines whether or not the second system side is normal based on the determination result on the second system side in step S6.

When the second system side is normal (step S18: YES), the monitoring unit 22 determines that the first system side is abnormal (step S19). The drive control unit 21 stops the output of the drive command signal Sc1 to the motor drive circuit 10_1 on the first system side according to the monitoring result of the monitoring unit 22 in step S19 (step S20). For example, the drive control unit 21 sets the duty ratio of the drive command signal Sc1 to 0%. At this time, the drive control unit 21 continues to output the drive command signal Sc2 having a duty ratio according to the target rotation speed on the second system side.

Next, the monitoring unit 22 opens or sets the control terminal P1 for controlling the signal cutoff circuit 13_1 on the first system side to a low level (≈ground potential) (step S21). As a result, the cutoff switch elements Q11 and Q12 of the signal cutoff circuit 13_1 on the first system side are turned off, and the signal input from the control circuit 11_1 to the drive transistors Q2 and Q4 of the inverter circuit 12_1 is cut off (step S22). ). As a result, all the driving transistors Q1 to Q4 of the inverter circuit 12_1 on the first system side are turned off (step S23). After that, the motor 3 is continued to be driven by the motor drive circuit 10_2 on the second system side to which the drive command signal Sc2 is input (step S24).

According to this, even when the lock protection function of the control circuit 11_1 is activated and the drive control signal Sd1 for turning on at least one of the drive transistors Q2 and Q4 of the inverter circuit 12_1 is output, step S23. Since all the driving transistors Q1 to Q4 of the inverter circuit 12_1 on the first system side are in the off state, it is possible to prevent a circulating current from being generated in the coil 6_1 on the first system side of the motor 3. This makes it possible to prevent the generation of a magnetic field that applies a brake to the motor 3 rotating by being driven by the motor drive circuit 10_2 on the second system side.

On the other hand, in step S18, if the second system side is not normal (step S18: NO), the monitoring unit 22 determines that the motor 3 is in the locked state (step S25). The drive control unit 21 stops the output of the drive command signals Sc1 and Sc2 to the motor drive circuits 10_1 and 10_2 on both system sides according to the monitoring result of the monitoring unit 22 in step S25 (step S26). After that, each of the control circuits 11_1 and 11_2 stops driving the motor 3, and the lock protection function of the control circuits 11_1 and 11_2 puts the motor 3 in a lock protection state (step S27).

FIG. 4A shows a drive transistor Q2 on the low side of the inverter circuit 12 in a motor drive control device that does not have the signal cutoff circuits 13_1 and 13_2 as a prior study example of the motor drive control device 1 according to the first embodiment described above. , Q4, Q6, and Q8 are diagrams for explaining the states.

FIG. 4B is a diagram for explaining the state of the drive transistors Q2, Q4, Q6, and Q8 on the low side of the inverter circuit 12 in the motor drive control device 1 according to the first embodiment.

As in the above-mentioned prior study example, consider a motor drive control device in which a general-purpose IC (control circuit 11) having a lock protection function and an inverter circuit 12 are directly connected in the motor drive circuits 10_1 and 10_2 of each system. In this motor drive control device, as shown in FIG. 4A, when an abnormality on either system side is detected due to a failure of the position detector 7 or the like, all the drives of the inverter circuit 12 on the normal system side are driven. While the transistor Q1 to Q8 perform switching operation to continue the rotation of the motor, the lock protection function of the control circuit 11 (general-purpose IC) on the system side where the abnormality is detected works, so that the side where the abnormality is detected works. Either one of the drive transistors Q2, Q6 or Q4, Q8 on the low side of the inverter circuit 12 of the above is turned on. As a result, as described above, a magnetic field that applies a brake to the motor 3 driven by one of the motor drive circuits 10 is generated, and the rotation of the motor 3 may become unstable.

On the other hand, the motor drive control device 1 according to the first embodiment is provided with a signal cutoff circuit 13 between the general-purpose IC (control circuit 11) having a lock protection function and the inverter circuit 12. Therefore, when an abnormality on either system side is detected due to a failure of the position detector 7, even if the lock protection function of the control circuit 11 (general-purpose IC) on the system side where the abnormality is detected works. Since the signal transmission between the control circuit 11 on the system side where the abnormality is detected and the inverter circuit 12 is cut off by the signal cutoff circuit 13, for driving the low side of the inverter circuit 12 on the side where the abnormality is detected. It is possible to turn off the transistors Q2, Q4 or Q6, Q8. As a result, even when the lock protection function of the control circuit 11 on the side where the abnormality is detected is activated, a magnetic field that brakes the motor 3 driven by one of the motor drive circuits 10 is generated. This can be suppressed and the motor 3 can be rotated stably.

As described above, according to the motor drive control device 1 having two drive systems according to the first embodiment, even if a problem occurs in one drive system, the other drive system keeps the motor stable rotation. It becomes possible.

The circuit configuration of the signal cutoff circuit 13 disclosed in the above embodiment is an example, and if the signal transmission between the control circuit 11 and the inverter circuit 12 can be cut off, another circuit configuration is adopted. You may. FIG. 5 shows another example of the signal cutoff circuit 13.

The signal cutoff circuit 13A shown in FIG. 5 includes a cutoff switch element Q20 connected between the control electrode (gate electrode) of the low-side drive transistors Q2 and Q4 (Q6, Q8) of the inverter circuit 12 and the ground potential. Have. The cutoff switch element Q20 is, for example, an NPN type bipolar transistor. In the signal cutoff circuit 13A, the emitter electrode as the first main electrode of the cutoff switch element Q20 is connected to the ground potential, and the collector electrode as the second main electrode of the cutoff switch element Q20 is the diode D1 and D2 as the rectifying element. It is connected to the cathode of. The base electrode as the control electrode of the cutoff switch element Q20 is connected to the control terminals P1 and P2 of the drive control circuit 20, respectively.

The anode of the diode D1 is connected to the gate electrode of the driving transistor Q2 (Q6), and the anode of the diode D2 is connected to the gate electrode of the driving transistor Q4 (Q8). Here, the forward voltage of the diodes D1 and D2 is smaller than the threshold voltage of the driving transistors Q2 and Q4 (Q6 and Q8).

Further, the resistor R1 and the capacitor C1 may be connected in parallel between the output terminals Pd2 of the control circuits 11_1 and 11_2 and the gate electrode of the driving transistor Q2 (Q6). Similarly, the resistor R2 and the capacitor C2 may be connected in parallel between the output terminals Pd4 of the control circuits 11_1 and 11_2 and the gate electrode of the driving transistor Q4 (Q8).

According to the signal cutoff circuit 13A shown in FIG. 5, when the corresponding system is normal, the drive control circuit 20 (monitoring unit 22) opens (opens) or lowers the control terminals P1 and P2. As a result, the cutoff switch element Q20 is turned off, and the signals output from the output terminals Pd2 and Pd4 of the control circuit 11 are input to the gate electrodes of the drive transistors Q2 and Q4 (Q6 and Q8).

On the other hand, when the corresponding system is abnormal, the drive control circuit 20 (monitoring unit 22) sets the control terminals P1 and P2 to a high level (for example, a voltage corresponding to the power supply voltage Vdc1) to cut off the switch element. Q20 is turned on, and the gate electrodes of the driving transistors Q2 and Q4 (Q6 and Q8) are connected to the ground potential via the diodes D1 and D2 and the breaking switch element Q20. As a result, even if a signal is output from the output terminals Pd2 and Pd4 of the control circuit 11, the gate electrodes of the driving transistors Q2 and Q4 (Q6 and Q8) have a voltage corresponding to the forward voltage of the diodes D1 and D2. Is applied, so that the driving transistors Q2 and Q4 (Q6 and Q8) are turned off. As a result, the input of signals from the output terminals Pd2 and Pd4 of the control circuit 11 to the gate electrodes of the driving transistors Q2 and Q4 (Q6 and Q8) is cut off.

<< Embodiment 2 >>
FIG. 6 is a block diagram showing a configuration of a motor drive control system according to the second embodiment of the present invention.

The motor drive control device 1A in the motor drive control system 100A shown in FIG. 6 has a function of continuing the rotation of the motor 3 even when the MCU as the drive control circuit 20 fails. It is different from the motor drive control device 1 according to the first embodiment, and is the same as the motor drive control device 1 according to the first embodiment in other respects.

FIG. 7 is a diagram showing a configuration of signal cutoff circuits 13_1 and 13_2 and circuits around them in the motor drive control device 1 according to the first embodiment.

As shown in FIG. 7, the motor drive control device 1A further includes an auxiliary circuit 26, and has a power supply circuit 23A and a drive control circuit 20A instead of the power supply circuit 23 and the drive control circuit 20 according to the first embodiment. ing.

The power supply circuit 23A has regulators 24 and 25, and diodes D21 and D22 as rectifying elements. The regulators 24 and 25 are realized by, for example, a series regulator, a switching regulator, or the like.

The regulator 24 generates a DC voltage obtained by stepping down the power supply voltage Vdc supplied to the power supply terminal Pv and supplies it to the drive control circuit 20A as the power supply voltage Vdc1. The regulator 25 generates a DC voltage obtained by stepping down the power supply voltage Vdc supplied to the power supply terminal Pv, and outputs the DC voltage as the power supply voltage Vdc2. The power supply voltage Vdc2 is used as a pull-up power supply for pulling up the control terminal P2 that controls the signal cutoff circuit 13_1 on the second system side by the resistor Rp. For example, Vdc1 = Vdc2.

The diodes D21 and D22 generate the power supply voltage Vdc3 based on the larger of the power supply voltage Vdc1 and the power supply voltage Vdc2. The power supply voltage Vdc3 is supplied to the auxiliary circuit 26.

The drive control circuit 20A has, for example, open-drain type output circuits 27A and 28A as circuits for driving the control terminals P1 and P2. The output circuit 27A has, for example, a P-channel MOSFET connected between the power supply voltage Vdc1 and the control terminal P1, and sets the control terminal P1 to a high level (≈Vdc1) or open (Hi—Z). The output circuit 28A has, for example, an N-channel MOSFET connected between the ground potential and the control terminal P2, and makes the control terminal P1 low level (≈ground potential) or open (Hi—Z).

The auxiliary circuit 26 is a circuit that assists the control of the motor drive circuit 10_2 on the second system side by the drive control circuit 20A. When the drive control circuit 20A stops operating, the auxiliary circuit 26 generates a drive command signal (second drive command signal) Sc2 in place of the drive control circuit 20A and supplies the drive command signal (second drive command signal) Sc2 to the motor drive circuit 10_2 on the second system side. ..

Specifically, the auxiliary circuit 26 stops the generation of the drive command signal Sc2 and controls when the voltage (≈Vdc1) corresponding to the first logic level (for example, high level) is output to the control terminal P1. When the terminal P1 is in the open state, the drive command signal Sc2 is generated and supplied to the motor drive circuit 10_2 (signal output terminal P5) on the second system side.

For example, the auxiliary circuit 26 includes a transistor Q26 as a switch element, a resistor R26 as a load, and a diode D26 as a rectifying element. The transistor Q26 is, for example, an NPN type bipolar transistor. The emitter electrode as the first main electrode of the transistor Q26 is connected to the ground potential, the collector electrode as the second main electrode of the transistor Q26 is connected to one end of the resistor R26, and the gate electrode as the control electrode of the transistor Q26 is driven and controlled. It is connected to the control terminal P1 of the circuit 20A. A resistor may be connected to the base electrode of the transistor Q26, and a resistor may be connected between the base electrode and the emitter electrode of the transistor Q26.

One end (anode) of the diode D26 as a rectifying element is connected to a collector electrode as a second main electrode of the transistor Q26, and the other end (cathode) is connected to a signal output terminal P5 of the drive control circuit 20A. The other end of the resistor R26 is connected to a power supply line to which a power supply voltage Vdc3 as a third fixed potential larger than the ground potential is supplied.

In the motor drive control system 100A, when the first system side and the second system side are normal, the monitoring unit 22A of the drive control circuit 20A controls the output circuit 27A to set the control terminal P1 to a high level (≈Vdc1). At the same time, the output circuit 28A is controlled to open the control terminal P2. As a result, the cutoff switch elements Q11, Q12, Q15, and Q16 of the signal cutoff circuits 13_1 and 13_2 are turned on, and the drive control signals Sd1 and Sd2 can be input from the control circuits 11_1 and 11_2 to the inverter circuits 12_1 and 12_2. .. Further, when the control terminal P1 becomes high level, the transistor Q26 of the auxiliary circuit 26 is turned on. As a result, the anode of the diode D26 is connected to the ground potential via the transistor Q26, so that no current flows from the diode D26 to the signal output terminal P5. That is, the drive command signal Sc2 output from the signal output terminal P5 of the drive control circuit 20A is input to the control circuit 11_2 on the second system side without being affected by the auxiliary circuit 26.

In the motor drive control system 100A, when an abnormality occurs on the first system side and an appropriate signal FG1 cannot be generated, the monitoring unit 22A of the drive control circuit 20A controls the output circuit 27A to open the control terminal P1. do. As a result, the cutoff switch elements Q11 and Q12 of the signal cutoff circuit 13_1 are turned off, and the input of the drive control signal Sd1 from the control circuit 11_1 to the inverter circuit 12_1 is cut off. Further, when the control terminal P1 is opened, the transistor Q26 of the auxiliary circuit 26 is turned off. As a result, a current path is formed from the power supply line to which the power supply voltage Vdc3 is supplied to the signal output terminal P5 via the resistor R26 and the diode D26. In this case, since the second system side is normal, the drive control unit 21 outputs the drive command signal Sc2 instructing the target rotation speed from the signal output terminal P5.

When the drive control circuit 20A outputs the drive command signal Sc2, a current flows into the signal output terminal P5 from the current path including the resistor R26 and the diode D26 described above, but the output circuit of the signal output terminal P5 in the drive control circuit 20A. If the drive capability (not shown) is sufficiently high, there is no effect on the drive command signal Sc2 (PWM signal).

In the motor drive control system 100A, when an abnormality occurs on the second system side and an appropriate signal FG2 cannot be generated, the monitoring unit 22A of the drive control circuit 20A controls the output circuit 28A to open the control terminal P2. From state to low level. As a result, the cutoff switch elements Q15 and Q16 of the signal cutoff circuit 13_2 are turned off, and the input of the drive control signal Sd2 from the control circuit 11_2 to the inverter circuit 12_2 is cut off.

In the motor drive control system 100A, for example, when the operation of the MCU is stopped due to the failure of the MCU as the drive control circuit 20A or the supply stop of the power supply voltage Vdc1 due to the failure of the regulator 24 of the power supply circuit 23A, the drive control circuit 20A The output of the drive command signals Sc1 and Sc2 is stopped.

In this case, the control terminal P1 on the first system side of the drive control circuit 20A is in the open state, and the control terminal P2 on the second system side is in the open state. As a result, the cutoff switch elements Q11 and Q12 of the signal cutoff circuit 13_1 are turned off, and the input of the drive control signal Sd1 from the control circuit 11_1 to the inverter circuit 12_1 is cut off. On the second system side, the control electrodes of the switching switch elements Q17 and Q18 of the signal cutoff circuit 13_2 are pulled up to the power supply voltage Vdc2 by the resistor Rp, so that the switching switch elements Q17 and Q18 are turned on and the cutoff switch element is turned on. Q15 and Q16 are turned on. This makes it possible to input the drive control signal Sd2 from the control circuit 11_2 to the inverter circuit 12_2.

Further, when the control terminal P1 on the first system side is opened, the transistor Q26 of the auxiliary circuit 26 is turned off. As a result, a current path is formed from the power supply line to which the power supply voltage Vdc3 is supplied to the signal output terminal P5 via the resistor R26 and the diode D26. At this time, since the operation of the drive control circuit 20A (MPU) is stopped, the drive command signal Sc2 is not output from the signal output terminal P5 on the second system side of the drive control circuit 20A, but the signal output terminal P5 is an auxiliary circuit. Since it is connected to the power supply voltage Vdc3 via 26, a DC voltage corresponding to the power supply voltage Vdc3 is applied to the signal output terminal P5. That is, the auxiliary circuit 26 generates a drive command signal Sc2 having a duty ratio of 100%, and the drive command signal Sc2 is input to the control circuit 11_2.

As a result, the control circuit 11_2 generates a drive control signal Sd2 so as to rotate the motor 3 at a rotation speed corresponding to a duty ratio of 100%, that is, a maximum rotation speed, and rotates the motor 3. In this way, even if the MCU as the drive control circuit 20A becomes inoperable due to a failure or the like, the drive command signal Sc2 is generated by the auxiliary circuit 26, so that the motor drive circuit 10_2 on the second system side causes the MCU to be inoperable. It becomes possible to continue the rotation of the motor 3.

Next, the flow of processing at the time of abnormality detection by the motor drive control device 1A according to the second embodiment will be described. In the following description, the same processing as that of the motor drive control device 1A according to the first embodiment will be omitted (see FIGS. 3A and 3B).

8A to 8C are flowcharts showing the flow of processing at the time of abnormality detection by the motor drive control device 1A according to the second embodiment.

First, when the power supply voltage Vdc is supplied to the power supply terminal Pv of the motor drive control device 1A from the outside, the subsequent processing contents differ depending on whether or not the drive control circuit 20A can operate normally.

For example, when the power supply voltage Vdc1 is supplied from the power supply circuit 23A to the drive control circuit 20A (MCU) after the power supply voltage Vdc is turned on and the drive control circuit 20A operates normally (step S0: YES), the drive control circuit The monitoring unit 22A of 20A controls the output circuit 27A to bring the control terminal P1 to a high level (≈Vdc1), and controls the output circuit 28A to open the control terminal P2 (step S1A). Since the overall flow of the processing flow (S2 to S27) after step S1A is the same as the processing flow by the motor drive control device 1 according to the first embodiment shown in FIGS. 4A and 4B, a detailed description thereof will be given. Is omitted.

On the other hand, in step S0, if the power supply circuit 23A cannot operate normally after the power supply voltage Vdc is turned on and an appropriate power supply voltage Vdc1 is not generated, or if the drive control circuit 20A has failed (step S0). : NO), the drive control circuit 20A does not operate. Therefore, the drive command signals Sc1 and Sc2 are not output from the drive control circuit 20A (step S30). In this case, the control terminals P1 and P2 of the drive control circuit 20A are opened (step S31).

Therefore, on the first system side, the cutoff switch elements Q11 and Q12 of the signal cutoff circuit 13_1 are turned off, and the signal input from the control circuit 11_1 to the drive transistors Q2 and Q4 of the inverter circuit 12_1 is cut off (step S32). ). As a result, all the driving transistors Q1 to Q4 of the inverter circuit 12_1 on the first system side are turned off (step S33).

On the other hand, on the second system side, since the control terminal P2 is pulled up to the power supply voltage Vdc2 by the resistor Rp, the cutoff switch elements Q15 and Q16 of the signal cutoff circuit 13_2 are turned on, and the control circuit 11_2 to the inverter circuit 12_2 are turned on. Signals can be input to the drive transistors Q6 and Q8 (step S34). As a result, the driving transistors Q5 to Q8 of the inverter circuit 12_2 on the second system side can be operated (step S35).

Further, since the control terminal P1 of the drive control circuit 20A is in the open state in step S31, the transistor Q26 of the auxiliary circuit 26 is turned off, so that a drive command signal having a constant voltage (duty ratio is 100%) corresponding to the power supply voltage Vdc2 is turned off. Sc2 is supplied from the auxiliary circuit 26 to the control circuit 11_2 (step S36). After that, the control circuit 11_2 generates a drive control signal Sd2 so as to rotate the motor 3 at the maximum rotation speed that can be set, and controls the inverter circuit 12_2 to energize the coil 6_2 to drive the motor 3. (Step S37).

It should be noted that in the second embodiment, the logic of the control terminal P2 by the drive control circuit 20A is inverted with respect to the first embodiment. Specifically, as shown in FIG. 8B, when it is determined in step S12 that the second system side is abnormal, the monitoring unit 22A of the drive control circuit 20A controls the output circuit 28A to lower the control terminal P2. Set to level (GND) (step S14A). As a result, in the motor drive circuit 10_2 on the second system side, the input of the drive control signal Sd2 from the control circuit 11_2 to the inverter circuit 12_2 is cut off.

FIG. 9 is a diagram for explaining the state of the drive transistors Q2, Q4, Q6, and Q8 on the low side of the inverter circuit 12 in the motor drive control device 1A according to the second embodiment.

As shown in FIG. 9, according to the motor drive control device 1A according to the second embodiment, when an abnormality occurs in either the first system side or the second system side, it is related to the first embodiment. Similar to the motor drive control device 1, it is possible to turn off the drive transistors Q2, Q4 or Q6, Q8 on the low side of the inverter circuit 12 on the side where the abnormality is detected, so that the side on which the abnormality is detected can be turned off. Even when the lock protection function of the control circuit 11 is activated, the motor 3 can be stably rotated without applying the brake.

Further, as shown in FIG. 9, according to the motor drive control device 1A according to the second embodiment, even when the MCU as the drive control circuit 20A cannot operate, the auxiliary circuit 26 controls the second system side. Since the drive command signal Sc2 can be supplied to the circuit 11_2, the motor 3 can be rotated by the motor drive circuit 10_2 on the second system side as in the case where the first system side fails. Even in this case, since the drive transistors Q2 and Q4 on the low side of the inverter circuit 12_1 on the first system side are turned off, the motor 3 can be stably rotated without applying the brake.

As described above, according to the motor drive control device 1 having two drive systems according to the second embodiment, even if a problem occurs in one drive system, the other drive system keeps the motor stable rotation. This makes it possible to continue the rotation of the motor 3 even when the drive control circuit 20A cannot operate normally.

<< Embodiment 3 >>
FIG. 10 is a block diagram showing a configuration of a motor drive control system according to the third embodiment of the present invention.

In the second embodiment, the motor drive control device 1B in the motor drive control system 100B shown in FIG. 10 controls the operation of the two signal cutoff circuits 13_1 and 13_2 by one external terminal of the drive control circuit 20B. It is different from the motor drive control device 1A according to the above, and is the same as the motor drive control device 1A according to the second embodiment in other respects.

FIG. 11 is a diagram showing a configuration of signal cutoff circuits 13_1 and 13_2 and circuits around them in the motor drive control device 1A according to the third embodiment.

As shown in FIG. 11, the motor drive control device 1B further includes a control signal generation circuit 30, and has a drive control circuit 20B instead of the drive control circuit 20A according to the second embodiment. The drive control circuit 20B has a control terminal P3 for controlling the signal cutoff circuits 13_1 and 13_2 on the first system side and the second system side instead of the control terminals P1 and P2 described above.

Further, in the drive control circuit 20B, as a circuit for driving the control terminal P3, the control terminal P3 is set to a first logic level (for example, high level (= Vdc1)) and a second logic level (for example, low level (= GND)). ), And a 3-state output type (for example, push-pull type) output circuit 29B capable of transitioning to either a high impedance (open) state. For example, the output circuit 29B is a circuit having a P-channel MOSFET connected between the power supply voltage Vdc1 and the control terminal P3 and an N-channel MOSFET connected between the control terminal P3 and the ground potential. Is.

When the first system side and the second system side are normal, the monitoring unit 22B of the drive control circuit 20B outputs a voltage (high level) corresponding to the power supply voltage Vdc1 of the drive control circuit 20B to the control terminal P3, and outputs the voltage (high level) to the control terminal P3. When an abnormality on the 1st system side is detected, the control terminal P3 is set to the open state (Hi-Z), and when an abnormality on the 2nd system side is detected, the voltage (low level) corresponding to the ground potential is set to the control terminal P3. Output to.

The control signal generation circuit 30 is a circuit that generates a first control signal St1 for controlling the signal cutoff circuit 13_1 on the first system side and a second control signal St2 for controlling the signal cutoff circuit 13_2 on the second system side. Is. The first control signal St1 and the second control signal St2 may be simply referred to as "control signal St1" and "control signal St2".

As shown in FIG. 11, the control signal generation circuit 30 includes, for example, a switch element Q22, resistors R5 and R6, and rectifying elements D5 and D6. The switch element Q22 has a power supply voltage Vdc4 as a fourth fixed potential higher than the ground potential, an input terminal of the auxiliary circuit 26 (control electrode of the transistor Q26), and an input terminal of the signal cutoff circuit 13_1 (switch elements Q13, Q14 for switching). It is connected to the control electrode of the transistor as.

Here, the power supply voltage Vdc4 is a voltage lower than the power supply voltages Vdc1 and Vdc2, and for example, when Vdc1 and Vdc2 = 5.0V, Vdc4 = 3.3V. The power supply voltage Vdc4 may be generated by providing a regulator in the power supply circuit 23A, or may use an internal power supply voltage generated by a general-purpose IC as the control circuit 11_2, and the method of generating the power supply voltage Vdc4 is particularly limited. Not done.

The switch element Q22 is, for example, a PNP type bipolar transistor. Hereinafter, the switch element Q22 is also referred to as a “transistor Q22”. The emitter electrode of the transistor Q22 is connected to the power supply line to which the power supply voltage Vdc4 is supplied, and the collector electrode of the transistor Q22 is connected to the control electrode of the transistor Q26 and the control electrodes of the switching switch elements Q13 and Q14 of the signal cutoff circuit 13_1. Has been done. One end of the resistor R5 is connected to the power supply line to which the power supply voltage Vdc2 is supplied, and the other end of the resistor R5 is connected to the input terminal of the signal cutoff circuit 13_2 (transistor control electrodes as switching switch elements Q17 and Q18). Has been done.

The rectifying elements D5 and D6 are, for example, diodes. Hereinafter, the rectifying elements D5 and D6 are also referred to as "diodes D5 and D6". The anode of the diode D5 is connected to the other end of the resistor R5 and the input terminal of the signal cutoff circuit 13_2 (the control electrode of the transistor as the switching switch elements Q17 and Q18). The cathode of the diode D5 is connected to the control terminal P3 of the drive control circuit 20B. The anode of the diode D6 is connected to the cathode of the diode D5 and the control terminal P3 of the drive control circuit 20B. The cathode of the diode D6 is connected to one end of the resistor R6. The other end of the resistor R6 is connected to the collector electrode of the transistor Q22.

When both the first system side and the second system side are normal, that is, when the control terminal P3 of the drive control circuit 20B is at a high level, the control signal generation circuit 30 is on the first system side and the second system side. The first control signal St1 and the second control signal St2 that enable the input of the drive control signal Sd from the control circuit 11 to the inverter circuit 12 in the above are output.

Specifically, when the control terminal P3 of the drive control circuit 20B reaches a high level (≈Vdc1), the first control of the high level (≈Vdc1) is performed via the diode D6 and the resistor R6 of the control signal generation circuit 30. The signal St1 is input to the signal cutoff circuit 13_1 and the auxiliary circuit 26 on the first system side, respectively. As a result, since the cutoff switch elements Q11 and Q12 of the signal cutoff circuit 13_1 on the first system side are turned on, the drive control signal Sd1 can be input from the control circuit 11_1 on the first system side to the inverter circuit 12_1. Further, at this time, since the transistor Q26 of the auxiliary circuit 26 is also turned on, the diode D26 is not turned on, and the generation of the drive command signal (second drive command signal) Sc2 by the auxiliary circuit 26 is stopped.

On the other hand, on the second system side, the input terminal (control electrode of the switching switch elements Q17 and Q18) of the signal cutoff circuit 13_2 on the second system side is pulled up to the power supply voltage Vdc2 via the resistor R5, and is a diode. Since the anode of D5 is at a high level (≈Vdc1), the diode D5 is not turned on. Therefore, the second control signal St2 becomes a high level (≈Vdc2), and the cutoff switch elements Q15 and Q16 of the signal cutoff circuit 13_2 on the second system side are turned on.

When an abnormality on the first system side is detected, that is, when the control terminal P3 of the drive control circuit 20B is in the open state (Hi-Z), the control signal generation circuit 30 is an inverter from the control circuit 11_1 on the first system side. The second control that outputs the first control signal St1 that cuts off the input of the drive control signal Sd1 to the circuit 12_1 and enables the input of the drive control signal Sd2 from the control circuit 11_2 on the second system side to the inverter circuit 12_2. The signal St2 is output.

Specifically, when the control terminal P3 of the drive control circuit 20B is in the open state, the resistor R5, the diode D5, the diode D6, the resistor R6, and the transistor Q26 and the first from the power supply line to which the power supply voltage Vdc2 is supplied. A current flows to the ground potential via a resistor connected between the base and the emitter of the switching switch elements Q13 and Q14 of the signal cutoff circuit 13_1 on the system side. At this time, by setting the magnitude of the power supply voltage Vdc4 and the constants such as the resistors R5 and R6 and the diodes D5 and D6 so that the transistor Q22 is turned off, the low-level first control signal St1 is on the first system side. Is input to the signal cutoff circuit 13_1 and the auxiliary circuit 26, respectively.

As a result, the cutoff switch elements Q11 and Q12 of the signal cutoff circuit 13_1 on the first system side are turned off, and the input of the drive control signal Sd1 from the control circuit 11_1 on the first system side to the inverter circuit 12_1 is cut off. At this time, since the transistor Q26 of the auxiliary circuit 26 is also turned off, a current flows from the power supply line to which the power supply voltage Vdc3 is supplied to the signal output terminal P5 via the diode D26. At this time, if the drive capacity of the output circuit (not shown) of the signal output terminal P5 in the drive control circuit 20B is sufficiently high, there is no influence on the drive command signal Sc2 (PWM signal).

On the other hand, on the second system side, the input terminal (control electrode of the switching switch elements Q17 and Q18) of the signal cutoff circuit 13_2 on the second system side is pulled up to the power supply voltage Vdc2 via the resistor R5. 2 The control signal St2 becomes a high level (≈Vdc2). As a result, the cutoff switch elements Q15 and Q16 of the signal cutoff circuit 13_2 on the second system side are turned on.

When an abnormality on the second system side is detected, that is, when the control terminal P3 is at a low level, the control signal generation circuit 30 inputs the drive control signal Sd1 from the control circuit 11_1 on the first system side to the inverter circuit 12_1. The first control signal St1 that enables the above is output, and the second control signal St2 that blocks the input of the drive control signal Sd2 from the control circuit 11_2 on the second system side to the inverter circuit 12_2 is output.

Specifically, when the control terminal P3 of the drive control circuit 20B becomes low level, it is grounded from the power supply line to which the power supply voltage Vdc2 is supplied via the resistor R5, the diode D5, and the output circuit 29B of the drive control circuit 20B. Current flows into the potential. As a result, the voltage of the base electrode of the transistor Q22, that is, the second control signal St2 drops to a voltage corresponding to the forward voltage of the diode D5. As a result, the transistor Q22 is turned on, and the first control signal St1 having a voltage corresponding to the power supply voltage Vdc4 is input to the signal cutoff circuit 13_1 and the auxiliary circuit 26 on the first system side, respectively. As a result, the cutoff switch elements Q11 and Q12 of the signal cutoff circuit 13_1 on the first system side are turned on. At this time, since the transistor Q26 of the auxiliary circuit 26 is also turned on, the generation of the drive command signal Sc2 by the auxiliary circuit 26 is stopped.

On the other hand, on the second system side, as described above, the second control signal St2 drops to a voltage corresponding to the forward voltage of the diode D5, so that the switch elements Q17 and Q18 for switching the signal cutoff circuit 13_2 on the second system side Does not turn on. As a result, the cutoff switch elements Q15 and Q16 of the signal cutoff circuit 13_2 on the second system side are turned off.

When the drive control circuit 20B is inoperable due to a failure of the drive control circuit 20B or the like, the control terminal P3 of the drive control circuit 20B is opened (Hi-Z) and the drive command signal by the drive control circuit 20B is set. The output of Sc1 and Sc2 is stopped. In this case, the control signal generation circuit 30 blocks the input of the drive control signal Sd from the control circuit 11 to the inverter circuit 12 on both the first system side and the second system, and the first control signal St1 and the second control signal St2. Is output.

Specifically, when the control terminal P3 of the drive control circuit 20B is in the open state, the transistor Q22 of the control signal generation circuit 30 is turned off as in the case where the above-mentioned abnormality on the first system side is detected. , The low-level first control signal St1 is input to the signal cutoff circuit 13_1 and the auxiliary circuit 26 on the first system side, respectively. As a result, the cutoff switch elements Q11 and Q12 of the signal cutoff circuit 13_1 on the first system side are turned off, so that the input of the drive control signal Sd1 from the control circuit 11_1 to the inverter circuit 12_1 is cut off.

On the other hand, on the second system side, when the control terminal P3 of the drive control circuit 20B is in the open state, the second control signal St2 becomes a high level (≈Vdc2). As a result, the cutoff switch elements Q15 and Q16 of the signal cutoff circuit 13_2 on the second system side are turned on. At this time, since the transistor Q26 of the auxiliary circuit 26 is turned off by the low-level first control signal St1, the auxiliary circuit 26 controls the drive command signal Sc2 of the DC voltage corresponding to the power supply voltage Vdc3 from the diode D26. Supply to 11_2. As a result, the motor 3 is controlled to rotate at the maximum settable rotation speed.

Next, the flow of processing at the time of abnormality detection by the motor drive control device 1B according to the third embodiment will be described. In the following description, the same processing as the processing of the motor drive control device 1A (see FIGS. 8A to 8C) according to the second embodiment will be omitted.

12A to 12C are flowcharts showing the flow of processing at the time of abnormality detection by the motor drive control device 1B according to the third embodiment.

The overall flow of the processing flow shown in FIGS. 12A to 12C is the same as the processing flow by the motor drive control device 1A according to the second embodiment shown in FIGS. 9A to 9C. The drive control circuit 20B differs from the motor drive control device 1A according to the second embodiment in that the state of the control terminal P3 is switched instead of the control terminals P1 and P2.

Specifically, as shown in FIG. 12A, when the drive control circuit 20B can be operated after the power supply voltage Vdc is applied in step S0, the monitoring unit 22B of the drive control circuit 20B controls and controls the output circuit 29B. The terminal P3 is set to a high level (≈Vdc1) (step S1B). As a result, in the motor drive circuit 10 of each system, the drive control signals Sd1 and Sd2 can be input from the control circuit 11 to the inverter circuit 12.

Further, as shown in FIG. 12B, when it is determined in step S12 that the second system side is abnormal, the monitoring unit 22B of the drive control circuit 20B controls the output circuit 29B to lower the control terminal P3 (GND). ) (Step S14B). As a result, the drive control signal Sd1 can be input from the control circuit 11_1 to the inverter circuit 12_1 in the motor drive circuit 10_1 on the first system side, while the drive control signal Sd1 can be input from the control circuit 11_2 in the motor drive circuit 10_2 on the second system side. The input of the drive control signal Sd2 to the inverter circuit 12_2 is cut off.

Further, as shown in FIG. 12B, when it is determined in step S19 that the first system side is abnormal, the monitoring unit 22B of the drive control circuit 20B controls the output circuit 29B to open the control terminal P3 (Hi- Z) (step S21B). As a result, the drive control signal Sd2 can be input from the control circuit 11_2 to the inverter circuit 12_2 in the motor drive circuit 10_1 on the second system side, while the drive control signal Sd2 can be input from the control circuit 11_1 in the motor drive circuit 10_1 on the first system side. The input of the drive control signal Sd1 to the inverter circuit 12_1 is cut off.

Further, as shown in FIG. 12C, when the drive control circuit 20B is inoperable after the power supply voltage Vdc is applied in step S0, the control terminal P3 of the drive control circuit 20B is opened (step S31B). As a result, the drive control signal Sd2 can be input from the control circuit 11_2 to the inverter circuit 12_2 in the motor drive circuit 10_1 on the second system side, while the drive control signal Sd2 can be input from the control circuit 11_1 in the motor drive circuit 10_1 on the first system side. The input of the drive control signal Sd1 to the inverter circuit 12_1 is cut off. After that, a drive command signal Sc2 having a constant voltage (= Vdc3) is generated from the auxiliary circuit 26 (step S36) and input to the control circuit 11_2 to drive the motor 3 only by the motor drive circuit 10_2 on the second system side. (Step S37).

FIG. 13 is a diagram for explaining the state of the drive transistors Q2, Q4, Q6, and Q8 on the low side of the inverter circuit 12 in the motor drive control device 1B according to the third embodiment.

As shown in FIG. 13, according to the motor drive control device 1B according to the third embodiment, when an abnormality occurs in either the first system side or the second system side, one control terminal P3 is used. By setting it to open (Hi-Z) or low level (GND), it is possible to turn off the drive transistors Q2, Q4, Q6, and Q8 on the low side of the inverter circuit 12 on the side where the abnormality is detected. As a result, similar to the motor drive control devices 1 and 1A according to the first and second embodiments, even when the lock protection function of the control circuit 11 on the side where the abnormality is detected is activated, the brake is not applied. The motor 3 can be rotated stably.

Further, as shown in FIG. 13, according to the motor drive control device 1B according to the third embodiment, even when the MCU as the drive control circuit 20B cannot operate, the motor drive control device according to the second embodiment. Since the drive command signal Sc2 can be supplied to the control circuit 11_2 on the second system side by the auxiliary circuit 26 as in 1A, the motor 3 can be rotated by the motor drive circuit 10_2 on the second system side. .. Even in this case, since the drive transistors Q2 and Q4 on the low side of the inverter circuit 12_1 on the first system side are turned off, the motor 3 can be stably rotated without applying the brake.

As described above, according to the motor drive control device 1B having the two drive systems according to the third embodiment, as in the case of the motor drive control device 1A according to the second embodiment, there is a case where a problem occurs in one of the drive systems. However, the other drive system makes it possible to continue the stable rotation of the motor 3, and even if the MCU as the drive control circuit 20B cannot operate normally, the rotation of the motor 3 is continued. It becomes possible.

Further, according to the motor drive control device 1B according to the third embodiment, the drive control circuit 20B is provided by providing the control signal generation circuit 30 for generating the control signals St1 and St2 for controlling the signal cutoff circuits 13_1 and 13_2. Only one external terminal of the three-state output format in (MCU) enables individual control of the signal cutoff circuits 13_1 and 13_2 of both systems and generation of the drive command signal Sc2 by the auxiliary circuit 26 in the event of an MCU failure.

The control signal generation circuit 30 is not limited to the circuit configuration shown in FIG. FIG. 14 is a diagram showing another example of the control signal generation circuit. As in the control signal generation circuit 30B shown in FIG. 14, the diode D5 in the control signal generation circuit 30 may be deleted, and the shunt regulator 31 may be used instead of the resistor R6. According to the control signal generation circuit 30B, as in the control signal generation circuit 30, appropriate control signals St1 and St2 are generated according to the three states (high level, low level, and high impedance) of the control terminal P3. Can be done.

<< Expansion of embodiment >>
Although the invention made by the present inventor has been specifically described above based on the embodiments, it is needless to say that the present invention is not limited thereto and can be variously modified without departing from the gist thereof. ..

Further, in the above embodiment, the case where the motor drive control device 1 is applied to a fan unit having a single-phase brushless motor provided with two coils 6_1 and 6_2 is exemplified, but the present invention is not limited thereto. For example, the motor drive control device 1 may be applied to a fan unit having two single-phase brushless motors having one coil.

Further, in the above embodiment, the case where the motor 3 is a single-phase brushless motor is exemplified, but the type and the number of phases of the motor 3 are not limited to this.

Further, the above-mentioned flowchart shows only an example for explaining the operation, and is not limited thereto. That is, the steps shown in each figure of the flowchart are specific examples, and are not limited to this flow. For example, the order of some processes may be changed, other processes may be inserted between each process, or some processes may be performed in parallel.

1,1A, 1B ... motor drive control device, 2 ... higher-level device, 3 ... motor, 4 ... impeller (impeller), 5 ... fan (fan motor), 6_1, 6_2 ... coil (first and second system coils) Example), 7_1,7_2 ... position detector, 10_1,10_2 ... motor drive circuit, 11_1,11_2 ... control circuit, 12_1,12_2 ... inverter circuit, 13_1,13_2,13A_1,13A_2 ... signal cutoff circuit, 16_1,16_2 17_1, 17_2 ... load drive terminal, 19 ... fuse, 20, 20A, 20B ... drive control circuit, 21 ... drive control unit, 22, 22A, 22B ... monitoring unit, 23, 23A ... power supply circuit, 24, 25 ... regulator, 26 ... Auxiliary circuit, 27A, 28A, 29, 29B ... Output circuit, 30, 30B ... Control signal generation circuit, 31 ... Shunt regulator, 100, 100A, 100B ... Motor drive control system, 101, 101A, 101B ... Fan unit, C1, C2 ... Capacitor, D1, D5, D6, D21, D22, D26 ... Rectification element (diode), FG1, FG2 ... Signal (1st and 2nd FG signals), Lp ... Power supply line, Pv ... Power supply terminal, P1, P2, P3 ... Control terminal, P4, P5 ... Signal output terminal, P6, P7 ... Signal input terminal, Pd1 to Pd4 ... Output terminal, Q1 to Q8 ... Drive transistor, Q11, Q12, Q15, Q16, Q20 ... For interruption Switch element, Q13, Q14, Q17, Q18 ... Switching switch element, Q22, Q26 ... Switch element, R1, R2, R5, R6, R26, Rp ... Resistance, Rs1, Rs2 ... Current detection resistance, Sc, Sc1, Sc2 ... drive command signal, Sd ... drive control signal (PWM signal), Sd1, Sd2 ... drive control signal (example of first and second drive control signals), So ... motor drive information signal, St1, St2 ... control signal ( 1st and 2nd control signals), Vdc, Vdc1, Vdc2, Vdc3, Vdc4 ... Power supply voltage.

Claims (10)

A motor drive control device that drives a motor having coils of the first system and the second system.
Two motor drive circuits provided corresponding to the coil of the first system and the coil of the second system to control energization of the coil of the corresponding system, and
A drive control circuit for controlling the operation of the motor drive circuit on the first system side and the operation of the motor drive circuit on the second system side is provided.
The motor drive circuits on the first system side and the second system side are, respectively.
A control circuit that generates a drive control signal based on a drive command signal input from the drive control circuit and a position detection signal generated in response to the rotation of the motor.
An inverter circuit that drives the coil based on the drive control signal,
It has a signal cutoff circuit that switches between input and cutoff of the drive control signal from the control circuit to the inverter circuit in response to control from the drive control circuit.
When the drive control circuit detects an abnormality on either the first system side or the second system side, the drive control circuit controls the signal cutoff circuit on the normal system side to control the signal cutoff circuit from the control circuit. A motor that enables the input of the drive control signal to the inverter circuit and controls the signal cutoff circuit on the system side where an abnormality is detected to cut off the input of the drive control signal from the control circuit to the inverter circuit. Drive control device. In the motor drive control device according to claim 1,
The control circuits on the first system side and the second system side each have an output terminal for outputting the drive control signal.
The inverter circuits on the first system side and the second system side are connected in series between the first fixed potential and the second fixed potential lower than the first fixed potential, respectively, and the input is input. A node in which a high-side drive transistor and a low-side drive transistor that perform switching operations according to a control signal, and the high-side drive transistor and the low-side drive transistor are commonly connected. It has a load drive terminal connected to one end of the coil of the system to be used.
On the first system side and the second system side, the signal cutoff circuit is a motor drive provided between the output terminal of the control circuit and the control electrode of the drive transistor on the low side of the inverter circuit. Control device. In the motor drive control device according to claim 2,
The signal cutoff circuit on the first system side and the second system side is for breaking off, respectively, connected between the output terminal of the control circuit and the control electrode of the drive transistor on the low side of the inverter circuit. A motor drive control device having a switch element. In the motor drive control device according to claim 2,
The signal cutoff circuit on the first system side and the second system side is a cutoff switch element connected between the control electrode of the drive transistor on the low side of the inverter circuit and the second fixed potential, respectively. Motor drive control device. The motor drive control device according to any one of claims 2 to 4.
It further has an auxiliary circuit that assists the control of the motor drive circuit on the second system side by the drive control circuit.
The drive control circuit controls the operation of the motor drive circuit on the first system side by supplying the first drive command signal as the drive command signal to the motor drive circuit on the first system side, and controls the operation of the motor drive circuit on the first system side. By supplying the second drive command signal as a signal to the motor drive circuit on the second system side, the operation of the motor drive circuit on the second system side is controlled.
The auxiliary circuit is a motor drive control device that generates a second drive command signal in place of the drive control circuit and supplies the second drive command signal to the motor drive circuit on the second system side when the drive control circuit stops operating. In the motor drive control device according to claim 5,
The drive control circuit has a first control terminal for controlling the signal cutoff circuit on the first system side and a second control terminal for controlling the signal cutoff circuit on the second system side. ,
The drive control circuit outputs a voltage corresponding to a predetermined logic level to the first control terminal when the first system side is normal, and detects an abnormality on the first system side. 1 Open the control terminal and open it.
The auxiliary circuit stops the generation of the second drive command signal when a voltage corresponding to the predetermined logic level is output to the first control terminal, and the first control terminal is in an open state. In this case, a motor drive control device that generates the second drive command signal and supplies it to the motor drive circuit on the second system side. In the motor drive control device according to claim 6,
The first drive command signal and the second drive command signal are PWM signals having a duty ratio corresponding to the target rotation speed of the motor.
The drive control circuit further has a signal output terminal for outputting the second drive command signal.
The auxiliary circuit is
A switch element with one end connected to the ground potential,
A rectifying element in which one end is connected to the other end of the switch element, the other end is connected to the signal output terminal of the drive control circuit, and a current flows from the one end side to the other end side.
One end includes a load connected to a third fixed potential greater than the ground potential and the other end connected to the other end of the switch element.
The switch element is turned on when a voltage corresponding to the power supply voltage of the drive control circuit is output to the first control terminal, and is turned off when the first control terminal is in the open state. .. In the motor drive control device according to claim 5,
A control signal generation circuit for generating a first control signal for controlling the signal cutoff circuit on the first system side and a second control signal for controlling the signal cutoff circuit on the second system side is further provided.
The first drive command signal and the second drive command signal are PWM signals having a duty ratio corresponding to the target rotation speed of the motor.
The drive control circuit has a signal output terminal for outputting the second drive command signal and a control terminal for controlling the signal cutoff circuit on the first system side and the second system side.
When the drive control circuit outputs a voltage corresponding to the first logic level to the control terminal when the first system side and the second system side are normal, and detects an abnormality on the first system side. When the control terminal is opened and an abnormality on the second system side is detected, a voltage corresponding to the second logic level (low level) opposite to the first logic level is output to the control terminal. ,
The control signal generation circuit is said to be described from the control circuit on the first system side and the second system side when a voltage corresponding to the first logic level is output from the control terminal of the drive control circuit. The first control signal and the second control signal that enable the input of the drive control signal to the inverter circuit are output.
The control signal generation circuit blocks the input of the drive control signal from the control circuit on the first system side to the inverter circuit when the control terminal of the drive control circuit is in the open state. A control signal is output, and the second control signal that enables input of the drive control signal from the control circuit on the second system side to the inverter circuit is output.
The control signal generation circuit inputs the drive control signal from the control circuit on the first system side to the inverter circuit when the control terminal outputs a voltage corresponding to the second logic level. The first control signal that enables the first control signal is output, and the second control signal that blocks the input of the drive control signal from the control circuit on the second system side to the inverter circuit is output.
The auxiliary circuit is the case where the control signal generation circuit outputs the first control signal that enables the input of the drive control signal from the control circuit on the first system side to the inverter circuit. When the first control signal is output, which stops the supply of current to the signal output terminal and cuts off the input of the drive control signal from the control circuit on the first system side to the inverter circuit. A motor drive control device that supplies current to the signal output terminals. The motor drive control device according to any one of claims 1 to 8.
With the motor
A fan unit including an impeller that rotates by the rotational force of the motor. It is a motor drive control method by a motor drive control device that drives a motor having coils of the first system and the second system, and the motor drive control device is used for the coil of the first system and the coil of the second system, respectively. Two motor drive circuits that are provided correspondingly and control the energization of the coils of the corresponding system, and the operation of the motor drive circuit on the first system side and the operation of the motor drive circuit on the second system side are controlled. The motor drive circuit on the first system side and the second system side is provided with a drive control circuit, and the positions generated in response to the drive command signal input from the drive control circuit and the rotation of the motor, respectively. A control circuit that generates a drive control signal based on the detection signal, an inverter circuit that drives the coil based on the drive control signal, and an inverter circuit from the control circuit according to control from the drive control circuit. It has a signal cutoff circuit that switches between input and cutoff of the drive control signal to the inverter.
The first step in which the drive control circuit determines the states of the first system side and the second system side,
In the first step, when at least one of the first system side and the second system side is normal, the drive control circuit controls the signal cutoff circuit on the normal system side to control the control. The second step, which enables the input of the drive control signal from the circuit to the inverter circuit,
In the first step, when an abnormality on either the first system side or the second system side is detected, the drive control circuit installs the signal cutoff circuit on the system side where the abnormality is detected. A motor drive control method comprising a third step of controlling and blocking the input of the drive control signal from the control circuit to the inverter circuit.

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