JP2022029631A - Flattening method of silicon wafer, and solid-state image sensor - Google Patents

Abstract

To provide a flattening method capable of flattening, by one-time photolithography process, recesses formed on the surface of a silicon wafer after a previous process of a semiconductor manufacturing process.SOLUTION: In a flattening method of a silicon wafer, recesses with each different depth formed on the surface of the silicon wafer 1 by a previous process of a semiconductor manufacturing process are flattened by a photolithography process. In the flattening method of the silicon wafer, flattening is carried out by one-time photolithography process by using a gray tone mask having light transmittance adjusted so that each proper exposure is carried out, corresponding to the recesses with each different depth formed on the surface of the silicon wafer.SELECTED DRAWING: Figure 1

Description

The present invention relates to a method of flattening the surface of a silicon wafer having recesses of different depths.

Semiconductor integrated circuits such as LSIs (Large Scale Integration, large-scale integrated circuits) are manufactured by wafer processing silicon wafers in the semiconductor manufacturing process. The semiconductor manufacturing process consists of a front-end process and a back-end process.

In the previous process, by repeating various thin film forming steps, photolithography steps, thermal oxide film forming steps, thermal diffusion steps of impurities, and other processes, an integrated circuit consisting of semiconductor circuit elements such as transistors is mounted on a silicon wafer on multiple surfaces. After forming and forming a wiring layer made of aluminum or the like, a passivation film is formed to prevent moisture or the like from entering the surface of the silicon wafer. Finally, the passivation film on the pad electrode is removed to expose the pad electrode so that the integrated circuit and the external device can be electrically connected.

In the post-process, a semiconductor chip is manufactured by individually cutting integrated circuits mounted on silicon wafers in the pre-process, and the semiconductor chip is used to manufacture a semiconductor package that can be mounted on a printed wiring board or the like. It is a process.

On the surface of the silicon wafer after the pre-process, recesses having a plurality of depths are formed.

In a solid-state image sensor, a color filter is formed by repeating coating, exposure, and development processing of a photosensitive colored resist on a silicon wafer after the pre-process in which such recesses having a plurality of different depths are formed. Need to form.
When a photosensitive colored resist is applied onto a silicon wafer having recesses formed in this way, the recesses cause coating unevenness.

In order to prevent the occurrence of coating unevenness, for example, a technique for flattening a plurality of recesses having different depths formed on a silicon wafer is disclosed (Patent Document 1).

Japanese Unexamined Patent Publication No. 2015-141237

As shown in FIG. 3, recesses having different depths are formed on the surface of the silicon wafer 1. A recess 2 having a depth of, for example, 2.60 μm is formed in the recess 2 of the pad electrode portion, and a recess having a depth of, for example, 0.75 μm is formed in the scribe line portion for cutting a silicon wafer into individual semiconductor chips.

In the technique of Patent Document 1, the photosensitive resin layer 4 is first coated on the surface of the silicon wafer 1 (FIG. 3 (a)) after the previous step (FIG. 3 (b)).

Next, the recess 2 of the pad electrode portion is exposed to the exposure light 6 using the photomask 5 (FIG. 3 (c)).

By developing the exposed photosensitive resin layer 4, it is possible to obtain a state in which the recess 2 of the pad electrode portion is filled with the photosensitive resin layer 7 remaining after development (FIG. 3 (d)).

Next, the photosensitive resin layer 8 is applied (FIG. 3 (e)).

Next, the photomask 9 is used to expose the exposure light to both the recess 2 of the pad electrode portion and the recess 3 of the scribe line portion (FIG. 3 (f)).

Next, by performing the developing process, a semiconductor wafer 11 in which the concave portion 2 of the pad electrode portion and the concave portion 3 of the scribe line portion are flattened by the photosensitive resin layer 10 remaining after development can be obtained (FIG. 3). (G)).

As described above, in order to flatten the recess formed on the surface of the silicon wafer at the stage where the pre-process of the semiconductor manufacturing process is completed, the photolithography process must be performed at least twice. In addition, each photolithography process requires a photomask. Therefore, the process of flattening the surface of the silicon wafer is expensive.

In view of the above circumstances, it is an object of the present invention to provide a flattening method capable of flattening a recess formed on the surface of a silicon wafer after a pre-process of a semiconductor manufacturing process in a single photolithography process.

Another object of the present invention is to provide a solid-state image pickup device in which the concave portions on the surface after the pre-process and the post-process of the semiconductor manufacturing process are flattened in one photolithography process.

As a means for solving the above-mentioned problems, the first aspect of the present invention is a method for flattening a silicon wafer in which recesses having different depths formed on the surface of the silicon wafer by the pre-process of the semiconductor manufacturing process are flattened by the photolithography process. And
The photomask used in the photolithography process is a gray tone mask in which the light transmittance is adjusted so that appropriate exposure can be obtained for the concave portions formed on the surface of the silicon wafer having different depths. ,
This is a method for flattening a silicon wafer, which comprises flattening recesses having different depths in a single photolithography process.

Further, a coating step of applying a corrosion prevention layer to the pad electrode of the silicon wafer and a coating process.
The photolithography process is provided in this order.
The method for flattening a silicon wafer according to claim 1, wherein in the coating step, a first recess of 0.1 nm or more and 10 nm or less formed on the surface of the silicon wafer is filled with the corrosion prevention layer. ..

Further, the surface of the silicon wafer on which the photoelectric conversion element is formed has two or more recesses having different depths.
At least one of the recesses is a first recess having a depth of 0.1 nm or more and 10 nm or less.
The first recess is a solid-state image pickup device characterized in that it is covered with a corrosion prevention layer.

According to the method for flattening a silicon wafer of the present invention, the surface of the silicon wafer formed after the pre-process of the semiconductor manufacturing process corresponds to a recess having a plurality of different depths and changes according to the depth. By using a gray tone mask having a light transmittance, flattening is possible by one photolithography process. Therefore, the photolithography process can be performed once, and the process can be shortened and the cost can be reduced.

Further, according to the solid-state image pickup device of the present invention, since the silicon wafer of the present invention is manufactured by using the flattening method, the cost can be reduced.

The cross-sectional explanatory view explaining an example of the method of flattening the surface of the silicon wafer of this invention. The cross-sectional explanatory view explaining an example of the method of flattening the surface of the silicon wafer of this invention. The cross-sectional explanatory view explaining an example of the method of flattening the surface of the conventional silicon wafer.

<Method of flattening silicon wafer>
The method for flattening a silicon wafer according to the first embodiment of the present invention will be described with reference to FIGS. 1 and 2.

(First embodiment)
The silicon wafer flattening method according to the first embodiment of the present invention is a silicon wafer flattening method for flattening recesses formed on the surface of a silicon wafer by a photolithography process, which are formed on the surface of the silicon wafer by a pre-process of a semiconductor manufacturing process. Is.

The photomask used in the photolithography process uses a gray tone mask whose light transmittance is adjusted so that appropriate exposure can be obtained for each recess formed on the surface of the silicon wafer at different depths. The feature is that it is flattened in one photolithography process.

A method for flattening a silicon wafer according to the first embodiment of the present invention will be described with reference to FIG.

FIG. 1A is a cross-sectional view illustrating the recesses formed on the surface of the silicon wafer 1 by the pre-process of the semiconductor manufacturing process and having different depths. As an example, the recess 2 of the pad electrode portion and the recess 3 of the scribe line portion are shown. In addition, although FIG. 1A exemplifies the recesses having two types of depths, three or more types may be used.

By connecting semiconductor circuit elements such as innumerable transistors formed in the previous step of the silicon wafer 1 with a wiring layer formed on the surface, it becomes possible to function as a semiconductor integrated circuit. The single-layer wiring or multi-layer wiring thus formed can be connected to an external device by connecting to a pad electrode arranged on the peripheral portion of the chip.

A protective film (passivation film) is formed on the outermost surface of the silicon wafer 1 after the pre-process (not shown) to protect each chip. A scribe line is formed to partition the individual chips. A chip is formed inside the region defined by the scribe line, and a plurality of pad electrodes are arranged on the peripheral edge of the chip.

In the scribe line, the film formed in some film forming steps in the previous step is left unremoved. On the other hand, those films are removed in the part where the chip is formed, which is the inner side partitioned by the scribe line.

Further, a protective film (not shown) is not formed on the portion where the scribe line is formed (scribe line portion). The protective film formed on the pad electrode has been removed to expose the pad electrode.

Therefore, the surface of the silicon wafer 1 after the previous step is in a state of being covered with a protective film, but the protective film on the portion where the pad electrode is formed (pad electrode portion) is removed, and the thickness of the protective film is thick. A recess with a depth is formed. On the other hand, since the film formed in the previous step remains as it is in the portion where the scribe line is formed, it is higher than the surface of the pad electrode by that amount.

FIG. 1B shows a state in which the photosensitive resin layer 4 is formed in FIG. 1A. According to the uneven shape, unevenness is also formed on the coated photosensitive resin layer 4. A deep recess is formed in the recess 2 of the pad electrode portion, which is a deep recess, and a shallow recess is formed in the recess 3 of the scribe line portion, which is a shallow recess.

FIG. 1C shows a state in which the exposed photosensitive resin layer 4 is exposed to the exposure light 6 via the photomask 12. The feature of the first embodiment is to use a gray tone mask as the photomask 12. Further, the light transmittance of the portion corresponding to the concave portion 2 of the pad electrode portion of the photomask 12 and the concave portion 3 of the scribe line portion can flatten the concave portion 2 of the pad electrode portion and the concave portion 3 of the scribe line portion. The feature is that it is set to the rate. Here, two types of recesses having different depths are illustrated, but three or more types may be used. In that case, the gray tone mask to be used may also be a gray tone mask having appropriate light transmittance for flattening corresponding to each portion corresponding to concave portions having different depths.

The light transmittance of the portion corresponding to the concave portion 2 of the pad electrode portion and the concave portion 3 of the scribe line portion of the photomask 12 is set to the light transmittance that can flatten the concave portion 2 of the pad electrode portion and the concave portion 3 of the scribe line portion. As a method of doing so, the thickness of the photosensitive resin layer 4 formed in the recess 2 of the pad electrode portion and the recess 3 of the scribe line portion is grasped in advance. Then, by experimentally grasping the relationship between the exposure intensity to the photosensitive resin layer 4 having a thickness and the thickness of the photosensitive resin layer 4 remaining after development, the exposure intensity capable of flattening is determined. do. A gray tone mask having a light transmittance that realizes the exposure intensity is produced, and the gray tone mask is used as the photomask 12.

In FIG. 1D, after the photosensitive resin layer 4 exposed in FIG. 1C is developed, the photosensitive resin 13 remains in the recess 2 of the pad electrode portion and the recess 3 of the scribe line portion, and is flattened. Shows the realized state. As described above, it was possible to flatten the recesses formed on the surface of the silicon wafer 1 by the pre-process of the semiconductor manufacturing process and having different depths by one photolithography process.

(Second embodiment)
A second embodiment of the method for flattening the silicon wafer 1 of the present invention will be described.
The second embodiment differs from the first embodiment in that a step of first applying the corrosion prevention layer 15 of the pad electrode of the silicon wafer 1 is provided. That is, in the second embodiment, the step of applying the corrosion prevention layer of the pad electrode of the silicon wafer 1 and the step of photolithography are provided in this order.

In the first embodiment, the recesses having different depths are two types of recesses, the recess 2 of the pad electrode portion and the recess 3 of the scribe line portion. However, in the second embodiment, the recesses 2-1 having a depth different from those of the recesses are further provided. That is, the depth of the recess 2-1 is significantly thinner than the depth of the recess 2 of the pad electrode portion and the recess 3 of the scribe line portion. The case where the recess 2-1 is present in the pad electrode portion will be described below.
The depth of the recess 2-1 of the pad electrode portion is 0.1 nm or more and 10 nm or less, and it is assumed that the depth is, for example, about 2 nm. As described above, when the concave portion 2-1 is an extremely shallow concave portion, it is difficult to control the exposure light 6 through the gray tone mask which is the photomask 12 on the coated photosensitive resin layer 4. That is, it is difficult to form a thin photosensitive resin layer in the recess 2-1 after development. However, if a layer that replaces the photosensitive resin layer is not formed, the pad electrode may be corroded by the developer exposed in the developing process when the photosensitive resin layer is formed by the photomask 12. Therefore, it is preferable to apply the corrosion prevention layer 15 including the recess 2-1 of the pad electrode portion, which is an extremely shallow recess, to fill the step (recess) of the recess 2-1.

Further, in the photomask used in the photolithography process, the light transmittance is adjusted so that appropriate exposure is obtained for each recess having a different depth except for the recess 2-1 formed on the surface of the silicon wafer 1. The fact that it is a gray tone mask is the same as in the first embodiment. Further, a corrosion prevention layer 15 is formed at a position corresponding to the recess 2-1 so as to fill the recess 2-1.

FIG. 2A is a cross-sectional view illustrating the recesses formed on the surface of the silicon wafer 1 by the pre-process of the semiconductor manufacturing process and having different depths. As an example, the recesses 2 and 2-1 of the pad electrode portion and the recess 3 of the scribe line portion are shown.

FIG. 2B shows a state in which the corrosion prevention layer 15 that can be flattened by filling the very shallow recess of the recess 2-1 of the pad electrode portion is applied and formed.

FIG. 2C shows a state in which the photosensitive resin layer 16 is formed in FIG. 2B. According to the uneven shape, unevenness is also formed on the coated photosensitive resin layer 16. A deep recess is formed in the recess 2 of the pad electrode portion, which is a deep recess, and a shallow recess is formed in the recess 3 of the scribe line portion, which is a shallow recess. The recess 2-1 of the pad electrode portion, which is an extremely shallow recess, has a flat surface because the recess is filled with the corrosion prevention layer 15 and flattened.

FIG. 2D shows a state in which the exposed photosensitive resin layer 16 is exposed to the exposure light 6 via the photomask 19. The feature of the second embodiment is that the recess 2-1 of the pad electrode portion, which is an extremely shallow recess, is filled with the corrosion prevention layer 15 and flattened, and then the gray tone mask is used as the photomask 19. .. Further, the light transmittance of the portion corresponding to the concave portion 2 of the pad electrode portion of the photomask 19 and the concave portion 3 of the scribe line portion has a light transmittance capable of flattening the concave portion 2 of the pad electrode portion and the scribe line portion 3. The feature is that it is set. There may be three or more types of recesses having different depths. In that case, the gray tone mask to be used may also be a gray tone mask having appropriate light transmittance for flattening corresponding to each portion corresponding to concave portions having different depths.

The light transmittance of the portion corresponding to the concave portion 2 of the pad electrode portion and the concave portion 3 of the scribe line portion of the photomask 19 is set to the light transmittance that can flatten the concave portion 2 of the pad electrode portion and the concave portion 3 of the scribe line portion. As a method of doing so, the thickness of the photosensitive resin layer 16 formed in the recess 2 of the pad electrode portion and the recess 3 of the scribe line portion is grasped in advance. Then, by experimentally grasping the relationship between the exposure intensity to the photosensitive resin layer 16 having a thickness and the thickness of the photosensitive resin layer 16 remaining after development, the exposure intensity capable of flattening is determined. do. A gray tone mask having a light transmittance that realizes the exposure intensity is produced, and the gray tone mask is used as the photomask 19.

In FIG. 2 (e), after the photosensitive resin layer 16 exposed in FIG. 2 (d) is developed, the photosensitive resin 16 remains in the recess 2 of the pad electrode portion and the recess 3 of the scribe line portion, and is flattened. Shows the realized state. Since the corrosion prevention layer 15 is formed in the recess 2-1 of the pad electrode portion, the pad electrode is prevented from being corroded by the developing solution exposed in the developing process when the photosensitive resin layer is formed by the photomask 12. Can be suppressed. Further, the photosensitive resin layer 16 does not remain in the recess 2-1 as in the non-recessed portion. As described above, it was possible to flatten the recesses formed on the surface of the silicon wafer 1 by the pre-process of the semiconductor manufacturing process and having different depths by one photolithography process.

(Corrosion prevention layer)
The corrosion prevention layer 15 is not particularly limited as long as it is a material capable of forming an extremely thin corrosion prevention layer of about 0.1 nm or more and 10 nm or less. For example, various self-assembled monolayers can be used. The self-assembled monolayer can be made by using a silane coupling agent. For example, it can be carried out by surface modification using alkoxysilane, trichlorosilane, dimethylchlorosilane or the like. The recess 2-1 is filled with the corrosion prevention layer 15. In order to ensure flatness, it is preferable that the film thickness of the corrosion prevention layer 15 and the depth of the recess 2-1 are the same.

(Photosensitive resin layer)
The photosensitive resin layers 4 and 16 are not particularly limited. In the description of FIGS. 1 and 2, the case where a negative type photosensitive resin is used has been described as an example, but the description is not limited to this.

(Exposure light)
The exposure light does not need to be particularly limited. The exposure light suitable for the photosensitive resin to be used may be used. For example, g-line (wavelength: 436 nm), i-line (wavelength: 365 nm), KrF excimer laser (wavelength: 248 nm), ArF excimer laser (wavelength: 193 nm) using a high-pressure mercury lamp can be mentioned.

<Solid image sensor>
The solid-state image sensor of the present invention uses the silicon wafer flattening method of the present invention to flatten the uneven shape formed on the surface of the silicon wafer after the pre-process of the semiconductor manufacturing process. , A solid-state image sensor on which a color filter and a microlens are formed.

The surface of the silicon wafer after the completion of the pre-process of the semiconductor manufacturing process for forming the solid-state image sensor has two or more types of recesses having different depths. A step is formed by an extremely shallow recess of at least 0.1 nm or more and 10 nm or less. These recesses are covered with a corrosion protection layer. Further, a step on the order of several μm is formed on the pad electrode portion. Further, a step of about 1 μm is also formed in the scribe line portion.
By using the silicon wafer flattening method of the present invention, these steps can be flattened all at once by one photolithography step. By forming the color filter layer and the microlens layer on the flattened silicon wafer, the solid-state image pickup device of the present invention can be obtained. Therefore, the flattening layer formed between the silicon wafer of the solid-state image pickup device of the present invention and the color filter layer is characterized by being composed of one resin layer.

1, 1-1 ... Silicon wafer (after the pre-process of the semiconductor manufacturing process) 2, 2-1 ... Recessed portion of the pad electrode portion 3 ... Recessed portion of the scribing line portion 4 ... Photosensitive resin layer 5 ... Photomask 6 ... Exposure light 7 ... Photosensitive resin layer A remaining after development
8 ... Photosensitive resin layer 9 ... Photomask 10 ... Photosensitive resin layer B remaining after development
11 ... Semiconductor wafer with flat surface 12 ... Photomask 13 ... Photosensitive resin layer 14 remaining after development ... Semiconductor wafer 15 with flat surface ... Corrosion prevention layer 16 ... Photosensitive resin layer 17 ... Photosensitive resin layer 18 remaining after development ... Semiconductor wafer 19 with a flattened surface ... Photomask

Claims (3)

This is a silicon wafer flattening method that flattens recesses formed on the surface of a silicon wafer by a photolithography process, which are formed on the surface of the silicon wafer by the pre-process of the semiconductor manufacturing process.
The photomask used in the photolithography process is a gray tone mask in which the light transmittance is adjusted so that appropriate exposure can be obtained for the concave portions formed on the surface of the silicon wafer having different depths. ,
A method for flattening a silicon wafer, which comprises flattening recesses having different depths in a single photolithography process. The coating process of applying the corrosion prevention layer to the pad electrode of the silicon wafer, and
The photolithography process is provided in this order.
The method for flattening a silicon wafer according to claim 1, wherein in the coating step, a first recess of 0.1 nm or more and 10 nm or less formed on the surface of the silicon wafer is filled with the corrosion prevention layer. The surface of the silicon wafer on which the photoelectric conversion element is formed has two or more recesses having different depths.
At least one of the recesses is a first recess having a depth of 0.1 nm or more and 10 nm or less.
A solid-state image sensor characterized in that the first recess is covered with a corrosion prevention layer.

Images