JP2021174868A - Manufacturing method of photoelectric conversion element - Google Patents

Abstract

To improve the poor insulation of an insulating layer while suppressing an excessive current from flowing to a poorly insulated portion for a photoelectric conversion element having an insulating layer formed on a conductive substrate.SOLUTION: A manufacturing method of a photoelectric conversion element using a conductive substrate with an insulating layer includes the step of forming a first electrode layer on the insulating layer of the conductive substrate, forming a photoelectric conversion layer on the first electrode layer, forming the second electrode layer on the photoelectric conversion layer, and a first repair step of applying a voltage to the conductive substrate and the first electrode layer to repair an insulation defect of the insulating layer. In the first repair step, a voltage is applied while the insulating layer is heated above room temperature.SELECTED DRAWING: Figure 2

Description

The present invention relates to a method for manufacturing a photoelectric conversion element.

Conventionally, it has been proposed to apply a flexible metal substrate as a substrate for a photoelectric conversion element, which is inexpensive and easy to handle. For example, Patent Document 1 discloses a solar cell in which an insulating layer made of an insulating material is formed on a metal plate, and a back surface electrode, a photovoltaic layer, and a transparent electrode layer are laminated in this order on the insulating layer. In the disclosure of Patent Document 1, the insulating layer has a laminated structure of a first insulating layer and a second insulating layer, and the withstand voltage of the pinhole portion existing in the first insulating layer is improved by forming the second insulating layer. I'm letting you. In Patent Document 1, the withstand voltage between the metal plate and the back surface electrode is 150 V.

Japanese Unexamined Patent Publication No. 2006-295035

In the manufacturing process of a photoelectric conversion element in which an insulating layer is formed on a conductive substrate such as a metal substrate, it is necessary to improve the insulation defect of the insulating layer by a repair process of applying a DC voltage to the insulating layer. There is. When the insulation defect of the insulating layer is improved in the repair process, it is possible to suppress the deterioration of the output characteristics of the photoelectric conversion element due to the insulating layer, and it is possible to improve the yield of the product.

However, in the photoelectric conversion element that has undergone the above repair step, when the insulation resistance of the insulating layer is lower than a predetermined value, a current flows between the conductive substrate and the photoelectric conversion element via the insulating layer, and the photoelectric conversion element May cause overheating, ignition or malfunction. Therefore, if the insulation resistance of the insulating layer is lower than the predetermined value after the repair process, the product is rejected. However, from the viewpoint of improving the product yield, it is possible to improve the insulation defect of the insulating layer as much as possible in the repair process. It is strongly requested.

On the other hand, if an excessive current flows to the poorly insulated portion of the insulating layer in the repair process, the defectively insulated portion may be destroyed and the poorly insulated portion may worsen.

The present invention has been made in view of the above circumstances, and insulates an insulating layer of a photoelectric conversion element having an insulating layer formed on a conductive substrate while suppressing an excessive current from flowing to a poorly insulated portion. Provide a means to improve the defect.

The method for manufacturing a photoelectric conversion element, which is an example of the present invention, is a method for manufacturing a photoelectric conversion element using a conductive substrate having an insulating layer, and a first electrode layer is formed on the insulating layer of the conductive substrate. After the step of forming, the step of forming the photoelectric conversion layer on the first electrode layer, the step of forming the second electrode layer on the photoelectric conversion layer, and the formation of the second electrode layer, the conductivity It includes a first repair step of applying a voltage to the substrate and the first electrode layer to repair the insulation defect of the insulating layer. In the first repair step, a voltage is applied while the insulating layer is heated above room temperature.

According to the method for manufacturing a photoelectric conversion element, which is an example of the present invention, in a photoelectric conversion element having an insulating layer formed on a conductive substrate, the insulation failure of the insulating layer is suppressed while suppressing an excessive current from flowing to a defective insulation portion. Can be improved.

It is a figure which shows the structural example of the photoelectric conversion element in this embodiment. It is a flow chart which shows the manufacturing method of the photoelectric conversion element. It is a figure which shows typically the process of the manufacturing method of FIG. It is a continuation of FIG. It is a figure which shows the connection example at the time of performing a repair process after the 3rd patterning. The results of the repair process of the examples (Tables 1 and 2) are shown. The results of the repair process of the examples (Table 3) are shown. The results of the repair process of the examples (Tables 4 and 5) are shown.

Hereinafter, embodiments will be described with reference to the drawings.
In the embodiment, in order to make the explanation easy to understand, structures or elements other than the main part of the present invention will be described in a simplified or omitted manner. Further, in the drawings, the same elements are designated by the same reference numerals. In the drawings, the thickness, shape, etc. of each layer are schematically shown, and do not indicate the actual thickness, shape, etc.

<Structure of photoelectric conversion element>
FIG. 1 is a cross-sectional view in the thickness direction showing a configuration example of the photoelectric conversion element according to the present embodiment. In the present embodiment, a configuration example of the solar cell submodule 100 will be described as an example of the photoelectric conversion element.

The solar cell submodule 100 shown in FIG. 1 has a so-called integrated structure in which a plurality of photoelectric conversion elements 10-1, 10-2, ... 10-k are arranged in the plane direction of the light receiving surface of the conductive substrate 11. .. However, k is a natural number of 2 or more.
Here, the basic configurations of the photoelectric conversion elements 10-1, 10-2, ... 10-k are common, and the individual photoelectric conversion elements 10-1, 10-2, ... 10-k are distinguished by the following description. When it is not necessary, it is collectively referred to as a photoelectric conversion element 10. In addition, when it is not necessary to distinguish each component of the photoelectric conversion element 10 which will be described later, they are collectively referred to in the same manner.

(Conductive substrate 11)
The conductive substrate 11 is a substrate common to a plurality of photoelectric conversion elements 10, and is formed of, for example, stainless steel (SUS), copper, aluminum, or an alloy thereof. The conductive substrate 11 may be a flexible substrate. The conductive substrate 11 may have a laminated structure in which a plurality of metal substrates are laminated, and for example, a stainless steel foil, a titanium foil, or a molybdenum foil may be formed on the surface of the substrate.

The shape and dimensions of the conductive substrate 11 are appropriately determined according to the size of the solar cell submodule 100 and the like. The overall shape of the conductive substrate 11 in one embodiment is, for example, a rectangular flat plate, but is not limited thereto.
When a metal substrate or a flexible substrate is applied as the conductive substrate 11, the solar cell submodule 100 can be bent, and cracking of the substrate due to bending can be suppressed. Further, in the above case, it becomes easy to reduce the weight and thickness of the solar cell submodule 100 as compared with the glass substrate or the resin substrate.

Further, an insulating layer 21 is formed on the light receiving surface side of the conductive substrate 11. The insulating layer 21 is, for example, a coating film such as a glass frit. As an example of the glass applied to the insulating layer 21, a glass _{containing at least one of silica (SiO 2} ), CaO, B ₂ O ₃ , SrO, BaO, Al ₂ O ₃ , ZnO, ZrO ₂ , and MgO as a component. And low melting point glass.

(Photoelectric conversion element 10)
As described above, the solar cell submodule 100 includes a plurality of photoelectric conversion elements 10-1, 10-2, ... 10-k on the light receiving surface. These photoelectric conversion elements 10-1, 10-2, ... 10-k are connected in series.

The photoelectric conversion element 10 has a substrate structure in which a first electrode layer 12, a photoelectric conversion layer 13, a buffer layer 14, and a second electrode layer 15 are sequentially laminated on a conductive substrate 11. Light such as sunlight enters the photoelectric conversion element 10 from the side opposite to the conductive substrate 11 side (upper side in FIG. 1).

(First electrode layer 12)
The first electrode layer 12 is formed on the insulating layer 21 of the conductive substrate 11. In FIG. 1, a plurality of first electrode layers 12-1, 12-2, ... 12-k, 12- (k + 1) are arranged side by side on the insulating layer 21 of the conductive substrate 111. Since the first electrode layer 12 faces the back surface side (board side) of the photoelectric conversion layer 13 instead of the light receiving surface side, it is also called a back surface electrode.

The first electrode layer 12 is, for example, a metal electrode layer. Although not particularly limited, the thickness of the first electrode layer 12 is, for example, 200 nm to 500 nm.
The first electrode layer 12 is preferably provided with a material that does not easily react with the photoelectric conversion layer 13. For example, the material of the first electrode layer 12 can be selected from molybdenum (Mo), titanium (Ti), chromium (Cr) and the like. The first electrode layer 12 may contain the same material as that contained in the second electrode layer 15 described later.

(Photoelectric conversion layer 13)
The photoelectric conversion layer 13 is formed on the first electrode layer 12. The photoelectric conversion layer 13 has a large bandgap on the light receiving surface side (upper side in FIG. 1) and the conductive substrate 11 side (lower side in FIG. 1), and has a small bandgap on the inner side in the thickness direction of the photoelectric conversion layer 13. It may have a graded structure. Although not particularly limited, the thickness of the photoelectric conversion layer 13 is, for example, 1.0 μm to 3.0 μm.

The photoelectric conversion layer 13 functions as a polycrystalline or microcrystal p-type compound semiconductor layer. The photoelectric conversion layer 13 is a CIS-based photoelectric conversion element using an _{I-III-VI Group 2} compound semiconductor having a calcopylite structure containing a Group I element, a Group III element, and a VI group element (chalcogen element). .. The Group I element can be selected from copper (Cu), silver (Ag), gold (Au) and the like. The group III element can be selected from indium (In), gallium (Ga), aluminum (Al) and the like. Further, the photoelectric conversion layer 13 may contain tellurium (Te) or the like in addition to selenium (Se) and sulfur (S) as a Group VI element. Further, the photoelectric conversion layer 13 may contain an alkali metal such as Li, Na, K, Rb and Cs.

(Buffer layer 14)
The buffer layer 14 is formed on the photoelectric conversion layer 13. Although not particularly limited, the thickness of the buffer layer 14 is, for example, 10 nm to 100 nm.
The buffer layer 14 is, for example, an n-type or i (intrinsic) type high resistance conductive layer. Here, "high resistance" means having a resistance value higher than the resistance value of the second electrode layer 15 described later.

The buffer layer 14 can be selected from compounds containing zinc (Zn), cadmium (Cd), and indium (In). Examples of the zinc-containing compound include ZnO, ZnS, Zn (OH) ₂ , or a mixed crystal of these, Zn (O, S), Zn (O, S, OH), and ZnMgO, ZnSnO, etc. , There is. Examples of the compound containing cadmium include CdS, CdO, or a mixed crystal of these, Cd (O, S) and Cd (O, S, OH). Examples of the compound containing indium include InS, InO, or a mixed crystal of these, In (O, S), In (O, S, OH), and In ₂ O ₃ , In ₂ S ₃ , In. (OH) _x etc. can be used. Further, the buffer layer 14 may have a laminated structure of these compounds.

The buffer layer 14 has the effect of improving characteristics such as photoelectric conversion efficiency, but it is also possible to omit this. When the buffer layer 14 is omitted, the second electrode layer 15 is formed on the photoelectric conversion layer 13.

(Second electrode layer 15)
The second electrode layer 15 is formed on the buffer layer 14. The second electrode layer 15 is, for example, an n-type conductive layer. Although not particularly limited, the thickness of the second electrode layer 15 is, for example, 0.5 μm to 2.5 μm.
The second electrode layer 15 preferably includes, for example, a material having a wide bandgap and a sufficiently low resistance value. Further, since the second electrode layer 15 serves as a path for light such as sunlight, it is preferable that the second electrode layer 15 has a property of transmitting light having a wavelength that can be absorbed by the photoelectric conversion layer 13. In this sense, the second electrode layer 15 is also referred to as a transparent electrode layer or a window layer.

The second electrode layer 15 includes, for example, a metal oxide to which a Group III element (B, Al, Ga, or In) has been added as a dopant. Examples of the metal oxide include ZnO or SnO ₂ . The second electrode layer 15 is, for example, ITO (indium tin oxide), ITOO (indium tin oxide), IZO (zinc oxide), ZTO (zinc oxide), FTO (fluorine-doped tin oxide), GZO (gallium-doped). It can be selected from zinc oxide) and the like.

In the photoelectric conversion elements 10-1, 10-2, ... 10-k, the second electrode layer 15 becomes one of the first electrode layers 12-2, 12-3, ... 12- (k + 1). Be connected. For example, the second electrode layer 15 of the photoelectric conversion element 10-1 is connected to the first electrode layer 12-2 of the photoelectric conversion element 10-2 located next to the second electrode layer 15. Similarly, the second electrode layer 15 of the remaining photoelectric conversion elements 10-2, ... 10-k is also connected to the first electrode layer 12 of the photoelectric conversion element 10 located adjacent to the second electrode layer 15. As a result, the plurality of photoelectric conversion elements 10-1, 10-2, ... 10-k are connected in series.

(Positive electrode 18, negative electrode 19)
The positive electrode 18 of the solar cell submodule 100 is connected to the first electrode layer 12-1. On the other hand, the negative electrode 19 of the solar cell submodule 100 is connected to the first electrode layer 12- (k + 1) connected to the second electrode layer 15 of the photoelectric conversion element 10-k. That is, each photoelectric conversion element 10 is configured so that a current flows from the first electrode layer 12 to the second electrode layer 15.

Here, the first electrode layer 12 of the solar cell submodule 100 is formed with an edge cutting groove 22 that divides the first electrode layer 12 into an outer peripheral side and an inner peripheral side along the peripheral edge of the solar cell submodule 100. ing. The edge cutting groove 22 is a side surface of the solar cell submodule 100, and even when the first electrode layer 12 straddles the insulating layer 21 and conducts with the conductive substrate 11, each photoelectric conversion element 10 and the conductive substrate 11 are connected. It is formed to suppress conduction. For example, in FIG. 1, edge cutting grooves 22 extending in the vertical direction of the paper surface are shown on the right side and the left side of the solar cell submodule 100, respectively.

The first electrode layer 12-1 is divided and insulated from the first electrode layer 12 at the left end in the drawing by the edge cutting groove 22 shown on the left side of FIG. Similarly, the first electrode layer 12- (k + 1) is divided and insulated from the first electrode layer 12 at the right end in the drawing by the edge cutting groove 22 shown on the right side of FIG. Although not shown in FIG. 1, edge cutting grooves 22 extending in the left-right direction are also formed on the peripheral edges of the solar cell submodule 100 on the front side and the back side of the paper surface, respectively.

According to the above solar cell submodule 100, when a plurality of photoelectric conversion elements 10-1, 10-2, ... 10-k are used as one unit, a plurality of units are arranged in parallel between the positive electrode 18 and the negative electrode 19. You can connect. Moreover, these plurality of units can be formed on one conductive substrate 11. For example, in a solar cell panel using such a solar cell submodule 100, even if it is partially shaded, the decrease in power generation amount is limited. Therefore, a solar cell panel capable of stably generating power is realized.

Here, the relationship between the positive electrode 18 and the negative electrode 19 in the solar cell submodule 100 differs depending on the configuration of the photoelectric conversion layer 13. For example, in the case of the CIS-based compound semiconductor in which the photoelectric conversion layer 13 is p-type as in the present embodiment, the positive electrode 18 and the negative electrode 19 are as shown in FIG. On the other hand, for example, in the case of a thin film Si-based photoelectric conversion element, since the Si-based layer is a p-in junction, if the first electrode layer side is an n-type Si-based layer, the positive electrode 18 and the negative electrode 19 The relationship is the opposite of that in FIG.

<Manufacturing method of photoelectric conversion element>
Next, an example of a method for manufacturing the solar cell submodule 100 will be described. FIG. 2 is a flow chart showing a manufacturing method of the solar cell submodule 100. Further, FIGS. 3 and 4 are diagrams schematically showing each step of the manufacturing method.

(S1: Formation of insulating layer 21)
_{In S1, as shown in FIG. 3A, a thin film such as silica (SiO 2} ) is formed on the surface of a conductive substrate 11 such as a metal substrate to form an insulating layer 21. As a method for forming the insulating layer 21, a known method such as a sol-gel method can be applied.

(S2: Formation of the first electrode layer 12)
In S2, as shown by the broken line in FIG. 3A, a thin film such as molybdenum (Mo) is formed on the conductive substrate 11 on which the insulating layer 21 is formed by, for example, a sputtering method, and the first electrode is formed. Layer 12 is formed. The sputtering method may be a direct current (DC) sputtering method or a radio frequency (RF) sputtering method. Further, instead of the sputtering method, the first electrode layer 12 may be formed by using a CVD (chemical vapor deposition) method, an ALD (atomic layer deposition) method, or the like.

(S3: First patterning)
In S3, as shown in FIG. 3B, for example, the first electrode layer 12 is divided into a plurality of regions in the plane direction of the light receiving surface by laser scribe. As a result, the first electrode layers 12-1, 12-2, ... 12-k, 12- (k + 1) are formed on the insulating layer 21 of the conductive substrate 11, respectively. In FIG. 3B, the region deleted in S3 is indicated by a broken line.

Further, at the time of patterning S3, an edge cutting groove 22 is formed in the first electrode layer 12 along the peripheral edge of the conductive substrate 11. As a result, the first electrode layer 12 (for example, the first electrode layer 12-1) located on the inner peripheral side of the conductive substrate 11 is separated from the first electrode layer 12 on the outer peripheral side by the edge cutting groove 22. Is insulated.

(S4: First insulation inspection)
In S4, it is inspected by a mega tester or the like whether the adjacent divided first electrode layers 12 (for example, the first electrode layers 12-1, 12-2, etc.) are insulated from each other. Further, the insulation between the first electrode layer 12 on the outer peripheral portion of the conductive substrate 11 and the first electrode layer 12 (for example, the first electrode layer 12-1) separated by the edge cutting groove 22 is provided by a mega tester or the like. Inspect with.

(S5: Formation of photoelectric conversion layer)
In S5, as shown in FIG. 3C, the photoelectric conversion layer 13 is formed on the first electrode layer 12 after patterning. The photoelectric conversion layer 13 is formed by forming a thin-film precursor layer and then chalcogenizing the precursor layer.

Examples of the method for forming the precursor layer on the first electrode layer 12 include the above-mentioned sputtering method, thin-film deposition method, and ink coating method. The thin-film deposition method is a method in which a vapor deposition source is heated to form a film using atoms or the like that have become a gas phase. The ink coating method is a method in which a powdered material of a precursor film is dispersed in a solvent such as an organic solvent and applied onto the first electrode layer 12, and then the solvent is evaporated to form a precursor layer. ..

The precursor layer contains Group I elements and Group III elements. For example, the precursor layer may contain Ag as a Group I element. Group I elements other than Ag to be included in the precursor layer can be selected from copper, gold and the like. The group III element included in the precursor layer can be selected from indium, gallium, aluminum and the like. Further, the precursor layer may contain an alkali metal such as Li, Na, K, Rb and Cs. Further, the precursor layer may contain tellurium as a Group VI element in addition to selenium and sulfur.

Further, the precursor layer may have a plurality of regions having different compositions in the thickness direction (vertical direction in the figure) by laminating the films formed by the sputtering method or the vapor deposition method described above. As the structure of the precursor layer, for example, a laminated film of Cu—Ga and In can be formed in order from the conductive substrate 11 side. Further, by laminating the films as described above, it is also possible to control the concentration distribution of a predetermined element in the thickness direction of the photoelectric conversion layer 13.

In the chalcogenization treatment of the precursor layer, the precursor layer is heat-treated in an atmosphere containing Group VI elements to be chalcogenized to form the photoelectric conversion layer 13.
For example, first, seleniumization is performed by the vapor phase seleniumization method. Selenium formation is carried out by heating the precursor layer in an atmosphere of a selenium source gas containing selenium as a group VI element source (for example, hydrogen selenide or selenium vapor).

As a result, the precursor layer is converted into a compound containing a group I element, a group III element, and selenium (photoelectric conversion layer 13). The compound containing the Group I element, the Group III element, and selenium (photoelectric conversion layer 13) may be formed by a method other than the vapor phase selenium method. For example, such a compound can also be formed by a solid phase selenium method, a vapor deposition method, an ink coating method, an electrodeposition method, or the like.

Next, the photoelectric conversion layer 13 containing the Group I element, the Group III element, and selenium is sulfurized. Sulfurization is performed by heating the photoelectric conversion layer 13 in an atmosphere of a sulfur source gas having sulfur (for example, hydrogen sulfide or sulfur vapor). As a result, the photoelectric conversion layer 13 is converted into a compound containing a Group I element, a Group III element, and selenium and sulfur as Group VI elements. The sulfur source gas plays a role of substituting sulfur for a crystal composed of a group I element, a group III element, and selenium, for example, selenium in a chalcopyrite crystal, on the surface portion of the photoelectric conversion layer 13.

(S6: Formation of buffer layer)
In S6, as shown by a broken line in FIG. 3C, a thin film such as Zn (O, S) is placed on the photoelectric conversion layer 13 by a method such as a CBD (chemical bath deposition) method or a sputtering method. The film is formed to form the buffer layer 14. The formation of the buffer layer 14 may be omitted.

(S7: Second patterning)
In S7, as shown in FIG. 3D, the laminated film of the photoelectric conversion layer 13 and the buffer layer 14 is divided into a plurality of regions in the plane direction of the light receiving surface by mechanical patterning. As a result, the photoelectric conversion layer 13 and the buffer layer 14 are patterned into a shape corresponding to each photoelectric conversion element 10. Further, in the region deleted by patterning, the first electrode layer 12 is partially exposed. In FIG. 3D, the region deleted in S7 is shown by a broken line.

(S8: Formation of second electrode layer)
In S8, as shown in FIG. 4A, a second electrode layer 12 was placed on the buffer layer 14 and the first electrode layer 12 exposed by the second patterning by a method such as a sputtering method, a CVD method, or an ALD method. The electrode layer 15 of the above is formed. The second electrode layer 15 is, for example, a transparent electrode made of a thin film such as ZnO to which B, Al or In is added as a dopant.

(S9: Formation of wiring laying part)
In S9, the photoelectric conversion layer 13, the buffer layer 14, and the second electrode layer 15 are partially removed from the peripheral portion of the conductive substrate 11 by, for example, mechanical patterning, to form the wiring laying portion 23. As an example, in FIG. 4B, the photoelectric conversion layer 13, the buffer layer 14, and the second electrode layer 15 are deleted in the leftmost region in the figure including the formed portion of the edge cutting groove 22, and the inner circumference of the edge cutting groove 22 is removed. An example is shown in which the wiring laying portion 23 on the positive electrode side where the first electrode layer 12-1 is exposed is formed on the side. In FIG. 4B, the area deleted in S9 is shown by a broken line. Also in the rightmost region of the conductive substrate 11 in the drawing, a wiring laying portion 23 on the negative electrode side where the first electrode layer 12- (k + 1) is exposed is formed on the inner peripheral side of the edge cutting groove 22 as described above. (See Fig. 1).

(S10: Repair A)
In S10, a repair step of applying a voltage (or injecting a current) between the conductive substrate 11 and the first electrode layer 12 in order to repair the initial insulation defect of the insulating layer 21 (hereinafter, also referred to as repair A). ) Is performed. Specifically, as shown in FIG. 4B, the conductive substrate 11 is connected to the positive electrode of the DC power supply, and the first electrode layer 12-1 and the second electrode layer 15 are connected to the negative electrode of the DC power supply, respectively. Be connected. Since the second electrode layer 15 is connected to the first electrode layers 12-2 to 12- (k + 1), the first electrode layers 12-1 to 12- (k + 1) are connected to the negative electrode of the DC power supply. Will be. Further, as another method of connecting the DC power supply to the negative electrode, the first electrode layer 12-1 and the first electrode layer 12- (k + 1) may be connected to the negative electrode of the DC power supply, respectively. Then, in the repair A, the voltage is boosted to a predetermined voltage by the constant current control of the DC power supply. The repair A is an example of the second repair step, and the details thereof will be described later.

(S11: Repair B)
In S11, after the repair A of S10, in order to repair the initial insulation defect of the insulating layer 21, between the conductive substrate 11 and the first electrode layer 12 in a state where the conductive substrate 11 is heated above room temperature. A repair step (hereinafter, also referred to as repair B) is performed in which a voltage is applied (or a current is injected) to the circuit board. The connection state of repair B is the same as that of repair A. The repair B is an example of the first repair step, and the details thereof will be described later.

(S12: Third patterning)
In S12, as shown in FIG. 4C, the second electrode layer 15 is divided into a plurality of regions in the plane direction of the light receiving surface by mechanical patterning. In S12, the second electrode layer 15 is partially deleted from the portion where the photoelectric conversion layer 13 and the buffer layer 14 are deleted in S7. In FIG. 4C, the region deleted in S12 is shown by a broken line. As a result, a plurality of photoelectric conversion elements 10-1, 10-2, ... 10-k are formed, respectively.

(S13: Wiring laying)
In S13, wiring such as a conductive and flexible strip-shaped metal plate (ribbon wire) or a conductive tape is laid on the wiring laying portions 23 on the positive electrode side and the negative electrode side. The above wiring functions as a power line for deriving the electric power generated by the solar cell submodule 100 to an external load, and is connected to an external conducting wire (not shown) connected to the external load.

(S14: Second insulation inspection)
In S14, the insulation resistance between the negative electrode 19 and the conductive substrate 11 in the solar cell submodule 100 in which the wiring is laid in S13 is measured with a mega tester, and it is inspected whether the solar cell submodule 100 satisfies a predetermined quality. Will be done.
Through the above steps, the solar cell submodule 100 is manufactured.

<Repair A, Repair B>
Hereinafter, each step of repair A and repair B, in which the contents of repair A and repair B will be described in detail, increases the insulation resistance of the defective insulation portion by energizing the defective insulation portion of the insulating layer 21 and burning it off. It is done for the purpose of improving the insulation of the place. In particular, it is considered that the repair B step improves the insulation of the remaining poorly insulated parts where the insulation improvement was insufficient in the repair A step.
The poorly insulated portion of the insulating layer 21 is formed at the time of forming the insulating layer 21 (step from coating the glass layer to firing) and at the subsequent forming stage of the photoelectric conversion element (particularly, the formation of the photoelectric conversion layer 13 by chalcogenization which heat-treats at a high temperature). It occurred at the time).

First, the connection with the DC power supply in repair A and repair B will be described.
In the connection of the DC power supply in Repair A and Repair B, as described above, the conductive substrate 11 is connected to the positive electrode of the DC power supply, and the first electrode layer 12-1 and the second electrode layer 15 are DC power supplies, respectively. Connected to the negative electrode. Since the second electrode layer 15 is connected to the first electrode layers 12-2 to 12- (k + 1), the first electrode layers 12-1 to 12- (k + 1) are connected to the negative electrode of the DC power supply. Will be. Further, as another method of connecting the DC power supply to the negative electrode, the first electrode layer 12-1 and the first electrode layer 12- (k + 1) may be connected to the negative electrode of the DC power supply, respectively. At this time, it may be connected to the negative electrode of the DC power supply via the temporary wiring tape installed in the wiring laying portion 23 on the negative electrode side. Further, when the conductive substrate 11 and the first electrode layer 12 are electrically conductive on the side surface of the substrate, the first electrode layer 12 (the region outside the edge cutting groove 22) on the peripheral edge of the conductive substrate 11 is formed. May be connected to the positive electrode of the DC power supply.
According to the above connection, the direction of voltage application or current injection is the forward bias direction of the photoelectric conversion element 10. Therefore, the reverse bias is not applied to the photoelectric conversion element 10, and the possibility of deteriorating the photoelectric conversion element 10 during the repair process can be reduced.

Further, when the repair A and repair B steps are performed before the third patterning (S12) for dividing the second electrode layer 15 is performed, the second electrode layer 15 is the same on the entire surface of the conductive substrate 11. It becomes an electric potential. In this case, since the plurality of divided first electrode layers 12-2 to 12- (k + 1) are all in contact with the second electrode layer 15, these electrodes also have the same potential. Therefore, if the first electrode layer 12-1 and the second electrode layer 15 are connected to the negative electrode of the DC power supply, between the plurality of first electrode layers 12-1 to 12- (k + 1) and the conductive substrate 11. Therefore, uniform voltage application and current injection are possible. In the above case, in each of the repair A and repair steps, it is possible to uniformly improve the insulation of the poorly insulated portion on the entire surface of the insulating layer 21 located on the inner peripheral side of the edge cutting groove 22.

On the other hand, when each step of repair A and repair B is performed after the third patterning (S12) for dividing the second electrode layer 15, it is preferable to perform as follows.
When the second electrode layer 15 is divided by the third patterning, the potentials of the first electrode layers 12-2 to 12- (k + 1) are different from each other due to the electromotive force of each photoelectric conversion element 10. Further, since each photoelectric conversion element 10 is connected in series, the potential difference of the first electrode layer 12 can become very large between the photoelectric conversion elements 10 at both ends of the series connection. For these reasons, when the repair step is performed after the third patterning, the negative electrode of the solar cell submodule 100 (the first electrode layer 12 to which the second electrode layer 15 is connected) is connected to the negative electrode of the DC power supply. Even if the conductive substrate 11 is connected to the positive electrode of the DC power supply, it is difficult to uniformly apply a voltage or inject a current between the first electrode layer 12 and the conductive substrate 11. Moreover, in the above connection, the reverse bias is applied to each of the peripheral photoelectric conversion elements 10 at the moment when the poorly insulated portion is energized, and the photoelectric conversion element 10 may be deteriorated.

Therefore, when the repair step is performed after the third patterning, as shown in FIG. 5, the second electrode layer 15 divided into a plurality of pieces in the plane direction of the light receiving surface is covered with a conductive sheet 24 such as aluminum foil for electricity. It is preferable to bring them into contact with each other. The conductive sheet 24 is an example of a flat conductive member. Then, since the divided second electrode layers 15 have the same potential, the same repair effect as in the case of FIG. 4B can be obtained. Further, according to the connection of FIG. 5, the deterioration of the photoelectric conversion element 10 (in other words, the solar cell submodule 100) due to the reverse bias being applied to the photoelectric conversion element 10 at the moment when the poorly insulated portion is energized. Output reduction) is also suppressed.

Next, examples of processing conditions in repair A and repair B will be described.
In the repair A step, in order to improve the insulation of the poorly insulated portion of the insulating layer 21, it is necessary to pass a large current through the poorly insulated portion. Therefore, in the repair A step, in the current control, the current limit value that defines the magnitude of the injected current is set to a relatively large value. Then, in the repair A step, the voltage is boosted to a predetermined voltage while gradually improving the insulation defect at the insulation defective portion.

As an example, in the repair A process, the current value to be increased per second by constant current control is fixed, and the current limit value is set to 600 mA. Then, the voltage applied between the conductive substrate 11 and the first electrode layer 12 is boosted from 0V to 140V. The upper limit voltage for boosting in repair A may be appropriately adjusted according to the film thickness of the insulating layer 21 and the number of photoelectric conversion elements 10 connected in series.

On the other hand, in the repair B process, it is considered that the insulation defect of the insulating layer 21 is improved to some extent by the repair A process, and the insulation of the remaining insulation defective portions is improved. In the repair B process, when improving the insulation of the remaining poorly insulated parts that could not be completely improved by repair A, an excessive current flows through the poorly insulated parts, destroying the poorly insulated parts, and conversely worsening the poorly insulated parts. It is necessary to suppress that.
Therefore, in the repair B process, in order to improve the insulation of the remaining poorly insulated parts that could not be completely improved in the repair A process, the voltage is boosted to a higher voltage than the repair A process by constant voltage control. Further, in the repair B step, the conductive substrate is heated to raise the temperature of the insulating layer to lower the resistance value of the insulating layer, and the repair step is performed with a smaller current amount than the repair A.

As an example, in the repair B step, the temperature of the conductive substrate 11 is raised from room temperature to 130 ° C., and the resistance value of the insulating layer 21 is lowered as compared with the repair A step. At this time, if the conductive substrate 11 is heated too much, the output characteristics of the photoelectric conversion element 10 may deteriorate. Therefore, the heating temperature in the repair B is preferably 130 ° C. or lower.
Then, in the repair B process, the above current limit value is set to 3 mA, which is lower than the repair A, and 500 V, which is higher than the repair A by constant voltage control, between the conductive substrate 11 and the first electrode layer 12. Apply the voltage of.

In the above repair B process, a voltage higher than that of repair A is applied by constant voltage control to energize the poorly insulated part that could not be improved by repair A, and the insulation resistance of the poorly insulated part increases. Insulation improves.
On the other hand, in the above-mentioned repair B step, the resistance value of the insulating layer 21 is lowered by heating the conductive substrate 11 to facilitate energization in a portion other than the poorly insulated portion, and an excessive current flows to the poorly insulated portion. Suppress that. Further, by making the current limit value at the time of repair smaller than that of repair A, the amount of current flowing through the poorly insulated portion is also smaller than that of repair A. Therefore, in the repair B process, it is difficult for an excessive current to flow to the poorly insulated portion, and the possibility that the poorly insulated portion is destroyed during the repair and the poorly insulated portion is deteriorated is suppressed.

<Evaluation test>
Next, an evaluation test of the solar cell module including the solar cell submodule 100 after the repair step will be described.
The solar cell module is manufactured by sealing the solar cell sub-module 100 with a light receiving surface side protective body and a non-light receiving surface side protective body via a sealing material. In the evaluation of this solar cell module, a DH (dump heat) test (voltage application DH test) is performed in a state where a voltage is applied between the conductive substrate 11 and the first electrode layer 12, and after the test. The output characteristics of the solar cell module and the resistance value of the insulating layer 21 are evaluation items.

In the solar cell module (evaluation module) used for the evaluation test, a wiring for applying a voltage is laid on the conductive substrate 11 between the conductive substrate 11 and the first electrode layer 12, and the wiring is laid on the conductive substrate 11. It is taken out to the outside of. Then, in the evaluation test, the negative electrode and the positive electrode of the solar cell module are short-circuited and connected to the positive electrode (or negative electrode) of the DC power supply, and the wiring connected to the conductive substrate 11 is connected to the negative electrode (or positive electrode) of the DC power supply. Then, a voltage is applied or a current is injected.

In the evaluation test, a voltage higher than the open circuit voltage of the solar cell module is applied between the conductive substrate 11 and the first electrode layer 12. As a result, the voltage application between the conductive substrate 11 and the first electrode layer 12 can be made higher or the current injection can be made larger than when the solar cell module is used in the actual environment, and the evaluation can be accelerated. can.

In the evaluation test, the resistance value of the insulating layer 21 can be calculated based on Ohm's law by applying a voltage with a mega tester and measuring the current value and the voltage value with a digital multimeter, respectively. In the evaluation test, a solar cell module whose calculated resistance value is larger than a specified value (for example, 1.6 MΩ) is evaluated as passing.
If the resistance value of the insulating layer is lower than the specified value even if the output characteristics after the DH test meet the acceptance criteria (the output after 1000 hours is 90% or more of the initial output), the solar cell is passed through the insulating layer. A current flows between the and the conductive substrate, which may cause heat generation, ignition, failure, etc. of the solar cell.

<Example>
Hereinafter, examples of the present invention will be described with reference to Tables 1 to 5.

FIG. 6A shows the results of calculating the resistance value of the insulating layer after the voltage application test with the evaluation module for the solar cell module manufactured through the repair process and confirming the effect of each repair process (Table 1). ) Is shown.
Here, in all of the evaluation modules used in the voltage application test, the resistance value of the insulating layer satisfies the acceptance condition before the voltage application test. Then, after a predetermined time has elapsed from the start of the voltage application test, a voltage is applied between the conductive substrate of the evaluation module and the first electrode layer to calculate the resistance value, and the resistance value is rejected. The ratio (defective rate) is calculated.

In Table 1, the case of the evaluation module subjected to the repair A performed at room temperature (Comparative Example 1) and the case of the evaluation module subjected to the repair B performed by heating the conductive substrate (Examples 1 to 3). The defective rate of each is shown.

In Comparative Example 1 in which repair A was performed, when the resistance value of the insulating layer was determined after 1 minute of the voltage application test, the resistance value was evaluated as defective in 2 out of 6 evaluation modules, and the defect rate was high. Was 33.3%. On the other hand, in Example 1 in which the conductive substrate was heated to 85 ° C. and repaired B was performed, the resistance value of the insulating layer was determined after 1 minute of the voltage application test, and the resistance value was evaluated as defective. There was no module. Therefore, in Example 1, the defective rate of the resistance value of the insulating layer is lower than that in Comparative Example 1. Further, in Examples 2 and 3 in which the conductive substrate was heated to 130 ° C. and repair B was performed, the resistance value of the insulating layer was obtained after applying the voltage for a long time (24 hours, 5 hours) in the voltage application test. However, it can be seen that there is no evaluation module whose resistance value is evaluated as defective, and the defective rate can be reduced over a long period of time.

Although not shown in Table 1, when a voltage exceeding 500 V is applied between the conductive substrate and the first electrode layer in the repair process, the current is applied at a place (edge cutting portion) other than the insulating layer. There was a place where the current flowed. Therefore, the repair step of applying a voltage exceeding 500 V between the conductive substrate and the first electrode layer did not obtain a greater effect than the repair step of applying 500 V.
Further, when the solar cell submodule was heated to 150 ° C. or higher, the output characteristics of the solar cell module deteriorated. Therefore, if the conductive substrate is heated to 150 ° C. or higher for repair, it causes a decrease in the output characteristics of the solar cell module.

FIG. 6B shows the effect of each repair step by calculating the resistance value of the insulating layer after the voltage application DH test was performed on the evaluation module for about 1000 hours for the solar cell module manufactured through the repair step. The result of confirming (Table 2) is shown.
In the example of Table 2, in Comparative Example 2, only the repair A step is performed. On the other hand, in Examples 4 to 6, the repair A step is performed under the same conditions as in Comparative Example 2, and then the repair B step is performed. In Repair B of Examples 4 to 6, the heating temperature of the conductive substrate is 130 ° C., and the applied voltage at the time of repair is 500 V in common, but the current limit values (3 mA, 5 mA, 10 mA) at the time of repair are different from each other. ing. In each of the evaluation modules used in Comparative Example 2 and Examples 4 to 6, the resistance value of the insulating layer before the voltage application DH test satisfied the acceptance condition.

In Table 2, in Comparative Example 2, when the resistance value of the insulating layer was determined after 1000 hours of the voltage application DH test, the resistance value was evaluated as defective in all the evaluation modules. On the other hand, in Examples 4 to 6, when the resistance value of the insulating layer was determined after 1053 hours of the voltage application DH test, the resistance values of all the evaluation modules satisfied the acceptance criteria.

FIG. 7 shows the output characteristics (Table 3) of the solar cell module of the embodiment when the repair step is performed after the third patterning. Further, FIG. 8A shows the output characteristics (Table 4) of the solar cell module of the comparative example when the repair step is performed after the third patterning.
In Tables 3 and 4, Pmax is the maximum output, Voc is the open circuit voltage, and Isc is the short-circuit current. Further, FF is a curve factor, Rs is a series resistance, and Rsh is a parallel resistance.

In Examples 7 to 14 shown in Table 3, when the steps of repair A and repair B are performed, the second electrode layer divided into a plurality of parts is covered with a conductive sheet (specifically, aluminum foil) and electrically. And each second electrode layer has the same potential. On the other hand, in Comparative Examples 3 to 10 shown in Table 4, the repair A and repair B steps are performed in a state where the second electrode layer is still divided without using the conductive sheet. In each of Examples 7 to 14 (Table 3) and Comparative Examples 3 to 10 (Table 4), the heating temperature (130 ° C.) of the conductive substrate and the current at the time of repair among the conditions of repair A and repair B The limit value (10 mA) of is common, and the applied voltage in repair B is different between 140 V and 500 V. Further, the values of the output characteristics in Tables 3 and 4 are standardized based on the output characteristics obtained when the applied voltage in the repair B is 140V.

In the case of Examples 7 to 14 shown in Table 3, the higher the applied voltage in the repair B, the higher the value of Pmax. Therefore, it can be seen that the initial output characteristics can be improved by increasing the applied voltage when repairing is performed with the second electrode layer divided into a plurality of parts having the same potential. Even when the repair step is performed using the second electrode layer integrated before the third patterning, the initial output characteristics can be improved by increasing the applied voltage in the same manner as described above.
On the other hand, in the case of Comparative Examples 3 to 10 shown in Table 4, the initial output characteristics such as Pmax were lowered by increasing the applied voltage in the repair B. In the comparative example, a potential difference is generated between the divided second electrode layers, so that the voltage cannot be uniformly applied to the insulating layer, and a reverse bias is applied to some unit photoelectric conversion elements. It is considered that the photoelectric conversion element has deteriorated.

FIG. 8B shows the resistance value of the insulating layer of the solar cell module manufactured through the repair step after the third patterning after performing the voltage application DH test for about 1000 hours with the evaluation module. The result of confirming the effect of the repair process (Table 5) is shown.
In Examples 15 and 16 shown in Table 5, when the steps of repair A and repair B are performed, the second electrode layer divided into a plurality of parts is covered with a conductive sheet (specifically, aluminum foil) and electrically. And each second electrode layer has the same potential. In each of the evaluation modules used in Examples 15 and 16, the resistance value of the insulating layer before the voltage application DH test satisfies the condition of passing.
In Examples 15 and 16, when the resistance value of the insulating layer was determined after 1032 hours or 1154 hours of the voltage application DH test, the resistance values of all the evaluation modules satisfied the acceptance criteria.

<Supplementary matters of the embodiment>
In the above embodiment, the configuration of the solar cell module having an integrated structure has been described, but the solar cell module may have a single cell structure composed of one photoelectric conversion element. In the case of the single cell structure, the patterning steps (S3, S7, S12) and the first insulation inspection step (S4) described with reference to FIG. 2 are not required. Further, in the case of a single cell structure, it is sufficient to connect the wiring to one electrode (for example, the negative electrode) to the surface of the second electrode layer.

Further, the present invention is not limited to a solar cell, and a photoelectric conversion element (light receiving element, light emitting element, etc.) in which an insulating layer is laminated on a conductive substrate and an electrode layer and a photoelectric conversion layer are formed on the insulating layer. ) Can be widely applied to the production.

Although the embodiments of the present invention have been described above, the embodiments are presented as an example and are not intended to limit the scope of the present invention. The embodiment can be implemented in various forms other than the above, and various omissions, substitutions, changes, etc. can be made without departing from the gist of the present invention. The embodiments and variations thereof are included in the scope and gist of the present invention, and the inventions described in the claims and their equivalents are also included in the scope and gist of the present invention.

10 Photoelectric conversion element 11 Conductive substrate 12 First electrode layer 13 Photoelectric conversion layer 14 Buffer layer 15 Second electrode layer 18 Positive electrode 19 Negative electrode 21 Insulation layer 22 Edge cutting groove 23 Wiring laying part 24 Conductive sheet 100 Solar cell submodule

Claims (7)

A method for manufacturing a photoelectric conversion element using a conductive substrate having an insulating layer.
A step of forming a first electrode layer on the insulating layer of the conductive substrate, and
A step of forming a photoelectric conversion layer on the first electrode layer and
A step of forming a second electrode layer on the photoelectric conversion layer and
After the formation of the second electrode layer, a first repair step of applying a voltage to the conductive substrate and the first electrode layer to repair the insulation defect of the insulating layer is included.
In the first repair step, a method for manufacturing a photoelectric conversion element in which a voltage is applied while the insulating layer is heated above room temperature. Prior to the first repair step, a voltage is applied to the conductive substrate and the first electrode layer in a state where the temperature of the insulating layer is lower than that of the first repair step to repair the insulation defect of the insulating layer. Including the second repair step to be performed
The voltage applied in the first repair step is larger than the voltage applied in the second repair step.
The method for manufacturing a photoelectric conversion element according to claim 1, wherein the current limit value in the first repair step is smaller than the current limit value in the second repair step. A plurality of the photoelectric conversion elements are arranged on the insulating layer in the plane direction of the conductive substrate.
Further including a step of dividing at least the second electrode layer in the plane direction.
The photoelectric conversion according to claim 1 or 2, wherein in the first repair step, a voltage is applied to the plurality of the first electrode layers via the second electrode layer before being divided in the plane direction. Manufacturing method of the element. A plurality of the photoelectric conversion elements are arranged on the insulating layer in the plane direction of the conductive substrate.
Further including a step of dividing at least the second electrode layer in the plane direction.
In the first repair step, a plurality of the second electrode layers after being divided in the plane direction are electrically connected by a planar conductive member, and the conductive member and the second electrode layer are connected. The method for manufacturing a photoelectric conversion element according to claim 1 or 2, wherein a voltage is applied to a plurality of the first electrode layers via the conductor. A plurality of the photoelectric conversion elements are arranged on the insulating layer in the plane direction of the conductive substrate.
The method for manufacturing a photoelectric conversion element according to claim 2, wherein the voltage application in the first repair step and the second repair step is performed in the forward bias direction of the photoelectric conversion element. The method for manufacturing a photoelectric conversion element according to any one of claims 1 to 5, wherein the insulating layer in the first repair step is heated to 85 ° C. to 130 ° C. The method for manufacturing a photoelectric conversion element according to any one of claims 1 to 6, wherein the voltage applied in the first repair step is 140V to 500V.

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