JP2021166323A - Switching circuit and control method for switching circuit - Google Patents

Switching circuit and control method for switching circuit Download PDF

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JP2021166323A
JP2021166323A JP2020068031A JP2020068031A JP2021166323A JP 2021166323 A JP2021166323 A JP 2021166323A JP 2020068031 A JP2020068031 A JP 2020068031A JP 2020068031 A JP2020068031 A JP 2020068031A JP 2021166323 A JP2021166323 A JP 2021166323A
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mechanical switch
switching circuit
potential difference
switch
turned
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孝 中村
Takashi Nakamura
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Fukushima Sic Applied Engineering Inc
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Priority to PCT/JP2021/014428 priority patent/WO2021206033A1/en
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01H—ELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
    • H01H33/00—High-tension or heavy-current switches with arc-extinguishing or arc-preventing means
    • H01H33/02—Details
    • H01H33/59—Circuit arrangements not adapted to a particular application of the switch and not otherwise provided for, e.g. for ensuring operation of the switch at a predetermined point in the ac cycle
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01H—ELECTRIC SWITCHES; RELAYS; SELECTORS; EMERGENCY PROTECTIVE DEVICES
    • H01H9/00—Details of switching devices, not covered by groups H01H1/00 - H01H7/00
    • H01H9/54—Circuit arrangements not adapted to a particular application of the switching device and for which no provision exists elsewhere
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/16—Modifications for eliminating interference voltages or currents
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/687—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices the devices being field-effect transistors

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Electronic Switches (AREA)
  • Driving Mechanisms And Operating Circuits Of Arc-Extinguishing High-Tension Switches (AREA)
  • Keying Circuit Devices (AREA)

Abstract

To provide a switching circuit and a control method for a switching circuit, by which the occurrence of chattering and leak current can be suppressed while the arcing is suppressed.SOLUTION: In a switching circuit 2, a semiconductor switch 10, a serial mechanical switch 11, and a parallel mechanical switch 12 are mounted on a circuit board 13. In a case of operation of turning off the switching circuit 2, the parallel mechanical switch 12 is turned off (step 1). Next, the semiconductor switch 10 is turned off (step 2). Then, the serial mechanical switch 11 is turned off (step 3). By steps 1 to 3, all the switches 10 to 12 in the switching circuit 2 are turned off and the power is turned off.SELECTED DRAWING: Figure 1

Description

本発明は、スイッチング回路及びスイッチング回路の制御方法に関する。 The present invention relates to a switching circuit and a method for controlling the switching circuit.

従来、スイッチングを行うスイッチング回路として、半導体スイッチ素子を有する半導体スイッチを用いたスイッチング回路が知られている（例えば、特許文献１参照）。 Conventionally, as a switching circuit for switching, a switching circuit using a semiconductor switch having a semiconductor switch element is known (see, for example, Patent Document 1).

特許文献１に記載されたスイッチング回路は、複数種の半導体スイッチ素子を並列に設け、これら複数種の半導体スイッチング素子のオン・オフ時に発生するサージやスイッチング損失を低減している。 In the switching circuit described in Patent Document 1, a plurality of types of semiconductor switching elements are provided in parallel, and surges and switching losses generated when the plurality of types of semiconductor switching elements are turned on and off are reduced.

特開２０１８−１９３３３号公報Japanese Unexamined Patent Publication No. 2018-19333

特許文献１に記載のスイッチング回路に用いられる半導体スイッチは、半導体スイッチング素子のオン・オフ時に発生するサージやスイッチング損失を低減しているが、オン時の抵抗が高い、リーク電流が発生するという問題があった。さらに、近年では、スイッチング回路として、チャタリングの発生抑制が求められている。 The semiconductor switch used in the switching circuit described in Patent Document 1 reduces surges and switching losses that occur when the semiconductor switching element is turned on and off, but has problems such as high resistance when turned on and leakage current. was there. Further, in recent years, as a switching circuit, it is required to suppress the occurrence of chattering.

本発明はかかる背景に鑑みてなされたものであり、アーキングの発生を抑制しつつ、チャタリング及びリーク電流の発生を抑制することができるスイッチング回路及びスイッチング回路の制御方法を提供することを目的とする。 The present invention has been made in view of such a background, and an object of the present invention is to provide a switching circuit and a control method of a switching circuit capable of suppressing the occurrence of chattering and leakage current while suppressing the occurrence of arcing. ..

［１］本発明のスイッチング回路は、オン及びオフに動作可能なスイッチング回路であって、半導体スイッチング素子を有する半導体スイッチと、前記半導体スイッチに直列に接続される直列メカスイッチと、前記半導体スイッチと並列に配置されて前記直列メカスイッチに接続される並列メカスイッチと、を備え、前記半導体スイッチ、前記直列メカスイッチ、及び前記並列メカスイッチは、制御部により個別に駆動が制御されることを特徴とする。 [1] The switching circuit of the present invention is a switching circuit that can operate on and off, and includes a semiconductor switch having a semiconductor switching element, a series mechanical switch connected in series with the semiconductor switch, and the semiconductor switch. A parallel mechanical switch arranged in parallel and connected to the series mechanical switch is provided, and the semiconductor switch, the series mechanical switch, and the parallel mechanical switch are individually driven by a control unit. And.

本発明のスイッチング回路によれば、半導体スイッチを用いることで、高速、アーキング発生抑制、長寿命を実現することができる。さらに、電位差が比較的大きく変動するときの切り替えは、半導体スイッチの動作により行わせ、電位差が比較的低く、且つ切り替え操作の前後で電位差が比較的大きく変動しないときの切り替えは、直列メカスイッチ及び並列メカスイッチの動作により行わせるように制御することで、チャタリングの発生を抑制することができる。 According to the switching circuit of the present invention, high speed, suppression of arcing, and long life can be realized by using a semiconductor switch. Further, switching when the potential difference fluctuates relatively large is performed by the operation of the semiconductor switch, and switching when the potential difference is relatively low and the potential difference does not fluctuate relatively large before and after the switching operation is performed by the series mechanical switch and. The occurrence of chattering can be suppressed by controlling the operation of the parallel mechanical switch.

また、スイッチング回路がオンの状態では、半導体スイッチよりも抵抗の低い並列メカスイッチに電流が流れるので、オン時の抵抗を低くすることができる。 Further, when the switching circuit is on, the current flows through the parallel mechanical switch having a resistance lower than that of the semiconductor switch, so that the resistance at the time of turning on can be lowered.

さらに、スイッチング回路がオフの状態では、半導体スイッチに電流が流れることがないので、半導体スイッチでのリーク電流の発生を確実に防止することができる。 Further, since no current flows through the semiconductor switch when the switching circuit is off, it is possible to reliably prevent the occurrence of leakage current in the semiconductor switch.

［２］前記直列メカスイッチは、１つ又は複数設けられ、前記直列メカスイッチは、複数設けられる場合に前記半導体スイッチの上流側及び下流側に配置されることが好ましい。 [2] It is preferable that one or a plurality of the series mechanical switches are provided, and when a plurality of the series mechanical switches are provided, they are arranged on the upstream side and the downstream side of the semiconductor switch.

上記構成によれば、制御パターンを増やすことができ、例えば、スイッチング回路をオンからオフに動作させる場合には、高電位側である半導体スイッチの上流側に配置された直列メカスイッチを先にオフし、スイッチング回路をオフからオンに動作させる場合には、低電位側である下流側に配置された直列メカスイッチを先にオンすることで、動作を安定させることができる。 According to the above configuration, the control pattern can be increased. For example, when the switching circuit is operated from on to off, the series mechanical switch arranged on the upstream side of the semiconductor switch on the high potential side is turned off first. However, when the switching circuit is operated from off to on, the operation can be stabilized by first turning on the series mechanical switch arranged on the downstream side, which is the low potential side.

［３］本発明のスイッチング回路の制御方法は、半導体スイッチング素子を有する半導体スイッチと、前記半導体スイッチに直列に接続される直列メカスイッチと、前記半導体スイッチと並列に配置される並列メカスイッチと、を備えるスイッチング回路の制御方法であって、前記スイッチング回路を動作させる場合、電位差が比較的大きく変動するときの切り替えは、前記半導体スイッチの動作により行わせ、電位差が比較的低く、且つ切り替え操作の前後で電位差が比較的大きく変動しないときの切り替えは、前記直列メカスイッチ及び前記並列メカスイッチの動作により行わせることを特徴とする。 [3] The control method of the switching circuit of the present invention includes a semiconductor switch having a semiconductor switching element, a series mechanical switch connected in series with the semiconductor switch, and a parallel mechanical switch arranged in parallel with the semiconductor switch. When the switching circuit is operated, the switching when the potential difference fluctuates relatively large is performed by the operation of the semiconductor switch, the potential difference is relatively low, and the switching operation is performed. The switching when the potential difference does not fluctuate relatively large in the front-rear direction is performed by the operation of the series mechanical switch and the parallel mechanical switch.

本発明のスイッチング回路の制御方法によれば、半導体スイッチを用いることで、高速、アーキング発生抑制、長寿命を実現することができる。さらに、電位差が比較的大きく変動するときの切り替えは、半導体スイッチの動作により行わせ、電位差が比較的低く、且つ切り替え操作の前後で電位差が比較的大きく変動しないときの切り替えは、直列メカスイッチ及び並列メカスイッチの動作により行わせるように制御するので、チャタリングの発生を抑制することができる。 According to the control method of the switching circuit of the present invention, high speed, suppression of arcing occurrence, and long life can be realized by using a semiconductor switch. Further, switching when the potential difference fluctuates relatively large is performed by the operation of the semiconductor switch, and switching when the potential difference is relatively low and the potential difference does not fluctuate relatively large before and after the switching operation is performed by the series mechanical switch and. Since it is controlled so as to be performed by the operation of the parallel mechanical switch, the occurrence of chattering can be suppressed.

また、上記制御により、スイッチング回路がオンの状態では、半導体スイッチよりも抵抗の低い並列メカスイッチに電流が流れるので、オン時の抵抗を低くすることができる。 Further, by the above control, when the switching circuit is on, a current flows through the parallel mechanical switch having a resistance lower than that of the semiconductor switch, so that the resistance at the time of turning on can be lowered.

さらに、上記制御により、スイッチング回路がオフの状態では、半導体スイッチに電流が流れることがないので、半導体スイッチでのリーク電流の発生を確実に防止することができる。 Further, by the above control, when the switching circuit is off, no current flows through the semiconductor switch, so that it is possible to reliably prevent the occurrence of a leak current in the semiconductor switch.

［４］前記スイッチング回路をオンからオフに動作させる場合、前記並列メカスイッチをオフし、前記並列メカスイッチをオフした後に前記半導体スイッチをオフし、前記半導体スイッチをオフした後に、前記直列メカスイッチをオフし、前記スイッチング回路をオフからオンに動作させる場合、前記直列メカスイッチをオンし、前記直列メカスイッチをオンした後に前記半導体スイッチをオンし、前記半導体スイッチをオンした後に並列メカスイッチをオンすることが好ましい。 [4] When operating the switching circuit from on to off, the parallel mechanical switch is turned off, the parallel mechanical switch is turned off, the semiconductor switch is turned off, the semiconductor switch is turned off, and then the series mechanical switch is turned off. When the switching circuit is operated from off to on, the series mechanical switch is turned on, the series mechanical switch is turned on, the semiconductor switch is turned on, the semiconductor switch is turned on, and then the parallel mechanical switch is turned on. It is preferable to turn it on.

上記構成によれば、確実に、高速、アーキング発生抑制、長寿命を実現しながらも、リーク電流の発生を防止し、電源オン時の抵抗を低くすることができる。 According to the above configuration, it is possible to prevent the generation of leakage current and reduce the resistance at the time of power-on while surely realizing high speed, suppression of arcing occurrence, and long life.

本発明のスイッチング回路の概略を示す回路図。The circuit diagram which shows the outline of the switching circuit of this invention. Ａ〜Ｄは、スイッチング回路をオンからオフに動作させる場合の説明図。A to D are explanatory views when the switching circuit is operated from on to off. Ａ〜Ｄは、スイッチング回路をオフからオンに動作させる場合の説明図。A to D are explanatory views when the switching circuit is operated from off to on. Ａ〜Ｄは、第２実施形態のスイッチング回路をオンからオフに動作させる場合の説明図。A to D are explanatory views in the case where the switching circuit of the second embodiment is operated from on to off. Ａ〜Ｄは、第２実施形態のスイッチング回路をオフからオンに動作させる場合の説明図。A to D are explanatory views in the case where the switching circuit of the second embodiment is operated from off to on. 直列メカスイッチを半導体スイッチの上流側にのみ設けた第３実施形態のスイッチング回路の概略を示す回路図。The circuit diagram which shows the outline of the switching circuit of the 3rd Embodiment in which a series mechanical switch is provided only on the upstream side of a semiconductor switch.

以下、本発明の実施形態について、図面を参照しながら説明する。 Hereinafter, embodiments of the present invention will be described with reference to the drawings.

［第１実施形態］
先ず、本発明を実施したスイッチング回路２の構造の一例について説明する。 [First Embodiment]
First, an example of the structure of the switching circuit 2 in which the present invention is carried out will be described.

スイッチング回路２は、例えば、電力供給部（図示せず）から供給された電力を流す電源オンと、電力を流さない電源オフとに動作（切り換え）可能なものであり、半導体スイッチ１０と、直列メカスイッチ１１と、並列メカスイッチ１２とが回路基板１３に実装されている。スイッチング回路２は、例えば、特願２０１９‐０６１５９８号に記載の高電圧モジュールに用いられる。なお、回路基板１３をスイッチング回路２に含めないようにしてもよい。 The switching circuit 2 can operate (switch) between turning on the power supply that flows the power supplied from the power supply unit (not shown) and turning off the power supply that does not flow the power, and is in series with the semiconductor switch 10. The mechanical switch 11 and the parallel mechanical switch 12 are mounted on the circuit board 13. The switching circuit 2 is used, for example, in the high voltage module described in Japanese Patent Application No. 2019-061598. The circuit board 13 may not be included in the switching circuit 2.

各スイッチ１０〜１２は、ＣＰＵ等から構成される制御部２０により駆動が制御される。なお、制御部２０を、回路基板１３に実装するようにしてもよい。また、制御部２０を、スイッチング回路２に含めるようにしてもよい。 The drive of each of the switches 10 to 12 is controlled by a control unit 20 composed of a CPU or the like. The control unit 20 may be mounted on the circuit board 13. Further, the control unit 20 may be included in the switching circuit 2.

半導体スイッチ１０は、例えば、半導体スイッチング素子であるＭＯＳトランジスタ１０Ａ，１０Ｂを備え、オン／オフ可能なスイッチであり、制御部２０からの指令によりオン／オフする。 The semiconductor switch 10 includes, for example, MOS transistors 10A and 10B, which are semiconductor switching elements, and is a switch that can be turned on / off, and is turned on / off by a command from the control unit 20.

直列メカスイッチ１１は、半導体スイッチ１０に直列に接続され、オン／オフ可能なスイッチであり、制御部２０からの指令によりオン／オフする。 The series mechanical switch 11 is a switch that is connected in series to the semiconductor switch 10 and can be turned on / off, and is turned on / off by a command from the control unit 20.

本実施形態では、直列メカスイッチ１１は、例えば、固定接点および可動接点を備える有接点リレースイッチである。この有接点リレースイッチは、可動接点が固定接点に接触するオン状態（図２（Ａ）参照）では、２つの端子間を接続し、可動接点および固定接点の間を開放するオフ状態（図２（Ａ）参照）では、２つの端子間を開放する。 In the present embodiment, the series mechanical switch 11 is, for example, a contact relay switch including a fixed contact and a movable contact. In the on state (see FIG. 2A) in which the movable contact contacts the fixed contact, this contact relay switch is in the off state in which the two terminals are connected and the movable contact and the fixed contact are opened (FIG. 2). (See (A)), the space between the two terminals is opened.

並列メカスイッチ１２は、半導体スイッチ１０を迂回するように、半導体スイッチ１０に並列に設けられ、直列メカスイッチ１１に接続されている。並列メカスイッチ１２は、例えば、直列メカスイッチ１１と同様のオン／オフ可能な有接点リレースイッチであり、制御部２０からの指令によりオン／オフする。 The parallel mechanical switch 12 is provided in parallel with the semiconductor switch 10 so as to bypass the semiconductor switch 10, and is connected to the series mechanical switch 11. The parallel mechanical switch 12 is, for example, a contact relay switch that can be turned on / off like the series mechanical switch 11, and is turned on / off by a command from the control unit 20.

［電源オンから電源オフ］
次に、スイッチング回路２を電源オンから電源オフに動作させる（切り換える）場合の制御について説明する。 [Power on to power off]
Next, the control when the switching circuit 2 is operated (switched) from the power on to the power off will be described.

図２（Ａ）に示すように、スイッチング回路２が電源オンの状態では、半導体スイッチ１０はオンで電位差が低い状態、直列メカスイッチ１１はオンで電位差が低い状態、並列メカスイッチ１２はオンで電位差が低い状態となっている。なお、本実施形態において、電位差とは、素子の電位差である。また、本実施形態において、電位差が高い又は低い状態とは、例えば、他の状態や基準状態等に比べて（比較的）電位差が高い又は低い状態である。 As shown in FIG. 2A, when the switching circuit 2 is powered on, the semiconductor switch 10 is on and the potential difference is low, the series mechanical switch 11 is on and the potential difference is low, and the parallel mechanical switch 12 is on. The potential difference is low. In this embodiment, the potential difference is the potential difference of the element. Further, in the present embodiment, the state in which the potential difference is high or low is, for example, a state in which the potential difference is (relatively) high or low as compared with other states, reference states, or the like.

スイッチング回路２を電源オンから電源オフに動作させる場合、先ず、図２（Ｂ）に示すように、制御部２０は、スイッチング回路２のオフ動作を行う（ステップ１）。このステップ１では、電位差が低く、且つ、切り替え操作の前後で電位差が大きく変動しない（電位差が低く、且つ、切り替え操作の前後で電位差を大きく変動させない）ようにするため、この場合の切り替えは、並列メカスイッチ１２をオフ動作することにより行う（ステップ１）。並列メカスイッチ１２は、オフされても電位差が低い状態を維持する。このとき、半導体スイッチ１０はオンで電位差が低い状態、直列メカスイッチ１１はオンで電位差が低い状態である。 When operating the switching circuit 2 from power-on to power-off, first, as shown in FIG. 2B, the control unit 20 performs the switching circuit 2 off operation (step 1). In this step 1, in order to ensure that the potential difference is low and the potential difference does not fluctuate significantly before and after the switching operation (the potential difference is low and the potential difference does not fluctuate significantly before and after the switching operation), the switching in this case is performed. This is performed by turning off the parallel mechanical switch 12 (step 1). The parallel mechanical switch 12 maintains a low potential difference even when it is turned off. At this time, the semiconductor switch 10 is on and the potential difference is low, and the series mechanical switch 11 is on and the potential difference is low.

次に、図２（Ｃ）に示すように、制御部２０は、スイッチング回路２のオフ動作を行う（ステップ２）。このステップ２では、電位差が大きく変動する（電位差を大きく変動させる）ようにするため、この場合の切り替えは、半導体スイッチ１０をオフ動作することにより行う（ステップ２）。半導体スイッチ１０は、オフされて電位差が低い状態から高い状態に変化する。このとき、直列メカスイッチ１１はオンで電位差が低い状態、並列メカスイッチ１２はオフで電位差が低い状態から高い状態に変化する。 Next, as shown in FIG. 2C, the control unit 20 turns off the switching circuit 2 (step 2). In this step 2, in order to make the potential difference fluctuate greatly (the potential difference fluctuates greatly), the switching in this case is performed by turning off the semiconductor switch 10 (step 2). The semiconductor switch 10 is turned off and changes from a state in which the potential difference is low to a state in which the potential difference is high. At this time, the series mechanical switch 11 is on and the potential difference is low, and the parallel mechanical switch 12 is off and the potential difference is changed from a low state to a high state.

そして、図２（Ｄ）に示すように、制御部２０は、スイッチング回路２のオフ動作を行う（ステップ３）。このステップ３では、電位差が低く、且つ、切り替え操作の前後で電位差が大きく変動しない（電位差が低く、且つ、切り替え操作の前後で電位差を大きく変動させない）ようにするため、この場合の切り替えは、直列メカスイッチ１１をオフ動作することにより行う（ステップ３）。直列メカスイッチ１１は、オフされても電位差が低い状態を維持する。このとき、半導体スイッチ１０はオフで電位差が高い状態、並列メカスイッチ１２はオフで電位差が高い状態である。 Then, as shown in FIG. 2D, the control unit 20 turns off the switching circuit 2 (step 3). In this step 3, the potential difference is low and the potential difference does not fluctuate significantly before and after the switching operation (the potential difference is low and the potential difference does not fluctuate significantly before and after the switching operation). This is performed by turning off the series mechanical switch 11 (step 3). The series mechanical switch 11 maintains a low potential difference even when it is turned off. At this time, the semiconductor switch 10 is off and the potential difference is high, and the parallel mechanical switch 12 is off and the potential difference is high.

以上のステップ１〜３により、スイッチング回路２は、各スイッチ１０〜１２の全てがオフとなり、電源オフとなる。 By the above steps 1 to 3, in the switching circuit 2, all the switches 10 to 12 are turned off, and the power is turned off.

［電源オフから電源オン］
次に、スイッチング回路２を電源オフから電源オンに動作させる（切り換える）場合の制御について説明する。 [Power on from power off]
Next, the control when the switching circuit 2 is operated (switched) from the power off to the power on will be described.

図３（Ａ）に示すように、スイッチング回路２が電源オフの状態では、半導体スイッチ１０はオフで電位差が高い状態、直列メカスイッチ１１はオフで電位差が低い状態、並列メカスイッチ１２はオフで電位差が高い状態となっている。 As shown in FIG. 3A, when the power supply of the switching circuit 2 is off, the semiconductor switch 10 is off and the potential difference is high, the series mechanical switch 11 is off and the potential difference is low, and the parallel mechanical switch 12 is off. The potential difference is high.

スイッチング回路２を電源オフから電源オンに動作させる場合、先ず、図３（Ｂ）に示すように、制御部２０は、スイッチング回路２のオン動作を行う（ステップ１１）。このステップ１１では、電位差が低く、且つ、切り替え操作の前後で電位差が大きく変動しない（電位差が低く、且つ、切り替え操作の前後で電位差を大きく変動させない）ようにするため、この場合の切り替えは、直列メカスイッチ１１をオン動作することにより行う（ステップ１１）。直列メカスイッチ１１は、オンされても電位差が低い状態を維持する。このとき、半導体スイッチ１０はオフで電位差が高い状態、直列メカスイッチ１１はオフで電位差が高い状態である。 When the switching circuit 2 is operated from the power off to the power on, the control unit 20 first turns on the switching circuit 2 as shown in FIG. 3 (B) (step 11). In this step 11, in order to ensure that the potential difference is low and the potential difference does not fluctuate significantly before and after the switching operation (the potential difference is low and the potential difference does not fluctuate significantly before and after the switching operation), the switching in this case is performed. This is performed by turning on the series mechanical switch 11 (step 11). The series mechanical switch 11 maintains a low potential difference even when it is turned on. At this time, the semiconductor switch 10 is off and the potential difference is high, and the series mechanical switch 11 is off and the potential difference is high.

次に、図３（Ｃ）に示すように、制御部２０は、スイッチング回路２のオン動作を行う（ステップ１２）。このステップ１２では、電位差が大きく変動する（電位差を大きく変動させる）ようにするため、この場合の切り替えは、半導体スイッチ１０をオン動作することにより行う（ステップ１２）。半導体スイッチ１０は、オンされて電位差が高い状態から低い状態に変化する。このとき、直列メカスイッチ１１はオンで電位差が低い状態、並列メカスイッチ１２はオフで電位差が高い状態から低い状態に変化する。 Next, as shown in FIG. 3C, the control unit 20 turns on the switching circuit 2 (step 12). In this step 12, in order to make the potential difference fluctuate greatly (the potential difference fluctuates greatly), the switching in this case is performed by turning on the semiconductor switch 10 (step 12). The semiconductor switch 10 is turned on and changes from a state in which the potential difference is high to a state in which the potential difference is low. At this time, the series mechanical switch 11 is on and the potential difference is low, and the parallel mechanical switch 12 is off and the potential difference is changed from a high state to a low state.

そして、図３（Ｄ）に示すように、制御部２０は、スイッチング回路２のオン動作を行う（ステップ１３）。このステップ１３では、電位差が低く、且つ、切り替え操作の前後で電位差が大きく変動しない（電位差が低く、且つ、切り替え操作の前後で電位差を大きく変動させない）ようにするため、この場合の切り替えは、並列メカスイッチ１２をオン動作することにより行う（ステップ１３）。並列メカスイッチ１２は、オンされても電位差が低い状態を維持する。このとき、半導体スイッチ１０はオンで電位差が低い状態、直列メカスイッチ１１はオンで電位差が低い状態である。 Then, as shown in FIG. 3D, the control unit 20 turns on the switching circuit 2 (step 13). In this step 13, in order to ensure that the potential difference is low and the potential difference does not fluctuate significantly before and after the switching operation (the potential difference is low and the potential difference does not fluctuate significantly before and after the switching operation), the switching in this case is performed. This is performed by turning on the parallel mechanical switch 12 (step 13). The parallel mechanical switch 12 maintains a low potential difference even when it is turned on. At this time, the semiconductor switch 10 is on and the potential difference is low, and the series mechanical switch 11 is on and the potential difference is low.

以上のステップ１１〜１３により、スイッチング回路２は、各スイッチ１０〜１２の全てがオンとなり、電源オンとなる。 By the above steps 11 to 13, in the switching circuit 2, all the switches 10 to 12 are turned on and the power is turned on.

本実施形態では、直列メカスイッチ１１及び並列メカスイッチ１２の動作（ステップ１、ステップ３、ステップ１１、ステップ１３）は、電位差が低い状態で行われるので、アーキング（過電圧）やチャタリングの発生を抑制することができる。 In the present embodiment, the operations of the series mechanical switch 11 and the parallel mechanical switch 12 (step 1, step 3, step 11, step 13) are performed in a state where the potential difference is low, so that the occurrence of arching (overvoltage) and chattering is suppressed. can do.

また、スイッチング回路２が電源オンの状態（図２（Ａ）、図３（Ｄ））では、半導体スイッチ１０よりも抵抗の低い並列メカスイッチ１２に電流が流れるので、電源オン時の抵抗を低くすることができる。 Further, when the switching circuit 2 is in the power-on state (FIGS. 2A and 3D), a current flows through the parallel mechanical switch 12 having a resistance lower than that of the semiconductor switch 10, so that the resistance at the time of power-on is low. can do.

さらに、スイッチング回路２が電源オフの状態（図２（Ｄ）、図３（Ａ））では、半導体スイッチ１０に電流が流れることがないので、半導体スイッチ１０でのリーク電流の発生を確実に防止することができる。 Further, when the power of the switching circuit 2 is off (FIGS. 2 (D) and 3 (A)), no current flows through the semiconductor switch 10, so that leakage current is surely prevented from occurring in the semiconductor switch 10. can do.

このように、本発明を実施したスイッチング回路２によれば、半導体スイッチ１０を用いることで、高速、アークフリー（アーキング発生抑制）、長寿命を実現しながらも、リーク電流の発生を防止し、電源オン時の抵抗を低くすることができる。 As described above, according to the switching circuit 2 in which the present invention is implemented, by using the semiconductor switch 10, it is possible to prevent the generation of leakage current while realizing high speed, arc-free (suppression of arcing generation), and long life. The resistance when the power is turned on can be lowered.

［第２実施形態］
図４及び図５に示す第２実施形態のスイッチング回路５０は、上流側直列メカスイッチ５３（直列メカスイッチ）を備える。なお、上記実施形態と同様の構成部材には同一の符号を付し、その詳細な説明を省略する。なお、図４及び図５では、回路基板１３及び制御部２０の図示を省略している。 [Second Embodiment]
The switching circuit 50 of the second embodiment shown in FIGS. 4 and 5 includes an upstream side series mechanical switch 53 (series mechanical switch). The same components as those in the above embodiment are designated by the same reference numerals, and detailed description thereof will be omitted. Note that in FIGS. 4 and 5, the circuit board 13 and the control unit 20 are not shown.

上流側直列メカスイッチ５３は、半導体スイッチ１０よりも上流側で回路基板１３に実装され、半導体スイッチ１０に直列に接続されている。 The upstream side series mechanical switch 53 is mounted on the circuit board 13 on the upstream side of the semiconductor switch 10 and is connected in series with the semiconductor switch 10.

上流側直列メカスイッチ５３は、例えば、直列メカスイッチ１１と同様のオン／オフ可能な有接点リレースイッチであり、制御部２０からの指令によりオン／オフする。 The upstream side series mechanical switch 53 is, for example, a contact relay switch that can be turned on / off like the series mechanical switch 11, and is turned on / off by a command from the control unit 20.

［電源オンから電源オフ］
次に、スイッチング回路５０を電源オンから電源オフに動作させる（切り換える）場合の制御について説明する。 [Power on to power off]
Next, the control when the switching circuit 50 is operated (switched) from the power on to the power off will be described.

図４（Ａ）に示すように、スイッチング回路２が電源オンの状態では、半導体スイッチ１０はオンで電位差が低い状態、直列メカスイッチ１１はオンで電位差が低い状態、並列メカスイッチ１２はオンで電位差が低い状態、上流側直列メカスイッチ５３はオンで電位差が低い状態となっている。 As shown in FIG. 4A, when the switching circuit 2 is powered on, the semiconductor switch 10 is on and the potential difference is low, the series mechanical switch 11 is on and the potential difference is low, and the parallel mechanical switch 12 is on. The potential difference is low, and the upstream series mechanical switch 53 is on and the potential difference is low.

スイッチング回路５０を電源オンから電源オフに動作させる場合、先ず、図４（Ｂ）に示すように、制御部２０は、スイッチング回路２のオフ動作を行う（ステップ２１）。このステップ２１では、電位差が低く、且つ、切り替え操作の前後で電位差が大きく変動しない（電位差が低く、且つ、切り替え操作の前後で電位差を大きく変動させない）ようにするため、この場合の切り替えは、並列メカスイッチ１２をオフ動作することにより行う（ステップ２１）。並列メカスイッチ１２は、オフされても電位差が低い状態を維持する。このとき、半導体スイッチ１０はオンで電位差が低い状態、直列メカスイッチ１１はオンで電位差が低い状態、上流側直列メカスイッチ５３はオンで電位差が低い状態である。 When the switching circuit 50 is operated from the power on to the power off, the control unit 20 first turns off the switching circuit 2 as shown in FIG. 4 (B) (step 21). In this step 21, in order to ensure that the potential difference is low and the potential difference does not fluctuate significantly before and after the switching operation (the potential difference is low and the potential difference does not fluctuate significantly before and after the switching operation), the switching in this case is performed. This is performed by turning off the parallel mechanical switch 12 (step 21). The parallel mechanical switch 12 maintains a low potential difference even when it is turned off. At this time, the semiconductor switch 10 is on and the potential difference is low, the series mechanical switch 11 is on and the potential difference is low, and the upstream series mechanical switch 53 is on and the potential difference is low.

次に、図４（Ｃ）に示すように、制御部２０は、スイッチング回路２のオフ動作を行う（ステップ２２）。このステップ２では、電位差が大きく変動する（電位差を大きく変動させる）ようにするため、この場合の切り替えは、半導体スイッチ１０をオフ動作することにより行う（ステップ２２）。半導体スイッチ１０は、オフされて電位差が低い状態から高い状態に変化する。このとき、直列メカスイッチ１１はオンで電位差が低い状態、上流側直列メカスイッチ５３はオンで電位差が低い状態、並列メカスイッチ１２はオフで電位差が低い状態から高い状態に変化する。 Next, as shown in FIG. 4C, the control unit 20 turns off the switching circuit 2 (step 22). In this step 2, in order to make the potential difference fluctuate greatly (the potential difference fluctuates greatly), the switching in this case is performed by turning off the semiconductor switch 10 (step 22). The semiconductor switch 10 is turned off and changes from a state in which the potential difference is low to a state in which the potential difference is high. At this time, the series mechanical switch 11 is on and the potential difference is low, the upstream series mechanical switch 53 is on and the potential difference is low, and the parallel mechanical switch 12 is off and the potential difference is high.

そして、図４（Ｄ）に示すように、制御部２０は、スイッチング回路２のオフ動作を行う（ステップ２３）。このステップ２３では、電位差が低く、且つ、切り替え操作の前後で電位差が大きく変動しない（電位差が低く、且つ、切り替え操作の前後で電位差を大きく変動させない）ようにするため、この場合の切り替えは、直列メカスイッチ１１及び上流側直列メカスイッチ５３をオフ動作することにより行う（ステップ２３）。直列メカスイッチ１１及び上流側直列メカスイッチ５３は、オフされても電位差が低い状態を維持する。このとき、半導体スイッチ１０はオフで電位差が高い状態、並列メカスイッチ１２はオフで電位差が高い状態である。 Then, as shown in FIG. 4D, the control unit 20 turns off the switching circuit 2 (step 23). In this step 23, in order to ensure that the potential difference is low and the potential difference does not fluctuate significantly before and after the switching operation (the potential difference is low and the potential difference does not fluctuate significantly before and after the switching operation), the switching in this case is performed. This is performed by turning off the series mechanical switch 11 and the upstream series mechanical switch 53 (step 23). The series mechanical switch 11 and the upstream series mechanical switch 53 maintain a low potential difference even when they are turned off. At this time, the semiconductor switch 10 is off and the potential difference is high, and the parallel mechanical switch 12 is off and the potential difference is high.

以上のステップ２１〜２３により、スイッチング回路２は、各スイッチ１０〜１２，５３の全てがオフとなり、電源オフとなる。 By the above steps 21 to 23, in the switching circuit 2, all the switches 10 to 12 and 53 are turned off, and the power is turned off.

［電源オフから電源オン］
次に、スイッチング回路５０を電源オフから電源オンに動作させる（切り換える）場合の制御について説明する。 [Power on from power off]
Next, the control when the switching circuit 50 is operated (switched) from the power off to the power on will be described.

図５（Ａ）に示すように、スイッチング回路２が電源オフの状態では、半導体スイッチ１０はオフで電位差が高い状態、直列メカスイッチ１１はオフで電位差が低い状態、並列メカスイッチ１２はオフで電位差が高い状態、上流側直列メカスイッチ５３はオフで電位差が低い状態となっている。 As shown in FIG. 5A, when the power supply of the switching circuit 2 is off, the semiconductor switch 10 is off and the potential difference is high, the series mechanical switch 11 is off and the potential difference is low, and the parallel mechanical switch 12 is off. The potential difference is high, and the upstream series mechanical switch 53 is off and the potential difference is low.

スイッチング回路５０を電源オフから電源オンに動作させる場合、先ず、図５（Ｂ）に示すように、制御部２０は、スイッチング回路２のオン動作を行う（ステップ３１）。このステップ３１では、電位差が低く、且つ、切り替え操作の前後で電位差が大きく変動しない（電位差が低く、且つ、切り替え操作の前後で電位差を大きく変動させない）ようにするため、この場合の切り替えは、直列メカスイッチ１１及び上流側直列メカスイッチ５３をオン動作することにより行う（ステップ３１）。直列メカスイッチ１１及び上流側直列メカスイッチ５３は、オンされても電位差が低い状態を維持する。このとき、半導体スイッチ１０はオフで電位差が高い状態、直列メカスイッチ１１はオフで電位差が高い状態である。 When the switching circuit 50 is operated from the power off to the power on, the control unit 20 first turns on the switching circuit 2 as shown in FIG. 5 (B) (step 31). In this step 31, the potential difference is low and the potential difference does not fluctuate significantly before and after the switching operation (the potential difference is low and the potential difference does not fluctuate significantly before and after the switching operation). This is performed by turning on the series mechanical switch 11 and the upstream series mechanical switch 53 (step 31). The series mechanical switch 11 and the upstream series mechanical switch 53 maintain a low potential difference even when they are turned on. At this time, the semiconductor switch 10 is off and the potential difference is high, and the series mechanical switch 11 is off and the potential difference is high.

次に、図５（Ｃ）に示すように、制御部２０は、スイッチング回路２のオン動作を行う（ステップ３２）。このステップ３２では、電位差が大きく変動する（電位差を大きく変動させる）ようにするため、この場合の切り替えは、半導体スイッチ１０をオン動作することにより行う（ステップ３２）。半導体スイッチ１０は、オンされて電位差が高い状態から低い状態に変化する。このとき、直列メカスイッチ１１はオンで電位差が低い状態、上流側直列メカスイッチ５３はオンで電位差が低い状態、並列メカスイッチ１２はオフで電位差が高い状態から低い状態に変化する。 Next, as shown in FIG. 5C, the control unit 20 turns on the switching circuit 2 (step 32). In this step 32, in order to make the potential difference fluctuate greatly (the potential difference fluctuates greatly), the switching in this case is performed by turning on the semiconductor switch 10 (step 32). The semiconductor switch 10 is turned on and changes from a state in which the potential difference is high to a state in which the potential difference is low. At this time, the series mechanical switch 11 is on and the potential difference is low, the upstream series mechanical switch 53 is on and the potential difference is low, and the parallel mechanical switch 12 is off and the potential difference is low.

そして、図５（Ｄ）に示すように、制御部２０は、スイッチング回路２のオン動作を行う（ステップ３３）。このステップ３３では、電位差が低く、且つ、切り替え操作の前後で電位差が大きく変動しない（電位差が低く、且つ、切り替え操作の前後で電位差を大きく変動させない）ようにするため、この場合の切り替えは、並列メカスイッチ１２をオン動作することにより行う（ステップ３３）。並列メカスイッチ１２は、オンされても電位差が低い状態を維持する。このとき、半導体スイッチ１０はオンで電位差が低い状態、直列メカスイッチ１１はオンで電位差が低い状態、上流側直列メカスイッチ５３はオンで電位差が低い状態である。 Then, as shown in FIG. 5D, the control unit 20 turns on the switching circuit 2 (step 33). In this step 33, in order to ensure that the potential difference is low and the potential difference does not fluctuate significantly before and after the switching operation (the potential difference is low and the potential difference does not fluctuate significantly before and after the switching operation), the switching in this case is performed. This is performed by turning on the parallel mechanical switch 12 (step 33). The parallel mechanical switch 12 maintains a low potential difference even when it is turned on. At this time, the semiconductor switch 10 is on and the potential difference is low, the series mechanical switch 11 is on and the potential difference is low, and the upstream series mechanical switch 53 is on and the potential difference is low.

以上のステップ３１〜３３により、スイッチング回路２は、各スイッチ１０〜１２，５３の全てがオンとなり、電源オンとなる。 By the above steps 31 to 33, in the switching circuit 2, all the switches 10 to 12 and 53 are turned on, and the power is turned on.

本実施形態では、直列メカスイッチ１１、並列メカスイッチ１２及び上流側直列メカスイッチ５３の動作（ステップ２１、ステップ２３、ステップ３１、ステップ３３）は、電位差が低く、且つ、切り替え操作の前後で電位差が大きく変動しない（電位差が低く、且つ、切り替え操作の前後で電位差を大きく変動させない）ようにするときに行われるので、アーキング（過電圧）やチャタリングの発生を抑制することができる。 In the present embodiment, the operations of the series mechanical switch 11, the parallel mechanical switch 12, and the upstream series mechanical switch 53 (step 21, step 23, step 31, step 33) have a low potential difference and a potential difference before and after the switching operation. Is performed so that the voltage does not fluctuate significantly (the potential difference is low and the potential difference does not fluctuate significantly before and after the switching operation), so that the occurrence of arching (overvoltage) and chattering can be suppressed.

また、スイッチング回路５０が電源オンの状態（図４（Ａ）、図５（Ｄ））では、半導体スイッチ１０よりも抵抗の低い並列メカスイッチ１２に電流が流れるので、電源オン時の抵抗を低くすることができる。 Further, when the switching circuit 50 is in the power-on state (FIGS. 4A and 5D), a current flows through the parallel mechanical switch 12 having a resistance lower than that of the semiconductor switch 10, so that the resistance at the time of power-on is low. can do.

さらに、スイッチング回路２が電源オフの状態（図４（Ｄ）、図５（Ａ））では、半導体スイッチ１０に電流が流れることがないので、半導体スイッチ１０でのリーク電流の発生を確実に防止することができる。 Further, when the power of the switching circuit 2 is off (FIGS. 4 (D) and 5 (A)), no current flows through the semiconductor switch 10, so that leakage current is reliably prevented from occurring in the semiconductor switch 10. can do.

このように、本発明を実施したスイッチング回路５０によれば、半導体スイッチ１０を用いることで、高速、アークフリー（アーキング発生抑制）、長寿命を実現しながらも、リーク電流の発生を防止し、電源オン時の抵抗を低くすることができる。 As described above, according to the switching circuit 50 in which the present invention is implemented, by using the semiconductor switch 10, it is possible to prevent the generation of leakage current while realizing high speed, arc-free (suppression of arcing generation), and long life. The resistance when the power is turned on can be lowered.

以上、本発明を、その好適な実施形態について説明したが、当業者であれば容易に理解できるように、本発明はこのような実施形態により限定されるものではなく、本発明の趣旨を逸脱しない範囲で適宜変更可能である。 The present invention has been described above with respect to preferred embodiments thereof, but as can be easily understood by those skilled in the art, the present invention is not limited to such embodiments and deviates from the gist of the present invention. It can be changed as appropriate as long as it does not.

例えば、スイッチング回路２を動作（オンからオフ、オフからオン）させる場合、半導体スイッチ１０、直列メカスイッチ１１、並列メカスイッチ１２及び上流側直列メカスイッチ５３を動作させる順番は、下記条件を満たせば、適宜変更可能である。この条件は、直列メカスイッチ１１、並列メカスイッチ１２及び上流側直列メカスイッチ５３は、電位差が低く、且つ、切り替え操作の前後で電位差が大きく変動しない（電位差が低く、且つ、切り替え操作の前後で電位差を大きく変動させない）ようにするときに動作させ、半導体スイッチ１０は、電位差が大きく変動する（電位差を大きく変動させる）ようにするときに動作させることである。この条件を満たす制御を行うことで、上記実施形態と同様の効果を得ることができる。 For example, when operating the switching circuit 2 (on to off, off to on), the order in which the semiconductor switch 10, the series mechanical switch 11, the parallel mechanical switch 12, and the upstream series mechanical switch 53 are operated satisfies the following conditions. , Can be changed as appropriate. Under this condition, the series mechanical switch 11, the parallel mechanical switch 12, and the upstream series mechanical switch 53 have a low potential difference, and the potential difference does not fluctuate significantly before and after the switching operation (the potential difference is low and before and after the switching operation. It is operated when the potential difference is not greatly changed), and the semiconductor switch 10 is operated when the potential difference is changed greatly (the potential difference is greatly changed). By performing control satisfying this condition, the same effect as that of the above embodiment can be obtained.

また、上記第１実施形態では、直列メカスイッチ１１を半導体スイッチ１０の下流側に配置しているが、図６に示すように、スイッチング回路１００において、直列メカスイッチ１１を半導体スイッチ１０の上流側に配置するようにしてもよい（第３実施形態）。この場合にも、上記第１，第２実施形態と同様の制御を行うことで、同様の効果を得ることができた。なお、スイッチング回路１００は、直列メカスイッチ１１の位置以外は、第１実施形態のスイッチング回路２と同じである。 Further, in the first embodiment, the series mechanical switch 11 is arranged on the downstream side of the semiconductor switch 10. However, as shown in FIG. 6, in the switching circuit 100, the series mechanical switch 11 is located on the upstream side of the semiconductor switch 10. It may be arranged in (third embodiment). Also in this case, the same effect could be obtained by performing the same control as in the first and second embodiments. The switching circuit 100 is the same as the switching circuit 2 of the first embodiment except for the position of the series mechanical switch 11.

さらに、上記第２実施形態では、スイッチング回路５０を電源オンから電源オフに動作させる場合、直列メカスイッチ１１及び上流側直列メカスイッチ５３を同時にオフし（ステップ２３）、スイッチング回路５０を電源オフから電源オンに動作させる場合、直列メカスイッチ１１及び上流側直列メカスイッチ５３を同時にオンしている（ステップ３１）が、同時のオン／オフでなくてもよく、例えば、スイッチング回路５０を電源オンから電源オフに動作させる場合には、高電位側の上流側直列メカスイッチ５３を先にオフし、スイッチング回路５０を電源オフから電源オンに動作させる場合には、低電位側の直列メカスイッチ１１を先にオンするようにしてもよい。このような制御を行うことで、動作が安定する。 Further, in the second embodiment, when the switching circuit 50 is operated from the power on to the power off, the series mechanical switch 11 and the upstream series mechanical switch 53 are simultaneously turned off (step 23), and the switching circuit 50 is turned off. When the power is turned on, the series mechanical switch 11 and the upstream series mechanical switch 53 are turned on at the same time (step 31), but they do not have to be turned on / off at the same time. When the power is turned off, the upstream side series mechanical switch 53 on the high potential side is turned off first, and when the switching circuit 50 is operated from the power off to the power on, the low potential side series mechanical switch 11 is turned off. You may turn it on first. By performing such control, the operation is stable.

また、本発明に実施する半導体スイッチは適宜変更可能であり、一方向型の半導体スイッチ（例えば、金属酸化膜型電界効果トランジスタ（ＭＯＳＦＥＴ）や、絶縁ゲートバイポーラトランジスタ（ＩＧＢＴ）等）、双方向型の半導体スイッチのいずれも使用可能であり、さらには、付加の電荷を引き抜いて高速にオフさせる場合には、一方向型の半導体スイッチではハーフブリッジを用いた半導体スイッチを使用し、双方向型の半導体スイッチではフルブリッジを用いた半導体スイッチを使用することが好ましい。 Further, the semiconductor switch implemented in the present invention can be appropriately changed, and is a one-way type semiconductor switch (for example, a metal oxide film type field effect transistor (MOSFET), an insulated gate bipolar transistor (IGBT), etc.), a bidirectional type. Any of the semiconductor switches in the above can be used, and in addition, when extracting the additional charge and turning it off at high speed, the one-way type semiconductor switch uses a semiconductor switch using a half bridge, and is bidirectional. As the semiconductor switch, it is preferable to use a semiconductor switch using a full bridge.

２，５０，１００…スイッチング回路、１０…半導体スイッチ、１０Ａ，１０Ｂ…ＭＯＳトランジスタ、１１…直列メカスイッチ、１２…並列メカスイッチ、１３…回路基板、２０…制御部、５３…上流側直列メカスイッチ 2,50,100 ... switching circuit, 10 ... semiconductor switch, 10A, 10B ... MOS transistor, 11 ... series mechanical switch, 12 ... parallel mechanical switch, 13 ... circuit board, 20 ... control unit, 53 ... upstream side series mechanical switch

Claims (4)

オン及びオフに動作可能なスイッチング回路であって、
半導体スイッチング素子を有する半導体スイッチと、
前記半導体スイッチに直列に接続される直列メカスイッチと、
前記半導体スイッチと並列に配置されて前記直列メカスイッチに接続される並列メカスイッチと、
を備え、
前記半導体スイッチ、前記直列メカスイッチ、及び前記並列メカスイッチは、制御部により個別に駆動が制御されることを特徴とするスイッチング回路。 A switching circuit that can operate on and off,
A semiconductor switch having a semiconductor switching element and
A series mechanical switch connected in series with the semiconductor switch,
A parallel mechanical switch arranged in parallel with the semiconductor switch and connected to the series mechanical switch,
With
The semiconductor switch, the series mechanical switch, and the parallel mechanical switch are switching circuits whose drive is individually controlled by a control unit. 請求項１に記載のスイッチング回路において、
前記直列メカスイッチは、１つ又は複数設けられ、
前記直列メカスイッチは、複数設けられる場合に前記半導体スイッチの上流側及び下流側に配置されることを特徴とするスイッチング回路。 In the switching circuit according to claim 1,
The series mechanical switch may be provided one or more.
A switching circuit characterized in that the series mechanical switches are arranged on the upstream side and the downstream side of the semiconductor switch when a plurality of the series mechanical switches are provided. 半導体スイッチング素子を有する半導体スイッチと、前記半導体スイッチに直列に接続される直列メカスイッチと、前記半導体スイッチと並列に配置される並列メカスイッチと、を備えるスイッチング回路の制御方法であって、
前記スイッチング回路を動作させる場合、電位差が比較的大きく変動するときの切り替えは、前記半導体スイッチの動作により行わせ、電位差が比較的低く、且つ切り替え操作の前後で電位差が比較的大きく変動しないときの切り替えは、前記直列メカスイッチ及び前記並列メカスイッチの動作により行わせることを特徴とするスイッチング回路の制御方法。 A method for controlling a switching circuit including a semiconductor switch having a semiconductor switching element, a series mechanical switch connected in series with the semiconductor switch, and a parallel mechanical switch arranged in parallel with the semiconductor switch.
When the switching circuit is operated, switching when the potential difference fluctuates relatively large is performed by the operation of the semiconductor switch, and when the potential difference is relatively low and the potential difference does not fluctuate relatively large before and after the switching operation. A method for controlling a switching circuit, characterized in that switching is performed by the operation of the series mechanical switch and the parallel mechanical switch. 請求項３に記載のスイッチング回路の制御方法において、
前記スイッチング回路をオンからオフに動作させる場合、前記並列メカスイッチをオフし、前記並列メカスイッチをオフした後に前記半導体スイッチをオフし、前記半導体スイッチをオフした後に、前記直列メカスイッチをオフし、
前記スイッチング回路をオフからオンに動作させる場合、前記直列メカスイッチをオンし、前記直列メカスイッチをオンした後に前記半導体スイッチをオンし、前記半導体スイッチをオンした後に並列メカスイッチをオンすることを特徴とするスイッチング回路の制御方法。 In the method for controlling a switching circuit according to claim 3,
When operating the switching circuit from on to off, the parallel mechanical switch is turned off, the semiconductor switch is turned off after the parallel mechanical switch is turned off, the semiconductor switch is turned off, and then the series mechanical switch is turned off. ,
When operating the switching circuit from off to on, the series mechanical switch is turned on, the semiconductor switch is turned on after the series mechanical switch is turned on, and the parallel mechanical switch is turned on after the semiconductor switch is turned on. A characteristic switching circuit control method.
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JP2020036307A (en) * 2018-08-22 2020-03-05 日新電機株式会社 Overvoltage suppression circuit and DC cutoff device

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