JP2021163425A - Electronic control device - Google Patents

Abstract

To make it possible to detect a fact that the latest AD (analog/digital) value cannot be used in the cycle task while stabilizing the startup cycle of the cycle task.SOLUTION: An AD conversion start timer generates a first trigger signal at every certain time Tc. When the first trigger signal is generated, an AD conversion is executed on the analog signal used for controlling an object to be controlled, and AD values are transferred to RAM via DMA. A cycle task start timer generates a second trigger signal at a timing that deviates from the generation timing of the first trigger signal by a predetermined time Ts. When the second trigger signal is generated, a CPU executes a cycle task that includes a series of processing that uses the AD value in the RAM as a task to execute the control. The CPU determines whether or not the AD value has been stored in a memory before starting the cycle task from the last cycle task was started.SELECTED DRAWING: Figure 4

Description

The present disclosure relates to an electronic control device.

For example, in the electronic control device described in Patent Document 1 below, an AD conversion trigger signal is generated by a timer at regular time intervals, and the AD conversion trigger signal is used to perform AD conversion of an analog signal by the AD converter. .. Then, when the AD conversion is completed, the AD value that is the result of the AD conversion is stored in the memory by DMA transfer.

Japanese Unexamined Patent Publication No. 2011-160199

As a result of detailed examination by the inventor in relation to the technique described in Patent Document 1, the following problems have been found.
As a task for controlling a control target, there is a task (that is, a periodic task) that is started at regular time intervals, and it is assumed that a process using an AD value of an analog signal is performed by this periodic task. In other words, it is assumed that the periodic task includes a process that uses the AD value. The task referred to here is a software execution unit. Further, the activation of the periodic task is to start the execution of the periodic task.

The inventor has considered a configuration in which another trigger signal is generated at a timing deviated from the generation timing of the AD conversion trigger signal by a predetermined time, and the generation of the other trigger signal activates the periodic task. According to this configuration, it is easy to stabilize the activation cycle of the periodic task. This is because the other trigger signal can be generated with a high-precision cycle by a timer or the like, similarly to the AD conversion trigger signal.

In the case of this configuration, the predetermined time corresponding to the phase difference between the AD conversion trigger signal and the other trigger signal is expected to be required for the AD conversion of the analog signal and the storage of the AD value in the memory. It may be set to a time longer than the above-mentioned fixed time and shorter than the above-mentioned fixed time.

By the way, the time required for the AD conversion and the storage of the AD value in the memory may vary due to various factors. The time required for the AD conversion referred to here is the time from the generation of the AD conversion trigger signal to the completion of the AD conversion. For example, the time required for the AD conversion may be increased by waiting for the start of the corresponding AD conversion when another high-priority AD conversion is performed. Further, the time required for storing the AD value in the memory may be long depending on how busy the bus is.

When the time from the generation of the AD conversion trigger signal to the completion of storage of the AD value in the memory becomes longer than the above-mentioned predetermined time, before the AD value by the latest AD conversion is stored in the memory. The periodic task is started at. Then, the latest AD value cannot be used in the periodic task.

If such a situation cannot be detected, for example, a measure for increasing the possibility that a newer AD value can be used in a periodic task, a measure for suppressing the influence of not being able to use the latest AD value in a periodic task, etc. , It is not possible to take measures to suppress the deterioration of control performance.

Therefore, one aspect of the present disclosure is to stabilize the activation cycle of the periodic task and to detect that the latest AD value cannot be used in the periodic task.

The electronic control device according to one aspect of the present disclosure includes a first generation unit (21), a conversion storage execution unit (15, 17, S120, S140), a second generation unit (22), and an execution unit ( 7) and an order monitoring unit (7, S470) are provided.

The first generating unit generates the first trigger signal at regular time intervals (Tc).
When the first trigger signal is generated, the conversion storage execution unit performs AD conversion of the analog signal used for controlling the controlled object, and when the AD conversion is completed, the AD value which is the result of the AD conversion is stored in the memory ( Store in 13).

The second generation unit is set to a time longer than the minimum time required for the AD conversion and storage of the AD value in the memory and shorter than the fixed time from the generation timing of the first trigger signal. A second trigger signal is generated at a timing deviated by a predetermined time (Ts). Therefore, the second trigger signal may be a signal whose phase is shifted by a predetermined time with respect to the first trigger signal.

When the second trigger signal is generated, the execution unit executes a periodic task including a process using the AD value stored in the memory as a task for controlling the control target.
The sequence monitoring unit determines whether or not the storage of the AD value in the memory by the conversion storage execution unit is completed after the periodic task is started last time and before it is started this time.

According to such a configuration, a second trigger signal whose phase is shifted by a predetermined time is generated with respect to the first trigger signal, and the periodic task is activated by the second trigger signal. It is easy to stabilize the startup cycle. Since the sequence monitoring unit is provided, it is possible to detect that the storage of the AD value in the memory has not been completed after the periodic task was started last time and before it is started this time. Therefore, it becomes possible to detect that the latest AD value cannot be used in the periodic task.

It is a block diagram which shows the structure of the electronic control apparatus of embodiment. It is a flowchart which shows the operation and process performed every time the 1st trigger signal is generated. It is a flowchart which shows the operation and process performed every time the 2nd trigger signal is generated. It is a time chart explaining the operation of an embodiment. It is a time chart explaining a comparative example.

Hereinafter, embodiments of the present disclosure will be described with reference to the drawings.
[1. composition]
The electronic control unit (hereinafter, ECU) 1 shown in FIG. 1 controls, for example, an automobile engine 3. ECU is an abbreviation for "Electronic Control Unit". The ECU 1 includes a microcomputer 5 as a control unit that performs processing for controlling the engine 3.

The microcomputer 5 includes a CPU 7, a ROM 11 in which a program executed by the CPU 7 is stored, a RAM 13 in which data to be calculated by the CPU 7, a calculation result, and the like are stored, and an internal bus 14. The number of CPUs 7 is not limited to one, and a plurality of CPUs 7 may be provided.

Further, the microcomputer 5 has an AD conversion unit 15 that performs AD conversion (that is, analog / digital conversion) of one or more analog signals, and a DMA controller (hereinafter, DMAC) that transfers data specified by the program to the RAM 13. A 17 and a timer unit 19 are provided. DMA is an abbreviation for "Direct Memory Access".

Each of the plurality of cylinders 31 provided in the engine 3 as a control target is provided with a pressure sensor 33 that outputs an in-cylinder pressure signal that becomes a voltage corresponding to the in-cylinder pressure.
The in-cylinder pressure signal from each pressure sensor 33 is input to the microcomputer 5 as an analog signal to be AD-converted. Then, each of the in-cylinder pressure signals input to the microcomputer 5 is AD-converted by the AD conversion unit 15. Hereinafter, for the sake of brevity, it is assumed that the analog signal to be AD-converted is one in-cylinder pressure signal.

When the AD conversion of the in-cylinder pressure signal by the AD conversion unit 15 is completed in the microcomputer 5, a DMA transfer request for the AD value is output from the AD conversion unit 15 to the DMAC 17. The AD value is the result of the AD conversion, that is, the digital data after the AD conversion. The DMA transfer request of the AD value may be output from a request generation unit different from the AD conversion unit 15.

Upon receiving the DMA transfer request for the AD value, the DMAC 17 transfers the AD value from the AD conversion unit 15 to the RAM 13 (that is, DMA transfer).
Then, the AD value stored in the RAM 13 by DMA transfer is used for controlling the engine 3 by the CPU 7 executing a periodic task described later. That is, the periodic task described later includes a process of reading the AD value of the in-cylinder pressure signal from the RAM 13 and using the AD value for controlling the engine 3 (hereinafter, AD value use process). As the AD value use process, for example, there is a process of calculating the fuel injection amount based on the AD value (that is, the in-cylinder pressure detection value) of the in-cylinder pressure signal.

The timer unit 19 includes at least two timers 21 and 22.
Each of the timers 21 and 22 includes a timer counter that is counted up by the internal clock of the microcomputer 5 and a compare register. Then, when the value of the timer counter becomes the same as the value preset in the compare register (that is, the comparison value), each of the timers 21 and 22 generates (that is, outputs) a trigger signal and at that time point. Is configured so that the value of the timer counter returns to 0.

Therefore, for example, from the timer 21, each time the value of the timer counter constituting the timer 21 matches the comparison value in the compare register constituting the timer 21, "comparison value x one cycle of the internal clock". A trigger signal is output at regular intervals of "time". The same applies to the timer 22. In the following description, the expiration of timers 21 and 22 means that the value of the timer counter matches the comparison value in the compare register.

The trigger signal generated by the timer 21 is used as a trigger signal for the AD conversion unit 15 to start the AD conversion. Further, the trigger signal generated by the timer 22 is used as a trigger signal for invoking a periodic task.

Hereinafter, when the timers 21 and 22 are particularly distinguished, the timer 21 is referred to as an AD conversion start timer 21, and the timer 22 is referred to as a periodic task start timer 22. Further, the trigger signal generated by the AD conversion start timer 21 is also referred to as a first trigger signal, and the trigger signal generated by the periodic task start timer 22 is also referred to as a second trigger signal.

Here, as shown in FIG. 4, the period in which the first trigger signal and the second trigger signal are generated is set to Tc for the same fixed time, but the second trigger signal is the first trigger signal. Is generated with a deviation of a predetermined time Ts from the generation timing of. In FIG. 4, the “AD conversion start timer” represents the value of the timer counter that constitutes the AD conversion start timer 21. Similarly, the "periodic task activation timer" represents the value of the timer counter that constitutes the periodic task activation timer 22.

Specifically, by the initial setting process executed at the start of the operation of the microcomputer 5, the compare register constituting the AD conversion start timer 21 and the compare register constituting the periodic task start timer 22 are compared with each other as a comparison value. , The same value corresponding to Tc for a certain period of time is set (that is, set). The value corresponding to the fixed time Tc is a value obtained by dividing the fixed time Tc by one cycle time of the internal clock.

Then, by the above initial setting process, for example, 0 is set as an initial value in the timer counter constituting the periodic task start timer 22, but a predetermined value is set as the initial value in the timer counter constituting the AD conversion start timer 21. A value corresponding to the time Ts is set. That is, the value of the timer counter constituting the AD conversion start timer 21 is offset so that the first trigger signal is generated before the second trigger signal by a predetermined time Ts. Then, when such initial setting is completed, both timers 21 and 22 are started. That is, the timer counter count-up in both timers 21 and 22 is started.

The timer unit 19 is also provided with a free running counter (hereinafter, FRC) 30. The FRC 30 is also a counter that is counted up by the internal clock of the microcomputer 5. Then, the value of FRC30 (hereinafter, FRC value) returns to 0 (that is, laps round) when it reaches a predetermined upper limit value. The FRC value is used as a time value in the microcomputer 5.

[2. Explanation of basic operation]
As shown in FIG. 4, it is assumed that the AD conversion start timer 21 has expired at time t1. Then, the first trigger signal is generated, and the AD conversion unit 15 starts AD conversion of the in-cylinder pressure signal. Then, when the AD conversion is completed, a DMA transfer request for the AD value is output to the DMAC 17, and the DMA transfer of the AD value to the RAM 13 by the DMAC 17 is started. When this DMA transfer is completed, the AD value is stored in the RAM 13. In the example of FIG. 4, the DMA transfer of the AD value is completed at time t2.

Further, at the time t3 when the predetermined time Ts has elapsed since the first trigger signal was generated, the periodic task start timer 22 expires, the second trigger signal is generated, and the periodic task is activated. That is, the CPU 7 starts executing the periodic task. Then, in this periodic task, the above-mentioned AD value use process is performed.

Here, in order to use the AD value by the latest AD conversion in the AD value use processing, the AD conversion accompanying the first trigger signal generated immediately before the periodic task is started is performed. It is desirable that the storage of the AD value in the RAM 13 (that is, DMA transfer) is completed.

Therefore, the predetermined time Ts is shorter than the fixed time Tc, which is the generation cycle of the first and second trigger signals, but at least the total minimum time Tmin required for AD conversion and storage of the AD value in the RAM 13 is Tmin. It is set to a longer time than. Actually, the predetermined time Ts is set to a time obtained by adding a predetermined margin time to the minimum time Tmin.

Therefore, for example, when the AD conversion of another signal having a high priority is performed, the AD conversion of the in-cylinder pressure signal is waited for a long time, or the DMA transfer of the AD value is waited for a long time due to the congestion of the internal bus 14. Otherwise, the storage of the AD value in the RAM 13 is completed before the periodic task is started.

Then, at the time t4 when a certain time Tc has elapsed from the time t1, the AD conversion start timer 21 expires again and the first trigger signal is generated, the AD conversion of the in-cylinder pressure signal and the DMA of the AD value to the RAM 13 are performed. Transfers are carried out in sequence. In the example of FIG. 4, the DMA transfer of the AD value is completed at time t5.

Further, at the time t6 when a certain time Tc has elapsed from the time t2, the periodic task activation timer 22 expires again, a second trigger signal is generated, and the periodic task is activated. Then, in this periodic task, the latest AD value by AD conversion, that is, the AD value by AD conversion accompanying the first trigger signal generated immediately before is used.

[3. process]
Next, the operation and processing performed each time the first trigger signal is generated in the microcomputer 5 will be described with reference to the flowchart of FIG. Further, the operation and processing performed each time the second trigger signal is generated in the microcomputer 5 will be described with reference to the flowchart of FIG. In FIG. 2, S110 to S170 are operations performed by the AD conversion start timer 21, AD conversion unit 15, and DMAC 17, and S210 to S250 are processes performed by the CPU 7 executing the program. Further, in FIG. 3, S310 to S330 are operations performed by the periodic task start timer 22 and DMAC17, and S410 to S490 are processes performed by the CPU 7 executing a program.

In FIG. 2, when the AD conversion start timer 21 expires and the first trigger signal is generated as shown in S110, the AD conversion unit 15 performs AD conversion of the in-cylinder pressure signal as shown in S120. Then, as shown in S130, when the AD conversion is completed, a DMA transfer request for the AD value is output to the DMAC17. Therefore, as shown in S140, the DMAC 17 performs the DMA transfer of the AD value from the AD conversion unit 15 to the RAM 13.

Then, as shown in S150, when the DMA transfer of the AD value is completed, that is, when the storage of the AD value in the RAM 13 is completed, the DMA transfer request of the FRC value is output to the DMAC 17. Therefore, as shown in S160, the DMAC 17 performs the DMA transfer of the FRC value from the FRC 30 to the RAM 13. The DMA transfer request of the FRC value may be output from, for example, a request generation unit (not shown) in the microcomputer 5.

By the DMA transfer in S160, the current FRC value is stored in the RAM 13 as the time when the storage of the AD value in the RAM 13 is completed (hereinafter, the AD value storage completion time). In the following, the FRC value as the AD value storage completion time is simply referred to as the AD value storage completion time.

Further, the RAM 13 stores at least the latest value of the AD value storage completion time and the previous value which is one value before the latest value. As shown in FIG. 4, the RAM 13 is provided with a plurality of areas RAM_AD [i] for storing the AD value storage completion time. The "i" in [] indicates the order. For example, assuming that the current (that is, the latest) AD value storage completion time is the nth, the nth AD value storage completion time "DAn" is stored in the area RAM_AD [n]. Further, the previous AD value storage completion time "DAn-1" is stored in the area RAM_AD [n-1].

Then, as shown in S170, when the DMA transfer of the FRC value is completed, that is, when the storage of the AD value storage completion time is completed, an interrupt request is generated by the request generation unit in the microcomputer 5, for example. Then, the CPU 7 executes the processing of S210 to S240 as, for example, interrupt processing.

Here, the description once moves to the description based on FIG.
In FIG. 3, as shown in S310, when the periodic task activation timer 22 expires and a second trigger signal is generated, the periodic task is activated and the DMA transfer request of the FRC value is output to the DMAC 17. Therefore, as shown in S320, the DMAC 17 performs the DMA transfer of the FRC value from the FRC 30 to the RAM 13.

By the DMA transfer in S320, the current FRC value is stored in the RAM 13 as the start time of the periodic task (hereinafter, the start time of the periodic task). This periodic task start time is also the time when the second trigger signal is generated. In the following, the FRC value as the periodic task activation time is simply referred to as the periodic task activation time.

Further, the RAM 13 stores at least the latest value of the periodic task start time and the previous value which is one value before the latest value. As shown in FIG. 4, the RAM 13 is provided with a plurality of areas RAM_TASK [i] for storing the periodic task start time. The "i" in [] indicates the order. For example, assuming that the current (that is, the latest) periodic task activation time is the nth, the nth periodic task activation time "DTn" is stored in the area RAM_TASK [n]. Further, the previous periodic task start time "DTn-1" is stored in the area RAM_TASK [n-1].

Then, as shown in S330, when the DMA transfer of the FRC value is completed, that is, when the storage of the periodic task start time is completed, an interrupt request is generated by the request generation unit in the microcomputer 5, for example. Then, the CPU 7 executes the processing of S410 to S490 as, for example, interrupt processing. Therefore, the periodic task is activated by the generation of the second trigger signal, but most or all of the periodic task is executed after the processing of S410 to S490 in FIG. The processing of S410 to S490 and the periodic task may be executed in parallel in the form of, for example, multitasking.

Here, the description returns to the description based on FIG.
As shown in FIG. 2, among the processes of S210 to S240 performed by the CPU 7 in connection with the generation of the first trigger signal, in S210 after the storage of the AD value storage completion time is completed, the periodic task is started from the RAM 13. Read and acquire "DTn" which is the latest value of the time. Further, "DTn-1", which is the previous value of the periodic task start time, is read and acquired from the RAM 13. The periodic task start time is stored in the RAM 13 by the DMA transfer operation of S320 in FIG. 3 described above.

In the next S220, the CPU 7 determines whether or not "DTn-DTn-1", which is the difference between "DTn" and "DTn-1" acquired in S210, is within the normal range. “DTn-DTn-1” corresponds to the measured value of the activation cycle of the periodic task. The normal range is the normal range of the activation cycle of the periodic task, and is the normal range set in the design of Tc for a certain period of time. For example, the normal range may be set to ± 10 μs, which is a standard value of Tc for a certain period of time.

For example, in S210 after the DMA transfer of the AD value is completed at time t7 in FIG. 4, the value (that is, 0x00001F45) stored in the area RAM_TASK [n] in FIG. 4 is the latest value of the periodic task start time. It is read as "DTn". Further, the value (that is, 0x00000FA5) stored in the area RAM_TASK [n-1] in FIG. 4 is read out as the previous value “DTn-1” of the periodic task start time. Then, in S220 of this time, it is determined whether or not "0xFA0", which is "0x00001F45-0x00000FA5", is within the normal range. In addition, "0x ..." is a numerical value displayed in hexagon.

When the CPU 7 determines in S220 that "DTn-DTn-1" is within the normal range, the CPU 7 ends the process of FIG. 2 as it is, but "DTn-DTn-1" is not within the normal range. If it is determined, the process proceeds to S230.

In S230, the CPU 7 determines whether or not "DTn-DTn-1" is larger than the normal range, and when it is determined that "DTn-DTn-1" is larger than the normal range, that is, the actual periodic task. If the activation cycle of is longer than the normal range, the process proceeds to S250. Then, in this S250, the periodic task is started, and then the process proceeds to S240. The periodic task started in S250 is started, for example, after the process of FIG. 2 is completed. Then, when the periodic task is started in S250, it is possible to suppress that the number of times the periodic task is executed is reduced (that is, the task is omitted).

Further, when the CPU 7 determines in S230 that "DTn-DTn-1" is not larger than the normal range, that is, when the actual start cycle of the periodic task is shorter than the normal range, S240 is used as it is. Proceed to.

Then, in S240, the CPU 7 restarts the periodic task start timer 22 so that the second trigger signal is generated every Tc for a certain period of time and after a predetermined time Ts from the generation timing of the first trigger signal. .. Specifically, the value corresponding to Tc is reset for a certain period of time in the compare register constituting the periodic task start timer 22. Further, the timer counter constituting the periodic task start timer 22 is preset with a value at which the timer 22 expires after a predetermined time Ts from the current generation timing of the first trigger signal, and the timer counter counts. Start up. As another example, in S240, both the AD conversion start timer 21 and the periodic task start timer 22 are set in the same manner as the settings performed in the above-mentioned initial setting process, and both timers 21 and 22 are set. May be restarted.

Then, the CPU 7 finishes the process of FIG. 2 after performing the process of S240.
On the other hand, as shown in FIG. 3, among the processes of S410 to S490 performed by the CPU 7 in connection with the generation of the second trigger signal, in S410 after the storage of the periodic task start time is completed, the AD value is determined from the RAM 13. Read and acquire "DAn" which is the latest value of the storage completion time. Further, "DAn-1", which is the previous value of the AD value storage completion time, is read and acquired from the RAM 13. The AD value storage completion time is stored in the RAM 13 by the DMA transfer operation of S160 in FIG. 2 described above.

In the next S420, the CPU 7 determines whether or not "DAn-DAn-1", which is the difference between "DAn" and "DAn-1" acquired in S410, is within the normal range. "DAn-DAn-1" corresponds to the measured value of the storage cycle of the AD value. This normal range is the normal range of the storage cycle of the AD value, and may be set to the same value as the normal range of the start cycle of the periodic task, or may be set to a different value.

For example, in S410 after the second trigger signal is generated at time t6 in FIG. 4 and the storage of the periodic task start time is completed, the value stored in the area RAM_AD [n] in FIG. 4 (that is, 0x00001F40). ) Is read as the latest value "DAn" of the AD value storage completion time. Further, the value (that is, 0x00000FA0) stored in the area RAM_AD [n-1] in FIG. 4 is read out as the previous value “DAn-1” of the AD value storage completion time. Then, in S420 of this time, it is determined whether or not "0xFA0", which is "0x00001F40-0x00000FA0", is within the normal range.

When the CPU 7 determines in S420 that "DAn-DAn-1" is not within the normal range, the CPU 7 proceeds to S430.
In S430, the CPU 7 determines whether or not "DAn-DAn-1" is larger than the normal range, and when it is determined that "DAn-DAn-1" is larger than the normal range, that is, the actual AD value. If the storage cycle of is longer than the normal range, the process proceeds to S450. Then, in this S450, the AD conversion unit 15 immediately starts the AD conversion of the in-cylinder pressure signal, and then proceeds to S440. By starting the AD conversion in S450, it is possible to increase the possibility that the AD value immediately before can be used in this periodic task.

Further, when the CPU 7 determines in S430 that "DAn-DAn-1" is not larger than the normal range, that is, when the actual storage cycle of the AD value is shorter than the normal range, S440 as it is. Proceed to.

Then, in S440, the CPU 7 causes the AD conversion start timer 21 so that the first trigger signal is generated every Tc for a certain period of time and after the time of "Tc-Ts" from the generation timing of the second trigger signal. To restart. Specifically, the value corresponding to Tc is reset for a certain period of time in the compare register constituting the AD conversion start timer 21. Further, the timer counter constituting the AD conversion start timer 21 is preset with a value at which the timer 21 expires after "Tc-Ts" from the current generation timing of the second trigger signal, and the timer counter is set. Start counting up. As another example, in S440, both the AD conversion start timer 21 and the periodic task start timer 22 are set to the same settings as those performed in the above-mentioned initial setting process, and both timers 21 and 22 are set. May be restarted.

Then, the CPU 7 finishes the process of FIG. 3 after performing the process of S440.
If the CPU 7 determines in S420 that "DAn-DAn-1" is within the normal range, the CPU 7 proceeds to S460.

In S460, the CPU 7 reads and acquires "DAn", which is the latest value of the AD value storage completion time, from the RAM 13. Further, the latest value of the periodic task start time "DTn" and the previous value of the periodic task start time "DTn-1" are read and acquired from the RAM 13.

For example, in S460 after the second trigger signal is generated at time t6 in FIG. 4 and the storage of the periodic task start time is completed, it is stored in the area RAM_AD [n] in FIG. 4 as in S410 of this time. The value (that is, 0x00001F40) is read out as the latest value "DAn" of the AD value storage completion time. Then, the value stored in the area RAM_TASK [n] in FIG. 4 and stored in the operation of S320 this time (that is, 0x00001F45) is read out as the latest value "DTn" of the periodic task start time. .. Further, the value (that is, 0x00000FA5) stored in the area RAM_TASK [n-1] in FIG. 4 is read out as the previous value “DTn-1” of the periodic task start time.

Then, in the next S470, the CPU 7 determines whether or not the magnitude relationship of "DTn-1 <DAn <DTn" is established for the value acquired in S460. In addition, "<" indicating the magnitude relationship indicates that the numerical value indicating the time is "a larger value", and that the time itself is "an advanced time". Further, the "DAn" may not be read from the RAM 13 in S460, but the "DAn" read in S410 may be used in S470.

That is, in S470, the latest AD value storage completion time (that is, DAn) is inserted between the previous periodic task start time (that is, DTn-1) and the current periodic task start time (that is, DTn). It is judged whether or not it is. Therefore, according to this S470, it is determined whether or not the storage of the AD value in the RAM 13 is completed after the periodic task is started last time and before it is started this time.

When the CPU 7 determines in S470 that the magnitude relationship of "DTn-1 <DAn <DTn" is established, that is, the AD value RAM 13 after the periodic task was last started and before it is started this time. When it is determined that the storage in the storage is completed, the process is terminated as shown in FIG. 3 because it is as designed (that is, normal).

Further, when the CPU 7 determines in S470 that the magnitude relationship of "DTn-1 <DAn <DTn" is not established, that is, the AD value is obtained after the periodic task was last started and before it is started this time. If it is determined that the storage in the RAM 13 is not completed, the process proceeds to S480.

In S480, the CPU 7 causes the AD conversion unit 15 to immediately start AD conversion of the in-cylinder pressure signal, and then proceeds to S490. By starting the AD conversion in S480, it is possible to increase the possibility that a newer AD value can be used in this periodic task.

Then, in S490, the CPU 7 causes the first trigger signal to be generated every Tc for a certain period of time and after a time of "Tc-Ts" from the generation timing of the second trigger signal, as in the case of S440 described above. The AD conversion start timer 21 is restarted, and then the process of FIG. 3 is terminated. Also in S490, both the AD conversion start timer 21 and the periodic task start timer 22 are set in the same manner as the settings performed in the above-mentioned initial setting process, and both timers 21 and 22 are restarted. You may.

[4. effect]
According to the ECU 1 of the embodiment described in detail above, the following effects are obtained.
(1-1) Using the first trigger signal generated by the AD conversion start timer 21 as a trigger, AD conversion of the analog signal used for controlling the engine 3 and DMA transfer of the AD value to the RAM 13 by the AD conversion (1-1). That is, storage in the RAM 13) is sequentially performed. On the other hand, a second trigger signal whose phase is out of phase with the first trigger signal by a predetermined time Ts is generated by the periodic task activation timer 22, and the periodic task is activated by using this second trigger signal as a trigger. .. Therefore, it is easy to stabilize the activation cycle of the periodic task.

As a comparative example, as shown in FIG. 5, the AD conversion is performed by the generation of the first trigger signal, and the periodic task is started with the completion of the DMA transfer of the AD value to the RAM 13 by the AD conversion as a trigger. It is assumed that it is configured to. In the case of this comparative example, the time from the generation of the first trigger signal to the completion of the DMA transfer of the AD value, that is, the time required for the AD conversion and the storage of the AD value in the RAM 13 is, for example, the above-mentioned factors. As a result, the activation cycle of the periodic task fluctuates. On the other hand, in the present embodiment, since the periodic task is activated by the second trigger signal generated every Tc for a certain period of time, it is easy to suppress the deviation of the activation cycle of the periodic task.

(1-2) By determining S470 in FIG. 3, the CPU 7 determines whether or not the storage of the AD value in the RAM 13 is completed after the periodic task was last started and before it is started this time. .. Therefore, it is possible to detect that the storage of the AD value in the memory is not completed after the periodic task is started last time and before it is started this time. Therefore, it becomes possible to detect that the latest AD value cannot be used in the periodic task. Then, when this situation occurs, for example, in order to increase the possibility that a newer AD value can be used in the periodic task, or to suppress the influence of not being able to use the latest AD value in the periodic task. It becomes possible to carry out measures such as measures for suppressing deterioration of control performance.

As a measure for increasing the possibility that a newer AD value can be used in the periodic task, for example, as shown in S480 of FIG. 3, the AD conversion is started immediately regardless of the generation of the first trigger signal. It may be. Further, as a measure for suppressing the influence of not being able to use the latest AD value in the periodic task, for example, the voltage value of the current analog signal is calculated from each AD value obtained by a plurality of AD conversions in the past. It may be a measure of predicting and using the predicted value for the control of the engine 3.

(2) The CPU 7 determines S470 in FIG. 3 each time a second trigger signal is generated. Therefore, every time the periodic task is started, it can be confirmed whether or not the storage of the AD value in the RAM 13 is completed between the previous start and the current start. Further, when the storage of the AD value in the RAM 13 is not completed, the AD conversion is started immediately, so that the possibility that a newer AD value can be used in the current periodic task can be increased.

(3) Every time the storage of the AD value in the RAM 13 is completed, the AD value storage completion time is stored in the RAM 13 by the operation of the DMAC 17 in S160 in FIG. Further, each time a second trigger signal is generated, the periodic task start time is stored in the RAM 13 by the operation of the DMAC17 in S320 in FIG. Then, in S470 in FIG. 3, the CPU 7 moves to the AD value RAM 13 after the periodic task was last started and before it is started this time, based on the AD value storage completion time and the periodic task start time stored in the RAM 13. Judges whether or not the storage of is completed. Therefore, the determination can be performed by comparing the times.

(4) The CPU 7 determines the SS 220 in FIG. 2 each time the storage of the AD value in the RAM 13 is completed. Then, in this S220, the latest periodic task activation time "DTn" stored in the RAM 13 and the periodic task activation time "DTn-1" stored one time before this "DTn" are combined. Based on the difference, it is determined whether or not the activation cycle of the periodic task is within the normal range. Since this determination is performed with the completion of storage of the AD value in the RAM 13 caused by the first trigger signal as a trigger regardless of whether or not the periodic task is activated, reliability is achieved in terms of monitoring the activation cycle of the periodic task. Is high.

(5) The CPU 7 determines S420 in FIG. 3 each time a second trigger signal is generated. Then, in this S420, "DAn" which is the latest AD value storage completion time stored in the RAM 13 and "DAn-1" which is the AD value storage completion time stored one time before this "DAn". Based on the difference from the above, it is determined whether or not the storage cycle of the AD value is within the normal range. Since this determination is performed using the second trigger signal as a trigger regardless of whether or not the AD conversion is performed or whether or not the AD value is stored in the RAM 13, it is reliable in terms of monitoring the storage cycle of the AD value. Is high.

In the above embodiment, the AD conversion start timer 21 corresponds to the first generation unit. The periodic task start timer corresponds to the second generation unit. The AD conversion unit 15 that performs the operation of S120 and the DMAC 17 that performs the operation of S140 correspond to the conversion storage execution unit. The RAM 13 corresponds to the memory. The CPU 7 corresponds to an execution unit that executes a periodic task. Further, the CPU 7 that performs the processing of S470 corresponds to the order monitoring unit. The DMAC 17 that performs the operation of S160 stores the completion time. The DMAC 17 that performs the operation of S320 corresponds to the start-up time storage unit. The CPU 7 that performs the processing of S220 corresponds to the startup cycle determination unit. The CPU 7 that performs the processing of S420 corresponds to the storage cycle determination unit.

[5. Other embodiments]
Although the embodiments of the present disclosure have been described above, the present disclosure is not limited to the above-described embodiments, and can be implemented in various modifications.

For example, the CPU 7 counts the number of times the AD value is stored in the RAM 13 immediately before or after S210 in FIG. 2, counts the number of times the periodic task is activated immediately before or after S410 in FIG. 3, and further in FIG. In S470, the determination of the contents described below may be performed.

That is, in S470, it may be determined whether or not "the number of times the AD value is stored is equal to or greater than the number of times the periodic task is started". Further, it may be determined whether or not "the number of times the AD value is stored and the number of times the periodic task is started are the same". Also by such a determination, it can be determined whether or not the storage of the AD value in the RAM 13 is completed after the periodic task is started last time and before it is started this time.

On the other hand, the AD value may be stored (that is, stored) in a memory different from the RAM 13. Further, both or one of the AD value storage completion time and the periodic task start time may be stored in a memory different from the memory in which the AD value is stored.

Further, one or both of S220 and S230 in FIG. 2 and S420 and S430 in FIG. 3 may not be executed. Further, the control target is not limited to the engine 3, and may be, for example, an electric motor, a transmission, or the like.

Further, the ECU 1 and its method described in the present disclosure are provided by a dedicated computer provided by configuring a processor and memory programmed to perform one or more functions embodied by a computer program. It may be realized. Alternatively, the ECU 1 and its method described in the present disclosure may be realized by a dedicated computer provided by configuring the processor with one or more dedicated hardware logic circuits. Alternatively, the ECU 1 and its method described in the present disclosure are configured by a combination of a processor and memory programmed to perform one or more functions and a processor composed of one or more hardware logic circuits. It may be realized by one or more dedicated computers. The computer program may also be stored on a computer-readable non-transitional tangible recording medium as an instruction executed by the computer. The method for realizing the functions of each part included in the ECU 1 does not necessarily include software, and all the functions may be realized by using one or a plurality of hardware.

Further, a plurality of functions possessed by one component in the above embodiment may be realized by a plurality of components, or one function possessed by one component may be realized by a plurality of components. Further, a plurality of functions possessed by the plurality of components may be realized by one component, or one function realized by the plurality of components may be realized by one component. Further, a part of the configuration of the above embodiment may be omitted. Further, at least a part of the configuration of the above embodiment may be added or replaced with the configuration of the other above embodiment.

Further, in addition to the above-mentioned ECU 1, a system having the ECU 1 as a component, a program for operating a computer as the ECU 1, a non-transitional substantive recording medium such as a semiconductor memory in which this program is recorded, an order abnormality determination method, etc. , The present disclosure can also be realized in various forms.

1 ... ECU, 7 ... CPU, 15 ... AD conversion unit, 17 ... DMA controller, 21 ... AD conversion start timer, 22 ... periodic task start timer.

Claims (5)

A first generating unit (21) configured to generate a first trigger signal at regular time intervals (Tc), and
When the first trigger signal is generated, AD conversion of the analog signal used for controlling the controlled object is performed, and when the AD conversion is completed, the AD value as a result of the AD conversion is stored in the memory (13). The conversion storage execution unit (15, 17, S120, S140) configured as described above,
A predetermined time (Ts) set to a time longer than the minimum time required for the AD conversion and the storage of the AD value in the memory from the generation timing of the first trigger signal and shorter than the fixed time. A second generator (22) configured to generate a second trigger signal at a timing deviated by).
When the second trigger signal is generated, an execution unit (7) configured to execute a periodic task including a process using the AD value stored in the memory as a task for performing the control. When,
An order monitoring unit configured to determine whether or not the conversion storage execution unit has completed the storage of the AD value in the memory after the periodic task was last started and before it is started this time. 7, S470) and
An electronic control device comprising. The electronic control device according to claim 1.
The order monitoring unit
The determination is made each time the second trigger signal is generated.
Electronic control device. The electronic control device according to claim 1 or 2.
Completion time storage unit (17, S160) configured to store the storage completion time, which is the time when the storage of the AD value in the memory is completed each time the storage of the AD value in the memory is completed. When,
Each time the second trigger signal is generated, the start-up time storage unit (17, S320) configured to store the time when the second trigger signal is generated as the start-up time of the periodic task. Prepare,
The order monitoring unit is configured to perform the determination based on the storage completion time stored by the completion time storage unit and the activation time stored by the activation time storage unit.
Electronic control device. The electronic control device according to claim 3.
Each time the storage of the AD value in the memory is completed, the latest start time and one time before the latest start time among the start times stored by the start time storage unit are stored. A start cycle determination unit (7, S220) configured to determine whether or not the start cycle of the cycle task is within the normal range based on the difference from the start time is further provided.
Electronic control device. The electronic control device according to claim 3 or 4.
Each time the second trigger signal is generated, among the storage completion times stored by the completion time storage unit, the latest storage completion time and the latest storage completion time are stored one time before the storage completion time. A storage cycle determination unit (7, S420) configured to determine whether or not the storage cycle of the AD value is within the normal range based on the difference from the storage completion time is further provided.
Electronic control device.

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