JP2021147678A - Formation method of dielectric film - Google Patents

Formation method of dielectric film Download PDF

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JP2021147678A
JP2021147678A JP2020050555A JP2020050555A JP2021147678A JP 2021147678 A JP2021147678 A JP 2021147678A JP 2020050555 A JP2020050555 A JP 2020050555A JP 2020050555 A JP2020050555 A JP 2020050555A JP 2021147678 A JP2021147678 A JP 2021147678A
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substrate
film
dielectric film
chamber
forming
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俊彦 中畑
Toshihiko Nakahata
俊彦 中畑
孝洋 西岡
Takahiro Nishioka
孝洋 西岡
真也 中村
Shinya Nakamura
真也 中村
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Ulvac Inc
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Abstract

To provide a formation method of a dielectric film capable of forming a dielectric film and suppressing a secular change of a warpage of a substrate to be treated as much as possible when the dielectric film is deposited on the other surface of the substrate to be treated.SOLUTION: A formation method of a dielectric film for forming the dielectric film on the other surface Swb of a substrate Sw to be treated, assuming that a predetermined thin film is deposited on one surface Swa of the substrate Sw to be treated, includes a film deposition step where the substrate to be treated and a target 2 are arranged in a vacuum chamber 1, an inert gas is introduced to the vacuum chamber in a vacuum atmosphere, and the dielectric film is deposited on the other surface of the substrate to be treated by sputtering the target, and further includes an annealing step where the substrate to be treated is heated to a predetermined temperature within a predetermined time Ts after the end of the film deposition step.SELECTED DRAWING: Figure 4

Description

本発明は、被処理基板をその一方の面に所定の薄膜が成膜されたものとし、被処理基板の他方の面に誘電体膜を形成する誘電体膜の形成方法に関する。 The present invention relates to a method for forming a dielectric film in which a predetermined thin film is formed on one surface of a substrate to be processed and a dielectric film is formed on the other surface of the substrate to be processed.

半導体デバイスの製造工程には、シリコンウエハなどの被処理基板(以下「基板」という)の一方の面に対して成膜処理を施す工程がある。近年では、基板を大径かつ薄肉のものにする傾向があり、このような基板には、通常、反りが生じている。そして、基板の一方の面(即ち、デバイス構造を形成する面)に例えばスパッタリング法による成膜処理で所定の薄膜を成膜すると、この成膜された薄膜の応力で反りが大きくなる(複数の薄膜を積層すると、反りが一層大きくなる)場合がある。このような基板の反りを可及的に小さくするために、基板の一方の面に所定の薄膜を成膜した後、基板の他方の面にも例えば窒化シリコン膜などの誘電体膜を成膜する場合がある(例えば、特許文献1参照)。 In the manufacturing process of a semiconductor device, there is a step of performing a film forming process on one surface of a substrate to be processed (hereinafter referred to as “substrate”) such as a silicon wafer. In recent years, there has been a tendency for the substrate to have a large diameter and a thin wall, and such a substrate usually has a warp. Then, when a predetermined thin film is formed on one surface of the substrate (that is, the surface forming the device structure) by, for example, a film forming process by a sputtering method, the stress of the formed thin film increases the warp (plurality). When thin films are laminated, the warp becomes even larger). In order to reduce the warpage of the substrate as much as possible, a predetermined thin film is formed on one surface of the substrate, and then a dielectric film such as a silicon nitride film is formed on the other surface of the substrate. (For example, see Patent Document 1).

然しながら、基板の他方の面にも誘電体膜を成膜しても、基板の反りが経時変化する(つまり、誘電体膜を成膜する前の状態に戻っていく)ことが判明した。そこで、本発明者らは、鋭意研究を重ね、成膜された誘電体膜の応力が時間の経過と共に低下し、これに起因して基板の反りが経時変化することを知見するのに至った。これは、誘電体膜の成膜時、真空チャンバ内に導入される希ガス(例えば、アルゴンガス)が誘電体膜中に取り込まれ、誘電体膜中に残存する希ガスの原子(例えば、アルゴン原子)が時間経過に伴う応力低下を引き起こすと考えた。 However, it was found that even if a dielectric film was formed on the other surface of the substrate, the warp of the substrate changed with time (that is, it returned to the state before the dielectric film was formed). Therefore, the present inventors have conducted extensive research and have come to find that the stress of the formed dielectric film decreases with the passage of time, and that the warp of the substrate changes with time due to this. .. This is because when the dielectric film is formed, a rare gas (for example, argon gas) introduced into the vacuum chamber is taken into the dielectric film, and a rare gas atom (for example, argon) remaining in the dielectric film is taken into the dielectric film. It was thought that the atom) causes a decrease in stress over time.

特開2009−295889号公報Japanese Unexamined Patent Publication No. 2009-295889

本発明は、上記知見に基づきなされたものであり、被処理基板の他方の面に誘電体膜を成膜したときに、被処理基板の反りの経時変化を可及的に抑制することができる誘電体膜を形成可能な誘電体膜の形成方法を提供することをその課題とするものである。 The present invention has been made based on the above findings, and when a dielectric film is formed on the other surface of the substrate to be treated, it is possible to suppress the change in warpage of the substrate to be treated with time as much as possible. An object of the present invention is to provide a method for forming a dielectric film capable of forming a dielectric film.

上記課題を解決するために、被処理基板をその一方の面に所定の薄膜が成膜されたものとし、被処理基板の他方の面に誘電体膜を形成する本発明の誘電体膜の形成方法は、真空チャンバ内に被処理基板とターゲットとを配置し、真空雰囲気の真空チャンバ内に希ガスを導入してターゲットをスパッタリングすることで被処理基板の他方の面に誘電体膜を成膜する成膜工程を含み、成膜工程の終了から所定時間内に、被処理基板を所定温度に加熱するアニール工程を更に含むことを特徴とする。 In order to solve the above problems, it is assumed that a predetermined thin film is formed on one surface of the substrate to be processed, and a dielectric film of the present invention is formed on the other surface of the substrate to be processed. The method is to place the substrate to be processed and the target in a vacuum chamber, introduce a rare gas into the vacuum chamber in a vacuum atmosphere, and sputter the target to form a dielectric film on the other surface of the substrate to be processed. It is characterized by further including an annealing step of heating the substrate to be processed to a predetermined temperature within a predetermined time from the end of the film forming step.

本発明によれば、アニール工程を追加して、その前工程(成膜工程)で不回避的に誘電体膜中に取り込まれた希ガス原子(アルゴン原子)を除去することで、時間経過に伴う誘電体膜の応力低下が可及的に抑制され、その結果、基板の反りの経時変化を可及的に抑制することができる。なお、アニール工程は、成膜工程の終了後、所定時間内(24時間以内)に実施しないと、時間経過に伴う誘電体膜の応力低下が可及的に抑制できず、しかも、誘電体膜として窒化シリコン膜を成膜する場合、アニール工程を750℃よりも低い温度で実施すると、却って、誘電体膜の応力が低下することが確認された。尚、本発明は、前記成膜工程にて、真空雰囲気の真空チャンバ内に希ガスと窒素含有ガスとを導入し、遷移領域で反応性スパッタリングすることで引張応力を有する窒化シリコン膜を成膜する場合に適用することが好ましい。 According to the present invention, by adding an annealing step and removing the noble gas atom (argon atom) unavoidably incorporated into the dielectric film in the previous step (deposition step), the time elapses. The accompanying decrease in stress of the dielectric film can be suppressed as much as possible, and as a result, the change in warpage of the substrate with time can be suppressed as much as possible. If the annealing step is not performed within a predetermined time (within 24 hours) after the film formation step is completed, the stress decrease of the dielectric film with the passage of time cannot be suppressed as much as possible, and the dielectric film cannot be suppressed. It was confirmed that when the silicon nitride film was formed as a film, the stress of the dielectric film was rather reduced when the annealing step was carried out at a temperature lower than 750 ° C. According to the present invention, in the film forming step, a rare gas and a nitrogen-containing gas are introduced into a vacuum chamber in a vacuum atmosphere, and reactive sputtering is performed in a transition region to form a silicon nitride film having tensile stress. It is preferable to apply it when

本発明の実施形態の誘電体膜の形成方法を実施するスパッタリング装置を模式的に説明する図。The figure schematically explaining the sputtering apparatus which carries out the method of forming the dielectric film of embodiment of this invention. 図1に示す成膜室を模式的に説明する図。The figure schematically explaining the film formation chamber shown in FIG. 図2に示す基板ステージの環状部材の平面図。The plan view of the annular member of the substrate stage shown in FIG. 本発明の効果を確認する実験結果を示すグラフ。The graph which shows the experimental result which confirms the effect of this invention. 本発明の効果を確認する実験結果を示すグラフ。The graph which shows the experimental result which confirms the effect of this invention.

以下、図面を参照して、被処理基板をその一方の面Swaに薄膜が成膜されたシリコンウエハ(以下「基板Sw」という)とし、基板Swの他方の面Swbに誘電体膜としての窒化シリコン膜を形成する場合を例に、本発明の誘電体膜の形成方法の実施形態について説明する。 Hereinafter, referring to the drawings, the substrate to be processed is a silicon wafer in which a thin film is formed on one surface Swa (hereinafter referred to as “substrate Sw”), and nitrided as a dielectric film on the other surface Swb of the substrate Sw. An embodiment of the method for forming a dielectric film of the present invention will be described by taking the case of forming a silicon film as an example.

図1を参照して、SMは、本実施形態の誘電体膜の形成方法を実施する、クラスターツールで構成されるスパッタリング装置である。スパッタリング装置SMは、搬送ロボットRが配置される搬送室Tcと、この搬送室Tcを囲うように配置される成膜室Pc1、アニール室Pc2及びロードロック室Lcとを備える。これら搬送室Tc、ロードロック室Lc、成膜室Pc1及びアニール室Pc2には、真空ポンプユニット(図示省略する場合もある)に通じる排気管が夫々接続され、各室を真空排気できるようになっている。また、ロードロック室Lcには、図示省略するベントガスラインが更に接続され、ロードロック室Lcを大気圧までベントできるようになっている。搬送ロボットRとしては、例えば、ロボットアーム10aと、ロボットアーム10aの先端に設けられて基板Swを保持するロボットハンド10bとを有する、所謂フロッグレッグ式の公知のものを用いることができ、この搬送ロボットRにより基板Swを各室の所定位置に搬送できるようになっている。また、搬送室Tcとロードロック室Lc、成膜室Pc1及びアニール室Pc2とは、仕切バルブIvを介してそれぞれ連結され、各室が相互に隔絶できるようになっている。 With reference to FIG. 1, the SM is a sputtering apparatus composed of a cluster tool that implements the method for forming a dielectric film of the present embodiment. The sputtering apparatus SM includes a transport chamber Tc in which the transport robot R is arranged, a film forming chamber Pc1 arranged so as to surround the transport chamber Tc, an annealing chamber Pc2, and a load lock chamber Lc. Exhaust pipes leading to a vacuum pump unit (may be omitted) are connected to each of the transport chamber Tc, the load lock chamber Lc, the film forming chamber Pc1 and the annealing chamber Pc2, so that each chamber can be evacuated. ing. Further, a vent gas line (not shown) is further connected to the load lock chamber Lc so that the load lock chamber Lc can be vented to atmospheric pressure. As the transfer robot R, for example, a known so-called frog leg type having a robot arm 10a and a robot hand 10b provided at the tip of the robot arm 10a and holding the substrate Sw can be used, and this transfer robot R can be used. The robot R can convey the substrate Sw to a predetermined position in each room. Further, the transport chamber Tc, the load lock chamber Lc, the film forming chamber Pc1 and the annealing chamber Pc2 are connected to each other via a partition valve Iv so that the chambers can be isolated from each other.

図2も参照して、成膜室Pc1は、真空チャンバ1によって画成される。真空チャンバ1には、ターボ分子ポンプやロータリーポンプなどからなる真空ポンプユニットPuに通じる排気管11が接続され、成膜室Pc1を真空排気できるようにしている。真空チャンバ1の側壁には、マスフローコントローラ12が介設されたガス管13が接続され、成膜室Pc1に希ガス(例えばアルゴンガス)と必要に応じて窒素ガスとを夫々所定流量で導入できるようになっている。以下においては、「上」「下」といった方向を示す用語は、図2に示す設置姿勢を基準として説明する。 With reference to FIG. 2, the film forming chamber Pc1 is defined by the vacuum chamber 1. An exhaust pipe 11 leading to a vacuum pump unit Pu including a turbo molecular pump, a rotary pump, or the like is connected to the vacuum chamber 1 so that the film forming chamber Pc1 can be evacuated. A gas pipe 13 provided with a mass flow controller 12 is connected to the side wall of the vacuum chamber 1, and a rare gas (for example, argon gas) and, if necessary, a nitrogen gas can be introduced into the film forming chamber Pc1 at predetermined flow rates, respectively. It has become like. In the following, terms indicating directions such as "up" and "down" will be described with reference to the installation posture shown in FIG.

真空チャンバ1の側壁上部には、シリコン製のターゲット2がバッキングプレート21に接合された状態で、絶縁体Io1を介して設けられている。ターゲット2には、スパッタ電源Psとしての高周波電源からの出力が接続され、スパッタリング時、所定周波数の高周波電力をターゲット2に投入できるようになっている。真空チャンバ1の下壁内面には、ターゲット2に対向させて基板ステージStが絶縁体Io2を介して配置されている。 A silicon target 2 is provided on the upper side wall of the vacuum chamber 1 via an insulator Io1 in a state of being joined to the backing plate 21. An output from a high-frequency power source as a sputtering power source Ps is connected to the target 2, so that high-frequency power of a predetermined frequency can be applied to the target 2 during sputtering. On the inner surface of the lower wall of the vacuum chamber 1, a substrate stage St is arranged via an insulator Io2 so as to face the target 2.

基板ステージStは、基板Swよりも一回り大きい輪郭を有する金属製の基台3と、基台3の上面に配置されて、基板Swの一方の面(下面)Swaが基台3上面と接しないように(隙間dが存するように)基板Swを支持する環状部材4とを備える。基台3には冷媒通路3aが穿設され、図外のチラーから供給される冷媒を循環させることで基台3を所定温度(例えば−20〜30℃)に冷却できるようになっている。図3も参照して、基台3の上面中央には突出部31が形成され、この突出部31の外周面に環状部材4の内周面下部を当接させることで、基台3上で環状部材4が位置決めされる。環状部材4は、環状壁41と、環状壁41の外周面から外方に延出して基台3上面の一部を覆うフランジ部42とを備える。環状壁41は、固定壁部41aと、所定の円弧長さを有する2個の可動壁部41bとで構成され、これらの内周面上部を構成する傾斜面41cに基板Swの外縁部が当接することで基板Swを支持できるようになっている。尚、基板Swの外縁部とは、デバイス構造が形成されない領域であり、例えば基板Swの外縁から2mm以内の領域をいう。2個の可動壁部41bは連結部材43により連結され、連結部材43の下面中央には、基台3中央部を上下方向に貫通して設けられるアクチュエータ44の駆動軸44aが接続されている。この駆動軸44aをアクチュエータ44により上下動することで、可動壁部41bが固定壁部41aに対して上下動自在となっており、これにより、基台3上面から近接離隔する方向に基板Swを移動自在となっている。 The substrate stage St is arranged on a metal base 3 having a contour slightly larger than that of the substrate Sw and on the upper surface of the base 3, and one surface (lower surface) Swa of the substrate Sw is in contact with the upper surface of the base 3. An annular member 4 that supports the substrate Sw so as not to be provided (so that the gap d exists) is provided. A refrigerant passage 3a is bored in the base 3, and the base 3 can be cooled to a predetermined temperature (for example, -20 to 30 ° C.) by circulating a refrigerant supplied from a chiller (not shown). With reference to FIG. 3, a protrusion 31 is formed in the center of the upper surface of the base 3, and the lower portion of the inner peripheral surface of the annular member 4 is brought into contact with the outer peripheral surface of the protrusion 31 on the base 3. The annular member 4 is positioned. The annular member 4 includes an annular wall 41 and a flange portion 42 that extends outward from the outer peripheral surface of the annular wall 41 and covers a part of the upper surface of the base 3. The annular wall 41 is composed of a fixed wall portion 41a and two movable wall portions 41b having a predetermined arc length, and the outer edge portion of the substrate Sw is in contact with the inclined surface 41c forming the upper part of the inner peripheral surface thereof. The substrate Sw can be supported by contacting the substrate Sw. The outer edge of the substrate Sw is a region where the device structure is not formed, for example, a region within 2 mm from the outer edge of the substrate Sw. The two movable wall portions 41b are connected by a connecting member 43, and a drive shaft 44a of an actuator 44 provided so as to penetrate the central portion of the base 3 in the vertical direction is connected to the center of the lower surface of the connecting member 43. By moving the drive shaft 44a up and down by the actuator 44, the movable wall portion 41b can move up and down with respect to the fixed wall portion 41a, whereby the substrate Sw is moved in a direction close to and separated from the upper surface of the base 3. It is movable.

また、アニール室Pc2は他の真空チャンバ1aによって画成される。アニール室Pc2にもまた上記基板ステージStが設けられ、基板Swの下面Swaが基台3上面と接しないように基板Swを支持できるようになっている。アニール室Pc2の上部にはランプユニットLuが配置され、基板ステージStで支持された基板Swを所定温度(例えば750℃以上の温度)に加熱できるようになっている。ランプユニットLuとしては、例えば赤外線ランプ等を備える公知のものを用いることができるため、詳細な説明を省略する。 Further, the annealing chamber Pc2 is defined by another vacuum chamber 1a. The annealing chamber Pc2 is also provided with the substrate stage St so that the substrate Sw can be supported so that the lower surface Swa of the substrate Sw does not come into contact with the upper surface of the base 3. A lamp unit Lu is arranged above the annealing chamber Pc2 so that the substrate Sw supported by the substrate stage St can be heated to a predetermined temperature (for example, a temperature of 750 ° C. or higher). As the lamp unit Lu, a known lamp unit including, for example, an infrared lamp can be used, and therefore detailed description thereof will be omitted.

上記スパッタリング装置SMは、マイクロコンピュータやシーケンサ等を備えた制御手段Ctを有し、搬送ロボットRの稼働、仕切バルブIvの稼働、真空ポンプユニットPuの稼働、アクチュエータ44の駆動、マスフローコントローラ12の稼働、スパッタ電源Psの稼働や、ランプユニットLuの稼働等を統括制御するようにしている。以下、上記スパッタリング装置SMを用い、基板Swの他方の面(上面)Swbに窒化シリコン膜を形成する場合を例に、誘電体膜の形成方法について説明する。 The sputtering apparatus SM has a control means C equipped with a microcomputer, a sequencer, and the like, and operates a transfer robot R, a partition valve Iv, a vacuum pump unit Pu, an actuator 44, and a mass flow controller 12. , The operation of the sputter power supply Ps, the operation of the lamp unit Lu, etc. are controlled in an integrated manner. Hereinafter, a method for forming a dielectric film will be described by taking as an example a case where a silicon nitride film is formed on the other surface (upper surface) Swb of the substrate Sw by using the sputtering apparatus SM.

ロードロック室Lcに成膜前の基板Swをその他方の面Swbを上方に向けた姿勢で投入し、ロードロック室Lcを所定の真空度まで真空排気すると、搬送ロボットRにより基板Swをロードロック室Lcから搬送室Tcに搬送する。これと共に真空チャンバ1内(成膜室Pc1)を所定の真空度(例えば、1×10−5Pa)まで真空排気すると、アクチュエータ44により可動壁部41bを所定の高さ位置まで上動させ、この状態で搬送ロボットRのロボットハンド10bに保持された基板Swを可動壁部41bに受け渡す。ロボットハンド10bを退避すると、基板Swはその外縁部の一部が可動壁部41bの傾斜面41cに当接することで支持された状態となる。そして、アクチュエータ44により可動壁部41bを下動させると、基板Swの外縁部の残り部分が固定壁部41aの傾斜面41cに当接することで、基台3上面から隙間dを存して基板Swがその全周に亘って環状壁41で支持される。その後、スパッタガスとしてアルゴンガスと窒素ガスを70〜80sccm、15〜35sccmの流量で夫々導入し(このとき、成膜室Pc1の圧力は0.1〜0.4Paとなる)反応性スパッタリングにおける所謂遷移領域(金属モードから化合物モードに遷移する領域)に保持する。これと併せて、高周波電源Psからターゲット2に例えば150KHz〜13.56MHzの高周波電力を4kW〜6kW投入する。これにより、真空チャンバ1内にプラズマ雰囲気が形成され、ターゲット2が反応性スパッタリングされる。スパッタリング中、基台3の冷媒通路3aに冷媒を循環させることで、基台3上面を所定温度(22℃)に冷却する。スパッタリングによりターゲット2から飛散したスパッタ粒子と窒素ガスとの反応生成物を基板Swの表面に付着、堆積させることで、基板Sw表面に窒化シリコン膜が成膜される(成膜工程)。成膜処理を所定時間行うと、成膜済みの基板Swが搬送ロボットRにより成膜室Pc1から搬送室Tcに取り出される。 When the substrate Sw before film formation is put into the load lock chamber Lc with the other side Swb facing upward and the load lock chamber Lc is evacuated to a predetermined degree of vacuum, the substrate Sw is load-locked by the transfer robot R. It is transported from the chamber Lc to the transport chamber Tc. At the same time, when the inside of the vacuum chamber 1 (deposition chamber Pc1) is evacuated to a predetermined degree of vacuum (for example, 1 × 10 -5 Pa), the actuator 44 moves the movable wall portion 41b up to a predetermined height position. In this state, the substrate Sw held by the robot hand 10b of the transfer robot R is delivered to the movable wall portion 41b. When the robot hand 10b is retracted, the substrate Sw is supported by a part of its outer edge portion abutting on the inclined surface 41c of the movable wall portion 41b. Then, when the movable wall portion 41b is moved downward by the actuator 44, the remaining portion of the outer edge portion of the substrate Sw comes into contact with the inclined surface 41c of the fixed wall portion 41a, so that a gap d is left from the upper surface of the base 3 and the substrate is formed. Sw is supported by an annular wall 41 all around it. After that, argon gas and nitrogen gas were introduced as sputtering gases at a flow rate of 70 to 80 sccm and 15 to 35 sccm, respectively (at this time, the pressure in the film forming chamber Pc1 was 0.1 to 0.4 Pa), so-called reactive sputtering. It is retained in the transition region (the region that transitions from the metal mode to the compound mode). At the same time, 4 kW to 6 kW of high frequency power of, for example, 150 KHz to 13.56 MHz is input to the target 2 from the high frequency power supply Ps. As a result, a plasma atmosphere is formed in the vacuum chamber 1, and the target 2 is reactively sputtered. During sputtering, the upper surface of the base 3 is cooled to a predetermined temperature (22 ° C.) by circulating the refrigerant through the refrigerant passage 3a of the base 3. A silicon nitride film is formed on the surface of the substrate Sw by adhering and depositing the reaction product of the sputtered particles scattered from the target 2 by sputtering and the nitrogen gas on the surface of the substrate Sw (film formation step). When the film forming process is performed for a predetermined time, the film-deposited substrate Sw is taken out from the film-forming chamber Pc1 to the transport chamber Tc by the transfer robot R.

このように成膜された窒化シリコン膜の膜中には、スパッタガスとして導入される希ガス(例えばアルゴンガス)が不可避的に取り込まれ、窒化シリコン膜中に残存するアルゴン原子が時間経過に伴う応力低下を引き起こし、これに起因して基板Swの反りが経時変化する。 A rare gas (for example, argon gas) introduced as a sputter gas is inevitably taken into the film of the silicon nitride film formed in this way, and the argon atom remaining in the silicon nitride film is with the passage of time. It causes a decrease in stress, which causes the warp of the substrate Sw to change over time.

そこで、本実施形態では、成膜工程の終了から所定時間Ts内に、成膜室Pc1からアニール室Pc2に基板Swをin-situで搬送し、成膜工程に引き続き真空雰囲気に曝された状態の基板SwをランプユニットLuにより所定温度に加熱する(アニール工程)。ここで、成膜工程の終了からアニール工程までの時間は、時間経過に伴う窒化シリコン膜の応力低下が抑制できる時間(例えば24時間以内)に設定される。また、アニール工程で加熱される基板Swの温度は、窒化シリコン膜中に取り込まれたアルゴン原子を効率良く除去できる温度(例えば750℃以上)に設定される。アニール処理を所定時間(例えば40〜70秒)実施した後、ランプユニットLuを一旦停止して基板Swを冷却する。基板Swが所定温度(例えば200℃)まで冷却されると、アニール室Pc2から基板Swを取り出してロードロック室Lcに搬送し、ロードロック室Lcを大気圧までベントした後、基板Swを回収する。 Therefore, in the present embodiment, the substrate Sw is conveyed in-situ from the film forming chamber Pc1 to the annealing chamber Pc2 within a predetermined time Ts from the end of the film forming process, and is exposed to the vacuum atmosphere following the film forming process. The substrate Sw of the above is heated to a predetermined temperature by the lamp unit Lu (annealing step). Here, the time from the end of the film forming step to the annealing step is set to a time (for example, within 24 hours) in which the stress decrease of the silicon nitride film with the passage of time can be suppressed. Further, the temperature of the substrate Sw heated in the annealing step is set to a temperature (for example, 750 ° C. or higher) at which argon atoms incorporated in the silicon nitride film can be efficiently removed. After the annealing treatment is performed for a predetermined time (for example, 40 to 70 seconds), the lamp unit Lu is temporarily stopped to cool the substrate Sw. When the substrate Sw is cooled to a predetermined temperature (for example, 200 ° C.), the substrate Sw is taken out from the annealing chamber Pc2 and conveyed to the load lock chamber Lc, the load lock chamber Lc is vented to atmospheric pressure, and then the substrate Sw is recovered. ..

以上説明した本実施形態によれば、アニール工程を追加して、その前工程である成膜工程で不可避的に窒化シリコン膜中に取り込まれたアルゴン原子を除去することで、時間経過に伴う窒化シリコン膜の応力低下が可及的に抑制され、その結果、基板Swの反りの経時変化を可及的に抑制することができる。 According to the present embodiment described above, nitriding with the passage of time is performed by adding an annealing step and removing argon atoms inevitably incorporated into the silicon nitride film in the film forming step which is the previous step. The decrease in stress of the silicon film can be suppressed as much as possible, and as a result, the change in warpage of the substrate Sw with time can be suppressed as much as possible.

次に、上記効果を確認するために、上記スパッタリング装置SMを用いて、以下の実験を行った。発明実験では、基板Swとして、φ300mmのベアシリコンウエハを用い、公知のBOWにより基板Swの反り(基板Swを吸着しない状態での基準平面からの基板Sw中心の高さ)を測定したところ、約+50μmであった(即ち、基板Swの中心が外延部よりも約50μm高かった)。この基板Swを成膜室Pc1のステージStで支持し(このときの基台3上面と基板Swとの間の隙間dは0.5mm)、アルゴンガスを流量75sccm、窒素ガスを流量30sccmで真空チャンバ1内に夫々導入し(このときの真空チャンバ1内の圧力は約0.4Pa)、これと併せて高周波電源Psからシリコン製のターゲット2に150kHzの高周波電力を6kW投入することにより、ターゲット2をスパッタリングして基板Sw上面に窒化シリコン膜を110nmの膜厚で成膜した(成膜工程)。成膜中、基台3の上面を22℃に冷却した。図5に示すように、成膜工程終了直後の窒化シリコン膜の応力(本実験では引張応力)を公知の例えばオプティカルレバー型応力測定装置により測定したところ、266MPaであり、また、基板Swの反りを上記測定方法(BOW)で測定したところ、−17.15μmであった(即ち、基板Swの外延部が中心よりも17.15μm高かった)。測定後、基板Swをアニール室Pc2に搬送し、成膜工程終了から2時間後に、真空雰囲気のアニール室Pc2にてランプユニットLuにより基板Swを750℃の温度に加熱してアニール処理を実施した(アニール工程)。アニール処理を40秒実施した後、ランプユニットLuを一旦停止して基板Swを冷却した。基板Swが200℃まで冷却されると、アニール室Pc2から基板Swを取り出した。アニール工程終了直後の窒化シリコン膜の応力を測定したところ、385MPaであり、アニール処理を施すことで窒化シリコン膜の応力が119MPa高くなることが確認された。また、アニール工程終了直後の基板Swの反りを測定したところ、−25.02μmであった。次に、成膜工程終了から24時間後、72時間後の窒化シリコン膜の応力を夫々測定したところ、両者とも378MPaであり、アニール工程終了直後と同等(1.2%低下)であることが確認された。また、成膜工程終了から24時間後、72時間後の基板Swの反りを夫々求めたところ、−24.71μm,−24.78μmであり、アニール工程終了直後と同等であることが確認された。このように、成膜工程終了から所定時間Ts内にアニール工程を実施することで、時間経過に伴う窒化シリコン膜の応力低下が可及的に抑制され、その結果、基板Swの反りの経時変化を可及的に抑制できることが判った。 Next, in order to confirm the above effect, the following experiment was carried out using the above sputtering apparatus SM. In the invention experiment, a bare silicon wafer having a diameter of 300 mm was used as the substrate Sw, and the warp of the substrate Sw (the height of the center of the substrate Sw from the reference plane without adsorbing the substrate Sw) was measured by a known BOW. It was +50 μm (ie, the center of the substrate Sw was about 50 μm higher than the extension). This substrate Sw is supported by the stage St of the film forming chamber Pc1 (the gap d between the upper surface of the base 3 and the substrate Sw at this time is 0.5 mm), and the argon gas is evacuated at a flow rate of 75 sccm and the nitrogen gas is evacuated at a flow rate of 30 sccm. Each of them is introduced into the chamber 1 (the pressure in the vacuum chamber 1 at this time is about 0.4 Pa), and at the same time, 6 kW of high frequency power of 150 kHz is applied to the silicon target 2 from the high frequency power supply Ps to make the target. 2 was sputtered to form a silicon nitride film on the upper surface of the substrate Sw with a film thickness of 110 nm (deposition step). During the film formation, the upper surface of the base 3 was cooled to 22 ° C. As shown in FIG. 5, the stress of the silicon nitride film immediately after the film formation process (tensile stress in this experiment) was measured by a known optical lever type stress measuring device, for example, and found to be 266 MPa, and the warpage of the substrate Sw. Was measured by the above measuring method (BOW) and found to be -17.15 μm (that is, the outer extension of the substrate Sw was 17.15 μm higher than the center). After the measurement, the substrate Sw was conveyed to the annealing chamber Pc2, and two hours after the completion of the film forming process, the substrate Sw was heated to a temperature of 750 ° C. by the lamp unit Lu in the annealing chamber Pc2 in a vacuum atmosphere to perform the annealing treatment. (Annealing process). After the annealing treatment was carried out for 40 seconds, the lamp unit Lu was temporarily stopped to cool the substrate Sw. When the substrate Sw was cooled to 200 ° C., the substrate Sw was taken out from the annealing chamber Pc2. The stress of the silicon nitride film immediately after the completion of the annealing step was measured and found to be 385 MPa, and it was confirmed that the stress of the silicon nitride film was increased by 119 MPa by performing the annealing treatment. Moreover, when the warp of the substrate Sw immediately after the completion of the annealing step was measured, it was -25.02 μm. Next, when the stress of the silicon nitride film was measured 24 hours and 72 hours after the completion of the film forming process, both were 378 MPa, which was equivalent to that immediately after the completion of the annealing process (1.2% decrease). confirmed. Further, when the warpage of the substrate Sw 24 hours and 72 hours after the completion of the film forming process was determined, it was confirmed that the values were -24.71 μm and -24.78 μm, which were equivalent to those immediately after the completion of the annealing process. .. By carrying out the annealing step within Ts for a predetermined time from the end of the film forming step in this way, the stress decrease of the silicon nitride film with the passage of time is suppressed as much as possible, and as a result, the warp of the substrate Sw changes with time. It was found that can be suppressed as much as possible.

次に、比較実験1では、アニール工程を実施しない点を除き、上記発明実験と同様に成膜工程を行った。成膜工程終了直後の窒化シリコン膜の応力を測定したところ、267MPaであり、また、基板Swの反りを上記測定方法(BOW)で測定したところ、−17.55μmであった(図5参照)。成膜工程終了から24時間後、72時間後の窒化シリコン膜の応力を夫々測定したところ、240MPa,232MPaであり、成膜工程終了直後から10%以上低下することが確認された。また、成膜工程終了から24時間後、72時間後の基板Swの反りを夫々求めたところ、−15.76μm,−15.29μmであり、基板Swの反りが成膜工程終了直後から大きく変化することが確認された。このように、アニール工程を実施しない場合には、成膜された窒化シリコン膜の応力が時間の経過と共に低下し、これに起因して基板Swの反りが経時変化することが判った。 Next, in Comparative Experiment 1, a film forming step was carried out in the same manner as in the above-mentioned invention experiment, except that the annealing step was not carried out. The stress of the silicon nitride film immediately after the film formation step was measured and found to be 267 MPa, and the warpage of the substrate Sw was measured by the above measuring method (BOW) and found to be -17.55 μm (see FIG. 5). .. When the stress of the silicon nitride film was measured 24 hours and 72 hours after the completion of the film forming process, the stresses were 240 MPa and 232 MPa, respectively, and it was confirmed that the stress decreased by 10% or more immediately after the completion of the film forming process. Further, when the warpage of the substrate Sw 24 hours and 72 hours after the completion of the film forming process was determined, it was -15.76 μm and -15.29 μm, respectively, and the warp of the substrate Sw changed significantly immediately after the completion of the film forming process. It was confirmed that As described above, it was found that when the annealing step was not performed, the stress of the formed silicon nitride film decreased with the passage of time, and the warp of the substrate Sw changed with time due to this.

次に、比較実験2では、成膜工程を1310秒行った後、成膜工程の終了から24時間以上(例えば72時間)経過後にアニール工程を実施する点を除き、上記発明実験と同様の条件で成膜工程及びアニール工程を実施した。本比較実験2によれば、特に図示しないが、時間経過に伴う窒化シリコン膜の応力低下を可及的に抑制できないことが確認された。また、基板Swの反りを測定したところ、成膜工程終了直後は−311.28μmであり、成膜工程終了から72時間後(アニール工程前)は−281.51μmであり、アニール工程は−257.49μmであった。このように、成膜工程の終了から所定時間経過後にアニール工程を実施しても、時間経過に伴う窒化シリコン膜の応力低下を可及的に抑制できず、これに共に、基板Swの反りが経時変化することが判った。 Next, in the comparative experiment 2, the conditions are the same as those of the above-mentioned invention experiment except that the film forming step is performed for 1310 seconds and then the annealing step is performed 24 hours or more (for example, 72 hours) after the film forming step is completed. The film forming step and the annealing step were carried out in. According to this comparative experiment 2, although not shown in particular, it was confirmed that the stress decrease of the silicon nitride film with the passage of time could not be suppressed as much as possible. Further, when the warp of the substrate Sw was measured, it was -311.28 μm immediately after the end of the film forming process, -281.51 μm 72 hours after the end of the film forming process (before the annealing process), and -257 in the annealing process. It was .49 μm. As described above, even if the annealing step is performed after a lapse of a predetermined time from the end of the film forming step, the stress decrease of the silicon nitride film with the lapse of time cannot be suppressed as much as possible, and the warp of the substrate Sw is also caused. It was found that it changed over time.

次に、比較実験3では、成膜工程を1200秒行った点とアニール処理の温度を500℃に設定した点とを除き、上記発明実験と同様の条件で成膜工程及びアニール工程を実施した。本比較実験3によれば、特に図示しないが、時間経過に伴う窒化シリコン膜の応力低下を可及的に抑制できないことが確認された。また、基板Swの反りを測定したところ、アニール工程終了直後は−347.85μmであり、成膜工程終了から24時間後は−333.50μm、48時間後は−329.77μmであった。このように、成膜工程終了から所定時間内にアニール工程を実施しても、アニール工程を750℃よりも低い温度で実施すると、却って窒化シリコン膜の応力が低下し、これに伴い基板Swの反りが経時変化することが判った。 Next, in Comparative Experiment 3, the film forming step and the annealing step were carried out under the same conditions as the above-mentioned invention experiment except that the film forming step was performed for 1200 seconds and the annealing temperature was set to 500 ° C. .. According to this comparative experiment 3, although not shown in particular, it was confirmed that the stress decrease of the silicon nitride film with the passage of time could not be suppressed as much as possible. Further, when the warp of the substrate Sw was measured, it was -347.85 μm immediately after the completion of the annealing step, -333.50 μm 24 hours after the end of the film formation step, and -329.77 μm 48 hours later. In this way, even if the annealing step is carried out within a predetermined time from the end of the film forming step, if the annealing step is carried out at a temperature lower than 750 ° C., the stress of the silicon nitride film is rather lowered, and the stress of the silicon nitride film is reduced accordingly. It was found that the warp changed over time.

以上、本発明の実施形態について説明したが、本発明の技術思想の範囲を逸脱しない限り、種々の変形が可能である。上記実施形態では、誘電体膜として窒化シリコン膜を形成する場合を例に説明したが、誘電体膜はこれに限定されず、例えば酸窒化シリコン膜のように窒素とシリコンを含む誘電体膜を形成する場合にも本発明を適用することができる。本発明者らは、これら窒素とシリコンを含む誘電体膜も窒化シリコン膜と同様に、成膜された誘電体膜の応力が時間の経過と共に低下し、これに起因して基板の反りが経時変化することを確認した。また、上記実施形態では、ターゲット2としてシリコン製のものを用い、反応性スパッタリングにより窒化シリコン膜を成膜する場合を例に説明しているが、窒化シリコン製のターゲット2をスパッタリングして窒化シリコン膜を成膜する場合にも適用することができる。 Although the embodiments of the present invention have been described above, various modifications are possible as long as they do not deviate from the scope of the technical idea of the present invention. In the above embodiment, the case where the silicon nitride film is formed as the dielectric film has been described as an example, but the dielectric film is not limited to this, and a dielectric film containing nitrogen and silicon such as a silicon oxynitride film is used. The present invention can also be applied when forming. In the same way as the silicon nitride film, the stress of the formed dielectric film decreases with the passage of time in these dielectric films containing nitrogen and silicon, and as a result, the warp of the substrate over time. I confirmed that it would change. Further, in the above embodiment, a case where a silicon nitride film is used as the target 2 and a silicon nitride film is formed by reactive sputtering is described as an example, but the silicon nitride target 2 is sputtered to form silicon nitride. It can also be applied when forming a film.

また、上記実施形態では、成膜室Pc1からアニール室Pc2に基板Swをin-situで搬送し、成膜工程に引き続き真空雰囲気に曝された状態の基板Swを所定温度に加熱することでアニール工程を行う場合を例に説明したが、これに限定されず、成膜工程の後に基板Swを大気雰囲気に一旦暴露し、その後アニール工程を実施する場合(例えば成膜工程とアニール工程とを異なる装置で実施する場合)にも本発明を適用することができる。この場合、アニール工程を真空雰囲気中で実施することが好ましい。 Further, in the above embodiment, the substrate Sw is conveyed in-situ from the film forming chamber Pc1 to the annealing chamber Pc2, and the substrate Sw in a state of being exposed to the vacuum atmosphere is heated to a predetermined temperature following the film forming process to anneal. The case where the step is performed has been described as an example, but the present invention is not limited to this, and the case where the substrate Sw is once exposed to the air atmosphere after the film forming step and then the annealing step is performed (for example, the film forming step and the annealing step are different). The present invention can also be applied to the case where it is carried out by an apparatus). In this case, it is preferable to carry out the annealing step in a vacuum atmosphere.

St…成膜工程終了からの所定時間、Sw…基板(被処理基板)、Swa…基板の一方の面、Swb…基板の他方の面、1…真空チャンバ、2…ターゲット。 St ... A predetermined time from the end of the film forming process, Sw ... Substrate (processed substrate), Swa ... One surface of the substrate, Swb ... The other surface of the substrate, 1 ... Vacuum chamber, 2 ... Target.

Claims (3)

被処理基板をその一方の面に所定の薄膜が成膜されたものとし、被処理基板の他方の面に誘電体膜を形成する誘電体膜の形成方法において、
真空チャンバ内に被処理基板とターゲットとを配置し、真空雰囲気の真空チャンバ内に希ガスを導入してターゲットをスパッタリングすることで被処理基板の他方の面に誘電体膜を成膜する成膜工程を含み、
成膜工程の終了から所定時間内に、被処理基板を所定温度に加熱するアニール工程を更に含むことを特徴とする誘電体膜の形成方法。
In a method for forming a dielectric film in which a predetermined thin film is formed on one surface of a substrate to be processed and a dielectric film is formed on the other surface of the substrate to be processed.
A film formation in which a substrate to be processed and a target are arranged in a vacuum chamber, a rare gas is introduced into the vacuum chamber in a vacuum atmosphere, and the target is sputtered to form a dielectric film on the other surface of the substrate to be processed. Including the process
A method for forming a dielectric film, which further comprises an annealing step of heating a substrate to be processed to a predetermined temperature within a predetermined time from the end of the film forming step.
請求項1記載の誘電体膜の形成方法であって、前記誘電体膜として窒化シリコン膜を成膜するものにおいて、
前記アニール工程は、被処理基板を750℃に到達する温度まで加熱することを特徴とする誘電体膜の形成方法。
The method for forming a dielectric film according to claim 1, wherein a silicon nitride film is formed as the dielectric film.
The annealing step is a method for forming a dielectric film, which comprises heating a substrate to be treated to a temperature reaching 750 ° C.
請求項2記載の誘電体膜の形成方法において、
前記成膜工程にて、真空雰囲気の真空チャンバ内に希ガスと窒素含有ガスとを導入し、遷移領域で反応性スパッタリングすることで引張応力を有する窒化シリコン膜を成膜することを特徴とする誘電体膜の形成方法。
In the method for forming a dielectric film according to claim 2,
In the film forming step, a rare gas and a nitrogen-containing gas are introduced into a vacuum chamber in a vacuum atmosphere, and a silicon nitride film having a tensile stress is formed by reactive sputtering in a transition region. A method for forming a dielectric film.
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