JP2021111720A - Semiconductor chip tray and method for accommodating semiconductor chip - Google Patents

Abstract

To provide a semiconductor chip tray and a method for accommodating semiconductor chips that can suppress the movement of semiconductor chips accommodated in stacked semiconductor chip trays without interposing anything other than semiconductor chip trays between the semiconductor chip trays.SOLUTION: When semiconductor chip trays of the same structure are stacked on top of each other so that the surface is on top, a tip of a frame part of a lower semiconductor chip tray contacts a bottom of an indentation sandwiched between the convex parts of the back of the upper semiconductor chip tray.SELECTED DRAWING: Figure 3

Description

The present disclosure relates to a semiconductor chip tray for accommodating a semiconductor chip and a method for accommodating a semiconductor chip using the tray.

In the process of manufacturing a semiconductor chip, when the semiconductor chip is transported between manufacturing devices and between manufacturing bases, or when the semiconductor chip is stored, a semiconductor chip tray for accommodating the semiconductor chip is used. When transporting and storing multiple semiconductor chips, it is possible to handle a large number of semiconductor chips at one time by accommodating the semiconductor chips in each pocket of one semiconductor chip tray and stacking the semiconductor chip trays. be.

In the prior art, due to its structure, each semiconductor chip housed in the chip tray moves in the chip tray. For example, the pocket for accommodating the semiconductor chip is deeper than the thickness of the semiconductor chip in order to prevent the semiconductor chip from unintentionally popping out of the pocket when accommodating or taking out the semiconductor chip. Therefore, when the semiconductor chip trays are stacked, the semiconductor chips move in the space between the semiconductor chips housed in the lower semiconductor chip tray and the bottom surface of the semiconductor chip trays stacked on the upper side. When the semiconductor chip moves in the chip tray, it may be damaged by an impact or foreign matter may adhere to the semiconductor chip, or the semiconductor chip housed in the pocket of the semiconductor chip tray may be displaced from the correct position. In order to suppress the movement of the semiconductor chip in the chip tray, for example, an interlayer material is interposed between the semiconductor chip trays (Patent Document 1).

Japanese Unexamined Patent Publication No. 2006-143246

Semiconductor chips are formed from semiconductor wafers into individual semiconductor chips by dicing, and are mounted in a later process. A semiconductor chip tray is used for transporting and storing the semiconductor chip at that time. In recent years, the diameter of semiconductor wafers has been increasing, the number of semiconductor chips that can be taken in lot units is increasing, and the number of semiconductor chips that need to be transported and stored is also increasing. In the conventional method of interposing a member other than the semiconductor chip tray when transporting and storing the semiconductor chip, the required number of members other than the semiconductor chip tray and the number of steps for inserting the member other than the semiconductor chip tray between the semiconductor chip trays also increase at the same time. The cost of transportation and storage will increase accordingly.

The present disclosure is for solving such a problem, and a semiconductor capable of suppressing the movement of semiconductor chips housed in stacked semiconductor chip trays without interposing an object other than the semiconductor chip tray between the semiconductor chip trays. It is an object of the present invention to provide a method for accommodating a chip tray and a semiconductor chip.

According to one aspect of the present disclosure, a semiconductor chip tray in which a plurality of pockets surrounded by a frame portion are provided on the front surface thereof, and at least a selective portion of the back surface of the back surface that overlaps the pockets in a plan view. The pocket is capable of accommodating a semiconductor chip, and when the semiconductor chip trays having the same structure are stacked so that the surfaces face up, the semiconductor chip tray on the lower side is said to have the same structure. Provided is a semiconductor chip tray in which the tip of a frame portion contacts the bottom of a recess sandwiched between the convex portions on the back surface of the semiconductor chip tray on the upper side.

Further, according to another aspect of the present disclosure, it is a method of accommodating a semiconductor chip using the semiconductor chip tray, in which a step of preparing a plurality of the semiconductor chip trays and the semiconductor in the pocket of the semiconductor chip tray. Provided is a method for accommodating semiconductor chips, which comprises a step of accommodating chips and a step of stacking the semiconductor chip trays accommodating the semiconductor chips in the pocket.

The semiconductor chip tray of the present disclosure and the semiconductor chip tray used in the method of accommodating the semiconductor chip of the present disclosure are frames of the lower semiconductor chip tray when semiconductor chip trays having the same structure are stacked so that the surfaces face up. The tip of the portion contacts the bottom of the recess sandwiched between the convex portions on the back surface of the upper semiconductor chip tray.

As a result, the convex portion enters the pocket, and the convex portion that has entered the pocket suppresses the movement of the semiconductor chips housed in the stacked semiconductor chip trays without interposing a member other than the semiconductor chip tray between the semiconductor chip trays. can.

It is a perspective view of the semiconductor chip tray in Embodiment 1. FIG. It is a top view of the (a) front surface (b) back surface of the semiconductor chip tray according to the first embodiment. (A) is a cross-sectional view taken along the line AA of FIGS. 2 (a) and 2 (b) when the semiconductor chip trays according to the first embodiment are stacked, and (b) is a semiconductor chip tray according to the first embodiment. 2 (a) and 2 (b) are cross-sectional views taken along the line AA when the modified examples of the above are superimposed. Is a flowchart showing a method of accommodating a semiconductor chip according to the first embodiment and the second embodiment. It is sectional drawing of the example of the semiconductor chip tray for showing the problem which may occur in the conventional semiconductor chip tray. (A) is a plan view of the back surface of the semiconductor chip tray according to the second embodiment, and (b) is a cross-sectional view taken along the line BB of (a) when the semiconductor chip trays according to the second embodiment are stacked.

<A. Embodiment 1>
In the present embodiment, a semiconductor chip tray 1a, which is a semiconductor chip tray capable of accommodating semiconductor chips, and a method for accommodating semiconductor chips using the semiconductor chip tray 1a will be described.

<A-1. Configuration>
FIG. 1 is a perspective view of the semiconductor chip tray 1a. FIG. 2A is a plan view of the front surface of the semiconductor chip tray 1a, and FIG. 2B is a plan view of the back surface of the semiconductor chip tray 1a, which is the opposite surface to the front surface.

As shown in FIG. 2A, the semiconductor chip tray 1a is provided with a frame portion 2 on the surface thereof. Further, a plurality of pockets 3 surrounded by a frame portion 2 are provided on the surface of the semiconductor chip tray 1a. As shown in FIG. 2B, the semiconductor chip tray 1a is provided with a plurality of convex portions 5a on the back surface. Further, the semiconductor chip tray 1a is provided with a frame portion 4 on the outer peripheral portion in a plan view as shown in FIGS. 2 (a) and 2 (b).

As shown in FIG. 2A, in the semiconductor chip tray 1a, the frame portions 2 are arranged in a grid pattern, and the pockets 3 are divided into the grid-shaped frame portions 2 and arranged in a matrix. However, the arrangement of the pockets 3 does not have to be in a matrix, and the arrangement may be arbitrary, and the frame portion 2 may also surround such pockets 3. Further, the number of pockets 3 provided in the semiconductor chip tray 1a is not limited to the number shown in FIG. 2A, and can be changed according to the application.

FIG. 3A is a cross-sectional view taken along the line AA of FIGS. 2A and 2B when the semiconductor chip trays 1a are stacked. FIG. 3B is a cross-sectional view taken along the line AA of FIGS. 2A and 2B when a modified example of the semiconductor chip tray 1a is superimposed. The pocket 3 can accommodate the semiconductor chip 10, and FIGS. 3A and 3B show a semiconductor chip tray 1a in which the semiconductor chip 10 is accommodated in each pocket 3.

As shown in FIG. 3A, a plurality of convex portions 5a are arranged at least in a selective portion of the region overlapping the pocket 3. As shown in FIGS. 2 and 3, when the semiconductor chip tray 1a is viewed in a plan view, one convex portion 5a overlaps one pocket 3 in a plan view. In a plan view, the convex portion 5a occupies almost the entire area of the pocket 3 on which the convex portion 5a overlaps. In a plan view, the convex portion 5a occupies, for example, 90% or more of the area of the pocket 3 on which the convex portion 5a overlaps. However, the convex portion 5a may have an area smaller than that in a plan view as long as it can suppress the movement of the semiconductor chip 10. Further, a plurality of convex portions 5a may be arranged in a region overlapping each pocket 3 in a plan view. For example, each convex portion 5a in FIG. 2B may be divided into a plurality of recesses 7 in one direction in the plane or in two directions perpendicular to each other.

As shown in FIG. 3A, when semiconductor chip trays 1a having the same structure are superposed so that the surfaces face up, the tip of the frame portion 2 of the lower semiconductor chip tray 1a is the upper semiconductor chip. It comes into contact with the bottom of the recess 7 sandwiched between the convex portions 5a on the back surface of the tray 1a. As a result, the convex portion 5a of the upper semiconductor chip tray 1a is in a state of entering the pocket 3 of the lower semiconductor chip tray 1a.

When the semiconductor chip tray 1a having the same structure is stacked on the surface of the semiconductor chip tray 1a in which the semiconductor chip 10 is housed in the pocket 3, at least one convex portion 5a of the upper semiconductor chip tray 1a is the semiconductor chip 10. It enters the pocket 3 of the lower semiconductor chip tray 1a in the region where the semiconductor chip tray 1a and the semiconductor chip tray 1a overlap in plan view. When the pocket 3 has a larger area than the semiconductor chip 10 in a plan view, some of the convex portions 5a do not overlap with the semiconductor chip 10 housed in the pocket 3 in which the convex portions 5a overlap in a plan view. It may be.

The convex portion 5a has a flat tip as shown in FIG. 3A. The shape of the convex portion 5a can be changed in various ways, and the convex portion 5a may have a rounded tip, for example, as shown in FIG. 3 (b).

As shown in FIGS. 3 (a) and 3 (b), when the semiconductor chip tray 1a having the same structure is stacked on the surface of the semiconductor chip tray 1a in which the semiconductor chip 10 is housed in the pocket 3, the upper side of the semiconductor chip tray 1a is stacked. The convex portion 5a of the semiconductor chip tray 1a does not come into contact with the semiconductor chip 10.

When the semiconductor chip trays 1a are stacked so that the front surface is facing up, the tip of the frame portion 2 of the lower semiconductor chip tray 1a is a recess 7 sandwiched between the convex portions 5a on the back surface of the upper semiconductor chip tray 1a. It contacts the bottom of the semiconductor chip tray 1a, which supports the upper semiconductor chip tray 1a. The tip portion of the frame portion 2 is flat as shown in FIG. 3 (a). The shape of the tip portion of the frame portion 2 can be changed. For example, as shown in FIG. 3B, the tip portion of the frame portion 2 is rounded, and the portion of the back surface of the semiconductor chip tray 1a that overlaps with the frame portion 2 in a plan view is the rounded tip of the frame portion 2. The shape may be fitted. FIG. 3B shows a semiconductor chip tray 1a that has been deformed so that the tip of the convex portion 5a is rounded as described above, as compared with FIG. 3A. However, only the deformation that the tip of the convex portion 5a is rounded in FIG. 3 (a), and the tip of the convex portion 5a is returned flat as shown in FIG. 3 (a) from FIG. 3 (b). It may be a new one.

As shown in FIGS. 2 and 3, for example, the semiconductor chip tray 1a includes a frame portion 4 on an outer peripheral portion in a plan view. As shown in FIG. 3, the frame portion 4 protrudes more toward the back surface side than each convex portion 5a. When the semiconductor chip tray 1a is placed on a flat surface with the surface facing up, the frame portion contacts the flat surface to support the semiconductor chip tray 1a, and each convex portion 5a does not contact the flat surface. FIG. 2 shows a semiconductor chip tray 1a having a frame portion 4 on the entire outer peripheral portion, but each convex portion 5a does not come into contact with the flat surface when the semiconductor chip tray 1a is placed on a flat surface with the surface facing up. As long as it has a structure, the semiconductor chip tray 1a may include a frame portion 4 at a selective portion of the outer circumference in a plan view.

The semiconductor chip tray 1a is preferably made of a conductive material.

<A-2. Operation>
Here, a method of accommodating a semiconductor chip using the semiconductor chip tray 1a of the present embodiment will be described. FIG. 4 is a flowchart showing a method of accommodating the semiconductor chip.

First, in step S1, <A-1. Prepare a plurality of semiconductor chip trays 1a described in Configuration>.

Next, in step S2, the semiconductor chip 10 is housed in the pocket 3 of the semiconductor chip tray 1a.

Next, in step S3, the semiconductor chip trays 1a in which the semiconductor chips 10 are housed in the pockets 3 are stacked. When stacking the semiconductor chip trays 1a, a semiconductor chip tray 1a that does not contain the semiconductor chip 10 may be placed as a lid on the uppermost stage, or the semiconductor chip tray 1a has the same back surface structure and a flat surface. You may put something that is used exclusively for the purpose of the lid, such as.

<A-3. Effect>
In the semiconductor chip tray 1a, when the semiconductor chip trays 1a having the same structure are stacked so that the front surface is facing up, the tip of the frame portion 2 of the lower semiconductor chip tray 1a is on the back surface of the upper semiconductor chip tray 1a. It is in contact with the bottom of the recess 7 sandwiched between the convex portions 5a. As a result, the convex portion 5a of the upper semiconductor chip tray 1a is in a state of being inserted into the pocket 3 of the lower semiconductor chip tray 1a, and the convex portion 5a that has entered the pocket 3 is placed between the semiconductor chip trays other than the semiconductor chip tray. The movement of the semiconductor chip 10 can be suppressed without interposing a member.

In the conventional semiconductor chip tray, as shown in FIG. 5, there is a problem that the chip tray enters the gap between the stacked semiconductor chip trays and moves to another pocket 3 in some cases. In this problem as well, when semiconductor chip trays 1a having the same structure are superposed so that the front surface faces up, the tip of the frame portion 2 of the lower semiconductor chip tray 1a becomes the convex portion of the back surface of the upper semiconductor chip tray 1a. It can be prevented by contacting the bottom of the recess 7 sandwiched between the 5a.

By entering the pocket 3 of the lower semiconductor chip tray 1a in the region where the convex portion 5a overlaps with the semiconductor chip 10 in plan view, the region in which the semiconductor chip 10 can move is restricted in the vertical direction. The vertical movement of the semiconductor chip 10 can be suppressed without interposing a member other than the semiconductor chip tray.

Since the tip of the convex portion 5a is rounded as in the modified example shown in FIG. 3B, even if the semiconductor chip 10 moves in the pocket 3 and comes into contact with the convex portion 5a, it is not easily scratched. ..

When the semiconductor chip tray 1a having the same structure is stacked on the surface of the semiconductor chip tray 1a in which the semiconductor chip 10 is housed in the pocket 3, the convex portion 5a of the upper semiconductor chip tray 1a does not come into contact with the semiconductor chip 10. That is, in the method of accommodating a semiconductor chip using the semiconductor chip tray 1a, the convex portion 5a of the upper semiconductor chip tray 1a does not hold down the semiconductor chip 10. As a result, it is possible to prevent the convex portion 5a from coming into contact with the semiconductor chip 10 and rubbing or damaging the semiconductor chip 10 when it is not necessary to press the semiconductor chip 10.

In the modified example shown in FIG. 3B, the tip portion of the frame portion 2 is rounded, and the portion of the back surface of the semiconductor chip tray 1a that overlaps with the frame portion 2 in a plan view is rounded at the tip of the frame portion 2. It is a shape that fits with. As a result, it is possible to alleviate a slight misalignment when stacking the semiconductor chip trays 1a. Further, since it is rounded, it is possible to eliminate catching when stacking a plurality of semiconductor chip trays 1a, and it is possible to reduce the risk of foreign matter dusting from the corners of the tip portion.

The semiconductor chip tray 1a includes a frame portion 4 at least in a selective portion on the outer circumference of the semiconductor chip tray 1a, and the frame portion 4 projects more toward the back surface side than each convex portion 5a, and the semiconductor chip tray 1a When placed on a flat surface with the surface facing up, each convex portion 5a does not touch the flat surface. As a result, the semiconductor chips 10 are not contaminated due to the stacking of trays.

The semiconductor chip tray 1a is preferably made of a conductive material. Since the semiconductor chip tray 1a is made of a conductive material, the semiconductor chip 10 can be discharged through the semiconductor chip tray 1a even if it is charged. This makes it possible to reduce the risk of foreign matter adhering to the semiconductor chip 10 due to static electricity.

<B. Embodiment 2>
<B-1. Configuration>
In the first embodiment, when the semiconductor chip 10 is housed in the pocket 3, the convex portion 5a does not come into contact with the semiconductor chip 10. Instead of such a convex portion 5a, a convex portion 5b that comes into contact with and presses the semiconductor chip 10 may be used.

FIG. 6A shows a plan view of the back surface of the semiconductor chip tray 1b. Since the plan view of the surface is the same as that of the semiconductor chip tray 1a, it is omitted.

As shown in FIG. 6A, the semiconductor chip tray 1b includes a convex portion 5b instead of the convex portion 5a as compared with the semiconductor chip tray 1a.

The structure of the semiconductor chip tray 1b is the same as that of the first embodiment except that the convex portion 5b is provided instead of the convex portion 5a and the convex portion 5b is in contact with the semiconductor chip 10.

FIG. 6B is a cross-sectional view taken along the line BB of FIG. 6A when the semiconductor chip trays 1b are stacked.

The tip of the convex portion 5b is a protrusion 6, and the protrusion 6 presses the semiconductor chip 10 housed in the pocket 3 at a plurality of locations. 6 (a) and 6 (b) show a case where the convex portion 5b holds the semiconductor chip 10 housed in the pocket 3 at four points. For example, in one direction in the plane of the semiconductor chip 10. It may be something like pressing two places on both sides.

Semiconductor chips generally have different resistance to contact from place to place. The risk of damage to the semiconductor chip 10 can be reduced by forming the convex portion 5b so as to hold down a portion of the semiconductor chip 10 housed in the semiconductor chip tray 1b that is resistant to contact.

<B-2. Operation>
The semiconductor chip accommodating method using the semiconductor chip tray 1b of the present embodiment can be implemented by the same procedure as the semiconductor chip accommodating method using the semiconductor chip tray 1a of the first embodiment.

<B-3. Effect>
When the semiconductor chip tray 1b having the same structure is stacked on the surface of the semiconductor chip tray 1b in which the semiconductor chip 10 is housed in the pocket 3, the convex portions 5b of the upper semiconductor chip tray 1b place the semiconductor chip 10 at a plurality of locations. Hold down with. As a result, the movement of the semiconductor chip 10 can be suppressed without interposing a member other than the semiconductor chip tray between the semiconductor chip trays.

It is possible to freely combine each embodiment, and to appropriately modify or omit each embodiment.

1a semiconductor chip tray, 1b semiconductor chip tray, 2 frame part, 3 pockets, 4 frame part, 5a convex part, 5b convex part, 6 protrusions, 7 depressions, 10 semiconductor chips.

Claims (9)

A semiconductor chip tray with multiple pockets on the surface surrounded by a frame.
A plurality of convex portions are provided on at least a selective portion of the back surface that overlaps with the pocket in a plan view.
The pocket can accommodate a semiconductor chip and
When the semiconductor chip trays having the same structure are superposed so that the front surface faces up, the tip of the frame portion of the lower semiconductor chip tray is sandwiched between the convex portions on the back surface of the upper semiconductor chip tray. In contact with the bottom of the dent,
Semiconductor chip tray. The semiconductor chip tray according to claim 1.
When the semiconductor chip tray having the same structure is stacked on the surface of the semiconductor chip tray in which the semiconductor chip is housed in the pocket, at least one of the convex portions of the upper semiconductor chip tray is the semiconductor chip. Enters the pocket of the semiconductor chip tray on the lower side in a region where the semiconductor chip tray overlaps with the semiconductor chip tray.
Semiconductor chip tray. The semiconductor chip tray according to claim 1 or 2.
A picture frame portion is further provided on at least a selective portion of the outer circumference of the semiconductor chip tray.
The frame portion protrudes more toward the back surface side than each convex portion.
When the semiconductor chip tray is placed on a flat surface with the surface facing up, each of the convex portions does not touch the flat surface.
Semiconductor chip tray. The semiconductor chip tray according to any one of claims 1 to 3.
The tip of at least one of the protrusions is rounded.
Semiconductor chip tray. The semiconductor chip tray according to any one of claims 1 to 4.
When the semiconductor chip tray having the same structure is stacked on the surface of the semiconductor chip tray in which the semiconductor chip is housed in the pocket, the convex portion of the upper semiconductor chip tray does not come into contact with the semiconductor chip.
Semiconductor chip tray. The semiconductor chip tray according to any one of claims 1 to 3.
When the semiconductor chip tray having the same structure is stacked on the surface of the semiconductor chip tray in which the semiconductor chip is housed in the pocket, the convex portion of the upper semiconductor chip tray places the semiconductor chip at a plurality of locations. Hold down with
Semiconductor chip tray. The semiconductor chip tray according to any one of claims 1 to 6.
The tip of the frame portion is rounded and
The portion of the back surface of the semiconductor chip tray that overlaps the frame portion in a plan view has a shape that fits with the roundness of the tip of the frame portion.
Semiconductor chip tray. The semiconductor chip tray according to any one of claims 1 to 7.
Formed from a conductive material,
Semiconductor chip tray. The method for accommodating a semiconductor chip using the semiconductor chip tray according to claim 1.
The process of preparing a plurality of the semiconductor chip trays and
A step of accommodating the semiconductor chip in the pocket of the semiconductor chip tray, and
A process of stacking the semiconductor chip trays containing the semiconductor chips in the pocket, and
Have,
How to accommodate semiconductor chips.

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