JP2021097246A - Multilayer ceramic capacitor - Google Patents

Abstract

To provide: a multilayer ceramic capacitor of which humidity resistance can be ensured even if a side margin part is made thin; and a method for manufacturing the multilayer ceramic capacitor.SOLUTION: A multilayer ceramic capacitor comprises a lamination part and a side margin part. The lamination part has: a plurality of ceramic layers stacked in a first direction; and a plurality of internal electrodes disposed between the plurality of ceramic layers. The side margin part covers the lamination part from a second direction orthogonal to the first direction, of which porosity is 1% or less.SELECTED DRAWING: Figure 3

Description

The present invention relates to a multilayer ceramic capacitor to which a side margin portion is retrofitted and a method for manufacturing the same.

In recent years, with the miniaturization and high performance of electronic devices, there has been an increasing demand for miniaturization and large capacity of multilayer ceramic capacitors used in electronic devices. In order to meet this demand, it is effective to make the intersecting area of the internal electrodes of the monolithic ceramic capacitor as large as possible.

For example, Patent Documents 1 and 2 describe a method of retrofitting a laminated chip having an internal electrode exposed on a side surface with a side margin portion for ensuring insulation around the internal electrode. As a result, the side margin portion can be made thin, and the intersecting area of the internal electrodes can be made relatively large.

Japanese Unexamined Patent Publication No. 2012-191159 Japanese Unexamined Patent Publication No. 2014-204116

However, in the method in which the side margin portion is retrofitted to the side surface of the laminated chip, if the thickness of the side margin portion is thin, moisture or the like easily penetrates from the outside world into the laminated chip through the thin side margin portion. Therefore, the moisture resistance of the monolithic ceramic capacitor may decrease.

In view of the above circumstances, an object of the present invention is to provide a monolithic ceramic capacitor in which moisture resistance is ensured even if the thickness of the side margin portion is reduced, and a method for manufacturing the same.

In order to achieve the above object, the multilayer ceramic capacitor according to one embodiment of the present invention includes a laminated portion and a side margin portion.
The laminated portion has a plurality of ceramic layers laminated in the first direction, and a plurality of internal electrodes arranged between the plurality of ceramic layers.
The side margin portion covers the laminated portion from a second direction orthogonal to the first direction, and has a pore ratio of 1% or less.

According to this configuration, the pore ratio of the side margin portion is 1% or less. As a result, since the side margin portion is highly dense, even if the thickness of the side margin portion is reduced, it is difficult for moisture or the like to enter the laminated portion from the outside through the side margin portion.
Therefore, according to the present invention, it is possible to manufacture a monolithic ceramic capacitor in which moisture resistance is ensured even if the thickness of the side margin portion is reduced.

The side margin portion may have a dimension of 5 μm or more in the second direction.
This makes it possible to further improve the moisture resistance of the monolithic ceramic capacitor.

The plurality of internal electrodes may have an oxidation region adjacent to the side margin portion and having a dimension of 0.4 μm or more in the second direction.
By setting the dimension of the oxidation region in the second direction to 0.4 μm or more, it is possible to suppress short-circuit defects and IR defects between the internal electrodes of the multilayer ceramic capacitor.

The side margin portion may have a dimension of 15 μm or less in the second direction.
As a result, the moisture resistance of the monolithic ceramic capacitor is ensured.

The side margin portion may have a dimension of 10 μm or less in the second direction.
Thereby, whether or not the side margin portion is peeled off from the laminated portion can be detected by using an optical microscope or the like without destroying the laminated ceramic capacitor.

The laminated portion may have a cover portion whose dimension in the first direction is equal to or larger than the dimension in the second direction of the side margin portion.

As a result, it becomes difficult for moisture or the like to enter the laminated portion from the outside world, and it is possible to suppress a decrease in the moisture resistance of the laminated ceramic capacitor.

The method for manufacturing a multilayer ceramic capacitor according to an embodiment of the present invention includes a plurality of ceramic layers laminated in the first direction, and a capacitance forming portion having a plurality of internal electrodes arranged between the plurality of ceramic layers. An unfired laminated chip made of insulating ceramics and having a cover portion covering the capacitance forming portion from the first direction is produced.
An unfired element is produced by covering the laminated chips from a second direction orthogonal to the first direction with a side margin portion made of insulating ceramics.
By firing the unfired element body, an element body having a pore ratio of the side margin portion after firing of 1% or less is produced.

According to the above manufacturing method, the pore ratio of the side margin portion after firing is 1% or less. As a result, since the side margin portion is highly dense after firing, even if the thickness of the side margin portion is reduced, moisture or the like is less likely to enter from the outside world into the capacity forming portion through the side margin portion. Therefore, according to the above manufacturing method, it is possible to manufacture a monolithic ceramic capacitor in which moisture resistance is ensured even if the thickness of the side margin portion is reduced.

The dimension of the cover portion in the first direction may be greater than or equal to the dimension of the side margin portion in the second direction.
As a result, it becomes difficult for moisture or the like to enter the laminated chip from the outside world, and it is possible to suppress a decrease in the moisture resistance of the laminated ceramic capacitor.

The side margin portion may have a dimension of 20 μm or less in the second direction.

As a result, when the unfired element body is fired, oxygen is easily supplied to the internal electrode through the side margin portion, and an oxidized region is satisfactorily formed at the end portion of the internal electrode.
Therefore, even if foreign matter or the like adheres to the side surface of the laminated chip in which the end portion of the internal electrode is exposed during the manufacturing process, the conduction between the internal electrodes via the foreign matter or the like on the side surface of the element body after firing is suppressed. Therefore, short-circuit defects between internal electrodes, IR defects, and the like are effectively suppressed.

By punching out a side margin sheet containing insulating ceramics as a main component, the laminated chip may cover the unfired element with the side margin portion.

Hydrostatic pressure pressurization may be applied to the unfired element body.

The unfired body is debindered and debindered.
Ceramics may be deposited on the side margin portion that has been subjected to the binder removal treatment.

Ceramic powder may be sprayed on the side margin portion that has been subjected to the binder removal treatment.

Ceramics may be sputtered on the side margin portion that has been subjected to the binder removal treatment.

Ceramics may be vacuum-deposited on the side margin portion that has been subjected to the binder removal treatment.

It is possible to provide a monolithic ceramic capacitor and a method for manufacturing the same, in which moisture resistance is ensured even if the thickness of the side margin portion is reduced.

It is a perspective view of the multilayer ceramic capacitor which concerns on one Embodiment of this invention. It is sectional drawing which follows the AA' line of FIG. 1 of the said monolithic ceramic capacitor. It is sectional drawing along the line BB'of FIG. 1 of the said monolithic ceramic capacitor. It is a schematic diagram which enlarges and shows the region P of FIG. 3 of the said multilayer ceramic capacitor. It is a flowchart which shows the manufacturing method of the said monolithic ceramic capacitor. It is a top view which shows the manufacturing process of the said monolithic ceramic capacitor. It is a perspective view which shows the manufacturing process of the said monolithic ceramic capacitor. It is a top view which shows the manufacturing process of the said monolithic ceramic capacitor. It is sectional drawing which shows the manufacturing process of the said monolithic ceramic capacitor. It is a perspective view which shows the manufacturing process of the said monolithic ceramic capacitor. It is a schematic diagram which shows the manufacturing process of the said monolithic ceramic capacitor. It is a schematic diagram which shows the manufacturing process of the said monolithic ceramic capacitor. It is a schematic diagram which shows the manufacturing process of the said monolithic ceramic capacitor. It is a perspective view which shows the manufacturing process of the said monolithic ceramic capacitor. It is a side view of the element body of the conventional multilayer ceramic capacitor. It is an enlarged cross-sectional view which shows the manufacturing process of the said monolithic ceramic capacitor. It is a graph which shows the evaluation result of the multilayer ceramic capacitor which concerns on Example of this invention. It is a graph which shows the evaluation result of the said monolithic ceramic capacitor.

Hereinafter, embodiments of the present invention will be described with reference to the drawings.
The drawings show the X-axis, Y-axis, and Z-axis that are orthogonal to each other as appropriate. The X-axis, Y-axis, and Z-axis are common to all drawings.

[Overall configuration of multilayer ceramic capacitor 10]
FIGS. 1 to 3 are views showing a multilayer ceramic capacitor 10 according to an embodiment of the present invention. FIG. 1 is a perspective view of the multilayer ceramic capacitor 10. FIG. 2 is a cross-sectional view of the monolithic ceramic capacitor 10 along the AA'line of FIG. FIG. 3 is a cross-sectional view of the monolithic ceramic capacitor 10 along the line BB'of FIG.

The multilayer ceramic capacitor 10 includes a body 11, a first external electrode 14, and a second external electrode 15.
The element 11 typically has two side surfaces oriented in the Y-axis direction and two main surfaces oriented in the Z-axis direction. The ridge connecting each surface of the element body 11 is chamfered. The shape of the element body 11 is not limited to such a shape. For example, each surface of the element body 11 may be a curved surface, and the element body 11 may have a rounded shape as a whole.
The first and second external electrodes 14 and 15 cover both end faces in the X-axis direction of the element body 11 and extend to four surfaces connected to both end faces in the X-axis direction. As a result, in both the first and second external electrodes 14 and 15, the cross section parallel to the XY plane and the cross section parallel to the XY axis are U-shaped.

The element body 11 has a laminated portion 16 and a side margin portion 17.
The laminated portion 16 has a structure in which a plurality of flat plate-shaped ceramic layers extending along an XY plane are laminated in the Z-axis direction.

The laminated portion 16 has a capacitance forming portion 18 and a cover portion 19.
The capacitance forming unit 18 has a plurality of first internal electrodes 12 and a plurality of second internal electrodes 13. The first and second internal electrodes 12 and 13 are alternately arranged along the Z-axis direction between the plurality of ceramic layers. The first internal electrode 12 is connected to the first external electrode 14 and is insulated from the second external electrode 15. The second internal electrode 13 is connected to the second external electrode 15 and is insulated from the first external electrode 14.

The first and second internal electrodes 12 and 13 are made of conductive materials, respectively, and function as internal electrodes of the multilayer ceramic capacitor 10. As the conductive material, for example, nickel (Ni), copper (Cu), palladium (Pd), platinum (Pt), silver (Ag), gold (Au), or a metal material containing an alloy thereof may be used. It can be made, and typically a metal material containing nickel (Ni) as a main component is adopted.

The capacitance forming portion 18 is formed of ceramics. In the capacitance forming unit 18, a material having a high dielectric constant is used as a material constituting the ceramic layer in order to increase the capacitance of each ceramic layer between the first internal electrode 12 and the second internal electrode 13. As the material constituting the capacitance forming portion 18, for example, _{a polycrystal of barium titanate (BaTIO 3} ) -based material, that is, a polycrystal having a perovskite structure containing barium (Ba) and titanium (Ti) can be used. ..

The material constituting the capacitance forming portion 18 is not only barium titanate (BaTIO ₃ ) type, but also strontium titanate (SrTIO ₃ ) type, calcium titanate (CaTIO ₃ ) type, and magnesium titanate (MgTIO ₃ ) type. , Calcium zirconate (CaZrO ₃ ) -based, calcium titanate (Ca (Zr, Ti) O ₃ ) -based, barium titanate (BaZrO ₃ ) -based or titanium oxide (TIO ₂ ) -based polycrystals There may be.

The cover portion 19 has a flat plate shape extending along the XY plane, and covers the upper and lower surfaces of the capacitance forming portion 18 in the Z-axis direction. The cover portion 19 is not provided with the first and second internal electrodes 12 and 13.

As shown in FIG. 3, the side margin portions 17 are formed on both side surfaces S1 and S2 of the capacitance forming portion 18 and the cover portion 19 facing the Y-axis direction.

As described above, in the element body 11, the surfaces other than the X-axis direction end faces provided with the first and second external electrodes 14 and 15 of the capacitance forming portion 18 are covered by the side margin portion 17 and the cover portion 19. .. The side margin portion 17 and the cover portion 19 mainly have a function of protecting the periphery of the capacitance forming portion 18 and ensuring the insulating properties of the first and second internal electrodes 12 and 13.

The side margin portion 17 and the cover portion 19 are also made of ceramics. The ceramics forming the side margin portion 17 and the cover portion 19 are preferably a dielectric polycrystal having the same composition system as the main phase of the capacitance forming portion 18. As a result, the internal stress in the element body 11 is suppressed.

The side margin portion 17 has a pore ratio of 1% or less. As a result, the ceramics constituting the side margin portion 17 are highly dense, so that moisture does not easily enter the capacitance forming portion 18 from the outside through the side margin portion 17. Therefore, the moisture resistance of the monolithic ceramic capacitor 10 is ensured.

Further, since the pore ratio of the side margin portion 17 is 1% or less, the side margin portion 17 has high rigidity against a physical impact. As a result, the monolithic ceramic capacitor 10 also has improved rigidity against physical impact from the outside.

The pore ratio of this embodiment is calculated by, for example, the following procedure. First, the cross section of the side margin portion 17 is imaged with a predetermined magnification by an SEM (Scanning Electron Microscope). Next, a plurality of pores appearing in the image obtained by capturing the cross section of the side margin portion 17 are selected, the cross-sectional area of the pores is measured, and the average value thereof is calculated. Then, the ratio of the average value to the cross-sectional area of the imaged side margin portion 17 is calculated.

In the present embodiment, it is preferable to reduce the dimension D1 of the side margin portion 17 in the Y-axis direction. By reducing the dimension D1, the intersecting area of the internal electrodes 12 and 13 can be made as large as possible, and the capacity of the multilayer ceramic capacitor 10 can be made large.
However, from the viewpoint of ensuring the moisture resistance of the monolithic ceramic capacitor 10, the dimension D1 is preferably 5 μm or more.

Further, in the present embodiment, it is preferable that the dimension D1 of the side margin portion 17 is 10 μm or less. As a result, when there is a gap between the laminated portion 16 and the side margin portion 17, this gap can be detected by observing the surface of the side margin portion 17 with an optical microscope or the like.
Therefore, the gap between the laminated portion 16 and the side margin portion 17 can be detected without observing the cross section of the laminated ceramic capacitor 10.
That is, whether or not the side margin portion 17 is peeled off from the laminated portion 16 can be detected by using an optical microscope or the like without destroying the laminated ceramic capacitor 10.

In addition to barium (Ba) and titanium (Ti), the side margin portion 17, the capacitance forming portion 18, and the cover portion 19 according to the present embodiment include, for example, magnesium (Mg), manganese (Mn), aluminum (Al), and calcium. (Ca), vanadium (V), chromium (Cr), zirconium (Zr), molybdenum (Mo), tungsten (W), tantalum (Ta), niobium (Nb), silicon (Si), boron (B), ittrium (Y), Europium (Eu), Gadolinium (Gd), Dysprosium (Dy), Holmium (Ho), Elbium (Er), Itterbium (Yb), Lithium (Li), Potassium (K) or Sodium (Na), etc. One or more metal elements may be further contained.

With the above configuration, in the multilayer ceramic capacitor 10, when a voltage is applied between the first external electrode 14 and the second external electrode 15, a plurality of plurality of between the first internal electrode 12 and the second internal electrode 13 are applied. A voltage is applied to the ceramic layer. As a result, in the multilayer ceramic capacitor 10, electric charges corresponding to the voltage between the first external electrode 14 and the second external electrode 15 are stored.

The multilayer ceramic capacitor 10 according to the present embodiment may be provided with the laminated portion 16 and the side margin portion 17, and other configurations can be appropriately changed. For example, the number of the first and second internal electrodes 12 and 13 can be appropriately determined according to the size and performance required for the multilayer ceramic capacitor 10.
Further, in FIGS. 2 and 3, the number of the first and second internal electrodes 12 and 13 is limited to four, respectively, in order to make it easy to see the facing states of the first and second internal electrodes 12 and 13. However, in reality, more first and second internal electrodes 12 and 13 are provided in order to secure the capacity of the monolithic ceramic capacitor 10.

FIG. 4 is a schematic view showing the region P shown in FIG. 3 in an enlarged manner, and is a schematic view showing the ends of the first and second internal electrodes 12 and 13 in an enlarged manner.

As shown in FIG. 4, the first and second internal electrodes 12 and 13 have an oxidation region E formed at an end exposed on the side surface S2 of the laminated portion 16. The oxidation region E is a region whose conductivity is reduced by oxidation. Further, as shown in the figure, the oxidation region E is formed at the end portions of the internal electrodes 12 and 13 so as to be adjacent to the side margin portion 17.

As an example, the oxidation region E is a composite oxide containing a metal element contained in the side margin portion 17, the cover portion 19, and the capacitance forming portion 18 and a metal element constituting the internal electrodes 12 and 13 (for example, 3). It is composed mainly of the original oxide).

Further, the oxidation region E is preferably formed at all the ends of the first and second internal electrodes 12 and 13, but may not be formed at a part thereof.

The dimension D2 of the oxidation region E in the Y-axis direction can be, for example, about several hundred to several thousand nm, and is preferably 400 nm or more. In the present embodiment, by setting the dimension D2 of the oxidation region E to 400 nm or more, it is possible to suppress short-circuit defects and IR (Insulation Response) defects between the internal electrodes 12 and 13 in the multilayer ceramic capacitor 10.

In FIG. 4, for convenience of explanation, the dimensions D2 of the plurality of oxidation regions E are shown equally. However, in the present embodiment, the dimension D2 may be different for each oxidation region E. In this case, the dimension D2 of the oxidation region E can be the average value of the oxidation regions E formed at the ends of all the internal electrodes 12 and 13.

[Manufacturing method of multilayer ceramic capacitor 10]
FIG. 5 is a flowchart showing a method of manufacturing the monolithic ceramic capacitor 10. 6 to 16 are views showing a manufacturing process of a multilayer ceramic capacitor. Hereinafter, a method for manufacturing a monolithic ceramic capacitor will be described with reference to FIGS. 6 to 16 as appropriate with reference to FIG.

(Step S01: Ceramic sheet preparation process)
In step S01, a first ceramic sheet 101 and a second ceramic sheet 102 for forming the capacitance forming portion 18 and a third ceramic sheet 103 for forming the cover portion 19 are prepared. The ceramic sheets 101, 102, and 103 are mainly composed of insulating ceramics and are configured as an unfired dielectric green sheet. The ceramic sheets 101, 102, and 103 are formed into a sheet shape using, for example, a roll coater or a doctor blade.

FIG. 6 is a plan view of the ceramic sheets 101, 102, 103. At this stage, the ceramic sheets 101, 102, and 103 are not separated for each multilayer ceramic capacitor 10. FIG. 6 shows cutting lines Lx and Ly for cutting each multilayer ceramic capacitor 10. The cutting line Lx is parallel to the X-axis and the cutting line Ly is parallel to the Y-axis.

As shown in FIG. 6, an unfired first internal electrode 112 corresponding to the first internal electrode 12 is formed on the first ceramic sheet 101, and an unfired first internal electrode 112 corresponding to the second internal electrode 13 is formed on the second ceramic sheet 102. The second internal electrode 113 for firing is formed. An internal electrode is not formed on the third ceramic sheet 103 corresponding to the cover portion 19.

The first and second internal electrodes 112 and 113 can be formed by using, for example, a conductive paste containing nickel (Ni). For the formation of the first and second internal electrodes 112 and 113 by the conductive paste, for example, a screen printing method or a gravure printing method can be used.

The first and second internal electrodes 112 and 113 are arranged over two regions adjacent to each other in the X-axis direction separated by the cutting line Ly, and extend in a band shape in the Y-axis direction. The first internal electrode 112 and the second internal electrode 113 are shifted in the X-axis direction by one row of regions partitioned by the cutting line Ly. That is, the cutting line Ly passing through the center of the first internal electrode 112 passes through the region between the second internal electrodes 113, and the cutting line Ly passing through the center of the second internal electrode 113 passes through the region between the first internal electrodes 112. Passing through.

(Step S02: Lamination process)
In step S02, the laminated sheet 104 is produced by laminating the ceramic sheets 101, 102, 103 prepared in step S01.

FIG. 7 is an exploded perspective view of the laminated sheet 104 obtained in step S02. In FIG. 7, for convenience of explanation, the ceramic sheets 101, 102, and 103 are shown in an exploded manner. However, in the actual laminated sheet 104, the ceramic sheets 101, 102, and 103 are pressure-bonded and integrated by hydrostatic pressure pressurization, uniaxial pressurization, or the like. As a result, a high-density laminated sheet 104 can be obtained.

In the laminated sheet 104, the first ceramic sheet 101 and the second ceramic sheet 102 corresponding to the capacitance forming portion 18 are alternately laminated in the Z-axis direction.
Further, in the laminated sheet 104, the third ceramic sheet 103 corresponding to the cover portion 19 is laminated on the upper and lower surfaces of the first and second ceramic sheets 101 and 102 that are alternately laminated in the Z-axis direction. In the example shown in FIG. 7, three third ceramic sheets 103 are laminated, but the number of third ceramic sheets 103 can be changed as appropriate.

(Step S03: Cutting step)
In step S03, an unfired laminated chip 116 is produced by cutting the laminated sheet 104 obtained in step S02 with a rotary blade, a push-cutting blade, or the like.

FIG. 8 is a plan view of the laminated sheet 104 after step S03. The laminated sheet 104 is cut along the cutting lines Lx and Ly while being fixed to the holding member C. As a result, the laminated sheet 104 is separated into individual pieces, and the laminated chip 116 is obtained. At this time, the holding member C is not cut, and each laminated chip 116 is connected by the holding member C.

FIG. 9 is a diagram showing a state in which the laminated sheet 104 is cut. In FIG. 9, for convenience of explanation, the total number of internal electrodes 112 and 113 is 4, and the total number of ceramic sheets 101, 102 and 103 is 5.
When the laminated sheet 104 is cut by a cutting blade F such as a push-cutting blade, the cutting blade F cutting the laminated sheet 104 drags the internal electrodes 112 and 113, and the ends of the internal electrodes 112 and 113 are shown in FIG. As shown, it may be stretched in the Z-axis direction. As a result, the internal electrodes 112 and 113 may come into contact with each other via the stretched portion on the side surfaces S3 and S4 of the laminated chip 116.

However, as shown in FIG. 4, the internal electrodes 112 and 113 according to the present embodiment are satisfactorily formed with an oxidation region E at the end portion by the firing step described later. Therefore, the internal electrodes 112 and 113 are stretched when the laminated sheet 104 is cut, and even if the ends of the internal electrodes 112 and 113 are in contact with each other via the stretched portion, between the internal electrodes 112 and 113. Short circuit failure is suppressed.

FIG. 10 is a perspective view of the laminated chip 116 obtained in step S03. An unfired capacity forming portion 118 and a cover portion 119 are formed on the laminated chip 116. In the laminated chip 116, unfired first and second internal electrodes 112 and 113 are exposed on both side surfaces S3 and S4 facing the Y-axis direction, which are cut surfaces.

(Step S04: Side margin forming step)
In step S04, the unfired element body 111 is produced by providing the unfired side margin portions 117 on the side surfaces S3 and S4 of the laminated chip 116.

In step S04, in order to provide the side margin portions 117 on both side surfaces S3 and S4 of the laminated chip 116, the orientation of the laminated chip 116 is appropriately changed by reattaching a holding member such as a tape.
In particular, in step S04, side margin portions 117 are provided on both side surfaces S3 and S4 facing the Y-axis direction, which are the cut surfaces of the laminated chips 116 in step S03. Therefore, in step S04, it is preferable that the laminated chip 116 is peeled off from the holding member C in advance and the direction of the laminated chip 116 is rotated by 90 degrees.

11 to 13 are schematic views showing the process of step S04, and are views showing how the side margin sheet 117s is punched into the laminated chip 116. Hereinafter, the process of step S04 will be described step by step.

First, the side margin sheet 117s for forming the side margin portion 117 is prepared. Like the ceramic sheets 101, 102, 103 prepared in step S01, the side margin sheet 117s contains insulating ceramics as a main component and is configured as an unfired dielectric green sheet.
The side margin sheet 117s is formed into a sheet shape by using, for example, a roll coater or a doctor blade. Further, the side margin sheet 117s is adjusted so that the thickness in the Y-axis direction becomes thin.

Next, as shown in FIG. 11, the side margin sheet 117s is arranged on the flat plate-shaped elastic body 400. Then, the laminated chip 116 is arranged so that the side surface S4 of the laminated chip 116 and the side margin sheet 117s face each other in the Y-axis direction. In step S04, the orientation of the laminated chip 116 is appropriately changed by the step of reattaching the holding member such as the tape, so that the side surface S3 of the laminated chip 116 is held by the tape T as shown in FIG.

Subsequently, the side surface S4 of the laminated chip 116 is pressed against the side margin sheet 117s by moving the laminated chip 116 toward the side margin sheet 117s in the Y-axis direction.

At this time, as shown in FIG. 12, the laminated chip 116 bites into the elastic body 400 together with the side margin sheet 117s. Along with this, the elastic body 400 rises in the Y-axis direction due to the pressing force applied to the elastic body 400 from the laminated chip 116 in the Y-axis direction, and pushes up the side margin sheet 117s.
As a result, a shearing force is applied from the elastic body 400 to the side margin sheet 117s, and the side margin sheet 117s facing the side surface S4 in the Y-axis direction is separated. Then, the side margin sheet 117s is attached to the side surface S4.

Next, when the laminated chip 116 is moved in the Y-axis direction so that the laminated chip 116 is separated from the elastic body 400, as shown in FIG. 13, only the side margin sheet 117s attached to the side surface S4 is separated from the elastic body 400. To do. As a result, the side margin portion 117 is formed on the side surface S4 of the laminated chip 116.

Here, by adjusting the punching conditions when the side surfaces S3 and S4 of the laminated chip 116 punch out the side margin sheet 117s, it is possible to improve the fineness of the ceramics in the side margin portion 17 after the firing step described later. is there.
Specifically, by adjusting the speed at which the laminated chip 116 punches the side margin sheet 117s and the punching pressure applied by the laminated chip 116 to the side margin sheet 117s, the ceramics of the side margin portion 17 after the firing step can be adjusted. It is possible to improve the precision.

Subsequently, by holding the laminated chip 116 held by the tape T on another tape, the side surface S3 of the laminated chip 116 is exposed, and the side surface S3 and the side margin sheet 117s are opposed to each other in the Y-axis direction. Then, the side margin portion 117 is also formed on the side surface S3 through the same steps as the above step of forming the side margin portion 117 on the side surface S4.
As a result, an unfired element 111 having side margin portions 117 formed on both side surfaces S3 and S4 of the laminated chip 116 can be obtained. In the present embodiment, the denseness of the ceramics in the side margin portion 17 after firing is also improved by applying hydrostatic pressure or the like to the unfired element body 111.

FIG. 14 is a perspective view of the unfired element body 111 obtained in step S04.
In the unfired element body 111, the ends of the internal electrodes 112 and 113 exposed on the side surfaces S3 and S4 are covered with the side margin portions 117, and the ends of the internal electrodes 112 and 113 in the X-axis direction are in the X-axis direction. It is configured to be exposed on the end face S5.

FIG. 15 is a diagram showing a manufacturing process of a body of a conventional multilayer ceramic capacitor, and is a side view of the body. With reference to FIG. 15, the action of adjusting the thickness of the side margin sheet 117s will be described.

In the conventional multilayer ceramic capacitor, if the side margin sheet for forming the side margin portion is thick in the manufacturing process, the cutability of the side margin sheet when the laminated chip 316 punches the side margin sheet may be poor.
As a result, the end portion 312a of the internal electrode 312 may be exposed on the side surface S7 of the laminated chip 316 in which the side margin portion 317 is formed by punching the side margin sheet, as shown in FIG.

If the end portion 312a of the internal electrode 312 is not covered with the insulating side margin portion 317 and is exposed to the side surface S7, foreign matter or the like adheres to the side surface S7 not covered with the side margin portion 317 during the manufacturing process. In this case, in the laminated ceramic capacitor after firing, the end portions 312a of the internal electrodes 312 may conduct each other through the foreign matter, causing a short circuit failure.
Further, since the side margin portion 317 does not cover the end portion 312a of the internal electrode 312, the end portion 312a is less likely to be protected from moisture or the like, so that the moisture resistance of the monolithic ceramic capacitor after firing may decrease. ..

On the other hand, the side margin sheet 117s according to the present embodiment is adjusted so as to be thin. As a result, the side margin sheet 117s has improved cutability when punched by the laminated chip 116 as compared with the conventional side margin sheet.

Therefore, in the unfired element 111 formed by the laminated chip 116 punching the side margin sheet 117s, as shown in FIG. 14, the ends of the internal electrodes 112 and 113 are not exposed on the side surfaces S3 and S4. It becomes a composition.
Therefore, short-circuit failure and deterioration of moisture resistance of the multilayer ceramic capacitor 10 due to the exposure of the ends of the internal electrodes 112 and 113 on the side surfaces S3 and S4 are suppressed.

The method of forming the side margin portions 117 on both side surfaces S3 and S4 of the laminated chip 116 is not limited to the method of punching the side margin sheet 117s.
For example, the side margin portion 117 may be formed by attaching the pre-cut side margin sheet 117s to both side surfaces S3 and S4 of the laminated chip 116.
Alternatively, side margin portions 117 may be formed on both side surfaces S3 and S4 of the laminated chip 116 by a dip method in which both side surfaces S3 and S4 of the laminated chip 116 are immersed in a paste material made of ceramics and pulled up.

(Step S05: Barrel polishing process)
In step S05, the unfired element 111 obtained in step S04 is barrel-polished to chamfer the element 111.

In step S04 described above, the unfired element 111 is formed by forming the sheet-shaped side margin portions 117 on the side surface S3 and S4 of the laminated chip 116. Therefore, as shown in FIG. 14, the element body 111 has a ridge portion (a portion where the two surfaces intersect) and a corner portion (a portion where the three surfaces intersect) connecting the respective surfaces of the element body 111.

If the element body 111 has a ridge portion and a corner portion, the element bodies 111 collide with each other in the manufacturing process, and the element body 111 is cracked or chipped. Therefore, in order to suppress such cracks and chips, the ridges and corners of the element 111 are chamfered.

As a processing method for chamfering the ridges and corners of the element body 111, barrel polishing is effective in improving the manufacturing efficiency. Barrel polishing can be performed, for example, by enclosing a plurality of unfired element bodies 111, a polishing medium, and a liquid in a barrel container and applying rotational motion or vibration to the barrel container.

FIG. 16 is an enlarged cross-sectional view of the unfired element body 111 after barrel polishing, and is an enlarged view showing the vicinity of the ridge portion R of the capacitance forming portion 118.

In general, an unfired element body composed of a laminated chip and a side margin portion has a side margin portion near the ridge portion of the capacitance forming portion when the ridge portion and the corner portion are chamfered by barrel polishing or the like. The thickness tends to be excessively thin.
For this reason, moisture or the like may easily enter the laminated chip from the outside through the excessively thin portion of the side margin portion, and the moisture resistance of the laminated ceramic capacitor may be lowered.

Therefore, in the present embodiment, in the element body 111, the thickness of the side margin sheet 117s is adjusted so that the dimension D4 in the Z-axis direction of the cover portion 119 becomes equal to or greater than the dimension D3 in the Y-axis direction of the side margin portion 117. To. As a result, in the element body 111 after barrel polishing, it is possible to prevent the dimension D5 of the side margin portion 117 near the ridge portion R of the capacitance forming portion 118 from becoming excessively small.

In step S05, from the viewpoint of ensuring the moisture resistance of the monolithic ceramic capacitor 10, the dimension D3 of the side margin portion 117 is about the same as the dimension D5 of the side margin portion 117 near the ridge portion R in the element body 111 after barrel polishing. Is preferable. Specifically, in the element body 111 after barrel polishing, the dimensions D3 and D5 of the side margin portions 117 are preferably 10 μm or more.

Further, in step S05, it is preferable that the dimension D4 of the cover portion 119 is equal to or larger than the dimension D3 of the side margin portion 117 in the element body 111 after barrel polishing. As a result, the dimension of the cover portion 19 after the firing step described later in the Z-axis direction becomes equal to or larger than the dimension of the side margin portion 17 in the Y-axis direction.
As a result, it becomes difficult for moisture or the like to enter the laminated chip 16 from the outside through the side margin portion 17 near the ridge portion R of the capacitance forming portion 18, and it is possible to suppress a decrease in the moisture resistance of the laminated ceramic capacitor 10. ..

(Step S06: Baking step)
In step S06, the unfired element 111 obtained in step S05 is fired to produce the element 11 of the multilayer ceramic capacitor 10 shown in FIGS. 1 to 3.
That is, in step S06, the first and second internal electrodes 112 and 113 become the first and second internal electrodes 12 and 13, the laminated chip 116 becomes the laminated portion 16, and the side margin portion 117 becomes the side margin portion 17. ..

In step S04 described above, the side margin portion 17 after firing is adjusted in punching pressure, speed, etc. when the laminated chip 116 punches the side margin sheet 117s, and the element body 111 is subjected to hydrostatic pressure. By adjusting the content of glass or the like contained in the side margin sheet 117s, the pore ratio becomes 1% or less.

The firing temperature of the element body 111 in step S05 can be determined based on the sintering temperature of the laminated chip 116 and the side margin portion 117. For example, when a barium titanate (BaTIO ₃ ) -based material is used as the ceramics, the firing temperature of the element 111 can be about 1000 to 1300 ° C. Further, the firing can be performed, for example, in a reducing atmosphere or a low oxygen partial pressure atmosphere, and in the present embodiment, the firing is performed in a low oxygen partial pressure atmosphere (4.0 × ^10-9 ppm).

Here, in the present embodiment, by setting the thickness of the side margin portion 117 in the element body 111 in the Y-axis direction to 20 μm or less, oxygen is supplied to the internal electrodes 112 and 113 via the side margin portion 117 during firing. Oxidation region E is well formed at the ends of the internal electrodes 112 and 113.
Therefore, even if foreign matter or the like adheres to the side surfaces S3 and S4 of the laminated chip 116 where the ends of the internal electrodes 112 and 113 are exposed during the manufacturing process, the foreign matter or the like on the side surfaces S1 and S2 of the element body 11 after firing is interposed. The conduction between the internal electrodes 12 and 13 is suppressed. Therefore, short-circuit defects and IR defects between the internal electrodes 12 and 13 are effectively suppressed.

(Step S07: External electrode forming step)
In step S07, the multilayer ceramic capacitors 10 shown in FIGS. 1 to 3 are produced by forming the first and second external electrodes 14 and 15 on the element body 11 obtained in step S06.

In step S07, first, an unfired electrode material is applied so as to cover one X-axis direction end face of the element body 11, and then an unfired electrode material is applied so as to cover the other X-axis direction end face of the element body 11. To do. The applied unfired electrode material is baked, for example, in a reducing atmosphere or a low oxygen partial pressure atmosphere to form a base film on the element body 11. Then, the intermediate film and the surface film are formed by plating treatment such as electrolytic plating on the base film baked on the element body 11, and the first and second external electrodes 14 and 15 are completed.

A part of the process in step S07 may be performed before step S06. For example, before step S06, an unfired electrode material is applied to both end surfaces S5 of the unfired element body 111 in the X-axis direction, and in step S06, the unfired element body 111 is sintered and at the same time unfired. The electrode material may be baked to form the base films of the first and second external electrodes 14 and 15.

(Modification example)
The manufacturing method of the monolithic ceramic capacitor 10 is not limited to the above-mentioned manufacturing method, and the manufacturing process may be changed or added as appropriate.
For example, the binder component and the solvent component may be removed from the element body 111 by subjecting the element body 111 before firing to a binder removal treatment.

As a method of applying the binder removal treatment to the element body 111, for example, the element body 111 housed in an alumina sheath is heat-treated for 1 to 8 hours at a temperature of 350 to 600 ° C. in an electric furnace in a reducing atmosphere. The method of doing this can be mentioned. In this case, the heating rate of the electric furnace can be, for example, 1 to 10 ° C./min.

Further, in the present embodiment, ceramics may be deposited on the side margin portion 117 that has been subjected to the binder removal treatment. As a result, the voids of the ceramic particles generated by the binder removal are filled with the ceramics, and the denseness of the ceramics in the side margin portion 17 after the firing step is improved.
As the ceramics to be deposited on the side margin portion 117 that has been subjected to the binder removal treatment, typically, ceramics having the same composition as the insulating ceramics that are the main components of the side margin sheet 117s are adopted.

As a method of depositing ceramics on the side margin portion 117 that has been subjected to the binder removal treatment, for example, a spray-drying method of spraying ceramic powder on the side margin portion 117 or a method of adhering particles constituting the ceramic to the side margin portion 117. A sputtering method or a vacuum vapor deposition method is adopted.

Hereinafter, examples of the present invention will be described.

[Preparation of unfired element body]
200 samples of unfired element bodies according to Examples 1 to 8 and Comparative Examples 1 to 6 were prepared according to the above production method. The samples according to Examples 1 to 8 and Comparative Examples 1 to 6 were prepared under common manufacturing conditions except for the thickness of the side margin portion and the denseness of the ceramics constituting the side margin portion.

(Example 1)
In the sample according to Example 1, the thickness of the side margin portion 117 is 2 μm.

(Example 2)
In the sample according to Example 2, the thickness of the side margin portion 117 is 5 μm.

(Example 3)
The sample according to Example 3 is a sample in which the side margin portion 117 is formed by using the side margin sheet 117s having a thickness of 9 μm.

(Example 4)
In the sample according to Example 4, the thickness of the side margin portion 117 is 10 μm.

(Example 5)
In the sample according to Example 5, the thickness of the side margin portion 117 is 15 μm.

(Example 6)
The sample according to Example 6 is a sample in which the side margin portion 117 is formed by using the side margin sheet 117s having a thickness of 19 μm.

(Example 7)
In the sample according to Example 7, the thickness of the side margin portion 117 is 20 μm.

(Example 8)
In the sample according to Example 8, the thickness of the side margin portion 117 is 25 μm.

(Comparative Example 1)
In the sample according to Comparative Example 1, the thickness of the side margin portion is 2 μm.

(Comparative Example 2)
In the sample according to Comparative Example 2, the thickness of the side margin portion is 5 μm.

(Comparative Example 3)
In the sample according to Comparative Example 3, the thickness of the side margin portion is 10 μm.

(Comparative Example 4)
In the sample according to Comparative Example 4, the thickness of the side margin portion is 15 μm.

(Comparative Example 5)
In the sample according to Comparative Example 5, the thickness of the side margin portion is 20 μm.

(Comparative Example 6)
In the sample according to Comparative Example 6, the thickness of the side margin portion is 25 μm.

[Evaluation of unfired element body]
(Detection of samples with peeled side margins)
In 200 samples according to Examples 2, 4, 5, 7, and 8, it was evaluated whether or not a sample in which the side margin portion 117 was peeled off from the laminated chip 116 could be detected by using an optical microscope. Table 1 is a table summarizing the results.
The “peeling length” shown in Table 1 is the dimension of the gap between the laminated chip 116 and the side margin portion 117.

With reference to Table 1, it can be seen that in Examples 5, 7 and 8, samples having a peeling length of 50 μm or more can be detected, but samples having a peeling length of less than 50 μm cannot be detected. On the other hand, in Examples 2 and 4, it was confirmed that detection was possible in any sample regardless of the peeling length.
From this, by setting the thickness of the side margin portion of the unfired element 111 to 10 μm or less, a sample having a gap between the laminated chip 116 and the side margin portion 117 can be detected regardless of the peeling length. It was experimentally confirmed that it was possible.

(Measurement of body exposure width)
Twenty pieces were selected from the 200 samples according to Examples 3 and 6, and the body exposure widths of the selected 20 samples were measured. FIG. 17 is a graph summarizing the results.
The "element body exposed width of the end face side region" shown in FIG. 17 refers to the side margin portion 117 and the end face S5 in the X-axis direction on the side surfaces S3 and S4 of the laminated chip 116 on which the side margin portion 117 is formed. The dimension in the X-axis direction in the area between.
Further, the "elementary body exposure width of the main surface side region" is defined as between the side margin portion 117 and the main surface S6 in the Z-axis direction on the side surfaces S3 and S4 of the laminated chip 116 on which the side margin portion 117 is formed. It is a dimension in the Z-axis direction in the region of (see FIG. 14).

With reference to FIG. 17, it can be seen that in Example 3, the exposed width of the element body in the end face side region and the main surface side region is smaller on average than in Example 6. From this result, it was experimentally confirmed that it is possible to reduce the exposed width of the element body in the end face side region and the main surface side region by reducing the thickness of the side margin sheet 117s.

[Manufacturing of multilayer ceramic capacitors]
Examples 1,2,4,5,7,8 and Examples 1,2,4,5,7,8 and Examples 1,2,4,5,7,8 and the unfired elements according to Comparative Examples 1 to 6 were used according to the above production method. Samples of the multilayer ceramic capacitors according to Comparative Examples 1 to 6 were prepared.

[Evaluation of multilayer ceramic capacitors]
(Evaluation of moisture resistance)
Moisture resistance was evaluated for the samples of the multilayer ceramic capacitors according to Examples 1, 2, 4, 5, 7, 8 and Comparative Examples 1 to 6.
Specifically, 200 samples of Examples 1, 2, 4, 5, 7, 8 and Comparative Examples 1 to 6 are held in a state where a rated voltage of 45 ° C., 95% humidity, and 10 V is applied. A hygroscopicity test was performed. Then, the electric resistance value was measured for each sample after the hygroscopicity test, and the sample having the electric resistance value less than 10 MΩ was judged to be a failure. Table 2 is a table summarizing the thickness of the side margin portion, the pore ratio, and the number of failures for each sample.

With reference to Table 2, no defective sample was confirmed in the samples according to Comparative Examples 5 and 6, but a defective sample was confirmed in the samples according to Comparative Examples 1 to 4. The samples according to Comparative Examples 1 to 6 have a pore ratio of more than 1%.

The reason why the samples according to Comparative Examples 1 to 4 were confirmed to be defective is that the thickness of the side margin portion is relatively thin and the number of pores contained in the side margin portion is large. It is inferred from this that moisture has invaded the laminated chips.

From this result, it was confirmed that when the pore ratio of the side margin portion is larger than 1% and the thickness of the side margin portion is 15 μm or less, it becomes difficult to secure the moisture resistance of the multilayer ceramic capacitor.

On the other hand, in the samples according to Examples 1, 2, 4, 5, 7, and 8, although a sample having a failure in the sample according to Example 1 was confirmed, in Examples 2, 4, 5, 7, and 8. No defective sample was found in such samples. The samples according to Examples 1, 2, 4, 5, 7, and 8 have a pore ratio of 1% or less.

From this result, it was confirmed that by setting the pore ratio of the side margin portion 17 to 1% or less, the moisture resistance of the multilayer ceramic capacitor 10 is ensured even if the thickness of the side margin portion 17 is 15 μm or less. Then, it was confirmed that when the pore ratio of the side margin portion 17 is 1% or less and the thickness is 5 μm or more, the moisture resistance of the multilayer ceramic capacitor 10 is more effectively secured.

(Calculation of IR defect rate)
The IR defect rate of the samples according to Examples 1, 2, 4, 5, 7, and 8 was calculated. At this time, a sample having an IR defect rate of 10% or less was judged to be acceptable.
Table 3 and FIG. 18 show the thickness of the side margin portion 117 of the sample of the unfired element 111 according to Examples 1, 2, 4, 5, 7, and 8, and Examples 1, 2, 4, 5, 7. , 8 is a table and a graph summarizing the dimension D2 of the oxidation region E of the sample of the multilayer ceramic capacitor 10 and the IR defect rate.

The dimension D2 of the oxidation region shown in Table 3 and FIG. 18 is an average value of the dimension D2 of the oxidation region E formed in the 200 samples according to Examples 1, 2, 4, 5, 7, and 8.
The IR defect rate shown in Table 3 and FIG. 18 indicates the ratio of the samples in which IR defects occurred among the 200 samples according to Examples 1, 2, 4, 5, 7, and 8. The sample in which the above-mentioned IR defect occurs is a sample in which the CR product is less than 1 MΩ under the condition that the rated voltage of 6 V is applied.

With reference to Table 3 and FIG. 18, the sample according to Example 8 has an IR defect rate of more than 10%, but the sample according to Examples 1, 2, 4, 5, and 7 has an IR defect rate of 10% or less. It was.
The reason why the IR defect rate of the sample according to Example 8 is larger than 10% is that the thickness of the side margin portion 117 of the unfired element 111 is thicker than 20 μm, so that the ends of the internal electrodes 112 and 113 are oxidized. It is presumed that the insulation resistance between the internal electrodes 112 and 113 decreased because the oxidation region E was not sufficiently formed at the ends of the internal electrodes 112 and 113 without being promoted.

From this result, it is an experiment that when the thickness of the side margin portion 117 is 20 μm or less, the IR defect in the multilayer ceramic capacitor 10 can be suppressed by securing the dimension D2 of the oxidation region E of 0.4 μm or more. Was confirmed.

[Other Embodiments]
Although the embodiments of the present invention have been described above, the present invention is not limited to the above-described embodiments, and it goes without saying that various modifications can be made.

For example, in the multilayer ceramic capacitor 10, the capacitance forming portion 18 may be provided by being divided into a plurality of portions in the Z-axis direction. In this case, the first and second internal electrodes 12 and 13 may be alternately arranged along the Z-axis direction in each capacitance forming portion 18, and the first internal electrode 12 or the first internal electrode 12 or 13 may be arranged in the portion where the capacitance forming portion 18 is switched. 2 The internal electrodes 13 may be continuously arranged.

10 ... Multilayer ceramic capacitor 11 ... Elementary body 12 ... 1st internal electrode 13 ... 2nd internal electrode 14 ... 1st external electrode 15 ... 2nd external electrode 16 ... Laminated part 17 ... Side margin part 18 ... Capacity forming part 19 ... Cover Part 111 ... Unfired element body 116 ... Unfired laminated chip E ... Oxidized region

Claims (3)

A capacitance forming portion including a plurality of ceramic layers laminated in the first direction, a plurality of first internal electrodes and a plurality of second internal electrodes arranged between the plurality of ceramic layers, and the capacitance forming portion. A laminated portion having a cover portion covering from the first direction and a side surface facing the second direction orthogonal to the first direction.
A side margin portion that covers the side surface and has a pore ratio of 1% or less,
A first end face from which the plurality of first internal electrodes are pulled out and oriented in a third direction orthogonal to the first direction and the second direction, and
A second end face from which the plurality of second internal electrodes are pulled out and oriented in the third direction, and
With a ceramic body,
A first external electrode covering the first end surface of the ceramic body,
A second external electrode covering the second end surface of the ceramic body,
Equipped with
The side margin portion is located outside the flat portion having a dimension of 15 μm or less in the second direction and the flat portion outside the first direction, and the dimension in the second direction is larger than that of the flat portion. With a small curved surface,
The dimension of the cover portion in the first direction is equal to or greater than the dimension of the flat portion of the side margin portion in the second direction.
A laminated ceramic capacitor in which the boundary portion between the flat portion and the curved surface portion in the side margin portion is located inside the boundary portion between the capacitance forming portion and the cover portion in the laminated portion in the first direction. The multilayer ceramic capacitor according to claim 1.
The flat portion of the side margin portion is a multilayer ceramic capacitor having a dimension of 5 μm or more in the second direction. The multilayer ceramic capacitor according to claim 1 or 2.
The flat portion of the side margin portion is a multilayer ceramic capacitor having a dimension of 10 μm or less in the second direction.

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