JP2021097195A - Evaluation method for electric characteristic of device - Google Patents

Abstract

To provide a method for evaluating the electric characteristics of a device through device simulation using a value of energy level of BMD and a value of capture cross section.SOLUTION: A method for evaluating the electric characteristic of a device formed on a silicon wafer by a CZ method through device simulation includes: preparing a silicon wafer for preliminary test in advance; preparing the value of the energy level of BMD and the value of the capture cross section, which are obtained from the relation between the density of BMD in the silicon wafer for a preliminary test and the reverse leakage current measured by forming a pn junction on the silicon wafer for a preliminary test; and performing device simulation using the prepared value of the energy level and the prepared value of the capture cross section. Thus, the electric characteristic of the device formed on the evaluation silicon wafer is evaluated.SELECTED DRAWING: Figure 1

Description

The present invention relates to a method for evaluating the electrical characteristics of a device by device simulation.

In an electronic device, in order to obtain a device structure having desired electrical characteristics, a device is actually prototyped and the quality is judged by measuring the electrical characteristics. However, there are many steps in prototyping a device, and it is difficult to easily obtain the result of device characteristics.

Therefore, it is often the case that the electrical characteristics are predicted using simulation. This simulation is called TCAD, and in particular, the one that assumes the structure and calculates the electrical characteristics is called the device simulation.

In general, a device simulator analytically solves the carrier continuity equations represented by the following equations (1) and (2) and the simultaneous equations of Poisson's equations represented by the following equations (3) in the assumed structure. Then, predict the electrical characteristics.

ここで、ｐは正孔密度、ｎは電子密度、Ｆは電場、φは静電ポテンシャル、ｘは位置、εは誘電率、ｑは素電荷量、Ｒは再結合項、Ｇは発生項、μ_ｈは正孔の移動度、μ_ｅは電子の移動度、Ｄ_ｈは正孔の拡散係数、Ｄ_ｅは電子の拡散係数、ｔは時間、Ｎ_Ｄはドナー型不純物濃度、Ｎ_Ａはアクセプター型不純物濃度である。

Here, p is the hole density, n is the electron density, F is the electric field, φ is the electrostatic potential, x is the position, ε is the permittivity, q is the elementary charge, R is the recombination term, and G is the generation term. mu _h is the hole mobility, mu _e is the electron mobility, D _h is the hole diffusion coefficient, D _e is the electron diffusion coefficient, t is time, N _D is the donor-type impurity concentration, N _a is the acceptor Type impurity concentration.

The carrier continuity equations (1) and (2) consist of a current component term, a recombination term, and a generation term consisting of a drift component and a diffusion component, and include defects and impurities in the wafer, surface levels of semiconductors and metals, and the like. The effect is reflected in the calculation result of the occurrence / recombination term.

In order to accurately calculate the electrical characteristics of an actual device using this device simulator, it is important to use various accurate physical property values. The basic physical property values include, for example, the mobility of electrons and holes.

Patent Documents 1 to 3 disclose methods for predicting electrical characteristics by device simulation, but none of them mentions the influence of defects in a wafer in terms of calculation techniques in simulation.

On the other hand, it is known that impurities and defects in the wafer affect the device characteristics. For example, in a silicon wafer, oxygen contained in a crystal is precipitated to form a crystal defect. This is called BMD.

In the device simulator, defects and impurities with respect to the device characteristics can be considered as "carrier generation / recombination centers". The degree of its effect depends on the energy level of impurities and defects, the cross section captured, and the concentration. Specifically, it is expressed as the following equations (4) to (8).

ここで、Ｃ_ｉ（Ｃ_ｐ、Ｃ_ｎ）、ｎ_１、ｐ_１は以下の式で表せる。

上記式において、Ｒ_ＤＤはドナー型の発生／再結合速度、Ｒ_ＤＡはアクセプター型の発生／再結合速度、ｎは電子密度、ｐは正孔密度、Ｎ_ＤＤ、Ｎ_ＤＡは欠陥や不純物の準位密度、Ｖ_ｔｈは熱速度、σ_ｉは欠陥や不純物の捕獲断面積、Ｅ_ｉｎｔは欠陥や不純物のミッドギャップ、Ｅ_ｔ，Ｄは欠陥や不純物のエネルギー準位、ｋ_Ｂはボルツマン定数、Ｔは温度、ｎ_ｉｎｔは真性キャリア濃度である。

_{Here, C i (C p, C} n), n 1, p 1 is expressed by the following equation.

In the above _{formula, R DD} generation / recombination rate of the donor _{type, R DA} is generated / recombination velocity acceptor, n represents the electron density, p is the hole _{density, N DD, N DA's} defects and impurity levels Position density, V _th is thermal velocity, σ _i is the capture cross-sectional area _{of defects and impurities, E int} is the midgap of defects and impurities, Et _{and D} are energy levels of defects and impurities, k _B is Boltzmann constant, T Is the temperature and n _int is the intrinsic carrier concentration.

In actual device processes, impurities and defects are often introduced into the wafer, so it is necessary to take into account the effects of the introduced impurities and defects in the accurate prediction of electrical characteristics. And the physical property value of the defect are required. The physical property values are the capture cross section of defects and impurities in Eq. (6) and the energy level of defects and impurities in Eq. (7) or (8).

Japanese Unexamined Patent Publication No. 4-286348 Japanese Unexamined Patent Publication No. 4-286350 Japanese Unexamined Patent Publication No. 11-68084

For metal impurities, the energy level and capture cross section can often be determined by DLTS measurement, etc., but for BMD, the energy level and capture cross section are not clear, and the effect on electrical characteristics using device simulation is not clear. Difficult to predict.

Generally, the values of energy level and capture cross section are experimentally obtained by using DLTS or the like, but in the case of BMD, it is difficult to experimentally determine these values as compared with metal impurities. However, in order to predict the electrical characteristics in consideration of BMD using device simulation, specific values of the energy level and capture cross section of BMD are required, and some values must be assumed.

Since the BMD is formed by heat-treating a CZ wafer containing solid solution oxygen, it is expected that the BMD is formed in the substrate in the device process using the CZ wafer. However, since the energy level and the captured cross section of the BMD are not clear, there is a problem that it is difficult to predict the electrical characteristics using the device simulator.

The present invention has been made to solve the above problems, and provides a method for evaluating the electrical characteristics of a device by device simulation using the value of the energy level of BMD and the value of the captured cross section. The purpose.

The present invention has been made to achieve the above object, and is a method for evaluating the electrical characteristics of a device formed on a silicon wafer formed on a silicon wafer by the CZ method by a device simulation, wherein a silicon wafer for preliminary test is used in advance. The energy level of the BMD prepared from the relationship between the density of the BMD in the silicon wafer for the preliminary test and the reverse leakage current measured by forming a pn junction on the silicon wafer for the preliminary test. An evaluation method for evaluating the electrical characteristics of a device formed on a silicon wafer for evaluation by preparing a value and a capture cross-sectional area value and performing a device simulation using the prepared energy level value and a capture cross-sectional area value. provide.

According to such a method for evaluating the electrical characteristics of the device, it is possible to perform device simulation using the value of the energy level of BMD and the value of the captured cross section, and it is possible to evaluate the electrical characteristics of the device.

At this time, the value of the energy level of BMD obtained in advance can be set to Ec −0.56 eV, and the value of the captured cross section can be ^{set to 5 × 10 −11} cm ^2.

In this way, the electrical characteristics of the device can be specifically evaluated with high accuracy.

At this time, the electrical characteristic of the device to be evaluated can be the reverse leakage current characteristic.

In this way, the electrical characteristics of the device can be evaluated with higher accuracy.

As described above, according to the method for evaluating the electrical characteristics of the device of the present invention, it is possible to perform device simulation using the value of the energy level of BMD and the value of the captured cross section. This makes it possible to evaluate the electrical characteristics of the device with high accuracy. Further, it is possible to evaluate the reverse leakage current characteristic with high accuracy.

It is an analysis flowchart for obtaining the value of the energy level of BMD and the value of the capture cross section. The P and B concentrations of the pn junction structure and the center density distribution corresponding to BMD are shown. The BMD density dependence of the leak current is shown. The application voltage dependence of the leak current is shown. The calculated values are shown in solid lines, and the experimental values are shown in circle plots. The application voltage dependence of the leak current is shown. The calculated values are shown by solid lines when the energy level value of BMD and the value of the captured cross section are taken into consideration, dotted lines when not taken into consideration, and experimental values are shown by circle plots.

Hereinafter, the present invention will be described in detail, but the present invention is not limited thereto.

As described above, there has been a demand for a method for evaluating the electrical characteristics of a device by device simulation using the value of the energy level of BMD and the value of the captured cross section.

As a result of diligent studies on the above problems, the present inventors prepare a silicon wafer for preliminary test in advance, which is a method of evaluating the electrical characteristics of a device formed on a silicon wafer by the CZ method by a device simulation. However, the energy level value and capture interruption of BMD obtained from the relationship between the density of BMD in the silicon wafer for preliminary test and the reverse leakage current measured by forming a pn junction on the silicon wafer for preliminary test. An area value is prepared, and a device simulation using the prepared energy level value and capture cross-sectional area value is used to evaluate the electrical characteristics of the device formed on the silicon wafer for evaluation. We have found that device simulation using the value of the energy level and the value of the captured cross-sectional area is possible, and the electrical characteristics of the device can be evaluated with higher accuracy, and the present invention has been completed.

Hereinafter, description will be made with reference to the drawings.

[Analysis flow for obtaining the value of the energy level of BMD and the value of the captured cross section]
FIG. 1 is an analysis flowchart for obtaining a value of an energy level of BMD and a value of a captured cross section, and the present invention will be described in detail with reference to FIG. 1 below.

[First step]
The first step is a step of preparing a silicon wafer for preliminary test. Prepare a silicon wafer for preliminary test in which the BMD density in the substrate has been changed. Specifically, as an experiment, a wafer in which the BMD density in the substrate is shaken is produced by subjecting the epitaxial wafer to the nucleation heat treatment conditions. The nucleation heat treatment conditions are not particularly limited, but can be, for example, 450 ° C / 4h, 500 ° C / 4h, and 650 ° C / 4h. In this way, a silicon wafer for preliminary test in which the BMD density in the substrate is varied is produced.

[Second step]
The second step is a step of forming a pn junction on the silicon wafer for preliminary test. The dopant used to form the pn junction is not particularly limited, and for example, boron (B) can be used as the p-type dopant and phosphorus (P) can be used as the n-type dopant.

[Third step]
The third step is a step of measuring the reverse leakage current. The reverse leakage current is measured for the silicon wafer for preliminary test in which the pn junction is formed.

[Fourth step]
The fourth step is a step of measuring the concentration distribution. The dopant concentration distribution and the BMD density distribution of the silicon wafer for preliminary test in which the pn junction is formed are measured. The measuring method is not particularly limited, but for example, SIMS can be used for measurement.

[Fifth step]
The fifth step is a step of constructing a calculation model. The leak current can be calculated analytically by using the equations (1) to (3). At this time, the influence of impurities and defects on the leak current is considered as G or R in the equations (1) and (2), and in the case of the leak current, G becomes dominant. Further, G or R can be calculated using the equations (4) and (5). _{However, when calculating G, R DD} and R _DA described in the formulas (4) and (5) correspond to G. When calculating G, the values used as the physical property values are the energy level and the captured cross section, and the energy level is particularly in the range below the band gap. For example, in the case of silicon, the value of the energy level can be arbitrarily determined in the range of 0 to 1.1 eV or less, and the value of the captured cross section can also be arbitrarily determined. Further, for example, by fixing the energy level and changing the captured cross section, the leak current calculated value can be changed, and the physical property value of the defect in which the experimental result can be reproduced can be determined. Specifically, when the energy level is constant, the leakage current increases as the capture cross section increases. Conversely, the capture cross section can be constant, in which case the leak current increases as the energy level approaches the midgap. Either the energy level or the captured cross section may be constant. For example, in the case of a silicon wafer, the energy level value is not particularly limited as long as it is in the range of the band gap or less, but when it is set to Ec-0.56 eV, the influence on the leakage current is the largest. Here, Ec is the bottom of the conduction band.

[Sixth step]
The sixth step is a step of performing fitting. As the dopant concentration distribution, the measured value measured in the fourth step is used, and it is assumed that the center of occurrence of the measured BMD density exists uniformly up to the back surface in the wafer. Fitting is performed so that the measured results can be reproduced by using the energy level of the center of generation or the captured cross section corresponding to BMD as parameters. For example, in the case of a silicon wafer, the energy level can be fixed at Ec-0.56 eV and the capture cross section can be used as a parameter for fitting.

[7th step]
The seventh step is a step of obtaining a physical property value. Obtain the energy level and capture cross section of the center of occurrence that can reproduce the actual measurement results.

By obtaining the value of the energy level of BMD and the value of the captured cross section by the above-mentioned first to seventh steps, it is possible to perform device simulation in consideration of the energy level of BMD and the captured cross section.

At this time, it is preferable that the value of the energy level of BMD is Ec −0.56 eV and the value of the captured cross section is 5 × 10 ^-11 cm ^2. With such a value, the actual measurement result can be reproduced well, and the electrical characteristics of the device can be evaluated with high accuracy.

Further, it is preferable that the electrical characteristic of the device to be evaluated is the reverse leakage current characteristic. In the case of the evaluation of the electrical characteristics of the device by the device simulation of the present invention, it is possible to evaluate the reverse leakage current characteristics with extremely high accuracy.

Hereinafter, the present invention will be described in detail with reference to examples, but this does not limit the present invention.

(Example)
Precipitation heat treatment (450 ° C, 500 ° C, 650 ° C / 4h + 800 ° C / 4h + 1000 ° C) for a silicon wafer for preliminary testing of n / n-EPW (epitaxial wafer) with an epitaxial layer thickness of 5 μm and a substrate thickness of 725 μm and a diameter of 200 mm. The BMD density of the substrate was shaken by applying 1 / 1h).

A pn junction was formed on the surface layer of these wafers, and a reverse voltage (10 V) was applied to measure the leakage current at 55 ° C. In addition, the B and P concentration distributions were measured by SIMS. Furthermore, the BMD density of the substrate was actually measured.

In the device simulation, the dopant concentration distribution in the case of the experiment was assumed, and it was assumed that the generation center corresponding to the BMD exists uniformly from the position 5 μm from the front surface to the back surface. The density of the center of occurrence was the measured value of the BMD density (5.7 × 10 ⁸ , 2.6 × 10 ⁹ , 5.0 × 10 ⁹ / cm ³ ). The concentration distribution at this time is shown in FIG.

The energy level at the center of generation was assumed to be Ec-0.56 eV, and the capture cross section was used as the fitting parameter. As other calculation conditions, the reverse applied voltage was 0.25 to 10 V, the calculated temperature was 55 ° C., and the simulation was carried out.

The experimental results showed that the leakage current increased as the BMD density increased. Also, in the device simulation, it was found that the captured cross-section of the center of occurrence was set to 5 × ^10-11 cm ² , which was in good agreement with the measured value. The result is shown in FIG. From this result, when performing the calculation in consideration of BMD in the device simulation, the energy levels of BMD Ec-0.56 eV, the capture cross-section by a 5 × ¹⁰ -11 cm ^2, more electrical characteristics It can be predicted accurately.

Moreover, the energy level (Ec-0.56 eV), by performing a device simulation with capture cross section ^{(5 × 10 -11 cm 2)} , the actual electrical characteristics of the (reverse leakage current characteristics) prediction went.

As a prediction of the reverse leakage current characteristic, a pn junction was formed in n / n-EPW with a thickness of 5 μm and a diameter of 200 mm of the epitaxial layer subjected to the precipitation heat treatment, and the reverse leakage current was measured. The BMD density of this wafer is known to be ^{5.7 × 10 8} / cm ^3. Result of the reverse leakage current characteristics were compared with the results of the device simulation assuming a generation center (the energy level Ec-0.56 eV, the capture cross-section 5 × ¹⁰ -11 cm ²⁾ corresponding to BMD. The pn junction structure in the device simulation was set to a condition imitating the case of actual measurement, and the calculated temperature was set to 55 ° C., which is the same as the case of actual measurement. As a result, it was found that the measured results can be reproduced well as shown in FIG.

(Comparison example)
The electrical characteristics using the device simulation considering the influence of BMD and the electrical characteristics using the device simulation not considering the influence of BMD were compared with the electrical characteristics in the actual device.

The result of the actual measurement compared is the leakage current of a device in which a pn junction diode is manufactured on a wafer having a diameter of 200 mm and n / n-EPW heat-treated. The BMD density of the wafer in the case of actual measurement is 5 × 10 ⁹ / cm ³ . The structure of the device simulation imitated the case of actual measurement. Further, the calculated temperature was set to 55 ° C., which is the same as in the case of actual measurement.

The results of the reverse leakage current characteristics measured and calculated are shown in FIG. As can be seen from FIG. 5, the device simulation considering the effect of BMD, which is the method for evaluating the electrical characteristics of the device of the present invention, can reproduce the measured results well. On the other hand, in the device simulation of the comparative example in which the effect of BMD is not considered, the experimental result cannot be reproduced and the electrical characteristics of the device cannot be evaluated.

As described above, according to the method for evaluating the electrical characteristics of the device of the present invention, the effect of BMD can be taken into consideration, and thereby the electrical characteristics of the device can be evaluated with high accuracy.

The present invention is not limited to the above embodiment. The above-described embodiment is an example, and any object having substantially the same configuration as the technical idea described in the claims of the present invention and exhibiting the same effect and effect is the present invention. Is included in the technical scope of.

Claims (3)

It is a method of evaluating the electrical characteristics of a device formed on a silicon wafer by the CZ method by device simulation.
A silicon wafer for preliminary test was prepared in advance, and the density was determined from the relationship between the density of BMD in the silicon wafer for preliminary test and the reverse leakage current measured by forming a pn junction on the silicon wafer for preliminary test. , The energy level value and the capture cross-sectional area value of the BMD are prepared, and the device formed on the silicon wafer for evaluation by the device simulation using the prepared energy level value and the capture cross-sectional area value. A method for evaluating the electrical characteristics of a device, which comprises evaluating the electrical characteristics. Electrical characteristics of the device according to claim 1, characterized in that the values of the energy levels of the previously obtained BMD and Ec-0.56 eV, the value of the capture cross section and 5 × ¹⁰ -11 cm ² Evaluation method. The method for evaluating an electrical characteristic of a device according to claim 1 or 2, wherein the electrical characteristic of the device to be evaluated is a reverse leakage current characteristic.

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