JP2021097091A - Underfill material and method for manufacturing semiconductor device using the same - Google Patents

Abstract

To provide an underfill material that suppresses warping of semiconductor wafers and provides high connection reliability.SOLUTION: The underfill material contains an epoxy resin, a curing agent, an acrylic polymer, and an inorganic filler, the storage modulus at 25°C after curing is 2.4 to 3.6 GPa, the storage modulus at 170°C after curing is 70 to 800 MPa, and the integral value of the storage modulus at 25 to 250°C after curing is 1.5×1011 to 3.2×1011, and the melt viscosity at 100°C is less than 10000 Pa-s.SELECTED DRAWING: Figure 1

Description

The present technology relates to an underfill material and a method for manufacturing a semiconductor device using the underfill material.

In recent years, in a semiconductor chip mounting method, a "pre-applied underfill film (PUF)" in which an underfill film is attached on a semiconductor IC (Integrated Circuit) electrode has been used for the purpose of shortening the process. (See, for example, Patent Document 1). In particular, in flip chip mounting for memory manufacturing applications, PUF technology is becoming widespread in multi-stage stacked mounting using TSV (Through Silicon Via) chips. As a configuration, there is a tendency that fine pitch, multi-pin, and thinning are required year by year. For example, as the height of the TSV chip is reduced, a TSV chip having a thickness of 50 μm or less is also being studied. For example, if the warp (distortion or curvature) of a semiconductor wafer becomes large when laminating and mounting by the COW (Chip on Wafer) method, a problem that the next process cannot be advanced occurs. In addition, high connection reliability is also required. There is.

Japanese Unexamined Patent Publication No. 2019-156997

This technology has been proposed in view of such conventional circumstances, and is an underfill material that suppresses warpage of a semiconductor wafer and can obtain high connection reliability, and a method for manufacturing a semiconductor device using the underfill material. I will provide a.

As a result of diligent studies by the present inventors, it is possible to suppress the warp of the semiconductor wafer and obtain high connection reliability by controlling the melt viscosity of the underfill material and the storage elastic modulus of the underfill material after curing. And came to complete this technology.

That is, the underfill material according to the present technology contains an epoxy resin, a curing agent, an acrylic polymer, and an inorganic filler, and has a storage elastic modulus of 2.4 to 3.6 GPa at 25 ° C. after curing. The storage elastic modulus at 170 ° C. after curing is 70 to 800 MPa, and the integrated value of the storage elastic modulus at 25 to 250 ° C. after curing is 1.5 × 10 ^{11 to} 3.2 × 10 ¹¹ , at 100 ° C. The melt viscosity is 10,000 Pa · s or less.

Further, the method for manufacturing a semiconductor device according to the present technology includes a step of preliminarily bonding an underfill material to a semiconductor chip side on which a soldered electrode is formed or a substrate side on which a counter electrode facing the soldered electrode is formed. The underfill material is a semiconductor wafer having a step of solder-bonding an electrode on the semiconductor chip side and a counter electrode on the substrate side, and the substrate is fixed on a support substrate via a temporary bonding material. It contains an epoxy resin, a curing agent, an acrylic polymer, and an inorganic filler, and has a storage elastic modulus of 2.4 to 3.6 GPa at 25 ° C. after curing of the underfill material, after curing of the underfill material. The storage elastic modulus at 170 ° C. is 70 to 800 MPa, and the integrated value of the storage elastic modulus at 25 to 250 ° C. after curing of the underfill material is 1.5 × 10 ^{11 to} 3.2 × 10 ^11. The melt viscosity of the material at 100 ° C. is 10,000 Pa · s or less.

According to this technique, warpage of a semiconductor wafer can be suppressed and high connection reliability can be obtained.

FIG. 1 is a cross-sectional view showing an example of a plurality of semiconductor chips and semiconductor wafers before mounting. FIG. 2 is a cross-sectional view showing an example of a state in which a plurality of semiconductor chips are laminated on a semiconductor wafer. FIG. 3 is an example of an infrared micrograph in the case where the back bump of the semiconductor wafer has a solder flow. FIG. 4 is an example of an infrared micrograph of a semiconductor wafer with no solder flow on the back bump. FIG. 5 is an example of an ultrasonic image when there is delamination between semiconductor chips. FIG. 6 is an example of an ultrasonic image when there is no delamination between semiconductor chips.

Hereinafter, embodiments of the present technology will be described in detail with reference to the drawings.

<Underfill material>
The underfill material according to the present embodiment contains an epoxy resin, a curing agent, an acrylic polymer, and an inorganic filler. The underfill material has a storage elastic modulus of 2.4 to 3.6 GPa at 25 ° C. after curing, a storage elastic modulus of 70 to 800 MPa at 170 ° C. after curing, and 25 to 250 ° C. after curing. The integrated value of the storage elastic modulus of is 1.5 × 10 ^{11 to} 3.2 × 10 ¹¹ , and the melt viscosity at 100 ° C. is 10000 Pa · s or less.

The underfill material has an integral value of the storage elastic modulus at 25 to 250 ° C. after curing of 1.5 × 10 ^{11 to} 3.2 × 10 ¹¹ . After the semiconductor chips are laminated and mounted by the COW method, the elastic modulus, curing shrinkage, linear expansion, etc. of the underfill material are considered as factors that cause the semiconductor wafer to warp, and the highly elastic underfill material has a high curing shrinkage rate. It is considered that when the underfill material is cured and then cooled at a high temperature and then cooled, the underfill material further shrinks at a high linear expansion rate, causing the semiconductor wafer to warp. In this technology, focusing on suppressing the warp of the semiconductor wafer after laminating and mounting the semiconductor chips, the temperature of the cured underfill material changes from the state where the underfill material is cured at a high temperature (about 250 ° C.). The transition of the elastic modulus in the process of returning to room temperature (about 25 ° C.), that is, the integrated value of the storage elastic modulus at 25 to 250 ° C. after curing of the underfill material is 1.5 × 10 ^{11 to} 3.2 × 10 ¹¹ . Stipulated that there is. Since the integral value of the storage elastic modulus at 25 to 250 ° C. after curing is 1.5 × 10 ¹¹ or more, the underfill material can improve the connection reliability when the semiconductor chips are laminated and mounted. Further, since the integrated value of the storage elastic modulus at 25 to 250 ° C. after curing is 3.2 × 10 ¹¹ or less, the underfill material can suppress the warp of the semiconductor wafer after stacking and mounting. In particular, in order to more effectively suppress the warpage of the semiconductor wafer, the underfill material has an integral value of the storage elastic modulus at 25 to 250 ° C. after curing of 1.5 × 10 ^{11 to} 3.0 × 10 ¹¹ . It is preferable to have.

The underfill material has a storage elastic modulus of 2.4 to 3.6 GPa at 25 ° C. after curing. Since the underfill material has a storage elastic modulus of 2.4 GPa or more at 25 ° C. after curing, it is possible to improve the connection reliability when laminating and mounting semiconductor chips. Further, since the underfill material has a storage elastic modulus of 3.6 GPa or less at 25 ° C. after curing, it is possible to suppress warpage of the semiconductor wafer after laminating and mounting. In particular, in order to more effectively suppress the warpage of the semiconductor wafer, the underfill material preferably has a storage elastic modulus of 2.4 to 3.0 GPa at 25 ° C. after curing.

The underfill material has a storage elastic modulus of 70 to 800 MPa at 170 ° C. after curing. Since the underfill material has a storage elastic modulus of 70 MPa or more at 170 ° C. after curing, it is possible to improve the connection reliability when laminating and mounting semiconductor chips. Further, since the storage elastic modulus at 170 ° C. after curing of the underfill material is 800 MPa or less, it is possible to suppress the warp of the semiconductor wafer after laminating and mounting the semiconductor chips.

The underfill material has a melt viscosity at 100 ° C. of 10000 Pa · s or less. The melt viscosity of the underfill material at 100 ° C. affects the mounting load when the semiconductor chips are laminated and mounted. When the melt viscosity of the underfill material at 100 ° C. is 10,000 Pa · s or less, it is possible to suppress an increase in the mounting load when the semiconductor chips are laminated and mounted. In particular, in order to more effectively suppress an increase in the mounting load when the semiconductor chips are laminated and mounted, the melt viscosity of the underfill material at 100 ° C. is preferably 9000 Pa · s or less, and more preferably 8500 Pa · s or less. The lower limit of the melt viscosity of the underfill material at 100 ° C. is not particularly limited, but may be, for example, 7,000 Pa · s or more, and may be 8,000 Pa · s or more.

A wafer support system may be used when laminating and mounting semiconductor chips by the COW method. A wafer support system is a method for protecting backside bumps (soldered electrodes) of a semiconductor wafer. When a wafer support system is used, the semiconductor chip is mounted on a semiconductor wafer fixed to the support substrate via a temporary bonding material. For example, when an adhesive as a temporary adhesive is applied to one surface of a support substrate to form an adhesive layer and the back bumps of a semiconductor wafer are adhered to the adhesive layer, an adhesive layer that protects the back bumps of the semiconductor wafer. Uses a relatively soft composition because it peels off after mounting. In this case, if the semiconductor chips are laminated and mounted under a high load, the adhesive layer may be softened due to high temperature, and the solder of the back bumps of the semiconductor wafer protected by the adhesive layer may flow out. Therefore, by setting the temperature of the underfill material at the minimum melt viscosity to 140 ° C. or higher, it is possible to suppress an increase in the mounting load when the semiconductor chips are laminated and mounted, and prevent the solder from flowing out from the back bumps of the semiconductor wafer. be able to. The upper limit of the temperature of the underfill material at the minimum melt viscosity is not particularly limited, and may be, for example, 170 ° C. or lower.

Next, a specific example of the composition of the underfill material for exhibiting the physical characteristics of the underfill material described above will be described. As described above, the underfill material contains an epoxy resin, a curing agent, an acrylic polymer, and an inorganic filler.

[Epoxy resin]
The underfill material contains, as an epoxy resin, an epoxy resin that is liquid at least at room temperature. By using an epoxy resin that is liquid at room temperature, it is possible to suppress an increase in the mounting load when the semiconductor chips are laminated and mounted. Further, the epoxy resin liquid at room temperature is preferably one having low elasticity after curing for the purpose of adjusting the storage elastic modulus of the underfill material after curing as described above. The epoxy resin liquid at room temperature preferably has, for example, an epoxy equivalent of 300 to 500 g / eq. Further, the epoxy resin liquid at room temperature preferably has a flexible skeleton, for example, an ethylene oxide (EO) modified skeleton, a propylene oxide (PO) modified skeleton, and the like. As the epoxy resin liquid at room temperature, a polyether type epoxy resin, a bisphenol F type epoxy resin, or the like can be used. Specific examples of the epoxy resin liquid at room temperature include AER-9000 (manufactured by Asahi Kasei E-Materials, epoxy equivalent 380 g / eq), EXA-4850-1000 (manufactured by DIC, epoxy equivalent 350 g / eq), EXA-4850. -150 (DIC, epoxy equivalent 450 g / eq), EXA-4816 (DIC, epoxy equivalent 403 g / eq), EP-4010S (ADEKA, epoxy equivalent 350 g / eq), EP-4010L (ADEKA) , Epoxy equivalent 350 g / eq), EP-4003S (manufactured by ADEKA, epoxy equivalent 470 g / eq) and the like. Epoxy resins that are liquid at room temperature may be used alone or in combination of two or more. In addition, in this specification, "room temperature" means the range of 15 to 25 degreeC specified in JIS K 0050: 2005 (general rule of chemical analysis method).

Further, the underfill material may further contain an epoxy resin that is solid at room temperature as the epoxy resin. As the epoxy resin that is solid at room temperature, it is preferable to use a polyfunctional epoxy resin having three or more epoxy groups from the viewpoint of high adhesiveness and heat resistance. Examples of the trifunctional epoxy resin include tris (hydroxyphenyl) methane type epoxy resin, tris (hydroxyphenyl) ethane type epoxy resin, and tris (hydroxyphenyl) propane type epoxy resin. Examples of the tetrafunctional epoxy compound include a tetrakis (hydroxyphenyl) methane type epoxy resin, a tetrakis (hydroxyphenyl) ethane type epoxy resin, and a tetrakis (hydroxyphenyl) propane type epoxy resin. Epoxy resins that are solid at room temperature may be used alone or in combination of two or more.

The total content of the epoxy resin liquid at room temperature in the underfill material is preferably 22 to 27% by mass. The total content of the epoxy resin solid at room temperature in the underfill material is preferably 10 to 15% by mass. Further, the total content of the epoxy resin liquid at room temperature is preferably 55% by mass or more, more preferably 61% by mass or more, based on the total content of the epoxy resin in the underfill material. The total content of the epoxy resin in the underfill material is preferably 30 to 50% by mass, more preferably 32 to 39% by mass, and even more preferably 34 to 39% by mass.

[Curing agent]
The curing agent is a curing agent for epoxy resins, and phenols, imidazoles, acid anhydrides, amines, hydrazides, polyethercaptans, Lewis acid-amine complexes and the like can be used. Among these, a phenol compound that can obtain a high crosslink density is preferable. Examples of the phenol compound include a phenol novolac compound, a cresol novolac compound, an aromatic hydrocarbon formaldehyde resin-modified phenol compound, a dicyclopentadienephenol-added compound, and a phenol aralkyl compound. Among the phenol compounds, the phenol novolac compound is preferable from the viewpoint of heat resistance. The curing agent may be used alone or in combination of two or more. The content of the curing agent in the underfill material is preferably 1 to 15% by mass, more preferably 11 to 14% by mass.

[Acrylic polymer]
The underfill material contains an acrylic polymer having a glass transition temperature (Tg) of room temperature or lower as an acrylic polymer that is a film-forming resin. The acrylic polymer having a Tg of room temperature or lower preferably has a Tg of 12 ° C. or lower, more preferably −20 ° C. or lower, in order to obtain the physical characteristics (particularly elastic modulus) of the underfill material described above. The lower limit of Tg of the acrylic polymer having Tg of room temperature or lower is not particularly limited, but can be, for example, −40 ° C. or higher. The acrylic polymer having a Tg of room temperature or lower preferably has at least one of a carboxyl group and an epoxy group as a functional group. Examples of acrylic polymer products having a Tg of room temperature or lower include SG-280 (Tg; −29 ° C.), SG-P3 (Tg; 12 ° C.), SG-70 (Tg; -13 ° C.), and SG-708-6. (Tg; 4 ° C.), WS-023 EK30 (Tg; -10 ° C.), SG-80H (Tg; 11 ° C.), SG-600TEA (Tg; -37 ° C.) (all manufactured by Nagasemtex), etc. Be done.

From the viewpoint of film formability, the weight average molecular weight of the acrylic polymer having a Tg of room temperature or lower ^{is preferably 5.0 × 10 3} or more, and more preferably 1.0 × 10 ⁴ or more. The upper limit of the weight average molecular weight of the acrylic polymer Tg of greater than room temperature, for example preferably 1.0 × 10 ⁶ or less. As the acrylic polymer having a Tg of room temperature or lower, one type may be used alone, or two or more types may be used in combination. The content of the acrylic polymer having a Tg of room temperature or lower in the underfill material is preferably 10 to 40% by mass, more preferably 13 to 25% by mass, still more preferably 15 to 18% by mass. Further, it is preferable that the underfill material does not substantially contain a film-forming resin other than the acrylic polymer having a Tg of room temperature or lower, for example, an acrylic polymer having a Tg of higher than room temperature.

[Inorganic filler]
The underfill material contains an inorganic filler. The inorganic filler is used, for example, for the purpose of adjusting the fluidity of the resin layer during crimping. As the inorganic filler, for example, silica, talc, titanium oxide, calcium carbonate, magnesium oxide and the like can be used, and silica is preferable. The inorganic filler may be used alone or in combination of two or more. The total content of the inorganic fillers in the underfill material is preferably 26 to 42% by mass, more preferably 29 to 41% by mass.

[Curing accelerator]
The underfill material preferably further contains a curing accelerator in addition to the above-mentioned components. Examples of the curing accelerator include imidazoles such as 2-methylimidazole, 2-ethylimidazole, and 2-ethyl-4-methylimidazole, and 1,8-diazabicyclo (5,4,0) undecene-7 salt (DBU salt). ), Tertiary amines such as 2- (dimethylaminomethyl) phenol, phosphines such as triphenylphosphine, metal compounds such as tin octylate, and the like. Specific examples of the curing accelerator include 2PHZ-PW, C11Z-CN, 2MAOK-PW (all manufactured by Shikoku Chemicals Corporation) and the like. The curing accelerator may be used alone or in combination of two or more. When the underfill material contains a curing accelerator, the content of the curing accelerator in the underfill material is preferably 0.5 to 1.5% by mass.

Specific examples of particularly preferable compositions of the underfill material are as follows. The underfill material contains an epoxy resin that is liquid at room temperature, a curing agent, an acrylic polymer having a Tg of room temperature or less, and an inorganic filler, and the total content of the epoxy resin that is liquid at room temperature in the underfill material. Is 22 to 27% by mass, the content of the acrylic polymer having Tg of room temperature or lower is 15 to 18% by mass, and the content of the inorganic filler is 29 to 41% by mass.

Examples of the shape of the underfill material include a film shape and a paste shape. As will be described in detail below, when the underfill material is previously bonded to the semiconductor chip side on which the soldered electrode is formed or the substrate side on which the counter electrode facing the soldered electrode is formed, the underfill material is made into a film. Is preferable.

According to the underfill material as described above, it is possible to suppress the warp of the semiconductor wafer after laminating and mounting the semiconductor chips by the COW method, and to obtain high connection reliability. In addition, the void exclusion property can be improved.

<Manufacturing method of semiconductor devices>
Next, an example of a method for manufacturing a semiconductor device using the above-mentioned underfill material will be described. In the method for manufacturing a semiconductor device according to the present embodiment, the underfill material is previously placed on the semiconductor chip side on which the soldered electrode is formed or on the substrate (semiconductor wafer) side on which the counter electrode facing the soldered electrode is formed. It includes a step of bonding and a step of solder-bonding the electrode on the semiconductor chip side and the counter electrode on the substrate side.

Hereinafter, an example of a method in which a semiconductor chip is laminated and mounted on a semiconductor wafer in four stages will be described with reference to FIGS. 1 and 2. FIG. 1 is a cross-sectional view showing an example of a plurality of semiconductor chips and a semiconductor wafer before mounting, and FIG. 2 is a cross-sectional view showing an example of a state in which a plurality of semiconductor chips are laminated on a semiconductor wafer.

As shown in FIG. 1, on the semiconductor wafer 1, the semiconductor chips 2 to 4 of the intermediate layer and the semiconductor chips 5 of the uppermost layer are laminated and arranged via the underfill films 6 to 9.

The semiconductor wafer 1 is fixed on the support substrate 10 via a temporary sticking material 11. The material of the semiconductor wafer 1 may be silicon or a compound semiconductor (for example, gallium nitride or the like). An electronic circuit is formed on the semiconductor wafer 1 for each unit that is later separated into pieces.

The semiconductor wafer 1 has, for example, a soldered electrode 1a formed on one surface and an electrode 1b formed on the other surface. The soldered electrode 1a is, for example, a Cu pillar top plated with solder. The solder 1c of the soldered electrode 1a is a so-called lead-free solder, and for example, Sn / Ag / Cu solder (melting point: 220 ° C. to 240 ° C.), Sn / Ag solder (melting point: 220 ° C.), or the like can be used. .. The electrode 1b is connected to the soldered electrode 2c of the semiconductor chip 2, and for example, a Cu pillar or the like can be used.

The support substrate 10 has the same surface shape as the semiconductor wafer 1, for example, and fixes the semiconductor wafer 1. For example, glass, silicon, or the like is used as the material of the support substrate 10. The thickness of the support substrate 10 can usually be about 500 to 1000 μm.

The temporary bonding material 11 is for fixing the semiconductor wafer 1 to the support substrate 10, and is, for example, an adhesive layer made of an adhesive material. As described above, since the temporary sticking material 11 is peeled off after mounting, it is preferable to have a relatively soft composition. As the temporary sticking material 11, for example, an acrylic photocurable adhesive (as an example, UV-Curable Adhesive LC-3200 (manufactured by 3M)) can be used.

The semiconductor chips 2 to 4 have, for example, through silicon vias, soldered electrodes 2a to 4a formed on one surface, and electrodes 2b to 4b formed on the other surface. The through silicon via is an electrode that vertically penetrates the inside of the semiconductor chip and connects the upper and lower chips to each other. The soldered electrodes 2a to 4a, electrodes 2b to 4b, and solders 2c to 4c can be configured in the same manner as the soldered electrodes 1a, electrodes 1b, and solder 1c described above.

The semiconductor chip 5 has a soldered electrode 5a formed on one surface. The soldered electrode 5a is, for example, a Cu pillar top plated with solder, similarly to the semiconductor chips 2 to 4.

Underfill films 6 to 9, which are thermosetting adhesives, are previously bonded to one surface of the semiconductor chips 2 to 5 on which the solder electrodes 2a to 5a are formed. As a result, the number of steps for laminating and arranging the semiconductor chips 2 to 5 can be reduced.

The semiconductor chips 2 to 5 are laminated and arranged under predetermined temperature, pressure, and time conditions such that the underfill films 6 to 9 have fluidity but the main curing does not occur.

Next, as shown in FIG. 2, a group of semiconductor chips in which a plurality of underfill films 6 to 9 and semiconductor chips 2 to 5 are laminated and arranged is pressed by a thermocompression bonding tool having a temperature of, for example, 100 ° C to 400 ° C. The underfill films 6-9 are cured. For example, under bonding conditions in which the temperature is raised from the first temperature to the second temperature at a predetermined temperature rise rate, the solder of the soldered electrode is melted to form a metal bond, and the curing rate of the underfill films 6 to 9 is increased. It is cured to about 90% and cured under a temperature condition of 120 ° C. to 200 ° C. to completely cure the underfill films 6 to 9.

The first temperature is preferably substantially the same as the temperature at which the underfill films 6 to 9 have the lowest melt viscosity. Thereby, the curing behavior of the underfill films 6 to 9 can be matched with the bonding conditions, and the generation of voids can be effectively suppressed. The rate of temperature rise can be, for example, 50 ° C./sec or more and 150 ° C./sec or less. The second temperature is preferably 200 ° C. or higher and 280 ° C. or lower, and more preferably 220 ° C. or higher and 270 ° C. or lower, although it depends on the type of solder. As a result, the soldered electrodes 2a to 5a and the electrodes 1b to 5b are bonded by solder, the underfill films 6 to 9 are completely cured, and the semiconductor wafer 1 and the semiconductor chips 2 to 5 are electrically and mechanically cured. Can be connected to.

As described above, in the method for manufacturing a semiconductor device according to the present embodiment, since the underfill film made of the above-mentioned underfill material is used, after mounting the semiconductor chip on the semiconductor wafer, for example, the underfill film is used. It is possible to suppress the warp of the semiconductor wafer after curing so that the curing rate is about 90% and after the underfill film is completely cured. Moreover, high connection reliability can be obtained.

In the specific example described above, a plurality of semiconductor chips 2 to 5 are laminated and arranged on the semiconductor wafer 1 via the underfill films 6 to 9, and the semiconductor chips 2 to 5 are collectively pressure-bonded, but the present invention is not limited to this. For example, semiconductor chips may be crimp-mounted one step at a time. Further, in the above-described specific example, the underfill films 6 to 9 are attached in advance to the semiconductor chips 2 to 5 on which the soldered electrodes 2a to 5a are formed, but the present invention is not limited to this. For example, it may be bonded in advance to the electrode 1b side of the semiconductor wafer substrate 1 and the electrodes 2b to 4b of the semiconductor chips 2 to 4. Further, in the specific example described above, the method of laminating and mounting the semiconductor chip on the semiconductor wafer in four stages has been described, but the present invention is not limited to this, and the semiconductor chip may be laminated and mounted in five or more stages on the semiconductor wafer.

Hereinafter, examples of the present technology will be described. The present technology is not limited to the following examples.

[Underfill film]
An underfill film was prepared using the following materials.
[Membrane component]
Acrylic rubber: SG-280 (manufactured by Nagasemtex), Tg; -29 ° C, Mw; 90 x 10 ⁴
Acrylic rubber: SG-P3 (manufactured by Nagasemtex), Tg; 12 ° C, Mw; 85 × 10 ⁴
Phenoxy resin: YP-50 (manufactured by Nittetsu Chemical & Materials Co., Ltd.), Tg; 84 ° C.
[Epoxy resin]
AER-9000: PO-modified polyether type epoxy resin (manufactured by Asahi Kasei Corporation), liquid at 25 ° C, viscosity at 25 ° C; 1 Pa · s, epoxy equivalent; 380 g / eq
JER-1031S: Polyfunctional epoxy resin (manufactured by Mitsubishi Chemical Corporation), solid at 25 ° C, epoxy equivalent; 200 g / eq
[Curing agent]
Novolac type phenol: TD-2131 (manufactured by DIC Corporation), softening point; 78 to 82 ° C.
[Curing accelerator]
Imidazole: 2PHZ-PW (manufactured by Shikoku Chemicals Corporation), melting point: 230 ° C.
Imidazole: C11Z-CN (manufactured by Shikoku Chemicals Corporation), melting point; 47-52 ° C
[Inorganic filler]
Fumed silica: R202 (manufactured by Aerosil)
Silica: SC1050 (manufactured by Admatex), solvent-dispersed product

<Making underfill film>
Each component was weighed so as to have the compounding ratio (parts by mass) shown in Table 1, and mixed and dispersed with a ball mill at room temperature to obtain a uniformly dissolved and mixed resin composition. The obtained resin composition was applied with a comma coater (registered trademark) whose gap was adjusted so that the sheet thickness was 20 μm, and dried so that the solvent residue was 2 wt% or less to prepare an underfill film.

<Making a 3D mount>
Using an underfill film, a heat-bonding tool is used to heat-bond a group of semiconductor chips including a bottom-layer semiconductor chip, an intermediate layer (2, 6, or 14) semiconductor chips and a top-layer semiconductor chip laminated on a wafer. And connected with a through silicon via (TSV) to prepare a three-dimensional mount (semiconductor chip group has 4 stages, 8 stages or 16 stages). The following semiconductor wafers, bottom layer semiconductor chips, intermediate layer semiconductor chips, and top layer semiconductor chips were used.
[Semiconductor wafer]
Size: 12 inches, thickness: 200 μm
Upper bump specifications: Cu pillar (7 μm), Ni / Au plating, φ20 μm, number of bumps 20000pin
Lower bump specifications: Cu pillar (7 μm) + Sn / Ag solder (5 μm), φ20 μm, number of bumps 20000pin
[Lowest layer semiconductor chip]
Size: 8 x 8 mm □, thickness: 200 μm
Bump specifications: Cu pillar (7 μm) + Sn / Ag solder (5 μm), φ20 μm, number of bumps 20000pin
Underfill thickness: 20 μm
[Semiconductor chip in the middle layer]
Size: 6 x 6 mm □, thickness: 200 μm
Upper bump specifications: Cu pillar (7 μm), φ20 μm, number of bumps 20000pin
Lower bump specifications: Cu pillar (7 μm) + Sn / Ag solder (5 μm), φ20 μm, number of bumps 20000pin
Underfill thickness: 20 μm
[Top layer semiconductor chip]
Size: 6 x 6 mm □, thickness: 200 μm
Bump specifications: Cu pillar (7 μm) + Sn / Ag solder (5 μm), φ20 μm, number of bumps 20000pin
Underfill thickness: 20 μm

An adhesive as a temporary adhesive is applied to one surface of the mirror wafer as a support substrate to form an adhesive layer (thickness: about 100 μm), and a lower bump (soldered electrode) of the semiconductor wafer is formed on this adhesive layer. The surfaces were glued together.

An underfill film was bonded to the wafer-side surfaces of the top layer semiconductor chip, the intermediate layer semiconductor chip, and the bottom layer semiconductor chip. Next, using a flip chip bonder, a semiconductor chip in the lowest layer on which an underfill film is bonded is placed on a wafer held on a stage at 80 ° C., and a semiconductor in an intermediate layer on which the underfill film is bonded. The chip (2 steps, 6 steps or 14 steps) and the uppermost semiconductor chip to which the underfill film was bonded were sequentially laminated and arranged in one step.

Then, using a mounting device (FCB3, Panasonic Corporation), the mixture was pressed at 250 ° C. for 10 seconds with the mounting load shown in Table 1. Further, it was cured under the condition of 170 ° C. for 2 hours to prepare a three-dimensional mounting body.

<Solder connectivity>
The state of solder connection (daisy chain connection) between semiconductor chips was confirmed with a probe tester. The mounting load (N / 20000 pin) when the connection of the conduction path of the semiconductor chip was confirmed was measured. The results are shown in Table 1.

<Solder flow in the WSS adhesive layer>
When mounting the semiconductor chip, the presence or absence of the backside bumps (soldered electrodes) of the semiconductor wafer protected by the mirror wafer was checked from the semiconductor wafer side using an infrared microscope (device name: MX63, manufactured by Olympus Corporation). Observation was performed and an infrared micrograph was obtained. In the obtained infrared microscope plan photograph, for example, as shown in FIG. 3, when the solder flow A of the back bump of the semiconductor wafer is present, it is determined that there is a solder flow (x). Further, for example, as shown in FIG. 4, the case where the solder flow of the bump on the back surface of the semiconductor wafer did not exist was determined to be no solder flow (◯). The results are shown in Table 1.

<Wafer warp>
When producing the three-dimensional mounting body, the amount of warpage of the semiconductor wafer in the state after being pressed at 250 ° C. for 10 seconds and before being cured under the condition of 170 ° C. for 2 hours was evaluated according to the following criteria. The amount of warpage of the semiconductor wafer is preferably less than 2 mm. The results are shown in Table 1. In addition, "4 steps", "8 steps", and "16 steps" in Table 1 represent the number of semiconductor chips laminated on a semiconductor wafer.
◎: Less than 1 mm 〇: 1 mm or more and less than 2 mm ×: 2 mm or more

<Hygroscopic reflow>
The three-dimensional mount was absorbed under the conditions of a temperature of 85 ° C., a humidity of 85%, and 168 hours, and heated in a reflow furnace at a maximum of 260 ° C. After that, a reliability test was further conducted under the conditions of a temperature of 130 ° C., a humidity of 85%, a vapor pressure of 0.23 MPa, and 300 hours. Then, the delamination (peeling) between the chips of the three-dimensional mounting body after the reliability test was observed with an ultrasonic imaging device (SAT: Scanning Acoustic Tomograph) (device name: FS300, manufactured by Hitachi High-Technologies Corporation). For example, as shown in FIG. 5, when white spots are present in the ultrasonic image obtained by observation, it is determined that there is delamination between the semiconductor chips (x). Further, for example, as shown in FIG. 6, when there were no white spots in the ultrasonic image obtained by observation, it was determined that there was no delamination between the semiconductor chips (◯). The results are shown in Table 1.

<Physical characteristics of underfill film>
[Storage modulus]
The storage elastic modulus of the underfill film was determined for the cured underfill film in the state before being pressed at 250 ° C. for 10 seconds and then cured at 170 ° C. for 2 hours when the three-dimensional mount was prepared. The measurement was performed under the conditions of 10 ° C./min and 1 Hz using a dynamic viscoelastic measurement (DMA: Dynamic Mechanical. Analysis) (device name: RSA3 manufactured by TA). The results are shown in Table 1.

[Integral value of storage elastic modulus]
The integral value (Int (G')) of the storage elastic modulus of the underfill film at 25 ° C. to 250 ° C. is the condition of 170 ° C.-2 hours after pressing at 250 ° C. for 10 seconds when preparing the three-dimensional mount. The cured underfill film in the state before being cured with was measured at 10 ° C./min and 1 Hz using a dynamic viscoelasticity measurement (device name: RSA3 manufactured by TA). The results are shown in Table 1. For example, the measurement result of the integrated value of Example 1 is 1.5 × 10E + 11 (1.5 × 10 ¹¹ ). Similarly, in the other Examples and Comparative Examples, the numerical values in Table 1 are “10E + 11”. The value multiplied by "is the measurement result.

[Melting viscosity]
The melt viscosity (Pa · s) of the underfill film at 100 ° C. and the temperature (° C.) at the minimum melt viscosity were set to 10 ° C./min and 1 Hz for each underfill film using a rheometer (ARES manufactured by TA). Measured under conditions. The results are shown in Table 1.

From the results of the examples, it contains an epoxy resin, a curing agent, an acrylic polymer, and an inorganic filler, and has a storage elastic modulus of 2.4 to 3.6 GPa at 25 ° C. after curing, and 170 ° C. after curing. The storage elastic modulus at 100 ° C. is 70 to 800 MPa, the integrated value of the storage elastic modulus at 25 to 250 ° C. after curing is 1.5 × 10 ^{11 to 3.2 × 10 11} , and the melt viscosity at 100 ° C. is 10000 Pa ·. It was found that by using an underfill material (underfill film) of s or less, the warp of the semiconductor wafer can be suppressed and high connection reliability can be obtained.

On the other hand, in Comparative Example 1, the storage elastic modulus at 25 ° C. after curing of the underfill film exceeded 3.6 GPa, and the melt viscosity of the underfill film at 100 ° C. exceeded 10000 Pa · s. The warp of the wafer when laminated was deteriorated.

In Comparative Example 2, since the storage elastic modulus at 170 ° C. after curing of the underfill film exceeded 800 MPa, the warp of the semiconductor wafer when the semiconductor chips were laminated in 8 or 16 stages was deteriorated.

In Comparative Example 3, the melt viscosity at 100 ° C. after curing of the underfill film exceeds 10000 Pa · s, and the integrated value of the storage elastic modulus at 25 to 250 ° C. after curing of the underfill film is 3.2 × 10 ¹¹ Therefore, the warpage of the wafer when the semiconductor chips were laminated in 4, 8 or 16 stages was deteriorated. Further, in Comparative Example 3, since the melt viscosity of the underfill film at 100 ° C. after curing increased too much, the mounting load increased and solder flow on the bump surface of the semiconductor wafer protected by the mirror wafer occurred.

In Comparative Example 4, the storage elastic modulus at 25 ° C. after curing of the underfill film was less than 2.4 GPa, the storage elastic modulus at 170 ° C. after curing of the underfill film was less than 70 MPa, and the curing of the underfill film was performed. since the integrated value of storage modulus 25 to 250 ° C. after was less than 1.5 × 10 ^11, the cured product of the underfill film is lower elasticized a wide temperature range, connection reliability is deteriorated.

1 Substrate (semiconductor wafer), 2,3,4,5 Semiconductor chip, 1a, 2a, 3a, 4a, 5a Soldered electrode, 1b, 2b, 3b, 4b electrode, 1c, 2c, 3c, 4c, 5c solder, 6,7,8,9 Underfill film, 10 Support substrate, 11 Temporary pasting material

Claims (10)

Epoxy resin and
Hardener and
Acrylic polymer and
Contains inorganic filler,
The storage elastic modulus at 25 ° C. after curing is 2.4 to 3.6 GPa.
The storage elastic modulus at 170 ° C. after curing is 70 to 800 MPa.
The integral value of the storage elastic modulus at 25 to 250 ° C. after curing is 1.5 × 10 ^{11 to} 3.2 × 10 ¹¹ .
An underfill material having a melt viscosity at 100 ° C. of 10000 Pa · s or less. The epoxy resin contains an epoxy resin that is liquid at room temperature.
The underfill material according to claim 1, wherein the acrylic polymer contains an acrylic polymer having a Tg of room temperature or lower. The underfill material according to claim 2, wherein the Tg of the acrylic polymer is 12 ° C. or lower. The underfill material according to any one of claims 1 to 3, wherein the temperature at the time of the minimum melt viscosity is 140 ° C. or higher. The underfill material according to any one of claims 1 to 4, wherein the content of the inorganic filler is 29 to 41% by mass. The underfill material according to any one of claims 1 to 5, wherein the melt viscosity at 100 ° C. is 7,000 to 9000 Pa · s. The underfill material according to any one of claims 2 to 6, wherein the total content of the epoxy resin liquid at room temperature is 55% by mass or more with respect to the total content of the epoxy resin in the underfill material. .. The underfill material according to any one of claims 2 to 7, wherein the epoxy equivalent of the epoxy resin liquid at room temperature is 300 to 500 g / eq. The underfill material according to any one of claims 1 to 8, wherein the inorganic filler is silica. A step of preliminarily attaching the underfill material to the semiconductor chip side on which the soldered electrode is formed or the substrate side on which the counter electrode facing the soldered electrode is formed.
It includes a step of solder-bonding the electrode on the semiconductor chip side and the counter electrode on the substrate side.
The substrate is a semiconductor wafer fixed on a support substrate via a temporary sticking material.
The underfill material contains an epoxy resin, a curing agent, an acrylic polymer, and an inorganic filler, and has a storage elastic modulus of 2.4 to 3.6 GPa at 25 ° C. after curing of the underfill material. The storage elastic modulus at 170 ° C. after curing of the underfill material is 70 to 800 MPa, and the integrated value of the storage elastic modulus at 25 to 250 ° C. after curing of the underfill material is 1.5 × 10 ^{11 to} 3. A method for manufacturing a semiconductor device, which is 2 × 10 ¹¹ and has a melt viscosity of the underfill material at 100 ° C. of 10000 Pa · s or less.

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