JP2021086841A - Thin film transistor and manufacturing method thereof - Google Patents

Abstract

To provide a high-performance thin film transistor and a manufacturing method thereof that has a combination of an active layer formed of an oxide semiconductor and an organic gate insulating layer, has good contact between the active layer and the source and drain electrodes, and do not cause a problem with productivity and transistor characteristics.SOLUTION: In a thin film transistor in which an active layer, a source electrode, a drain electrode, a gate insulating layer, and a gate electrode are formed in this order on a substrate, the active layer is made of an oxide semiconductor, and the gate insulating layer is an organic insulating film, and the source electrode and the drain electrode are formed on the active layer such that a part of the source electrode and the drain electrode partially overlap both ends of the active layer in a plan view, and the conductivity of the active layer is 1.0×10-6S/cm or more, 1.0×10-3S/cm or less, and there is also provided a manufacturing method thereof.SELECTED DRAWING: Figure 1

Description

The present invention relates to a thin film transistor having a source electrode, a drain electrode, a gate electrode, an active layer made of a semiconductor material, and a gate insulating layer, and a method for producing the same.

Oxide semiconductors are indispensable materials for the realization of electronic and optical devices with new characteristics. In particular, oxide semiconductor materials such as ZnO and InGaZnO are a-Si (amorphous silicon) when used as the active layer of thin film transistors. It has been clarified that the performance surpasses that of the above, and its use as a driving back plate for liquid crystal panels, organic EL panels, etc. has been attempted. Further, it is known that the above-mentioned material can obtain good semiconductor characteristics at the time of film formation or after film formation without heating or at low temperature heating by appropriately controlling the film formation conditions, and is a resin having poor heat resistance. There are also great expectations for the realization of flexible devices based on films and the like.

As such a thin film transistor, for example, as shown in FIG. 4, a gate insulating layer 3, a source electrode 5, a drain electrode 6, and an active layer 4 are sequentially laminated on a substrate 1 on which a gate electrode 2 is formed to form a source. A structure in which an active layer 4 is interposed between an electrode 5 and a drain electrode 6 is known.

In the conventional thin film transistor using an oxide semiconductor, the gate insulating layer 3 is _{an inorganic insulator such as Al 2} O ₃ , SiO ₂ , Y ₂ O ₃ , Ta ₂ O ₅ , Hf ₂ O ₅ , SiN or the like. Membranes are mainly used. This is not only because good insulating properties are easily obtained, but also these insulating films are less susceptible to plasma damage during film formation of the oxide semiconductor to be the active layer 4, and the active layer 4 has good semiconductor characteristics. This is because it can be maintained.

As _{a method for forming an insulator thin film of a metal oxide such as Al 2} O ₃ , SiO ₂ , Y ₂ O ₃ , Ta ₂ O ₅ , Hf ₂ O ₅ , SiN, etc., industrially, a CVD method or sputtering (sputtering method) is used. Hereinafter, the method (abbreviated as sputtering) is often used, and particularly when a film base material such as polyethylene terephthalate (PET) is used as the substrate 1, sputtering deposition is performed without heating.

However, when the gate insulating layer 3 is formed by the sputtering method, the throughput is poor because the film forming speed is very slow. Therefore, especially when a thick gate insulating layer 3 is required, the time becomes very long and the productivity deteriorates.

Further, when the gate insulating layer 3 is formed by the inorganic insulating film under the condition that the substrate is not heated or the post-annealing is not performed, it is difficult to obtain sufficient withstand voltage characteristics and low leakage current. It also lacks flexibility.

On the other hand, an organic material such as polyvinylphenol (PVP) or polyimide is often used as the gate insulating layer 3 of the thin film transistor. The organic insulating film material can be formed by a coating process such as spin coating or an inkjet method, and it is easy to form a thick film on the order of microns. In addition, the firing temperature is relatively low at 200 ° C. or lower, and it can be formed on a flexible plastic substrate.

However, although these organic insulating films are very suitable when an organic semiconductor is used for the active layer 4, it is difficult to maintain good semiconductor characteristics in combination with an oxide semiconductor. This is because when the bottom gate structure as shown in FIG. 4 is applied, the active layer 4 of the oxide semiconductor is formed on the gate insulating layer 3 made of the organic insulating film, so that the organic insulating film is made of the oxide semiconductor. It is considered that the cause is that it receives plasma damage during formation.

Therefore, when an oxide semiconductor exhibiting high field effect mobility is used as the active layer 4, an inorganic insulating film is required as the gate insulating layer 3, but the formation of the inorganic insulating film takes time and is inorganic. Since the insulating film has poor flexibility, it is difficult to use an inorganic insulating film in a device that requires flexibility.

Therefore, when an organic insulating film exhibiting high flexibility is used for the gate insulating layer 3, an oxide semiconductor cannot be applied to the active layer 4, and an organic semiconductor having low field effect mobility is used as the active layer 4. It was inevitable to use it.

As described above, in the conventional structure of FIG. 4, it is easily formed by coating with the active layer 4 formed of an excellent oxide semiconductor which can be formed by the non-heated sputtering film forming method and exhibits high field effect mobility. It has been difficult to realize a thin film transistor in combination with the organic gate insulating layer 3 which can have a high withstand voltage.

Further, when a thin film transistor having a structure in which the active layer 4 is interposed between the source electrode 5 and the drain electrode 6 as shown in FIG. 4 is actually manufactured, the contact between the active layer 4 and the source electrode 5 and the drain electrode 6 is poor. There is also a problem that the Vd-Id characteristic (current characteristic with respect to the voltage between the source and drain) deteriorates.

As the prior art related to the present invention, Non-Patent Document 1 can be exemplified.

K. Nomura et. al Nature 432,488 (2004)

The present invention has been made in view of the above problems, and combines an active layer (semiconductor layer) formed of an oxide semiconductor and an organic gate insulating layer that can be easily formed by coating and exhibits high flexibility. An object of the present invention is to provide a high-performance thin film transistor and a method for manufacturing the same, which improves the contact between the active layer and the source electrode and the drain electrode and does not cause problems of productivity and transistor characteristics.

As a means for solving the above problems, the present invention provides the following thin film transistor (1).
(1) A thin film transistor including a source electrode, a drain electrode, a gate electrode, an active layer, and a gate insulating layer.
The active layer, the source electrode, the drain electrode, the gate insulating layer, and the gate electrode are formed on the substrate in this order.
The active layer is made of an oxide semiconductor, and the gate insulating layer is made of an organic insulating film.
The source electrode and the drain electrode are each formed on the active layer so as to partially overlap both ends of the active layer in a plan view.
A thin film transistor characterized in that the conductivity of the active layer is 1.0 × 10 ^-6 S / cm or more and 1.0 × 10 ^{-3 S / cm or less.}

As a result of further studies, the following thin film transistors (2) to (5) are provided as preferred embodiments of the thin film transistor of the present invention.
(2) A thin film transistor in which the active layer is formed of InGaZnO.
(3) A thin film transistor in which the source electrode and the drain electrode are formed of MoNb.
(4) A thin film transistor characterized in that the gate insulating layer is an organic insulating film made of one or more materials selected from the group consisting of polyimide, acrylic resin and fluororesin.
(5) A thin film transistor in which the gate electrode is formed of MoNb.

Further, the present invention provides the following manufacturing methods (6) to (8) as a method for manufacturing the thin film transistor of the present invention.
(6) A method for manufacturing a thin film transistor, wherein the source electrode and the drain electrode are formed by using a sputtering method.
(7) A method for producing a thin film transistor, wherein the active layer is formed by using a sputtering method.
(8) A method for manufacturing a thin film transistor, wherein the gate electrode is formed by using a sputtering method.

According to the present invention, a high-performance thin film transistor is produced by combining an active layer formed of an oxide semiconductor and an organic gate insulating layer to improve contact between the active layer of the oxide semiconductor and the source electrode and the drain electrode. It can be obtained without causing problems of properties and transistor characteristics.

It is the schematic sectional drawing which shows the embodiment of the thin film transistor of this invention. It is a graph which shows the Vds-Ids characteristic of the thin film transistor of this invention. It is a graph which shows the Vgs-Ids characteristic of the thin film transistor of this invention. It is schematic cross-sectional view which shows one form of the conventional thin film transistor. It is a graph which shows the Vds-Ids characteristic of the conventional thin film transistor. It is a graph which shows the Vgs-Ids characteristic of the conventional thin film transistor.

Hereinafter, the present invention will be described in more detail. In the thin film transistor of the present invention, as described above, the active layer is formed of an oxide semiconductor and the gate insulating layer is formed of an organic insulating film. For example, the thin film transistor 100 having the configuration shown in FIG. 1 can be exemplified.

In the thin film transistor 100 of FIG. 1, an active layer 4 made of an oxide semiconductor is formed on a substrate 1, a source electrode 5 and a drain electrode 6 are formed on the active layer 4, and the active layer 4, the source electrode 5, and a drain are further formed. The structure is such that a gate insulating layer 3 made of an organic insulating film is formed on the electrode 6, and the gate electrode 2 is further formed on the gate insulating layer 3.

In the above, the source electrode 5 and the drain electrode 6 are formed on the active layer 4 so as to partially overlap both ends of the active layer 4 in a plan view. Therefore, the active layer 4 is placed between the two electrodes 5 and 6. It is an intervening form.

Further, in the thin film transistor of the present invention, the conductivity of the active layer 4 after forming the source electrode 5 and the drain electrode 6 is 1.0 × 10 ^-6 S / cm or more and 1.0 × 10 ^-3 S / cm or less. It is characterized by being. By adjusting the value of conductivity in this way, good transistor characteristics can be obtained. On the other hand, if it is out of the range of this value, the desired transistor characteristics cannot be obtained, which is not preferable.

Adjusting the conductivity of the active layer 4 after laminating the source electrode 5 and the drain electrode 6 so as to be 1.0 × 10 ^-6 S / cm or more and 1.0 × 10 ^-3 S / cm or less is active. This is possible by using a sputtering method when laminating the source electrode 5 and the drain electrode 6 on the layer 4. That is, by using the sputtering method, the active layer 4 in the vicinity immediately below the source electrode 5 and the drain electrode 6 is particularly damaged, oxygen, which is a light element, jumps out from the surface of the active layer 4, and oxygen is deficient and reduced. The state is changed to the n + region (high-concentration electron carrier region) 7. Therefore, the conductivity of the active layer 4 can be adjusted by changing the sputtering conditions (gas pressure, electric power, etc.).

As described above, in the thin film transistor of the present invention, the gate insulating layer 3 made of an organic insulating film is formed on the active layer 4 made of an oxide semiconductor to form an organic insulation with the active layer 4 made of an oxide semiconductor. The deterioration of performance due to the combination with the film 3 is suppressed as compared with the conventional structure of FIG.

Further, as described above, among the active layer 4 made of the oxide semiconductor, by forming the n + conversion region 7 in the region immediately below the source electrode 5 and the drain electrode 6, the activity is not lowered and the productivity is not lowered. The layer 4 has good contact with the source electrode 5 and the drain electrode 6, the Vd-Id characteristics are good, and a high-performance thin film transistor can be manufactured.

InGaZnO is preferable as the oxide semiconductor used as the material of the active layer 4. The active layer 4 can be formed into a film by a physical vapor deposition method, but it is preferable to employ a sputtering method such as a DC sputtering method or an RF sputtering method in order to obtain good transistor characteristics. As the sputtering target, an In-Ga-Zn-O (1: 1: 1: 4 at%) sintered body target is preferable.

The resistivity of the active layer 4 is preferably 1.0 × 10 ^{-1 to} 1.0 × 10 ⁴ Ω · cm, particularly ^{1.0 to 1.0 × 10 3} Ω · cm, and the resistance value. By adjusting the above, the mobility of the electrolytic effect and the on / off ratio indicating the switching function of the thin film transistor become sufficiently high values. The thickness of the active layer 4 made of an oxide semiconductor is not particularly limited, but is preferably 5 to 100 nm, particularly preferably 10 to 50 nm.

The material of the source electrode 5 and the drain electrode 6 is not particularly limited and can be formed of a known material, for example, a transparent conductive film such as indium tin oxide (ITO) or Al-doped ZnO (AZO). A metal film such as Al or Au can be used, but a MoNb film is particularly preferable, and it is preferable to form a film by a sputtering method using a Mo: Nb = 90: 10 (at%) target.

The resistivity of the source electrode 5 and the drain electrode 6 is not particularly limited, but is about 5.0 × ^{10-5 to} 1.0 × 10 ⁻² Ω · cm, and the thickness is about 50 nm to 300 nm. It is preferable to do so.

Examples of the organic insulating film forming the gate insulating layer 3 include fluororesins such as polyvinylphenol (PVP), polyimide, acrylic resin, epoxy resin, and amorphous fluororesin, melamine resin, furan resin, xylene resin, polyamideimide resin, and silicone resin. Etc. can be exemplified, and one or more of these can be used. Among these, polyimide, acrylic resin, and fluorine-based resin are particularly preferably used.

The thickness of the gate insulating layer 3 is not particularly limited, but is preferably 500 nm to 10 μm, and if it is less than 500 nm, the gate leak current may not be sufficiently controlled, and the gate leakage current may not be sufficiently controlled. If it exceeds, the gate voltage applied to the gate electrode 2 may have to be made higher than necessary. The resistivity of the gate insulating layer 3 is not particularly limited, ^{but is preferably 1 × 10 11} Ω · cm or more, particularly preferably 1 × 10 ¹³ Ω · cm or more.

The organic insulating film forming the gate insulating layer 3 can be formed by applying the above-mentioned material dissolved in a solvent to the surface of the substrate, drying it, and heat-treating it if necessary. In this case, spin coating, screen printing, or the like can be used as a coating method capable of easily forming the gate insulating layer 3. The heat treatment temperature in the case of heat treatment after drying can be 100 to 200 ° C. and the heating time can be about 15 minutes to 3 hours as in the conventional case.

The gate electrode 2 is not particularly limited and can be formed of a known gate electrode material. For example, a transparent conductive film such as indium tin oxide (ITO) or Al-doped ZnO (AZO), Al, Au, etc. Metal film can be used, but MoNb film is particularly preferable.

The gate electrode 2 can be formed into a film by a physical vapor deposition method, but it is preferable to employ a sputtering method such as a DC sputtering method or an RF sputtering method. By using the sputtering method, good transistor characteristics can be obtained. It is preferable to form a film by a sputtering method using a Mo: Nb = 90: 10 (at%) target.

The resistivity of the gate electrode 2 is not particularly limited, and about ^{5.0 × 10 -5 ~1.0 × 10 -2} Ω · c m, it is preferable that the thickness is about 50nm~300nm ..

As the substrate 1, for example, glass such as alkaline silicate glass, non-alkali glass, and quartz glass can be used, and in the case of a flexible device, acrylic, polyethylene terephthalate (PET), polyimide resin, polyethylene naphthalate, etc. can be used. A plate-shaped substrate or a film-shaped substrate made of various synthetic resins such as (PEN) can be used. The thickness of the substrate is not particularly limited, but is preferably 0.01 to 1 mm, particularly 0.02 to 0.1 mm as in the conventional case.

Hereinafter, the present invention will be described in more detail with reference to Examples and Comparative Examples, but the present invention is not limited to the following examples.

The thin film transistor of the embodiment of the present invention shown in FIG. 1 was produced as follows.

A glass plate (Eagle XG non-alkali glass substrate manufactured by Corning Inc.) is used as a substrate 1, and an oxide semiconductor InGaZnO is used as an active layer 4 on the substrate 1 by a non-heating sputtering method using a shadow mask (also called a stencil mask or a metal mask). A film was formed. As for the sputtering conditions, a 75 mmφ In-Ga-Zn-O (1: 1: 1: 4 at%) sintered body target was used, and _{the gas flow rate of Ar / O 2} = 50 / 0.2 sccm was 1.0 Pa. Under pressure, a 300 W RF power source was applied to the target to perform sputter film formation. A film was formed for about 10 minutes to form an InGaZnO film having a thickness of about 35 nm.

Next, on the substrate 1 on which the active layer 4 is formed, as the source electrode 5 and the drain electrode 6, MoNb is subjected to a non-heating sputtering method, and the source electrode 5 and the drain electrode 6 are respectively flat on the active layer 4 using a shadow mask. A film was formed so that a part of the active layer 4 was visually overlapped with both ends of the active layer 4. After that, the conductivity was measured using "Semiconductor Parameter Analyzer B1500A" manufactured by Agilent. The conductivity of the active layer shall be 1.7 × ^10-5 S / cm, ^{within the range of 1.0 × 10-6} S / cm or more and 1.0 × 10 ^-3 S / cm or less. It was confirmed. As for the sputtering conditions, a 75 mmφ Mo: Nb = 90:10 (at%) sintered target was used, and a 200 W DC power supply was applied to the target at a gas flow rate of Ar = 45 sccm under a pressure of 1.0 Pa. Spatter film formation was performed. A film was formed for about 12 minutes to form a MoNb film having a thickness of about 100 nm.

Further, as the gate insulating layer 3, acrylic resin (“ATN ^TM 1011” manufactured by Rohm and Haas Electronic Materials Co., Ltd., Dow Chemical Group) was uniformly applied by spin coating (730 rpm / 30 seconds) at 90 ° C. for 2 min. After prebaking, a desired pattern was formed by exposure and development, and a gate insulating layer 3 having a thickness of 1.00 μm was formed by main firing at 200 ° C. for 1 hr.

Finally, MoNb was formed as the gate electrode 2 on the gate insulating layer 3 by a non-heating sputtering method using a shadow mask. As for the sputtering conditions, a 75 mmφ Mo: Nb = 90:10 (at%) sintered target was used, and a 200 W DC power supply was applied to the target at a gas flow rate of Ar = 45 sccm under a pressure of 1.0 Pa. Spatter film formation was performed. A film was formed for about 12 minutes to form a MoNb film having a thickness of about 100 nm. Further, annealing was performed at 150 ° C. to prepare a thin film transistor 100 having the structure shown in FIG.

The channel length L, which is the length in the X direction, of the channel portion C (see FIG. 1) of the manufactured thin film transistor 100 is 200 μm, and the channel width, which is the length in the Y direction, is 2000 μm.

<Comparison example>
The thin film transistor of the conventional form shown in FIG. 4 was produced as follows.

A glass plate (Eagle XG non-alkali glass substrate manufactured by Corning Inc.) was used as a substrate 1, and MoNb was formed on the substrate 1 as a gate electrode 2 by a non-heating sputtering method using a shadow mask. As for the sputtering conditions, a 75 mmφ Mo: Nb = 90:10 (at%) sintered target was used, and a 200 W DC power supply was applied to the target at a gas flow rate of Ar = 45 sccm under a pressure of 1.0 Pa. Spatter film formation was performed. A film was formed for about 12 minutes to form a MoNb film having a thickness of about 100 nm.

^{Next, acrylic resin (“ATN TM} 1011” manufactured by Rohm and Haas Electronic Materials Co., Ltd., Dow Chemical Group) was applied as the gate insulating layer 3 by spin coating (730 rpm / 30 seconds), and after temporary firing at 90 ° C. for 2 minutes. A desired pattern was formed by exposure and development, and a gate insulating layer 3 having a thickness of 1.00 μm was formed by main firing at 200 ° C. for 1 hr.

Further, MoNb was formed as a source electrode 5 and a drain electrode 6 by a non-heating sputtering method using a shadow mask. As for the sputtering conditions, a 75 mmφ Mo: Nb = 90:10 (at%) sintered target was used, and a 200 W DC power supply was applied to the target at a gas flow rate of Ar = 45 sccm under a pressure of 1.0 Pa. Spatter film formation was performed. A film was formed for about 12 minutes to form a MoNb film having a thickness of about 100 nm.

Finally, an oxide semiconductor InGaZnO was formed as the active layer 4 by a non-heating sputtering method using a shadow mask. As for the sputtering conditions, a 75 mmφ In-Ga-Zn-O (1: 1: 1: 4 at%) sintered body target was used, and _{the gas flow rate of Ar / O 2} = 50 / 0.2 sccm was 1.0 Pa. Under pressure, a 300 W RF power source was applied to the target to perform sputter film formation. A film was formed for about 10 minutes to form an InGaZnO film having a thickness of about 35 nm. Further, annealing was performed at 150 ° C. to prepare a thin film transistor 500 having the conventional structure shown in FIG.

The channel length L, which is the length in the X direction, of the channel portion C (see FIG. 4) of the manufactured thin film transistor 500 is 200 μm, and the channel width, which is the length in the Y direction, is 2000 μm.

[Evaluation of transistor characteristics]
Transistor characteristics were measured for each thin film transistor obtained in Examples and Comparative Examples. The measurement was performed using a "semiconductor parameter analyzer B1500A" manufactured by Agilent. 2 and 4 show the Vds-Ids characteristic when Vgs = 0, 1, 2, 3, 4, 5V, and FIGS. 3 and 6 show the Vgs-Ids characteristic when Vd = 15V.

In the case of the thin film transistor 100 of the example, as shown in FIG. 2, it was confirmed that the active layer 4 and the source / drain electrodes 5 and 6 had good contact with each other, showing typical Vds-Ids characteristics. Further, as shown in FIG. 3, it was confirmed that the active layer was modulated by the change in the gate voltage, showed a clear on / off change, and exhibited the switching function.

On the other hand, in the case of the thin film transistor 500 of the comparative example, a large amount of current flows due to poor contact between the active layer 4 and the source / drain electrodes 5 and 6 as shown in FIG. 5, and modulation by the gate voltage is performed as shown in FIG. It turned out that it is always on without any occurrence and does not have a switching function.

As described above, it was confirmed that the thin film transistor of the present invention has good transistor characteristics.

100 ... Example of thin film transistor of the present invention 500 ... Example of conventional thin film transistor 1 ... Substrate 2 ... Gate electrode 3 ... Gate insulating layer 4 ... Active Layer (semiconductor layer)
5 ・ ・ ・ ・ ・ Source electrode 6 ・ ・ ・ ・ ・ Drain electrode 7 ・ ・ ・ ・ ・ n + region C ・ ・ ・ ・ ・ Channel part L ・ ・ ・ ・ ・ Channel length

Claims (8)

A thin film transistor including a source electrode, a drain electrode, a gate electrode, an active layer, and a gate insulating layer.
The active layer, the source electrode, the drain electrode, the gate insulating layer, and the gate electrode are formed on the substrate in this order.
The active layer is made of an oxide semiconductor, and the gate insulating layer is made of an organic insulating film.
The source electrode and the drain electrode are each formed on the active layer so as to partially overlap both ends of the active layer in a plan view.
A thin film transistor characterized in that the conductivity of the active layer is 1.0 × 10 ^-6 S / cm or more and 1.0 × 10 ^{-3 S / cm or less.} The thin film transistor according to claim 1, wherein the active layer is made of InGaZnO. The thin film transistor according to claim 1 or 2, wherein the source electrode and the drain electrode are both made of MoNb. Any of claims 1 to 3, wherein the gate insulating layer is made of an organic insulating film made of one or more materials selected from the group consisting of polyimide, acrylic resin, and fluorine-based resin. The thin film transistor according to item 1. The thin film transistor according to any one of claims 1 to 4, wherein the gate electrode is made of MoNb. The method for manufacturing a thin film transistor according to any one of claims 1 to 5, wherein both the source electrode and the drain electrode are formed by a sputtering method. The method for manufacturing a thin film transistor according to any one of claims 1 to 6, wherein the active layer is formed by a sputtering method. The method for manufacturing a thin film transistor according to any one of claims 1 to 7, wherein the gate electrode is formed by a sputtering method.

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