JP2021082680A - Infrared ray detector - Google Patents

Abstract

To provide an infrared ray detector for two-wavelength detection that has a T2SL structure and in which a surface leakage current at a side surface of a pixel separation groove is suppressed.SOLUTION: An infrared ray detector comprises: a first electrode layer 11 that is formed using a semiconductor of a first conductivity type; a first absorption layer 20 that is formed thereon and absorbs an infrared ray at a first wavelength; a second electrode layer 32 formed thereon using a semiconductor of a second conductivity type; a second absorption layer 40 that is formed thereon and absorbs an infrared ray at a second wavelength; a third electrode layer 52 that is formed thereon using a semiconductor of the first conductivity type; a pixel separation groove 170 that separates the first absorption layer 20, the second electrode layer 32, the second absorption layer 40, and the third electrode layer 52; and an insulation film 160 formed for a side surface of the pixel separation groove 170. A taper angle of the side surface of the pixel separation groove 170 with respect to an infrared ray incident surface of the first electrode layer 11 is set so that a taper angle of a side surface of the third electrode layer 52 is more obtuse than those of a side surface of the first absorption layer 20 and a side surface of the second absorption layer 40.SELECTED DRAWING: Figure 3

Description

The present invention relates to an infrared detector.

In recent years, as an infrared detector, an infrared detector having a T2SL (Type II Super-Lattice) structure, which is a superlattice structure using GaSb, has been developed. An infrared detector with a T2SL structure can be expected to have sensitivity close to that of an infrared photodiode using HgCdTe (MCT), a larger wafer can be obtained than when MCT is used, and a GaAs system that is more advanced than MCT. Process technology is applicable. As a result, it is possible to make the scale (multi-pixel) larger than that of an infrared photodiode using MCT, and further, it is possible to manufacture an infrared detector for two-wavelength detection having sensitivity in two different wavelength bands. Therefore, it is attracting attention as an alternative material to MCT in the future.

In such an infrared detector, there is an infrared detection array in which a plurality of pixels separated by a pixel separation groove are formed.

Japanese Unexamined Patent Publication No. 2015-170645 JP-A-2007-318115

In the infrared detector for two-wavelength detection having a T2SL structure, since two light absorption layers are laminated, the thickness is thicker than that of the infrared detector for one-wavelength detection, so that a pixel separation groove is formed. The depth of the infrared rays becomes deeper, and the shape has a very high aspect ratio.

However, if the aspect ratio is high, an insulating film having a sufficient film thickness cannot be formed on the side surface of the pixel separation groove, the passivation function is not sufficient, and a surface leakage current is generated.

Therefore, in an infrared detector for two-wavelength detection having a T2SL structure, an infrared detector in which a surface leakage current on a side surface of a pixel separation groove is suppressed is required.

According to one aspect of the present embodiment, it absorbs the first electrode layer formed of the first conductive semiconductor and the infrared rays of the first wavelength formed on the first electrode layer. A first absorption layer, a second electrode layer formed of a second conductive semiconductor formed on the first absorption layer, and a second electrode layer formed on the second electrode layer. A second absorption layer that absorbs infrared rays of two wavelengths, a third electrode layer formed by a first conductive semiconductor formed on the second absorption layer, and the first absorption. The infrared ray has a layer, a pixel separation groove for separating the second electrode layer, the second absorption layer, and the third electrode layer, and an insulating film formed on a side surface of the pixel separation groove. Is incident from the side of the first electrode layer, and the taper angle of the side surface of the pixel separation groove with respect to the incident surface of the infrared rays of the first electrode layer is the side surface of the first absorption layer. And, the side surface of the third electrode layer is smaller than the side surface of the second absorption layer.

According to the disclosed infrared detector, in the infrared detector for two-wavelength detection having a T2SL structure, the surface leakage current on the side surface of the pixel separation groove can be suppressed.

Structural diagram of an infrared detector for two-wavelength detection (1) Structural diagram of infrared detector for two-wavelength detection (2) Structural drawing of the infrared detector according to the first embodiment Explanatory drawing of method of forming pixel separation groove of infrared detector in 1st Embodiment (1) Explanatory drawing (2) of the method of forming the pixel separation groove of an infrared detector in 1st Embodiment Process diagram of the method for manufacturing an infrared detector according to the first embodiment (1) Process diagram of the method for manufacturing an infrared detector according to the first embodiment (2) Process diagram of the method for manufacturing an infrared detector according to the first embodiment (3) Process diagram (4) of the method for manufacturing an infrared detector according to the first embodiment. Process diagram (5) of the method for manufacturing an infrared detector according to the first embodiment. Process diagram (6) of the method for manufacturing an infrared detector according to the first embodiment. Structural diagram of a modified example of the infrared detector according to the first embodiment Structural diagram of the semiconductor device according to the second embodiment Structural diagram of the semiconductor device according to the third embodiment

The embodiment for carrying out will be described below. The same members and the like are designated by the same reference numerals and the description thereof will be omitted. Further, for convenience of explanation, the vertical and horizontal scales in the drawings may differ from the actual ones.

[First Embodiment]
First, a two-wavelength detection infrared detector having a T2SL structure will be described with reference to FIG. This infrared detector includes an n-contact layer 11, an n-superlattice layer 12, a first superlattice absorbing layer 20, a p-superlattice layer 31, a p-contact layer 32, a p-superlattice layer 33, and a second. It has a superlattice absorbing layer 40, an n-superlattice layer 51, and an n-contact layer 52. The n-superlattice layer 12, the first superlattice absorption layer 20, the p-superlattice layer 31, the p-superlattice layer 33, the second superlattice absorption layer 40, and the n-superlattice layer 51 are MBE (Molecular). It is formed by Beam Epitaxy).

In this infrared detector, as shown by the broken line arrow, infrared rays are incident from the incident surface 11a which is the surface of the n-contact layer 11. In this way, among the infrared rays incident from the incident surface 11a of the n-contact layer 11, the infrared rays in the MW (Middle Wave) band having a wavelength of 3 μm to 5 μm are absorbed and detected by the first superlattice absorption layer 20. To. Further, the second superlattice absorbing layer 40 absorbs and detects infrared rays in the LW (Long wave) band having a wavelength of 8 μm to 10 μm. In the present application, infrared rays in the MW band having a wavelength of 3 μm to 5 μm may be described as infrared rays having a first wavelength, and infrared rays in the LW band having a wavelength of 8 μm to 10 μm may be described as infrared rays having a second wavelength.

The n-contact layer 11 is formed of InAsSb having a film thickness of 100 nm, and is doped with Si as an impurity element of the n-type.

The n-superlattice layer 12 is a superlattice layer formed by alternately laminating 50 n-InAs layers having a thickness of 4.0 nm and GaSb layers having a thickness of 4.0 nm, and is a film. The thickness is 400 nm. The n-InAs layer is doped with Si as an n-type impurity element.

The first superlattice absorbing layer 20 is a superlattice layer formed by alternately laminating 400 InAs layers having a thickness of 4.0 nm and GaSb layers having a thickness of 4.0 nm, and is a film. The thickness is 3200 nm.

The p-superlattice layer 31 is a superlattice layer formed by alternately laminating 50 layers of an InAs layer having a thickness of 4.0 nm and a p-GaSb layer having a thickness of 4.0 nm. The thickness is 400 nm. The p-GaSb layer is doped with Be as a p-type impurity element.

The p-contact layer 32 is formed of InAsSb having a film thickness of 100 nm, and Be is doped as a p-type impurity element.

The p-superlattice layer 33 is a superlattice layer formed by alternately laminating 50 layers of an InAs layer having a thickness of 5.1 nm and a p-GaSb layer having a thickness of 4.0 nm. The thickness is 455 nm. The p-GaSb layer is doped with Be as a p-type impurity element.

The second superlattice absorbing layer 40 is a superlattice layer formed by alternately laminating 400 InAs layers having a thickness of 5.1 nm and GaSb layers having a thickness of 4.0 nm, and is a film. The thickness is 3640 nm.

The n-superlattice layer 51 is a superlattice layer formed by alternately laminating 50 n-InAs layers having a thickness of 5.1 nm and GaSb layers having a thickness of 4.0 nm, and is a film. The thickness is 455 nm. The n-InAs layer is doped with Si as an n-type impurity element.

The n-contact layer 52 is formed of InAs having a film thickness of 50 nm, and is doped with Si as an n-type impurity element.

The thickness of the semiconductor layer of the n-contact layers 11 to n-contact layers 52 thus formed is about 8.8 μm. Further, n-superlattice layer 12, first superlattice absorption layer 20, p-superlattice layer 31, p-contact layer 32, p-superlattice layer 33, second superlattice absorption layer 40, n-super The pixel separation groove 70 is formed by removing the lattice layer 51 and the n-contact layer 52.

The pixel separation groove 70 is formed by dry etching by RIE (Reactive Ion Etching) or the like using chlorine-based gas, and has a side surface 70a substantially perpendicular to the incident surface 11a of the n-contact layer 11 to which infrared rays are incident. Have. The pixel separation groove 70 formed in this way has a depth D of about 8.7 μm and an opening width W1 of about 2 μm, and has a high aspect ratio.

In the infrared detector shown in FIG. 1, an insulating film 60 is formed as a passivation film on the side surface 70a and the bottom surface 70b of the pixel separation groove 70 and the n-contact layer 52. The insulating film 60 is formed of silicon oxide or silicon nitride formed by plasma CVD (chemical vapor deposition).

When the insulating film 60 is formed by plasma CVD, even if the film thickness of the insulating film 60 on the n-contact layer 52 is 300 nm to 500 nm, the side surface 70a of the pixel separation groove 70 is insulated. The film thickness of the film 60 is only 100 nm or less. This is because the aspect ratio of the pixel separation groove 70 is high, so that the film-forming particles for forming the insulating film 60 do not easily enter deep into the pixel separation groove 70. As described above, if the thickness of the insulating film 60 on the side surface 70a of the pixel separation groove 70 is thin, the function as a passivation film cannot be sufficiently fulfilled, and the surface leakage current is large on the side surface 70a of the pixel separation groove 70. Therefore, it is not preferable.

When the insulating film 60 is formed by plasma CVD, the insulating film 60 grows so that the entrance of the pixel separation groove 70 becomes narrower at the entrance portion of the opening of the pixel separation groove 70. It becomes difficult to enter, and the thickness of the insulating film 60 on the side surface 70a of the pixel separation groove 70 becomes thin. Therefore, even if the insulating film 60 is formed for a long time, it is difficult to sufficiently increase the film thickness of the insulating film 60 on the side surface 70a of the pixel separation groove 70.

Therefore, as shown in FIG. 2, in the infrared detector for two-wavelength detection having a T2SL structure, a pixel separation groove 71 having a side surface 71a having a smaller taper angle θ than the infrared detector shown in FIG. 1 is formed. To do. In the present application, the taper angle θ means an angle with respect to the surface of the n-contact layer 11 on which infrared rays are incident, that is, the incident surface 11a. Since the n-contact layer 11 and the n-superlattice layer 12 and the like are formed by MBE, the surface of the n-contact layer 11 and the interface between the n-contact layer 11 and the n-superlattice layer 12 are substantially parallel. is there. Therefore, the angle of the side surface 71a of the pixel separation groove 71 with respect to the interface between the n-contact layer 11 and the n-superlattice layer 12 can be considered as a taper angle θ.

While the taper angle of the pixel separation groove 70 in the infrared detector shown in FIG. 1 is substantially vertical, the taper angle θ of the pixel separation groove 71 in the infrared detector shown in FIG. 2 is about 70 °, which is a taper. The angle θ is small. As shown in FIG. 2, by forming the pixel separation groove 71 having a small taper angle θ, the entrance portion of the pixel separation groove 71 becomes wider, so that the inside of the pixel separation groove 71 is larger than that shown in FIG. Film-formed particles can easily enter. As a result, the film thickness of the insulating film 60 on the side surface 71a of the pixel separation groove 71 can be made thicker than that of the infrared detector shown in FIG.

However, in the case of the infrared detector shown in FIG. 2, the width W2 of the opening of the pixel separation groove 71 is 6 μm to 7 μm, and the width W2 of the first superlattice absorption layer 20 and the second superlattice absorption layer 40 is corresponding to this. The infrared receiving area becomes narrower and the sensitivity decreases. For example, assuming that the pixel pitch of each pixel is 20 μm or less, if the width W2 of the opening of the pixel separation groove 71 is 6 μm to 7 μm, the desired characteristics cannot be obtained.

Therefore, there is a demand for an infrared detector having a structure in which the surface leakage current on the side surface of the pixel separation groove is suppressed without increasing the width of the opening of the pixel separation groove so much.

(Infrared detector)
Next, the infrared detector according to the first embodiment will be described with reference to FIG. The infrared detector in the present embodiment includes an n-contact layer 11, an n-superlattice layer 12, a first superlattice absorbing layer 20, a p-superlattice layer 31, a p-contact layer 32, and a p-superlattice layer. It has 33, a second superlattice absorbing layer 40, an n-superlattice layer 51, and an n-contact layer 52.

In the infrared detector of the present embodiment, among the infrared rays incident from the incident surface 11a of the n-contact layer 11, the infrared rays in the MW band having a wavelength of 3 μm to 5 μm are absorbed by the first superlattice absorbing layer 20. , Detected. Further, the second superlattice absorbing layer 40 absorbs and detects infrared rays in the LW band having a wavelength of 8 μm to 10 μm.

Further, n-superlattice layer 12, first superlattice absorption layer 20, p-superlattice layer 31, p-contact layer 32, p-superlattice layer 33, second superlattice absorption layer 40, n-super By removing the lattice layer 51 and the n-contact layer 52, the pixel separation groove 170 is formed.

The side surface of the pixel separation groove 170 is formed by side surfaces 170a to 170h corresponding to each layer. That is, the side surfaces of the pixel separation groove 170 are the side surface 170a of the n-superlattice layer 12, the side surface 170b of the first superlattice absorption layer 20, the side surface 170c of the p-superlattice layer 31, and the side surface 170d of the p-contact layer 32. , The side surface 170e of the p-superlattice layer 33, the side surface 170f of the second superlattice absorption layer 40, the side surface 170g of the n-superlattice layer 51, and the side surface 170h of the n-contact layer 52.

Further, an insulating film 160 is formed as a passivation film on the side surfaces 170a to 170h and the bottom surface of the pixel separation groove 170 and the n-contact layer 52. The insulating film 160 is formed of silicon oxide or silicon nitride formed by plasma CVD.

In the present embodiment, the taper angle θh of the side surface 170h of the n-contact layer 52 is the taper angle θb of the side surface 170b of the first superlattice absorption layer 20 and the taper of the side surface 170f of the second superlattice absorption layer 40. It is formed at an angle smaller than the angle θf.

By reducing the taper angle θh of the side surface 170h of the n-contact layer 52 in this way, the side surface 170h has an inclination, and the pixel separation groove 170 is formed so as to gradually expand toward the entrance portion. Since the entrance portion of the pixel separation groove 170 expands, the number of film-forming particles entering the pixel separation groove 170 increases, so that the side surface 170b of the first superlattice absorption layer 20 and the side surface 170f of the second superlattice absorption layer 40 are formed. The insulating films 160b and 160f to be filmed can be thickened.

Similarly, the taper angle θd of the side surface 170d of the p-contact layer 32 is formed at an angle smaller than the taper angle θb of the side surface 170b of the first superlattice absorbing layer 20.

By reducing the taper angle θd of the side surface 170d of the p-contact layer 32 in this way, the side surface 170d has an inclination, and the pixel separation groove 170 is formed so as to gradually expand toward the entrance portion. As a result, the number of film-forming particles entering the pixel separation groove 170 behind the p-contact layer 32 increases, so that the film is formed on the side surface 170b of the first superlattice absorption layer 20 behind the p-contact layer 32. The insulating film 160b can be made thicker.

That is, the taper angle θf of the side surface 170f of the second superlattice absorption layer 40 is an angle close to vertical, but by reducing the taper angle θh of the side surface 170h of the n-contact layer 52, the second superlattice absorption The number of film-forming particles reaching the vicinity of the side surface 170f of the layer 40 increases. Thereby, the thickness of the insulating film 160f on the side surface 170f of the second superlattice absorbing layer 40 can be increased.

Further, although the taper angle θb of the side surface 170b of the first superlattice absorption layer 20 is an angle close to vertical, the taper angle θd of the side surface 170d of the p-contact layer 32 is reduced to reduce the taper angle θd of the first superlattice absorption layer 32. The number of film-forming particles reaching the vicinity of the side surface 170b of the layer 20 increases. Thereby, the thickness of the insulating film 160b on the side surface 170b of the first superlattice absorbing layer 20 can be increased. In the pixel separation groove 170, the side surface 170b of the first superlattice absorption layer 20 exists deeper than the side surface 170f of the second superlattice absorption layer 40, and enters the depth of the pixel separation groove 170. Membrane particles gradually decrease. Therefore, the insulating film 160f formed on the side surface 170f of the second superlattice absorbing layer 40 is thicker than the insulating film 160b formed on the side surface 170b of the first superlattice absorbing layer 20.

In the present embodiment, the taper angle θd of the side surface 170d of the p-contact layer 32 and the taper angle θh of the side surface 170h of the n-contact layer 52 are preferably 70 ° or more and 80 ° or less, more preferably 70 ° or more. ° or more and 75 ° or less are preferable.

Further, the taper angle θb of the side surface 170b of the first superlattice absorbing layer 20 and the taper angle θf of the side surface 170f of the second superlattice absorbing layer 40 are preferably 80 ° or more and 90 ° or less, and further. It is preferably 85 ° or more and 90 ° or less.

Further, the taper angle θa of the side surface 170a of the n-superlattice layer 12 is preferably 70 ° or more and 80 ° or less, and further preferably 70 ° or more and 75 ° or less. This is because the vicinity of the bottom surface of the pixel separation groove 170 is the farthest from the entrance of the pixel separation groove 170, and the film-forming particles are difficult to enter. Therefore, the thickness of the insulating film 160a to be formed is increased by reducing the taper angle θa of the side surface 170a of the n-superlattice layer 12 and providing an inclination.

In the infrared detector shown in FIG. 3, the taper angle θg of the side surface 170 g of the n-superlattice layer 51 is 70 ° or more and 80 ° or less, more preferably 70 ° or more and 75 ° or less. It is formed. The taper angle θc of the side surface 170c of the p-superlattice layer 31 and the taper angle θe of the side surface 170e of the p-superlattice layer 33 are 80 ° or more and 90 ° or less, more preferably 85 ° or more and 90 °. It is formed as follows.

In the infrared detector of the present embodiment, the width W3 of the entrance portion is 2 μm to 3 μm because the entire side surface of the pixel separation groove 170 is not inclined but only a part thereof is inclined. And it doesn't get too wide. That is, since the taper angle θf of the side surface 170f of the second superlattice absorbing layer 40 having a thick film thickness and the taper angle θb of the side surface 170b of the first superlattice absorbing layer 20 are close to vertical, the width of the pixel separation groove 170 Does not become very wide. Therefore, the areas of the first superlattice absorbing layer 20 and the second superlattice absorbing layer 40 are not so narrow, the decrease in sensitivity is very small, and the characteristics are hardly affected.

In the infrared detector of the present embodiment, the insulating film 160 is formed by plasma CVD so that the film thickness on the n-contact layer 52 is 300 nm to 500 nm. In the insulating film 160 formed in this way, the thickness of the insulating film 160f on the side surface 170f of the second superlattice absorbing layer 40 is 150 nm to 200 nm, and the insulation on the side surface 170b of the first superlattice absorbing layer 20. The thickness of the film 160b is 100 nm to 150 nm. Therefore, it is thicker than the infrared detector shown in FIG. By increasing the thickness of the insulating films 160b and 160f in this way, the function as a passivation film can be sufficiently fulfilled, and the surface leakage current on the side surface of the pixel separation groove 170 can be reduced.

(Manufacturing method of infrared detector)
Next, a method of manufacturing the infrared detector according to the present embodiment will be described. First, a groove formed in the semiconductor layer by dry etching such as RIE will be described. When a groove is formed in the semiconductor layer by dry etching, as shown in FIGS. 4 and 5, a mask 120 is formed on the surface of the semiconductor layer 110, and dry etching such as RIE is performed. When the substrate temperature during dry etching is a relatively low temperature such as 70 ° C., as shown in FIG. 4, the taper angle θ of the side surface 111a of the groove 111 formed in the semiconductor layer 110 becomes small, for example. , About 70 °. Further, when the substrate temperature during dry etching is a relatively high temperature such as 200 ° C., as shown in FIG. 5, the taper angle θ of the side surface 111a of the groove 111 formed in the semiconductor layer 110 becomes wide. For example, it becomes close to 90 ° which is vertical. Therefore, the taper angle of the side surface 111a of the groove 111 can be changed by changing the substrate temperature in dry etching such as RIE. The mask 120 is made of silicon oxide or the like in order to raise the temperature during dry etching.

The method for manufacturing the infrared detector in the present embodiment is based on the above technique. Next, the method of manufacturing the infrared detector according to the present embodiment will be described with reference to FIGS. 6 to 11.

First, as shown in FIG. 6, a semiconductor layer is formed on the GaSb substrate 10 by epitaxial growth by MBE. Specifically, on the GaSb substrate 10, n-contact layer 11, n-superlattice layer 12, first superlattice absorption layer 20, p-superlattice layer 31, p-contact layer 32, p-super The lattice layer 33, the second superlattice absorption layer 40, the n-superlattice layer 51, and the n-contact layer 52 are formed in this order.

Next, as shown in FIG. 7, a common contact groove 180 is formed in the semiconductor layer. The common contact groove 180 is formed along the outer peripheral portion, and each pixel is formed inside the common contact groove 180. Specifically, by applying a photoresist on the n-contact layer 52 and exposing and developing it with an exposure apparatus, a resist pattern (not shown) having an opening in a region where a common contact groove 180 is formed is formed. Form. After that, the n-superlattice layer 12, the first superlattice absorbing layer 20, the p-superlattice layer 31, the p-contact layer 32, the p-superlattice layer 33, and the second superlattice at the opening of the resist pattern. The absorption layer 40, the n-superlattice layer 51, and the n-contact layer 52 are removed. As a result, the common contact groove 180 is formed. The common contact groove 180 may be formed by wet etching.

Next, as shown in FIG. 8, the extraction electrode 181 is formed on the side surface and the bottom surface of the common contact groove 180 and the n-contact layer 52 near the outside of the common contact groove 180, and the n-contact layer 52 is formed. A surface electrode 182 is formed on the surface electrode 182. Specifically, by applying a photoresist on the n-contact layer 52 or the like and performing exposure and development with an exposure apparatus, an opening is provided in a region where the extraction electrode 181 and the surface electrode 182 are formed (not shown). Form a resist pattern. After that, a Ti / Pt (Pt is on the surface side) metal laminated film is formed by sputtering and immersed in an organic solvent to lift off the metal laminated film on the resist pattern together with the resist pattern (not shown). Remove. As a result, the extraction electrode 181 and the surface electrode 182 are formed from the remaining metal laminated film.

Next, as shown in FIG. 9, a pixel separation groove 170 is formed in the semiconductor layer. Specifically, a silicon oxide film (not shown) is formed on the extraction electrode 181 and the surface electrode 182 and the n-contact layer 52, a photoresist is applied on the silicon oxide film, and the film is exposed by an exposure apparatus. Develop. As a result, a resist pattern (not shown) having an opening is formed in the region where the pixel separation groove 170 is formed. After that, by removing the silicon oxide film at the opening of the resist pattern, a hard mask (not shown) is formed by the remaining silicon oxide film. After that, the resist pattern is removed with an organic solvent or the like, and the semiconductor layer at the opening of the hard mask is removed by dry etching such as RIE to form the pixel separation groove 170.

Specifically, first, the substrate temperature is set to about 70 ° C., and the n-contact layer 52 and the n-superlattice layer 51 are removed by dry etching such as RIE, whereby the side surface 170h of the n-contact layer 52, And 170 g of the side surface of the n-superlattice layer 51 is formed. As a result, the taper angle θh of the side surface 170h of the n-contact layer 52 and the taper angle θg of the side surface 170g of the n-superlattice layer 51 are formed to be small angles, for example, 70 °. After that, dry etching such as RIE is temporarily stopped.

Next, by setting the substrate temperature to about 200 ° C. and removing the second superlattice absorbing layer 40 and the p-superlattice layer 33 by dry etching such as RIE, the side surface 170f of the second superlattice absorbing layer 40 And, the side surface 170e of the p-superlattice layer 33 is formed. As a result, the taper angle θf of the side surface 170f of the second superlattice absorbing layer 40 and the taper angle θe of the side surface 170e of the p-superlattice layer 33 are formed to be an angle close to vertical, for example, 85 °. Will be done. After that, dry etching such as RIE is temporarily stopped.

Next, the substrate temperature is set to about 70 ° C., and the p-contact layer 32 is removed by dry etching such as RIE to form the side surface 170d of the p-contact layer 32. As a result, the taper angle θd of the side surface 170d of the p-contact layer 32 is formed to be a small angle, for example, 70 °. After that, dry etching such as RIE is temporarily stopped.

Next, by setting the substrate temperature to about 200 ° C. and removing the p-superlattice layer 31 and the first superlattice absorbing layer 20 by dry etching such as RIE, the side surface 170c of the p-superlattice layer 31 and the side surface 170c, and , The side surface 170b of the first superlattice absorbing layer 20 is formed. As a result, the taper angle θc of the side surface 170c of the p-superlattice layer 31 and the taper angle θb of the side surface 170b of the first superlattice absorption layer 20 are formed to be an angle close to vertical, for example, 85 °. Will be done. After that, dry etching such as RIE is temporarily stopped.

Next, the substrate temperature is set to about 70 ° C., and the n-contact layer 11 is removed by dry etching such as RIE to form the side surface 170a of the n-contact layer 11. As a result, the taper angle θa of the side surface 170a of the n-contact layer 11 is formed to be a small angle, for example, 70 °.

By the above steps, the pixel separation groove 170 is formed. After that, the hard mask formed of silicon oxide is removed by etching or the like, if necessary.

Next, as shown in FIG. 10, an insulating film 160 serving as a passivation film is formed on the side surfaces and the bottom surface of the pixel separation groove 170, the extraction electrode 181 and the surface electrode 182. The insulating film 160 is formed by forming silicon oxide by plasma CVD, and is formed so that the film thickness on the n-contact layer 52 is 300 nm to 500 nm. After that, a photoresist is applied on the insulating film 160, and exposure and development are performed by an exposure apparatus to form a resist pattern (not shown) having openings in the regions where the contact holes 161a and 161b are formed. To do. After that, the insulating film 160 at the opening of the resist pattern is removed by dry etching such as RIE, and the surfaces of the extraction electrode 181 and the surface electrode 182 are exposed to form contact holes 161a and 161b. After that, the resist pattern is removed with an organic solvent or the like.

Next, as shown in FIG. 11, for connection for connecting to an external circuit chip on the extraction electrode 181 exposed in the contact hole 161a and on the surface electrode 182 exposed in the contact hole 161b. A bump 183 that serves as an electrode is formed. Specifically, a photoresist is applied onto the insulating film 160, the extraction electrode 181 and the surface electrode 182, and exposure and development are performed by an exposure apparatus, whereby the region where the bump 183 is formed has an opening. The illustrated resist pattern is formed. After that, an In film is formed by vacuum vapor deposition and immersed in an organic solvent to remove the In film on the resist pattern by lift-off together with the resist pattern. As a result, the bump 183 is formed by the remaining In film. The GaSb substrate 10 is then removed by polishing or the like.

From the above, the infrared detector according to the present embodiment can be manufactured.

(Modification example)
Further, in the present embodiment, as shown in FIG. 12, the taper angle θc of the side surface 170c of the p-superlattice layer 31 and the taper angle θe of the side surface 170e of the p-superlattice layer 33 are p-contacts. It may be formed so as to have the same taper angle θd as the side surface 170d of the layer 32. That is, the taper angle θc of the side surface 170c of the p-superlattice layer 31 and the taper angle θe of the side surface 170e of the p-superlattice layer 33 are 70 ° or more and 80 ° or less, more preferably 70 ° or more and 75. It may be formed so as to be ° or less.

In the present application, the n-contact layer 11 is described as a first contact layer, the p-contact layer 32 is described as a second contact layer, and the n-contact layer 52 is described as a third contact layer. In some cases. The first contact layer may be formed by the n-contact layer 11 and the n-superlattice layer 12. The second contact layer includes the p-contact layer 32 and either the p-superlattice layer 31 or the p-superlattice layer 33, or the p-contact layer 32 and the p-superlattice layer 31 and p. -It may be formed by the superlattice layer 33. The third contact layer may be formed by the n-superlattice layer 51 and the n-contact layer 52.

[Second Embodiment]
Next, the infrared detector according to the second embodiment will be described. As shown in FIG. 13, the present embodiment has a structure in which AlSb layers 211 to 214 are provided in the vicinity of the interface of the portion where the taper angle changes on the side surface of the pixel separation groove 170.

Specifically, the infrared detector in the present embodiment has a portion of several nm on the side of the first superlattice absorbing layer 20 from the interface between the n-superlattice layer 12 and the first superlattice absorbing layer 20. Is provided with an AlSb layer 211 having a film thickness of several nm. Further, an AlSb layer 212 having a film thickness of several nm is provided on the side of the p-contact layer 32 from the interface between the p-superlattice layer 31 and the p-contact layer 32 at a portion of several nm. Further, an AlSb layer 213 having a film thickness of several nm is provided at a portion of several nm on the side of the p-superlattice layer 33 from the interface between the p-contact layer 32 and the p-superlattice layer 33. Further, an AlSb layer 214 having a film thickness of several nm is provided on the side of the n-superlattice layer 51 from the interface between the second superlattice absorbing layer 40 and the n-superlattice layer 51. There is.

When the pixel separation groove 170 is formed by dry etching such as RIE, dry etching can be performed while observing the etching state using a plasma light emitting monitor. n-contact layer 11, n-superlattice layer 12, first superlattice absorption layer 20, p-superlattice layer 31, p-contact layer 32, p-superlattice layer 33, second superlattice absorption layer 40. , N-superlattice layer 51 and n-contact layer 52 do not contain Al. On the other hand, Al is contained in the AlSb layers 211, 212, 213 and 214. Therefore, when plasma emission of Al is detected, the dry etching is temporarily stopped, the substrate temperature is changed, and when the predetermined substrate temperature is reached, the dry etching is restarted again.

In the present application, AlSb layers 211, 212, 213, and 214 may be referred to as monitor layers. The monitor layer includes n-contact layer 11, n-superlattice layer 12, first superlattice absorption layer 20, p-superlattice layer 31, p-contact layer 32, p-superlattice layer 33, and second superlattice layer. It contains an element different from the elements contained in the lattice absorbing layer 40, the n-superlattice layer 51, and the n-contact layer 52.

The contents other than the above are the same as those in the first embodiment.

[Third Embodiment]
Next, the third embodiment will be described with reference to FIG. The infrared detector in the present embodiment includes an n-contact layer 11, an n-superlattice layer 12, a first superlattice absorption layer 20, a p-contact layer 32, a second superlattice absorption layer 40, and an n-contact. It has a layer 52. Further, the pixel separation groove 170 is formed by removing the n-superlattice layer 12, the first superlattice absorption layer 20, the p-contact layer 32, the second superlattice absorption layer 40, and the n-contact layer 52. Has been done. In the present embodiment, it is assumed that the first contact layer is formed by the n-contact layer 11 and the n-superlattice layer 12.

That is, the infrared detector in the present embodiment has a structure in which the p-superlattice layer 31, the p-superlattice layer 33, and the n-superlattice layer 51 are excluded from the infrared detector in the first embodiment. Is. Even with such a structure, it is possible to detect infrared rays having two wavelengths.

The side surfaces of the pixel separation groove 170 are the side surface 170a of the n-superlattice layer 12, the side surface 170b of the first superlattice absorption layer 20, the side surface 170d of the p-contact layer 32, and the side surface 170f of the second superlattice absorption layer 40. , Is formed by the side surface 170h of the n-contact layer 52.

Further, an insulating film 160 is formed as a passivation film on the side surface and the bottom surface of the pixel separation groove 170 and the n-contact layer 52. The insulating film 160 can be formed of silicon oxide or silicon nitride formed by plasma CVD.

In the present embodiment, the taper angle θh of the side surface 170h of the n-contact layer 52 is the taper angle θb of the side surface 170b of the first superlattice absorption layer 20 and the taper of the side surface 170f of the second superlattice absorption layer 40. It is formed at an angle smaller than the angle θf.

By reducing the taper angle θh of the side surface 170h of the n-contact layer 52 in this way, the side surface 170h has an inclination, and the pixel separation groove 170 is formed so as to gradually expand toward the entrance portion. By widening the inlet portion of the pixel separation groove 170, the number of film-forming particles entering the pixel separation groove 170 increases, so that the side surface 170b of the first superlattice absorption layer 20 and the side surface 170f of the second superlattice absorption layer 40 The insulating films 160b and 160f to be formed can be thickened.

Similarly, the taper angle θd of the side surface 170d of the p-contact layer 32 is formed at an angle smaller than the taper angle θb of the side surface 170b of the first superlattice absorbing layer 20.

By reducing the taper angle θd of the side surface 170d of the p-contact layer 32 in this way, the side surface 170d has an inclination, and the pixel separation groove 170 is formed so as to gradually expand toward the entrance portion. As a result, the number of film-forming particles entering the pixel separation groove 170 behind the p-contact layer 32 increases, so that the film is formed on the side surface 170b of the first superlattice absorption layer 20 behind the p-contact layer 32. The insulating film 160b can be made thicker.

The contents other than the above are the same as those in the first embodiment.

Although the embodiments have been described in detail above, the embodiments are not limited to the specific embodiments, and various modifications and changes can be made within the scope of the claims.

Regarding the above explanation, the following additional notes will be further disclosed.
(Appendix 1)
A first electrode layer formed of a first conductive semiconductor,
A first absorption layer formed on the first electrode layer to absorb infrared rays having a first wavelength, and a first absorption layer.
A second electrode layer formed of a second conductive semiconductor formed on the first absorption layer, and a second electrode layer.
A second absorption layer formed on the second electrode layer to absorb infrared rays having a second wavelength, and a second absorption layer.
A third electrode layer formed of a first conductive semiconductor formed on the second absorption layer, and a third electrode layer.
A pixel separation groove that separates the first absorption layer, the second electrode layer, the second absorption layer, and the third electrode layer.
An insulating film formed on the side surface of the pixel separation groove and
Have,
The infrared rays are incident from the side of the first electrode layer.
The taper angle of the side surface of the pixel separation groove with respect to the incident surface of the infrared rays of the first electrode layer is larger than that of the side surface of the first absorption layer and the side surface of the second absorption layer. An infrared detector characterized by a small side surface of the electrode layer.
(Appendix 2)
The taper angle of the side surface of the pixel separation groove with respect to the incident surface of the infrared rays of the first electrode layer is larger than that of the side surface of the first absorption layer and the side surface of the second absorption layer. The infrared detector according to Appendix 1, wherein the side surface of the electrode layer is small.
(Appendix 3)
The taper angles on the side surface of the first absorption layer and the side surface of the second absorption layer are 80 ° or more and 90 ° or less.
The infrared detector according to Appendix 1 or 2, wherein the taper angle on the side surface of the third electrode layer is 70 ° or more and 80 ° or less.
(Appendix 4)
The taper angles on the side surface of the first absorption layer and the side surface of the second absorption layer are 85 ° or more and 90 ° or less.
The infrared detector according to Appendix 1 or 2, wherein the taper angle on the side surface of the third electrode layer is 70 ° or more and 75 ° or less.
(Appendix 5)
The infrared detector according to Appendix 3 or 4, wherein the taper angle on the side surface of the second electrode layer is 70 ° or more and 80 ° or less.
(Appendix 6)
The infrared detector according to Appendix 3 or 4, wherein the taper angle on the side surface of the second electrode layer is 70 ° or more and 75 ° or less.
(Appendix 7)
The infrared detector according to any one of Supplementary note 1 to 6, wherein the first wavelength is shorter than the second wavelength.
(Appendix 8)
The infrared detector according to any one of Supplementary note 1 to 7, wherein the first absorption layer and the second absorption layer are superlattice absorption layers formed of a semiconductor material.
(Appendix 9)
The infrared detector according to Appendix 8, wherein the first absorption layer and the second absorption layer are formed by a superlattice of InAs and GaAs.
(Appendix 10)
Addendum 1 to 9 is characterized in that the thickness of the insulating film formed on the side surface of the second absorption layer is thicker than the thickness of the insulating film formed on the side surface of the first absorption layer. Infrared detector described in any of.
(Appendix 11)
Near the interface between the first absorption layer and the second electrode layer, near the interface between the second electrode layer and the second absorption layer, the second absorption layer and the third electrode layer Any of the vicinity of the interface is different from the elements contained in the first electrode layer, the first absorption layer, the second electrode layer, the second absorption layer, and the third electrode layer. The infrared detector according to any one of Supplementary note 1 to 10, wherein a monitor layer of a semiconductor containing an atom is provided.
(Appendix 12)
The infrared detector according to Appendix 11, wherein the monitor layer is made of a material containing AlSb.
(Appendix 13)
The infrared detector according to any one of Supplementary note 1 to 12, wherein the insulating film is formed of a material containing silicon oxide or silicon nitride.
(Appendix 14)
The infrared detector according to any one of Supplementary note 1 to 13, wherein the first conductive type is an n-type, and the second conductive type is a p-type.

11 n-contact layer 11a Incident surface 12 n-superlattice layer 20 First superlattice absorption layer 31 p-superlattice layer 32 p-contact layer 33 p-superlattice layer 40 Second superlattice absorption layer 51 n- Superlattice layer 52 n-contact layer 160 Insulation film 160b, 160f Insulation film 170 Pixel separation groove 170a to 170h Side surface θ, θa to θh Tapered angle

Claims (9)

A first electrode layer formed of a first conductive semiconductor,
A first absorption layer formed on the first electrode layer to absorb infrared rays having a first wavelength, and a first absorption layer.
A second electrode layer formed of a second conductive semiconductor formed on the first absorption layer, and a second electrode layer.
A second absorption layer formed on the second electrode layer to absorb infrared rays having a second wavelength, and a second absorption layer.
A third electrode layer formed of a first conductive semiconductor formed on the second absorption layer, and a third electrode layer.
A pixel separation groove that separates the first absorption layer, the second electrode layer, the second absorption layer, and the third electrode layer.
An insulating film formed on the side surface of the pixel separation groove and
Have,
The infrared rays are incident from the side of the first electrode layer.
The taper angle of the side surface of the pixel separation groove with respect to the incident surface of the infrared rays of the first electrode layer is larger than that of the side surface of the first absorption layer and the side surface of the second absorption layer. An infrared detector characterized by a small side surface of the electrode layer. The taper angle of the side surface of the pixel separation groove with respect to the infrared incident surface of the first electrode layer is larger than that of the side surface of the first absorption layer and the side surface of the second absorption layer. The infrared detector according to claim 1, wherein the side surface of the electrode layer is small. The taper angles on the side surface of the first absorption layer and the side surface of the second absorption layer are 80 ° or more and 90 ° or less.
The infrared detector according to claim 1 or 2, wherein the taper angle on the side surface of the third electrode layer is 70 ° or more and 80 ° or less. The infrared detector according to claim 3, wherein the taper angle on the side surface of the second electrode layer is 70 ° or more and 80 ° or less. The infrared detector according to any one of claims 1 to 4, wherein the first wavelength is shorter than the second wavelength. The infrared detector according to any one of claims 1 to 5, wherein the first absorption layer and the second absorption layer are superlattice absorption layers formed of a semiconductor material. The infrared detector according to claim 6, wherein the first absorption layer and the second absorption layer are formed by a superlattice of InAs and GaAs. From claim 1, the thickness of the insulating film formed on the side surface of the second absorption layer is thicker than the thickness of the insulating film formed on the side surface of the first absorption layer. 7. The infrared detector according to any one of 7. Near the interface between the first absorption layer and the second electrode layer, near the interface between the second electrode layer and the second absorption layer, the second absorption layer and the third electrode layer Any of the vicinity of the interface is different from the elements contained in the first electrode layer, the first absorption layer, the second electrode layer, the second absorption layer, and the third electrode layer. The infrared detector according to any one of claims 1 to 8, wherein a monitor layer of a semiconductor containing an atom is provided.

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