JP2021068870A - Substrate processing method and substrate processing system - Google Patents

Abstract

To appropriately remove the peripheral edge of a first substrate in a polymerized substrate in which substrates are bonded to each other.SOLUTION: A method for processing a polymerized substrate in which a first substrate W1 and a second substrate W2 are bonded to each other includes irradiating with laser beam along a boundary between the peripheral edge We to be removed of the first substrate and the central portion Wc of the first substrate so as not to overlap identification information stamped on the first substrate, forming a peripheral modification layer M1 inside the first substrate, and removing the peripheral edge by using the peripheral modified layer as a base point.SELECTED DRAWING: Figure 6

Description

The present disclosure relates to a substrate processing method and a substrate processing system.

Patent Document 1 describes a step of irradiating a laser beam along the outer peripheral edge at a position inside a predetermined amount from one surface side of the wafer to remove the outer peripheral portion of the wafer, and a wafer from which the outer peripheral portion has been removed. A step of grinding a surface to be ground to form a predetermined finished thickness, and a method of grinding a wafer including the above are disclosed. According to the grinding method described in Patent Document 1, the wafer can be ground to a predetermined thickness without forming a knife edge on the outer peripheral edge of the wafer.

Japanese Unexamined Patent Publication No. 2006-108532

The technique according to the present disclosure appropriately removes the peripheral edge portion of the first substrate in a polymerized substrate in which the substrates are bonded to each other.

One aspect of the present disclosure is a method of processing a polymerized substrate in which a first substrate and a second substrate are bonded, the peripheral portion of the first substrate to be removed and the central portion of the first substrate. By irradiating a laser beam along the boundary of the first substrate so as not to overlap the identification information engraved on the first substrate, a peripheral modification layer is formed inside the first substrate, and the peripheral modification is performed. It includes removing the peripheral portion with the polymer layer as a base point.

According to the present disclosure, in a polymerized substrate in which substrates are bonded to each other, the peripheral edge of the first substrate can be appropriately removed.

It is explanatory drawing which shows an example of the structure of the polymerization wafer processed in the wafer processing system. It is a top view which shows an example of the structure of the wafer processing system schematically. It is a flow chart which shows an example of the main process of a wafer processing. It is explanatory drawing which shows an example of the main process of a wafer processing. It is explanatory drawing which shows an example of the main process of a wafer processing. It is explanatory drawing which shows an example which the peripheral modification layer and the division modification layer were formed on the 1st wafer in this embodiment. It is explanatory drawing which shows an example which conventionally formed the peripheral modification layer and the division modification layer on the 1st wafer. It is explanatory drawing which shows an example which the peripheral modification layer and the division modification layer were formed on the 1st wafer in this embodiment. It is explanatory drawing of the influence by the stress generated inside the 1st wafer. It is explanatory drawing which shows the effect of a crack in this embodiment. It is explanatory drawing which shows an example of another method of separation of the 1st wafer.

In recent years, in the manufacturing process of semiconductor devices, in a polymerized substrate in which substrates are bonded to each other, a semiconductor substrate (hereinafter referred to as "wafer") in which devices such as a plurality of electronic circuits are formed on the surface of the polymer substrate The back surface is ground to thin the wafer.

By the way, normally, the peripheral edge of the wafer is chamfered, but when the wafer is ground as described above, the peripheral edge of the wafer becomes a sharply pointed shape (so-called knife edge shape). Then, chipping occurs at the peripheral edge of the wafer, and the wafer may be damaged. Therefore, so-called edge trimming is performed in which the peripheral edge of the wafer is shaved in advance before the grinding process.

The grinding method described in Patent Document 1 described above is a grinding method for suppressing the formation of this knife edge shape on the outer peripheral portion of the wafer. In this method, a laser beam is irradiated along the outer peripheral edge at a position inside a predetermined amount from the outer peripheral edge of the wafer to form an altered layer (modified layer), and the outer peripheral portion of the wafer is removed.

Here, the outer peripheral portion is, for example, in the range of 0.5 mm to 3 mm in the radial direction from the outer peripheral edge of the wafer, and the wafer ID is usually engraved on the outer peripheral portion as identification information for identifying the wafer. The wafer ID is processed by, for example, a laser marker and is recessed from the wafer surface. As a result of diligent studies by the present inventor, if the wafer ID is engraved on the incident surface of the laser beam when performing edge trimming, the incident surface becomes rough when the laser beam passes through the wafer ID, and it is appropriate after the incident. It was found that the degree of light collection deteriorated without focusing on the correct position. As a result, the processing accuracy (modification accuracy) of the wafer by the laser beam deteriorates, and the cracks (cracks) extending from the modified layer meander, so that the trim accuracy deteriorates and the quality of the wafer after edge trimming deteriorates. Getting worse.

However, the grinding method described in Patent Document 1 does not consider the influence of the wafer ID on the edge trim at all, and as a result, the outer peripheral portion of the wafer may not be properly removed. Therefore, there is room for improvement in conventional edge trim.

Therefore, the technique according to the present disclosure appropriately removes the peripheral edge portion of the first substrate in the polymerized substrate in which the substrates are bonded to each other. Hereinafter, the wafer processing system as the substrate processing system and the wafer processing method as the substrate processing method according to the present embodiment will be described with reference to the drawings. In the present specification and the drawings, elements having substantially the same functional configuration are designated by the same reference numerals, so that duplicate description will be omitted.

In the wafer processing system 1 described later according to the present embodiment, as shown in FIG. 1, as a polymerization substrate in which the first wafer W1 as the first substrate and the second wafer W2 as the second substrate are bonded. Processing is performed on the polymerized wafer T of. Then, in the wafer processing system 1, the peripheral portion We of the first wafer W1 is removed, and the first wafer W1 is thinned. Hereinafter, in the first wafer W1, the surface bonded to the second wafer W2 is referred to as a front surface W1a, and the surface opposite to the front surface W1a is referred to as a back surface W1b. Similarly, in the second wafer W2, the surface bonded to the first wafer W1 is referred to as a front surface W2a, and the surface opposite to the front surface W2a is referred to as a back surface W2b.

The first wafer W1 is a semiconductor wafer such as a silicon substrate, and a device layer D including a plurality of devices is formed on the surface W1a. A surface film F is further formed on the device layer D, and is bonded to the second wafer W2 via the surface film F. Examples of the surface film F include an oxide film (SiO ₂ film, TEOS film), a SiC film, a SiCN film, and an adhesive. The peripheral edge portion We of the first wafer W1 is chamfered, and the cross section of the peripheral edge portion We becomes thinner toward the tip thereof. Further, the peripheral edge portion We is a portion that is removed in the edge trim described later, and is, for example, in the range of 0.5 mm to 3 mm in the radial direction from the outer end portion of the first wafer W1.

The second wafer W2 has, for example, the same configuration as the first wafer W1, a device layer D and a surface film F are formed on the surface W2a, and the peripheral edge portion is chamfered. The second wafer W2 does not have to be a device wafer on which the device layer D is formed, and may be, for example, a support wafer that supports the first wafer W1. In such a case, the second wafer W2 functions as a protective material for protecting the device layer D of the surface W1a of the first wafer W1.

In the wafer processing system 1 of the present embodiment, the first wafer W1 in the polymerized wafer T is thinned by separating it into a front surface W1a side and a back surface W1b side. In the following description, the first wafer W1 on the separated front surface W1a side is referred to as the first separated wafer Wd1, and the first wafer W1 on the separated back surface W1b side is referred to as the second separated wafer Wd2. The first separation wafer Wd1 has a device layer D and is commercialized. The second separation wafer Wd2 is reused. The first separated wafer Wd1 refers to the first wafer W1 in a state of being joined to the second wafer W2, and may be referred to as the first separated wafer Wd1 including the second wafer W2. Further, the surfaces separated in the first separation wafer Wd1 and the second separation wafer Wd2 may be referred to as separation surfaces, respectively.

As shown in FIG. 2, the wafer processing system 1 has a configuration in which the loading / unloading station 2 and the processing station 3 are integrally connected. In the loading / unloading station 2, for example, cassettes Ct, Cw1 and Cw2 capable of accommodating a plurality of polymerization wafers T, a plurality of first separated wafers Wd1 and a plurality of second separated wafers Wd2 are carried in / out from the outside. Is done. The processing station 3 is provided with various processing devices that perform desired processing on the polymerized wafer T.

In the present embodiment, the cassette Ct and the cassette Cw1 are provided separately, but the same cassette may be used. That is, the cassette containing the polymerized wafer T before the treatment and the cassette containing the first separation wafer Wd1 after the treatment may be used in common.

The loading / unloading station 2 is provided with a cassette mounting table 10. In the illustrated example, a plurality of, for example, three cassettes Ct, Cw1 and Cw2 can be freely mounted in a row on the cassette mounting table 10 in the Y-axis direction. The number of cassettes Ct, Cw1 and Cw2 mounted on the cassette mounting table 10 is not limited to this embodiment and can be arbitrarily determined.

The loading / unloading station 2 is provided with a wafer transfer device 20 adjacent to the cassette mounting table 10 on the X-axis negative direction side of the cassette mounting table 10. The wafer transfer device 20 is configured to be movable on a transfer path 21 extending in the Y-axis direction. Further, the wafer transfer device 20 has, for example, two transfer arms 22 and 22 that hold and transfer the polymerized wafer T. Each transport arm 22 is configured to be movable in the horizontal direction, the vertical direction, around the horizontal axis, and around the vertical axis. The configuration of the transport arm 22 is not limited to this embodiment, and any configuration can be adopted. The wafer transfer device 20 is configured to be able to transfer the polymerized wafer T to the cassettes Ct, Cw1, Cw2 of the cassette mounting table 10 and the transition device 30 described later.

The carry-in / out station 2 is provided with a transition device 30 for delivering the polymerized wafer T adjacent to the wafer transfer device 20 on the X-axis negative direction side of the wafer transfer device 20.

The processing station 3 is provided with, for example, three processing blocks G1 to G3. The first processing block G1, the second processing block G2, and the third processing block G3 are arranged side by side in this order from the positive direction side of the X axis (the loading / unloading station 2 side) to the negative direction side.

The first processing block G1 is provided with an etching device 40, a cleaning device 41, and a wafer transfer device 50. The etching apparatus 40 and the cleaning apparatus 41 are arranged in a laminated manner. The number and arrangement of the etching apparatus 40 and the cleaning apparatus 41 are not limited to this. For example, the etching apparatus 40 and the cleaning apparatus 41 may be placed side by side in the X-axis direction, respectively. Further, the etching apparatus 40 and the cleaning apparatus 41 may be laminated respectively.

The etching apparatus 40 etches the ground surface of the first wafer W1 ground by the processing apparatus 80 described later. For example, a chemical solution (etching solution) is supplied to the ground surface, and the ground surface is wet-etched. As the chemical solution, for example, HF, HNO ₃ , H ₃ PO ₄ , TMAH, Choline, KOH and the like are used.

The cleaning device 41 cleans the ground surface of the first wafer W1 ground by the processing device 80 described later. For example, the brush is brought into contact with the ground surface to scrub clean the ground surface. A pressurized cleaning liquid may be used for cleaning the ground surface. Further, the cleaning device 41 may have a configuration for cleaning the back surface W2b of the second wafer W2 together with the ground surface of the first wafer W1.

The wafer transfer device 50 is arranged, for example, on the Y-axis negative direction side of the etching device 40 and the cleaning device 41. The wafer transfer device 50 has, for example, two transfer arms 51, 51 that hold and transfer the polymerized wafer T. Each transport arm 51 is configured to be movable in the horizontal direction, the vertical direction, around the horizontal axis, and around the vertical axis. The configuration of the transport arm 51 is not limited to this embodiment, and any configuration can be adopted. Then, the wafer transfer device 50 attaches the polymerization wafer T to the transition device 30, the etching device 40, the cleaning device 41, the interface reformer 60 described later, the internal reformer 61 described later, and the peripheral edge removing device 62 described later. It is configured to be transportable.

The second processing block G2 is provided with an interface reformer 60, an internal reformer 61 as a reformer and other reformers, a peripheral edge remover 62 as a remover, and a wafer transfer device 70. .. The interface reformer 60, the internal reformer 61, and the peripheral edge removing device 62 are arranged in a laminated manner. The number and arrangement of the interface reformer 60, the internal reformer 61, and the peripheral edge removing device 62 are not limited to this. For example, the interface reformer 60, the internal reformer 61, and the peripheral edge removing device 62 may be placed side by side in the X-axis direction, respectively. Further, the interface reformer 60, the internal reformer 61, and the peripheral edge removing device 62 may be laminated.

The interface reformer 60 irradiates, for example, the outer peripheral portion of the device layer D of the first wafer W1 with a laser beam (interfacial laser beam, for example, a CO ₂ laser) to modify the outer peripheral portion of the device layer D. More specifically, the interface between the first wafer W1 and the device layer D on the peripheral edge We of the first wafer W1 to be removed is modified. As a result, an unbonded region Ae in which the bonding strength between the first wafer W1 and the second wafer W2 is reduced is formed on the peripheral edge portion We of the first wafer W1.

The internal reformer 61 irradiates the inside of the first wafer W1 with a laser beam (internal laser beam, for example, a YAG laser), and the peripheral reforming layer M1, the split reforming layer M2, and the internal surface reforming layer M3. To form. The peripheral edge modification layer M1 serves as a base point when the peripheral edge portion We is peeled off in the edge trim described later. The split modified layer M2 serves as a base point for fragmenting the peripheral portion We to be removed. The internal surface modification layer M3 serves as a base point for separating the first wafer W1 into the first separation wafer Wd1 and the second separation wafer Wd2.

The peripheral edge removing device 62 removes the peripheral edge portion We of the first wafer W1 from the peripheral reforming layer M1 and the split reforming layer M2 formed in the internal reforming device 61, that is, edge trimming is performed. The edge trimming method can be arbitrarily selected.

The wafer transfer device 70 is arranged, for example, on the Y-axis positive direction side of the interface reformer 60, the internal reformer 61, and the peripheral edge removing device 62. The wafer transfer device 70 has, for example, two transfer arms 71 and 71 that attract and hold the polymerized wafer T by a suction holding surface (not shown) and convey it. Each transport arm 71 is supported by an articulated arm member 72, and is configured to be movable in the horizontal direction, the vertical direction, the horizontal axis, and the vertical axis. The configuration of the transport arm 71 is not limited to this embodiment, and any configuration can be adopted. The wafer transfer device 70 is configured to be able to transfer the polymerized wafer T to the etching device 40, the cleaning device 41, the interface reformer 60, the internal reformer 61, the peripheral edge removing device 62, and the processing device 80 described later. Has been done.

The processing device 80 is provided in the third processing block G3. The number and arrangement of the processing devices 80 are not limited to the illustrated examples, and a plurality of processing devices 80 may be arbitrarily arranged.

The processing apparatus 80 has a rotary table 81. The rotary table 81 is rotatably configured around a vertical rotation center line 82 by a rotation mechanism (not shown). Two chucks 83 for sucking and holding the polymerized wafer T are provided on the rotary table 81. The chucks 83 are evenly arranged on the same circumference as the rotary table 81. The two chucks 83 can be moved to the delivery position A0 and the processing position A1 by rotating the rotary table 81. Further, each of the two chucks 83 is configured to be rotatable around a vertical axis by a rotation mechanism (not shown).

At the delivery position A0, the polymerization wafer T is delivered. A grinding unit 84 is arranged at the processing position A1 to grind the first wafer W1. The grinding unit 84 has a grinding unit 85 having an annular shape and a rotatable grinding wheel (not shown). Further, the grinding portion 85 is configured to be movable in the vertical direction along the support column 86. Then, the chuck 83 and the grinding wheel are rotated in a state where the polymerized wafer T held by the chuck 83 is in contact with the grinding wheel.

The wafer processing system 1 described above is provided with a control device 90 as a control unit. The control device 90 is, for example, a computer and has a program storage unit (not shown). The program storage unit stores a program that controls the processing of the polymerized wafer T in the wafer processing system 1. Further, the program storage unit also stores a program for controlling the operation of the drive system of the above-mentioned various processing devices and transfer devices to realize the wafer processing described later in the wafer processing system 1. The program may be recorded on a computer-readable storage medium H and may be installed on the control device 90 from the storage medium H.

Next, the wafer processing performed by using the wafer processing system 1 configured as described above will be described. In the present embodiment, the first wafer W1 and the second wafer W2 are bonded to each other in an external bonding device (not shown) of the wafer processing system 1 to form a polymerized wafer T in advance.

First, the cassette Ct containing a plurality of the polymerization wafers T shown in FIG. 4A is placed on the cassette mounting table 10 of the loading / unloading station 2.

Next, the polymerized wafer T in the cassette Ct is taken out by the wafer transfer device 20 and transferred to the transition device 30.

Subsequently, the wafer transfer device 50 takes out the polymerized wafer T of the transition device 30 and transfers it to the internal reformer 61. In the internal reformer 61, as shown in FIG. 4B, the inside of the first wafer W1 is irradiated with laser beams L1 and L2 to sequentially form the peripheral reforming layer M1 and the split reforming layer M2 (FIG. 6). Step S1) of 3. In addition, in order to avoid the complexity of the illustration, the divisional modification layer M2 is omitted in the drawings of FIGS. 4 (c), 4 (d) and 5.

In forming the peripheral modification layer M1, the layered wafer T (first wafer W1) is rotated while the laser head (not shown) periodically irradiates the inside of the first wafer W1 with laser light L1. .. As a result, the peripheral modification layer M1 is formed in a substantially concentric ring shape with the bonding region Ac (unbonded region Ae) along the boundary between the peripheral portion We and the central portion Wc of the first wafer W. The number of peripheral modification layers M1 formed in the thickness direction of the first wafer W1 is not limited to the illustrated example, and can be arbitrarily determined.

Here, the formation position of the peripheral reforming layer M1 is determined with reference to, for example, the end portion and the center position of the first wafer W1, and is slightly larger than the inner end of the unbonded region Ae formed later in the interface reformer 60. It is formed radially inward. Ideally, the peripheral modification layer M1 is formed at a position overlapping the boundary between the bonding region Ac and the unbonded region Ae (hereinafter, simply referred to as "boundary"). The layer M1 may be formed so as to be displaced. Then, when the peripheral modification layer M1 is formed at a position radially outward from the boundary, that is, in the unbonded region Ae, after the peripheral edge We is removed, the first wafer W2 is first. Wafer W1 may be in a floating state. Then, when the first wafer W1 is in a floating state in this way, the edge of the first wafer W1 may be chipped in the subsequent wafer processing or wafer transfer, which may cause contamination.

In this respect, by controlling the peripheral modification layer M1 to be formed radially inside the boundary, for example, even if the formation position shifts due to a processing error, the position overlaps the boundary or is radially inside the boundary. Even if there is, the peripheral modification layer M1 can be formed at a position close to the boundary, and the formation of the peripheral modification layer M1 at a position radially outward from the boundary can be suppressed.

Further, as shown in FIG. 6, a wafer ID is engraved on the back surface W1b of the first wafer W1 as identification information of the first wafer W1 in the vicinity of the notch portion Wn. The wafer ID is processed by, for example, a laser marker and is recessed from the back surface W1b.

Here, as in the conventional case, when the inside of the first wafer W1 is irradiated with the laser beam and the peripheral edge modifying layer M1 is formed in a circular shape as shown in FIG. 7, the peripheral modification layer M1 becomes the wafer ID. It may take. In such a case, when the laser light passes through the wafer ID, the incident surface of the laser light becomes rough, and after the laser light is incident, the light is not focused at an appropriate position and the light condensing degree deteriorates. As a result, the processing quality of the peripheral modification layer M1 by the laser beam deteriorates.

Therefore, in the present embodiment, as shown in FIGS. 6 and 8, the laser beam L1 is irradiated so as not to overlap the wafer ID to form the peripheral modification layer M1. The position and size of the wafer ID on the first wafer W1 are known in advance when the polymerized wafer T is conveyed to the wafer processing system 1, and the laser beam L1 is irradiated so as to avoid the wafer ID. Then, the peripheral modification layer M1 is formed on the inner side in the radial direction of the wafer ID. As a result, the peripheral modification layer M1 having appropriate processing quality can be formed. The shape of the peripheral modification layer M1 around the wafer ID is arbitrary. As shown in the illustrated example, the peripheral modification layer M1 may be formed substantially linearly on the wafer ID side, or the peripheral modification layer M1 may be formed so as to avoid only the wafer ID. Further, even if the peripheral modification layer M1 is formed inside the wafer ID in the radial direction in this way, the device layer D is not affected, that is, the active die is not affected.

Inside the first wafer W1, the back surface W1b side of the first wafer W1 is "upper" and the front surface W1a side is in the thickness direction (hereinafter, may be referred to as "vertical direction") from the peripheral modification layer M1. The crack C1 extends in the "downward" direction. The crack C1 extending upward from the peripheral modification layer M1 reaches, for example, the back surface W1b of the first wafer W1. Further, the crack C1 extending downward is a crack so that the lower end of the crack C1 is located at least below the inner end portion (hereinafter, referred to as “inner end”) of the unbonded region Ae formed later. Controls the extension of C1. The expansion of the crack C1 is performed, for example, by adjusting the formation position of the peripheral modification layer M1 in the thickness direction of the first wafer W1, or, for example, the output or blurring of the laser beam L1 when the peripheral modification layer M1 is formed. Is controlled by adjusting.

When the peripheral modification layer M1 is formed, the laser beam L2 is irradiated from the laser head to the inside of the first wafer W1 while moving the laser head (not shown) to the outside in the radial direction of the peripheral modification layer M1. To do. As a result, a plurality of divided modified layers M2 extending in the radial direction of the first wafer W1 are formed. In the examples of FIGS. 4B and 6, the split reforming layer M2 is formed at eight locations in the circumferential direction and three locations in the thickness direction of the first wafer W1, but the split reforming layer M2 is formed. The number of can be determined arbitrarily.

Further, in the present embodiment, as shown in FIGS. 6 and 8, the laser beam L2 is irradiated so as not to overlap the wafer ID to form the split reforming layer M2. As a result, the split modified layer M2 having an appropriate processing quality can be formed as in the peripheral modified layer M1.

Inside the first wafer W1, cracks C2 extend in the plane direction from the split reforming layer M2.

The polymerized wafer T on which the peripheral reforming layer M1 and the split reforming layer M2 are formed is then transported to the interface reforming device 60 by the wafer transfer device 70. In the interface reformer 60, as shown in FIG. 4C, the interface between the first wafer W1 and the device layer D is irradiated with laser light L3 to reform the interface (step S2 in FIG. 3).

When the interface between the first wafer W1 and the device layer D is modified in step S2, the bonding strength between the first wafer W1 and the second wafer W2 decreases. As a result, at the interface between the first wafer W1 and the device layer D, the bonding strength is reduced at the bonding region Ac where the first wafer W1 and the second wafer W2 are bonded and the radial outside of the bonding region Ac. An unjoined region Ae, which is a region, is formed. In the edge trim described later, the peripheral edge portion We of the first wafer W1 to be removed is removed, and the presence of the unbonded region Ae in this way makes it possible to appropriately remove the peripheral edge portion We. In forming the unbonded region Ae, the laser beam L3 is irradiated while rotating the polymerized wafer T (first wafer W1) with the central axis as the rotation axis. As a result, the unbonded region Ae is formed concentrically with the polymerization wafer T (first wafer W1).

Here, in forming the unbonded region Ae, the processing is performed at the interface between the first wafer W1 and the device layer D, so that the stress σ due to the processing is accumulated inside the wafer. When the stress σ is accumulated inside the wafer in this way, as shown in FIG. 9, a force acts in the peeling direction of the interface due to the stress σ, and the region is not intended for peeling, for example, a target to be removed. Wafer peeling may proceed to the inside in the radial direction from the peripheral edge portion We. Then, when the peeling proceeds to the radial inside of the peripheral edge portion We, that is, to the bonding region Ac in this way, the first wafer W1 is moved with respect to the second wafer W2 after the peripheral edge portion We is removed as described above. It may become floating.

In this respect, in the present embodiment, the crack C1 extending by the formation of the peripheral modification layer M1 is extended at least below the formation position of the unbonded region Ae. More specifically, the peripheral edge We is cut off from the first wafer W1 with the crack C1 as a boundary. As a result, even when the first wafer W1 and the second wafer W2 are peeled off due to internal stress in forming the unbonded region Ae, the peripheral edge We is cut off by the crack C1 as shown in FIG. Therefore, the peeling does not proceed across the crack C1. That is, the peripheral edge portion We can be appropriately removed, and it is appropriately suppressed that the first wafer W1 floats with respect to the second wafer W2 after the peripheral edge portion We is removed.

Further, at this time, by setting the radial inner end (inner end) of the unbonded region Ae to be radially outer than the crack C1, it is possible to more appropriately suppress the peeling from progressing across the crack C1. it can.

In the illustrated example, the unbonded region Ae was formed at the interface between the first wafer W1 and the device layer D, but the unbonded region Ae was formed at the bonding position between the first wafer W1 and the second wafer W2. The strength is not limited to this as long as it can reduce the strength. For example, the unbonded region Ae may be formed at the interface between the second wafer W2 and the device layer D, and for example, each surface film F to which the first wafer W1 and the second wafer W2 are actually bonded may be formed. It may be formed at the interface of. Further, when the unbonded region Ae is formed at the interface between the second wafer W2 and the device layer D, for example, the laser beam L3 is irradiated from above the inverted polymerized wafer T, that is, from the second wafer W2 side. It may be formed by. Even in such a case, by advancing the crack C1 below the unbonded region Ae, in other words, the crack C1 is formed at the formation height of the unbonded region Ae in the thickness direction of the polymerized wafer T. Therefore, it is possible to appropriately prevent the peeling due to the internal stress from proceeding to the inside in the radial direction of the peripheral portion We.

The polymerized wafer T on which the unbonded region Ae is formed is transferred to the internal reformer 61 again by the wafer transfer device 70. In the internal reformer 61, as shown in FIG. 4D, the inside of the first wafer W1 is irradiated with the laser beam L4 to form the internal surface reforming layer M3 (step S3 in FIG. 3).

In forming the internal surface modification layer M3, the laser beam L4 is periodically irradiated from the laser head (not shown) to the inside of the first wafer W1 while rotating the layered wafer T (first wafer W1). At the same time, the laser head is relatively moved inward in the radial direction of the first wafer W1. As a result, the internal surface modification layer M3 is formed on the entire surface of the first wafer W1 along the surface direction.

The inner surface modification layer M3 is formed on the first wafer W1 on the radial inside of the peripheral modification layer M1. That is, the laser beam L4 is irradiated so as not to overlap the wafer ID, and the internal surface modification layer M3 is also formed so as not to overlap the wafer ID. As a result, it is possible to form the internal surface modification layer M3 having appropriate processing quality, similarly to the peripheral modification layer M1 and the division modification layer M2. Inside the first wafer W1, cracks C3 extend in the plane direction from the internal surface modification layer M3. As described above, since the peripheral edge portion We is edge-cut from the first wafer W1 by the crack C1, the crack C3 extends only in the radial direction of the peripheral edge modifying layer M1.

Further, the lower end of the formed internal surface modification layer M3 is located above the surface of the first separated wafer Wd1 after the separation after the final finishing treatment. That is, the formation position is adjusted so that the internal surface modification layer M3 does not remain on the first separation wafer Wd1 after separation.

Further, here, it is desirable that the lower end of the peripheral modification layer M1 formed in step S1 is located above the inner surface modification layer M3. If the lower end of the peripheral modification layer M1 is located below the inner surface modification layer M3, the quality of the edge trim may deteriorate. Specifically, for example, the peripheral modification layer M1 may remain on the surface or side surface of the first separated wafer Wd1 after the separation after the final finishing treatment, so that the finished surface may be roughened. From this point of view, the lower end of the peripheral modification layer M1 is located above the internal modification layer M3 so that the peripheral modification layer M1 does not remain on the final finished surface of the first separation wafer Wd1. Is preferable.

Furthermore, when the peeling of the first wafer W1 progressing inward in the radial direction due to the internal stress reaches the peripheral modification layer M1 instead of the crack C1 as described above, in other words, the formation height of the unbonded region Ae. If the peripheral modification layer M1 is formed, the peripheral edge We may not be properly removed. Specifically, when the crack C1 extends to the formation height of the unbonded region Ae as described above, the peripheral portion We is appropriately trimmed from the first wafer W1 by the crack C1. However, when the peripheral edge modification layer M1 is formed at the formation height of the unbonded region Ae, the first wafer W1 and the peripheral edge portion We are in a state of being connected via the peripheral edge modification layer M1. Therefore, the peeling of the first wafer W1 that progresses due to the internal stress may proceed to the inside in the radial direction via the peripheral edge modification layer M1, and from this viewpoint as well, the lower end of the peripheral edge modification layer M1 is not yet formed. It is located above the junction region Ae, more preferably above the internal surface modification layer M3.

When the internal surface modification layer M3 is formed inside the first wafer W1, the polymerized wafer T is then transferred from the internal reformer 61 to the peripheral edge removing device 62 by the wafer transfer device 70.

In the peripheral edge removing device 62, as shown in FIG. 5A, the peripheral edge portion We of the first wafer W1 is removed from the peripheral edge modification layer M1 (crack C1) and the unbonded region Ae as a base point (FIG. FIG. Step S4 of 3.

In removing the peripheral edge portion We, a blade as an insertion member having a wedge shape, for example, may be inserted at the interface between the first wafer W1 and the second wafer W2 forming the polymerization wafer T. As a result, when removing the peripheral edge portion We, the peripheral edge portion We is appropriately peeled off from the peripheral edge modifying layer M1 as a base point due to the impact at the time of inserting the blade. At this time, as described above, the unbonded region Ae is formed at the interface between the first wafer W1 and the device layer D, and the bonding strength with the second wafer W2 is reduced, so that the peripheral portion We is appropriate. Is removed.

Further, as described above, since the peripheral modification layer M1 is appropriately formed without overlapping the wafer ID, the peripheral edge We can be appropriately removed without being affected by the wafer ID.

Further, as described above, the peripheral portion We is cut off from the first wafer W1 by the crack C1. Therefore, the peeling does not proceed to the inside in the radial direction of the peripheral edge portion We, and the removal range of the peripheral edge portion We is appropriately controlled. Therefore, in the first separation wafer Wd1, the first wafer W1 becomes the second wafer W2. On the other hand, it does not float and the quality after trimming can be maintained appropriately.

The polymerized wafer T from which the peripheral edge portion We of the first wafer W1 has been removed is then transported from the peripheral edge removing device 62 to the processing device 80 by the wafer transfer device 70. In the processing apparatus 80, first, as shown in FIG. 5B, the first wafer W1 becomes the first separation wafer Wd1 and the second separation wafer Wd2 with the internal surface modification layer M3 (crack C3) as a base point. (Step S5 in FIG. 3). At this time, since the internal surface modification layer M3 is appropriately formed without overlapping the wafer ID as described above, the first wafer W1 can be appropriately separated.

In separating the first wafer W1, the transport arm 71 is held in a state where the back surface W1b of the first wafer W1 is sucked and held by the transport arm 71, and the back surface W2b of the second wafer W2 is sucked and held by the chuck 83. Raise. As a result, the first wafer W1 is separated into the first separation wafer Wd1 and the second separation wafer Wd2 with the internal surface modification layer M3 as a base point, and the second separation wafer Wd2 is held by the transport arm 71. Can be lifted upwards.

The separated second separated wafer Wd2 is placed on, for example, the delivery position A0, sucked and sucked by the suction holding surface of the transport arm 71, and then recovered to the outside of the wafer processing system 1. Further, for example, by providing a recovery unit (not shown) within the movable range of the transport arm 71 and releasing the suction holding of the second separation wafer Wd2 in the recovery unit, the separated second separation wafer Wd2 can be separated. It may be collected.

Further, in the present embodiment, the first wafer W1 is separated by raising the transfer arm 71, but after the second separation wafer Wd2 is trimmed with the internal surface modification layer M3 as a boundary by rotating the transfer arm 71. , The transport arm 71 may be raised. Further, for example, by providing a pressure sensor (not shown) on the transport arm 71 and measuring the pressure for sucking the second separation wafer Wd2, the presence or absence of the second separation wafer Wd2 is detected and the first wafer is detected. You may check whether W1 has been separated.

Subsequently, the chuck 83 is moved to the machining position A1. Then, as shown in FIG. 5C, the grinding unit 84 grinds the separated surface of the polymerized wafer T after separation held by the chuck 83, that is, the first separated wafer Wd1, and the peripheral edge modification remaining on the separated surface is performed. The wafer layer M1 and the internal surface modification layer M3 are removed (step S6 in FIG. 3). In step S6, the polymerization wafer T (first separation wafer Wd1) and the grinding wheel are each rotated with the grinding wheel in contact with the separation surface to grind the separation surface. After that, the ground surface of the first separation wafer Wd1 may be cleaned with the cleaning liquid using a cleaning liquid nozzle (not shown).

Next, the polymerized wafer T is transferred to the cleaning device 41 by the wafer transfer device 70. In the cleaning device 41, the ground surface of the first separation wafer Wd1 is scrubbed (step S7 in FIG. 3). In the cleaning device 41, the back surface W2b of the second wafer W2 may be cleaned together with the ground surface of the first separated wafer Wd1.

Next, the polymerized wafer T is transferred to the etching device 40 by the wafer transfer device 50. In the etching apparatus 40, the ground surface of the first separation wafer Wd1 is wet-etched with a chemical solution (step S8 in FIG. 3). Grinding marks may be formed on the ground surface ground by the processing device 80 described above. In this step S8, grinding marks can be removed by wet etching, and the ground surface can be smoothed.

After that, the polymerized wafer T that has been subjected to all the processing is transported to the transition device 30 by the wafer transfer device 50, and further transferred to the cassette Cw1 of the cassette mounting table 10 by the wafer transfer device 20. In this way, a series of wafer processing in the wafer processing system 1 is completed.

According to the above embodiment, since the peripheral modification layer M1 is formed so as not to overlap the wafer ID of the first wafer W1 in step S1, the influence of the wafer ID is avoided and the peripheral edge We is removed in step S4. (Edge trim) can be performed appropriately. Therefore, the quality of the first wafer W1 after edge trimming can be maintained.

Moreover, since the laser beam L1 is irradiated in an annular shape except for the portion where the wafer ID is formed, the peripheral modification layer M1 can be formed on the first wafer W1 with a desired trim width. Therefore, the peripheral edge We can be appropriately removed.

Further, in step S3, the internal surface modification layer M3 is formed so as not to overlap the wafer ID of the first wafer W1, so that the first wafer W1 is combined with the first separation wafer Wd1 and the second separation wafer Wd2. Can be properly separated.

In the above embodiment, when the peripheral modification layer M1 is formed in step S1, the laser beam L1 is first generated based on the position and size of the wafer ID known in advance so as to avoid the wafer ID. The inside of the wafer W1 was irradiated. In this regard, the position and size of the wafer ID may be measured when the wafer processing system 1 performs wafer processing.

The position and size of the wafer ID can be measured by any device in the wafer processing system 1, for example, the internal reformer 61. In the present embodiment, the internal reformer 61 functions as a measuring unit in the present disclosure.

In such a case, in step S1, the position and size of the wafer ID are measured before irradiating the inside of the first wafer W1 with the laser beam L1 in the internal reformer 61. Then, based on the measurement result of the wafer ID, the position of the peripheral modification layer M1, that is, the irradiation position of the laser beam L1 is determined so as to avoid the wafer ID.

According to this embodiment, since the position and size of the wafer ID are measured for each wafer, the wafer ID can be accurately grasped. Therefore, the laser beam L1 can be irradiated to a more appropriate position on the first wafer W1, and the processing quality of the peripheral modification layer M1 can be maintained.

In the above embodiment, when it is confirmed that the peripheral modification layer M1 to be formed on the first wafer W1 does not overlap the wafer ID, the peripheral modification layer M1 may be formed in a circular shape (annular shape). Good.

In the above embodiment, after the peripheral modification layer M1 is formed inside the first wafer W1 (step S1 in FIG. 3), the unbonded region Ae is formed at the interface between the first wafer W1 and the device layer D. Although it was formed (step S2 in FIG. 3), the order of the wafer processing steps is not limited to this. That is, for example, after forming the unbonded region Ae at the interface between the first wafer W1 and the device layer D, the peripheral modification layer M1 is formed radially inside the inner end of the unbonded region Ae. May be good.

In the above embodiment, the unbonded region Ae is formed in the interface reformer 60 provided in the wafer processing system 1, but the unbonded region Ae may be formed outside the wafer processing system 1. Further, the unbonded region Ae may be formed on the second wafer W2 and the first wafer W1 before bonding. Here, when an unbonded region Ae is formed on the surface of the surface film F on the first wafer W1 before bonding, stress is accumulated inside the first wafer W1 when the unbonded region Ae is formed. Is suppressed, so that it is possible to suppress the progress of peeling to the inside in the radial direction of the peripheral edge portion We due to internal stress.

In the above embodiment, the crack C1 extending upward from the peripheral modification layer M1 reaches the back surface W1b of the first wafer W1, but as shown in FIG. 11A, the crack C1 is formed on the back surface W1b. It may be connected to the crack C3 extending in the plane direction from the internal surface modification layer M3 without reaching the surface. In such a case, in the separation of the first wafer W1, the second separation wafer Wd2 is integrally separated from the peripheral edge portion We as shown in FIG. 11B. That is, the peripheral portion We is removed and the first wafer W1 is separated at the same time. When the second separation wafer Wd2 and the peripheral edge portion We are integrally separated in this way, the split modification layer M2 does not have to be formed in step S1 of FIG. 3 in the above-described embodiment.

Further, in the above embodiment, by forming the internal surface modification layer M3 inside the first wafer W1, the first wafer W1 is separated (thinned) from the internal surface modification layer M3 as a base point. However, the thinning method of the first wafer W1 is not limited to this. For example, the unbonded region Ae, the peripheral modification layer M1 and the split modification layer M2 are formed on the polymerized wafer T, the peripheral edge We of the first wafer W1 is removed, and then the first wafer is ground by grinding in the processing apparatus 80. Wafer W1 may be thinned.

In the above embodiment, after the unbonded region Ae is formed at the interface between the first wafer W1 and the device layer D, the internal reformer 61 in which the peripheral modification layer M1 and the split modification layer M2 are formed is used again. The polymerized wafer T was carried in to form the internal surface modified layer M3, but the internal surface modified layer M3 may be formed in another device. That is, the wafer processing system 1 may be further provided with a second internal reforming device (not shown) for forming the internal surface reforming layer M3. The second internal reformer can be arranged so as to be laminated with, for example, the interface reformer 60 and the internal reformer 61 for forming the peripheral reformer layer M1. In such a case, the second internal reformer corresponds to the other reforming unit of the present disclosure.

The embodiments disclosed this time should be considered to be exemplary in all respects and not restrictive. The above embodiments may be omitted, replaced or modified in various forms without departing from the scope of the appended claims and their gist.

1 Wafer processing system 61 Internal reformer 62 Peripheral removal device 90 Control device M1 Peripheral reformer T Polymerized wafer W1 First wafer W2 Second wafer Wc Central part We Peripheral part

Claims (14)

It is a method of processing a polymerized substrate in which a first substrate and a second substrate are bonded.
The laser beam is irradiated along the boundary between the peripheral edge of the first substrate to be removed and the central portion of the first substrate so as not to overlap the identification information engraved on the first substrate. Forming a peripheral modification layer inside the first substrate and
A substrate processing method comprising removing the peripheral edge portion from the peripheral edge modifying layer as a base point. The substrate processing method according to claim 1, wherein the peripheral modification layer is formed on the inside of the first substrate in the radial direction of the identification information. Measuring the position and size of the identification information on the first substrate, and
The substrate processing method according to claim 1 or 2, wherein the formation position of the peripheral modification layer is determined based on the measurement result of the identification information. A claim comprising irradiating a laser beam inside the peripheral edge portion so as not to overlap the identification information to form a plurality of divided and modified layers extending in the radial direction of the first substrate. The substrate processing method according to any one of 1 to 3. It includes irradiating a laser beam along the surface direction of the first substrate and not overlapping the identification information to form an internal surface modification layer which is a base point for separation of the first substrate. The substrate processing method according to any one of claims 1 to 4. The substrate processing method according to claim 5, wherein the peripheral edge portion is integrally removed at the time of separation of the first substrate. The substrate processing method according to any one of claims 1 to 4, which comprises thinning the first substrate by grinding the back surface of the first substrate. A system that processes a polymerized substrate to which a first substrate and a second substrate are bonded.
A modified portion that irradiates the inside of the first substrate with a laser beam to form a peripheral modified layer, and a modified portion.
A removal part that removes the peripheral part from the peripheral modification layer as a base point,
A control unit that controls the operation of the reforming unit and the removing unit is provided.
The control unit uses a laser along the boundary between the peripheral portion of the first substrate to be removed and the central portion of the first substrate so as not to overlap the identification information stamped on the first substrate. A substrate processing system that controls the operation of the modified portion so as to irradiate light to form the peripheral modified layer. The substrate processing system according to claim 8, wherein the control unit controls the operation of the modification unit so as to form the peripheral modification layer on the first substrate in the radial direction of the identification information. A measuring unit for measuring the position and size of the identification information on the first substrate is provided.
The substrate processing system according to claim 8 or 9, wherein the control unit determines the formation position of the peripheral modification layer based on the measurement result of the identification information by the measurement unit. The control unit irradiates a laser beam inside the peripheral portion so as not to overlap the identification information to form a plurality of divided and modified layers extending in the radial direction of the first substrate. The substrate processing system according to any one of claims 8 to 10, wherein the modified portion is formed therein. The inside of the first substrate is irradiated with a laser beam to provide another modified portion for forming an internal surface modified layer.
The control unit irradiates a laser beam along the surface direction of the first substrate and does not overlap with the identification information to form the internal surface modification layer. The substrate processing system according to any one of claims 8 to 11, which controls the operation of the above. 12. The control unit controls the operations of the reforming unit, the other modifying unit, and the removing unit so that the peripheral portion is integrally removed at the time of separating the first substrate. The substrate processing system described. The substrate processing system according to any one of claims 8 to 11, further comprising a grinding unit for thinning the first substrate by grinding the back surface of the first substrate with a grinding wheel.

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