JP2021048432A - Transmission device - Google Patents

Transmission device Download PDF

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JP2021048432A
JP2021048432A JP2019167956A JP2019167956A JP2021048432A JP 2021048432 A JP2021048432 A JP 2021048432A JP 2019167956 A JP2019167956 A JP 2019167956A JP 2019167956 A JP2019167956 A JP 2019167956A JP 2021048432 A JP2021048432 A JP 2021048432A
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transmission device
transmission
cpu
control program
unit
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真人 荒尾
Masato Arao
真人 荒尾
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Hitachi Industrial Equipment Systems Co Ltd
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Abstract

To restrain an effect of a main CPU when a transmission device is restored.SOLUTION: A transmission device which is connected to a network to serve as a master unit or a slave unit includes: a CPU having a system memory and an arithmetic processing unit in which a control program is executed; and a transmission unit for performing transmission with another transmission device connected via the network. The CPU transmits an existence confirmation signal. The transmission unit stores a control program of an own transmission device 100 and a control program of the other transmission device 200, and detects an abnormality in the control program of the own transmission device. When the existence confirmation of the CPU cannot be performed based on the existence confirmation signal and an abnormality in the control program is detected, the transmission unit requests the other transmission device connected via the network to transmit the control program of the own transmission device, and performs initialization of the system memory and writing of the received control program into the system memory.SELECTED DRAWING: Figure 1

Description

本発明は、監視制御装置システムにおける伝送装置に関する。 The present invention relates to a transmission device in a monitoring and control device system.

従来から、現場設備に設置した監視や制御に用いられる機器にデータを取り込んで、通信で遠隔地に監視対象の状態を伝送して表示するシステムが知られている。例えば、監視制御システムでは、上下水道の給水及び配水設備、産業用の生産設備、販売データ収集設備等の遠隔制御を行って、データの転送や利用者に対する警報の通報を行う。 Conventionally, there has been known a system in which data is taken into a device used for monitoring and control installed in field equipment, and the status of the monitored object is transmitted and displayed to a remote location by communication. For example, the monitoring and control system remotely controls water and sewage water supply and distribution equipment, industrial production equipment, sales data collection equipment, etc. to transfer data and notify users of alarms.

このような監視制御システムではプログラマブルロジックコントローラ(ＰＬＣ：ｐｒｏｇｒａｍａｂｌｅ ｌｏｇｉｃ ｃｏｎｔｒｏｌｅｒ）を用いた伝送装置の使用が主に使用される。例えば、上下水道における給水、配水設備等のような設備では現場側の伝送装置と中央側の伝送装置を専用回線などの通信網を介しデータの送受信を行っている。 In such a monitoring and control system, the use of a transmission device using a programmable logic controller (PLC) is mainly used. For example, in equipment such as water supply and distribution equipment in water and sewage, data is transmitted and received between the transmission device on the site side and the transmission device on the central side via a communication network such as a dedicated line.

伝送装置のＣＰＵが何らかの現象によって異常となり動作不能となった場合、早急な復旧作業が必要である。 If the CPU of the transmission device becomes abnormal due to some phenomenon and becomes inoperable, immediate recovery work is required.

特許文献１には、システムの動作異常を監視し、容易に復旧可能としたシステムが開示されている。 Patent Document 1 discloses a system that monitors a system operation abnormality and makes it easy to recover.

当該文献の要約書には、「記憶媒体に格納されたシステムプログラムからシステムの起動を行うメインＣＰＵと、上記メインＣＰＵの動作状態を監視し、何らかの問題により上記メインＣＰＵのシステムが起動不可能になった場合に上記メインＣＰＵのシステムを自動的に復旧するサブＣＰＵとを備える。」と記載されている。 In the abstract of the document, "The main CPU that starts the system from the system program stored in the storage medium and the operating status of the main CPU are monitored, and the system of the main CPU cannot be started due to some problem. It is provided with a sub CPU that automatically restores the system of the main CPU in the event of a failure. "

特開2007-243476号公報JP-A-2007-243476

特許文献１の方法では、復旧する伝送装置内にあるサブＣＰＵを用いるため、メインＣＰＵの障害の影響を受けやすい。 本発明の目的は、伝送装置の復旧をする際に、メインＣＰＵの影響を受けにくくする。 In the method of Patent Document 1, since the sub CPU in the transmission device to be restored is used, it is easily affected by the failure of the main CPU. An object of the present invention is to reduce the influence of the main CPU when the transmission device is restored.

ネットワークで接続されることで親機又は子機となる伝送装置において、制御プログラムが実行されるシステムメモリと演算処理部を備えたＣＰＵと、ネットワークで接続された他の伝送装置との間の伝送を行う伝送部と、を備え、
前記ＣＰＵは生存確認信号を伝送部に送信し、前記伝送部は前記自伝送装置の制御プログラム及び前記他の伝送装置の制御プログラムを格納するとともに、前記自伝送装置の制御プログラムの異常を検知し、前記生存確認信号による前記ＣＰＵの生存確認ができず、前記制御プログラムの異常を検知した場合、ネットワークで接続された他の伝送装置に対して、当該他の伝送部に格納された自伝送装置の制御プログラムの送信を要求し、前記システムメモリの初期化及び受信した制御プログラムの前記システムメモリへの書き込むを行うことを特徴とする伝送装置。 Transmission between a CPU equipped with a system memory for executing a control program and an arithmetic processing unit and another transmission device connected via a network in a transmission device that becomes a master unit or a slave unit by being connected via a network. With a transmission unit that does
The CPU transmits a survival confirmation signal to a transmission unit, and the transmission unit stores a control program of the own transmission device and a control program of the other transmission device, and detects an abnormality in the control program of the own transmission device. When the existence of the CPU cannot be confirmed by the survival confirmation signal and an abnormality of the control program is detected, the self-transmission device stored in the other transmission unit is referred to the other transmission device connected by the network. A transmission device comprising requesting transmission of the control program of the above, initializing the system memory, and writing the received control program to the system memory.

本発明によれば、伝送装置内のメインＣＰＵの影響を受けにくい伝送装置の復旧が可能となる。 According to the present invention, it is possible to restore a transmission device that is not easily affected by the main CPU in the transmission device.

実施例1における伝送装置の構成図である。It is a block diagram of the transmission apparatus in Example 1. FIG. 実施例１の処理フロー図である。It is a processing flow diagram of Example 1. FIG.

以下、本実施例を説明する。 Hereinafter, this embodiment will be described.

本発明の実施例を図面を用いて説明する。図１に本実施例における伝送装置の構成を示す。図１において伝送装置(親局)１００はＣＰＵ１０１と伝送部１０５を備えている。伝送装置（親機）１００は図示しないＩ／Ｏポートが接続されることで、監視等を行う機器のデータを取り込む。 Examples of the present invention will be described with reference to the drawings. FIG. 1 shows the configuration of the transmission device in this embodiment. In FIG. 1, the transmission device (master station) 100 includes a CPU 101 and a transmission unit 105. The transmission device (master unit) 100 captures data of a device for monitoring or the like by connecting an I / O port (not shown).

ＣＰＵ１０１はプログラム用の記憶領域(メイン)１０２と取込まれたデータを処理する演算処理部１０３とＣＰＵ１０１本体のシステム情報をもつシステムメモリ１０４を有する。 The CPU 101 has a storage area (main) 102 for a program, an arithmetic processing unit 103 for processing the captured data, and a system memory 104 having system information of the CPU 101 main body.

伝送部１０５はサブＣＰＵであり、プログラム用の記憶領域(サブ)１０６と演算処理部１０７とＣＰＵ１０１のシステムメモリ１０４に対して初期化を実行するためのＣＰＵ初期化スイッチ１０８と対向の伝送装置(子局)２００とデータの送受信を行うための通信部１０９を有する。 The transmission unit 105 is a sub CPU, and is a transmission device (opposite to the CPU initialization switch 108 for executing initialization of the storage area (sub) 106 for the program, the arithmetic processing unit 107, and the system memory 104 of the CPU 101. It has a communication unit 109 for transmitting / receiving data to / from the slave station) 200.

伝送装置(子局)２００の構成は伝送装置(親局)１００と同様に、ＣＰＵ２０１と伝送部２０５からなり、ＣＰＵ２０１はプログラム用の記憶領域(メイン)２０２と演算処理部２０３とシステムメモリ２０４有し、伝送部２０５はプログラム用の記憶領域(サブ)２０６と演算処理部２０７とＣＰＵ初期化スイッチ２０８と通信部２０９を有する。 Similar to the transmission device (master station) 100, the transmission device (slave station) 200 is composed of a CPU 201 and a transmission unit 205, and the CPU 201 has a storage area (main) 202 for a program, an arithmetic processing unit 203, and a system memory 204. The transmission unit 205 includes a storage area (sub) 206 for a program, an arithmetic processing unit 207, a CPU initialization switch 208, and a communication unit 209.

また、プログラム用記憶領域(サブ)１０６、２０６は各伝送装置のプログラムと対応する伝送装置のプログラムを格納するものとする。つまり、プログラム用記憶領域(サブ)１０６は伝送装置１００のＣＰＵ１０１で実行される制御プログラムが格納されるとともに、伝送装置２００のＣＰＵ２０１で実行される制御プログラムが格納される。同様に、プログラム用記憶領域(サブ)２０６は伝送装置２００のＣＰＵ２０１で実行される制御プログラムが格納されるとともに、伝送装置１００のＣＰＵ１０１で実行される制御プログラムが可能される。 Further, the program storage areas (sub) 106 and 206 shall store the program of each transmission device and the program of the corresponding transmission device. That is, the program storage area (sub) 106 stores the control program executed by the CPU 101 of the transmission device 100, and also stores the control program executed by the CPU 201 of the transmission device 200. Similarly, the program storage area (sub) 206 stores a control program executed by the CPU 201 of the transmission device 200, and a control program executed by the CPU 101 of the transmission device 100 can be stored.

この伝送装置１００、２００は例えば、専用回線などの通信回線網３００により接続され、互いに取込んだデータの送受信を可能とする。 The transmission devices 100 and 200 are connected by, for example, a communication network 300 such as a dedicated line, and can transmit and receive data captured by each other.

次に、図１、２を用いて、本実施例の処理フローを説明する。 Next, the processing flow of this embodiment will be described with reference to FIGS. 1 and 2.

伝送装置(親局)１００において演算処理部１０３は、カウンタパルス信号などの生存確認信号Ｓ１１０を伝送部内演算処理部１０７へ送信する（Ｓ１）。 In the transmission device (master station) 100, the arithmetic processing unit 103 transmits a survival confirmation signal S110 such as a counter pulse signal to the arithmetic processing unit 107 in the transmission unit (S1).

伝送部内演算処理部１０７が生存確認信号Ｓ１１０が停止したことを検知した場合、伝送部内演算処理部１０７はＣＰＵ１０１が異常状態であると判断し、図示しない警告灯を点灯させる（Ｓ２）。 警告灯の点灯を確認したユーザは、ＣＰＵ１０１のシステムの初期化が必要と判断した場合は、ＣＰＵ初期化スイッチ１０８を押す。ＣＰＵ内演算処理部１０７はＣＰＵ初期化スイッチ１０８の押下を確認する（Ｓ３）。 When the arithmetic processing unit 107 in the transmission unit detects that the survival confirmation signal S110 has stopped, the arithmetic processing unit 107 in the transmission unit determines that the CPU 101 is in an abnormal state and turns on a warning light (not shown) (S2). The user who confirms the lighting of the warning light presses the CPU initialization switch 108 when it is determined that the system of the CPU 101 needs to be initialized. The in-CPU arithmetic processing unit 107 confirms that the CPU initialization switch 108 is pressed (S3).

ＣＰＵ初期化スイッチ１０８の押下をトリガとして、ＣＰＵ内演算処理部１０７はＣＰＵ内システムメモリ１０４に対して初期化を実行するよう初期化指令Ｓ１１１を送信する（Ｓ４）。 Triggered by pressing the CPU initialization switch 108, the in-CPU arithmetic processing unit 107 transmits an initialization command S111 to the in-CPU system memory 104 to execute initialization (S4).

初期化指令Ｓ１１１を受信したＣＰＵ内システムメモリ１０４は、初期化を開始する（Ｓ５）。

本実施例の伝送部内演算処理部１０７はプログラム記憶領域１０６内のプログラムが破損または失われていること（異常）を検知できる機能を備えているか、ソフト書き込みＳ１１２を実行しても生存確認信号Ｓ１１０が復旧しない場合には、伝送部内プログラム記憶領域（サブ）１０６内のプログラムが破損または失われていると判断する機能を備えている。 The system memory 104 in the CPU that has received the initialization command S111 starts initialization (S5).

The arithmetic processing unit 107 in the transmission unit of this embodiment has a function of detecting that the program in the program storage area 106 is damaged or lost (abnormality), or the survival confirmation signal S110 is executed even if the software write S112 is executed. If the program is not restored, the program in the program storage area (sub) 106 in the transmission unit is determined to be damaged or lost.

上記ソフト書込みＳ１１２前または後に、伝送部内プログラム記憶領域（サブ）１０６内のプログラムが破損または失われていることを検知した場合、、専用回線などの通信回線網３００を介して、接続されている他の伝送装置(子局)２００に対して自身（親機）のプログラムの送信を要求する(Ｓ１１３、Ｓ６)。 When it is detected that the program in the program storage area (sub) 106 in the transmission unit is damaged or lost before or after the soft writing S112, the program is connected via a communication network 300 such as a dedicated line. Requests the other transmission device (slave station) 200 to transmit its own (master unit) program (S113, S6).

伝送部内演算処理部２０７にてプログラムの要求Ｓ１１３を受信すると、伝送装置(子局)２００のプログラム記憶領域（サブ）２０６は、伝送装置(親局)１００のプログラムを、伝送装置（親機）１００の伝送部内プログラム記憶領域１０６に対して送信する(Ｓ１１４)。 When the arithmetic processing unit 207 in the transmission unit receives the program request S113, the program storage area (sub) 206 of the transmission device (slave station) 200 transmits the program of the transmission device (master station) 100 to the transmission device (master unit). It is transmitted to the program storage area 106 in the transmission unit of 100 (S114).

伝送装置(子局)２００よりプログラムを受信し（Ｓ７）、受信したプログラムは伝送装置（親機）１００の伝送部内プログラム記憶領域１０６の破損または失われたプログラムが格納されたテーブルに上書きする（Ｓ８）。その後、伝送装置（親機）１００のＣＰＵ内プログラム記憶領域１０２に対して当該プログラムの書込み(Ｓ１１２)を実行する（Ｓ９）。 A program is received from the transmission device (slave station) 200 (S7), and the received program overwrites the table in which the damaged or lost program in the program storage area 106 in the transmission unit of the transmission device (master unit) 100 is stored (S7). S8). After that, writing (S112) of the program to the program storage area 102 in the CPU of the transmission device (master unit) 100 is executed (S9).

１００ 伝送装置(親局)
１０１ ＣＰＵ
１０２ ＣＰＵ内プログラム用記憶領域(メイン)
１０３ ＣＰＵ内演算処理部
１０４ ＣＰＵ内システムメモリ
１０５ 伝送部
１０６ 伝送部内プログラム用記憶領域(サブ)
１０７ 伝送部内演算処理部
１０８ ＣＰＵ初期化スイッチ
１０９ 伝送部内通信部
２００ 伝送装置(子局)
３００ 専用回線網 100 Transmission device (master station)
101 CPU
102 Storage area for programs in CPU (main)
103 In-CPU arithmetic processing unit 104 In-CPU system memory 105 Transmission unit 106 In-transmission program storage area (sub)
107 In-transmission arithmetic processing unit 108 CPU initialization switch 109 In-transmission communication unit 200 Transmission device (slave station)
300 leased line network

Claims (1)

ネットワークで接続されることで親機又は子機となる伝送装置において、
制御プログラムが実行されるシステムメモリと演算処理部を備えたＣＰＵと、
ネットワークで接続された他の伝送装置との間の伝送を行う伝送部と、
を備え、
前記ＣＰＵは生存確認信号を伝送部に送信し、
前記伝送部は前記自伝送装置の制御プログラム及び前記他の伝送装置の制御プログラムを格納するとともに、前記自伝送装置の制御プログラムの異常を検知し、
前記生存確認信号による前記ＣＰＵの生存確認ができず、前記制御プログラムの異常を検知した場合、ネットワークで接続された他の伝送装置に対して、当該他の伝送部に格納された自伝送装置の制御プログラムの送信を要求し、前記システムメモリの初期化及び受信した制御プログラムの前記システムメモリへの書き込むを行うことを特徴とする伝送装置。 In a transmission device that becomes a master unit or a slave unit by being connected via a network
A CPU equipped with a system memory for executing control programs and an arithmetic processing unit,
A transmission unit that transmits to and from other transmission devices connected via a network,
With
The CPU transmits a survival confirmation signal to the transmission unit,
The transmission unit stores the control program of the self-transmission device and the control program of the other transmission device, and detects an abnormality in the control program of the self-transmission device.
When the survival confirmation of the CPU cannot be confirmed by the survival confirmation signal and an abnormality of the control program is detected, the self-transmission device stored in the other transmission unit is referred to the other transmission device connected by the network. A transmission device that requests transmission of a control program, initializes the system memory, and writes the received control program to the system memory.
JP2019167956A 2019-09-17 2019-09-17 Transmission device Pending JP2021048432A (en)

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