JP2021044937A - Motor driver circuit, drive method for motor, and hard disk device - Google Patents

Abstract

To provide a motor driver circuit capable of detecting sink current in a leg to which a PWM control is performed.SOLUTION: An inverter circuit 110 has a plurality of legs 112 and is connected to a motor 2. A plurality of current detection circuits 120 correspond to the plurality of legs 112 and detect sink current (<0) of the legs 112 respectively corresponding thereto. A current detection circuit 120_# (1) when a corresponding leg 112_# is a fixed phase in which a lower arm is fixedly ON, generates a current detection signal SDET# proportional to output voltage V# thereof, and (2) when the corresponding leg 112_# is a modulation phase in which an upper arm and the lower arm complementarily switch, (2-i) generates the current detection signal SDET# proportional to output voltage VA of the corresponding leg 112_# during a low output period when the lower arm is ON, and (2-ii) generates the current detection signal SDET# based on a signal obtained in the low output period immediately before, during a high output period when the upper arm is ON.SELECTED DRAWING: Figure 6

Description

The present invention relates to a motor driver circuit.

Brushless DC motors (hereinafter, simply referred to as DC motors) are used in various electronic devices such as hard disks, DVDs (Digital Versatile Discs), CDs (Compact Discs), and cooling fans.

Information on the current (coil current) flowing through the DC motor is used to control or protect the DC motor. 1A and 1B are diagrams for explaining a method of detecting the current of the motor 2. Here, a three-phase motor is taken as an example. The method of FIG. 1A is also referred to as a 1-shunt method, and one current detection resistor Rs is provided in the three-phase inverter circuit 6 connected to the motor 2. By monitoring the voltage drop Vs of the current detection resistor Rs, the total current of the three-phase coil currents can be obtained.

The method of FIG. 1B is also referred to as a 3-shunt method, and current detection resistors Rsu, Rsv, and Rsw are individually provided for each of the three-phase legs of the three-phase inverter circuit 6 connected to the motor 2. In the 3-shunt method, the coil current of each phase can be obtained individually based on the voltage drop of the current detection resistors Rs # of each phase (# = U, V, W).

Since the methods of FIGS. 1A and 1B require an external current detection resistor, there is a problem that cost increase is unavoidable and the mounting area becomes large.

There is also a method of indirectly detecting the current by using the voltage between both ends of the lower arm (low-side transistor) of the three-phase bridge circuit without using the current detection resistor. FIG. 2 is a diagram illustrating current detection using the lower arm.

_{The current detection circuits 8u, 8v, 8w detect sink currents I U} , _IV , I _W of each phase based on the terminal voltages Vu, Vv, Vw of the corresponding phases. While the lower arm of a phase # is on, the output voltage (terminal voltage) V _# of that phase # is
V _# = R _ON × I _#
Will be. R _ON is the on resistance of the lower arm. The current detection circuit 8 # can indirectly acquire information on the _{current I #} by monitoring the _{terminal voltage V #.}

For example, in the 120 degree energization system, one phase sources the current and another phase sinks the current. In such an energization method, the current of each phase can be accurately detected by the current detection method of FIG. Since this method does not require a current detection resistor, cost and mounting area can be reduced.

However, depending on the drive method of the motor, the indirect method of FIG. 2 may not be able to detect the correct current. Here, a 180-degree energization method (sine wave drive method) by two-phase modulation is taken as an example.

FIG. 3 is a current waveform diagram in the 180-degree energization method. The currents I _U , _IV , and I _W of each phase are sinusoidal waves whose phases are shifted by 120 degrees. The current has a positive direction for the leg to source and a negative direction for the leg to sink.

For example, in the period φ1 of FIG. 3, since I _U <0, _IV > 0, I _W > 0, the U-phase leg is the current sink, and the V-phase and W-phase legs are the current sources. In another period φ2, since I _U > 0, _IV <0, I _W <0, the U-phase leg is the current source, and the V-phase and W-phase legs are the current sinks.

In FIG. 3, the currents I _U , _IV , and I _W of each phase are shown as sine waves, but the actual currents I _U , _IV , and I _W are superposed with ripples caused by PWM drive.

Figure 4 is a diagram showing a state of the motor driver in the period phi ₁ of FIG. In this period phi _1, U-phase leg current sink state, V-phase leg and W-phase leg is in the current source state. In this state, the lower arm of the U-phase leg is fixed to ON, and the U-phase sink current I _U can be detected by the U-phase current detection circuit 8u.

Figure 5 (a), (b) is a diagram showing a state of the motor driver in the period phi ₂ of FIG. In this period phi _2, U-phase leg current source state, V-phase leg and W-phase leg becomes a current sink state. In the V-phase leg, the lower arm LV is fixed to ON, while the W-phase leg is PWM-driven, the upper arm HW and the lower arm LW are complementarily turned on, and the states of FIGS. 5A and 5B alternate. Occurs in.

As shown in FIG. 5A, the lower arm LW is on during the low output period of the W phase leg, and the W phase sink current I _W flows through the lower arm LW, so that it is detected by the current detection circuit 8w. be able to.

As shown in FIG. 5B, the lower arm LW is off during the high output period of the W phase leg, and the W phase sink current I _W flows to the upper arm HW, so that it is detected by the current detection circuit 8w. Can't.

To solve this problem, an approach of adding an indirect current detection circuit that monitors the voltage across the upper arm can be considered. However, as shown in FIG. 5B, when the current I _{W flows in the upper arm HW in the opposite direction, the sink current I W is} applied to both the upper arm channel and the body diode (reflux diode, not shown in FIG. 5). Flows. Therefore, the indirect method using the on-resistance of the channel of the upper arm HW cannot measure the current accurately.

The present invention has been made in view of the above problems, and one of the exemplary purposes of the embodiment is to provide a motor driver circuit capable of detecting a sink current even in a PWM-controlled leg.

One aspect of the present invention relates to a motor driver circuit. The motor driver circuit includes an inverter circuit having a plurality of legs and connected to the motor, and a plurality of current detection circuits corresponding to the plurality of legs and detecting the sink current of each corresponding leg. Each current detection circuit produces (1) a current detection signal proportional to its output voltage when the corresponding leg is in a stationary phase with the lower arm fixedly on, and (2) the corresponding leg. When the upper and lower arms are in complementary switching modulation phases, (2-i) during the low output period when the lower arm is on, a current detection signal proportional to the output voltage of the corresponding leg is generated. (2-ii) During the high output period when the upper arm is on, a current detection signal is generated based on the signal obtained in the immediately preceding low output period.

It should be noted that any combination of the above components or components and expressions of the present invention that are mutually replaced between methods, devices, systems, and the like are also effective as aspects of the present invention.

According to an aspect of the present invention, the sink current can be detected even in the modulated phase.

1 (a) and 1 (b) are diagrams for explaining a method of detecting a current of a motor. It is a figure explaining the current detection using the lower arm. It is a current waveform diagram in the 180 degree energization system. It is a figure which shows the state of the motor driver circuit in the period φ1 of FIG. 5 (a) and 5 (b) are diagrams showing the state of the motor driver circuit during the period φ2 of FIG. It is a circuit diagram of the motor driver circuit which concerns on embodiment. 7 (a) and 7 (b) are voltage and current waveform diagrams of two-phase modulation. It is an operation waveform figure of a motor driver circuit. It is an enlarged waveform diagram of the duration T ₁ of the FIG 8. It is an enlarged waveform diagram of the duration T ₂ of the FIG. It is a block diagram which shows the structural example of the current detection circuit. 12 (a) to 12 (c) are circuit diagrams showing a specific configuration example of the motor driver circuit. 13 (a) and 13 (b) are a partial circuit diagram of a motor driver circuit having a current limit function. It is a block diagram of the current detection circuit with a correction function. It is a circuit diagram which shows the specific configuration example of the current detection circuit with a current correction function. It is a figure explaining the operation of the current detection circuit of FIG. It is a circuit diagram which shows another configuration example of the current detection circuit with a current correction function. It is a figure which shows the hard disk apparatus which includes a motor driver circuit. It is a circuit diagram of the current detection circuit which concerns on modification 2. FIG.

(Outline of Embodiment)
One embodiment disclosed herein relates to a motor driver circuit. The motor driver circuit has a plurality of legs, and includes an inverter circuit connected to the motor and a plurality of current detection circuits corresponding to the plurality of legs. Each current detection circuit detects the sink current of the corresponding leg and (1) generates a current detection signal proportional to its output voltage when the corresponding leg is in a stationary phase with the lower arm fixedly on. And (2) when the corresponding leg is a modulation phase in which the upper and lower arms switch complementarily, (2-i) the output voltage of the corresponding leg during the low output period when the lower arm is on. (2-ii) During the high output period when the upper arm is on, the current detection signal is generated based on the signal obtained in the immediately preceding low output period.

In the modulation phase, high output periods with the upper arm on and low output periods with the lower arm on alternate. In each high output period, an amount of sink current close to the sink current flowing in the lower arm flows in the upper arm in the low output period immediately before that. Therefore, the sink current can be detected even in the modulated phase by estimating the amount of the sink current in the subsequent high output period based on the signal obtained in the low output period.

Each current detector (2-i) samples the output voltage of the corresponding leg during the low output period when the lower arm is on, and (2-ii) during the subsequent high output period, during the immediately preceding low output period. A current detection signal proportional to the sampled output voltage may be generated.

The output voltage may be sampled at the end of the low output period and held during the subsequent high output period.

Each current detection circuit may include a trackhold circuit that receives the output voltage of the corresponding leg and a conversion circuit that generates the current detection signal proportional to the output voltage of the trackhold circuit.

The conversion circuit may include a replica transistor having the same configuration as the lower arm of the corresponding leg and having a smaller size, and a feedback circuit that equalizes the voltage across the replica transistor to the output voltage of the trackhold circuit. The current detection signal may correspond to the detection current flowing through the replica transistor.

Each current detection circuit may include a conversion circuit that generates a current detection signal proportional to the output voltage of the corresponding leg, and a trackhold circuit that receives the output signal of the conversion circuit.

The conversion circuit may include a replica transistor having the same configuration as the lower arm of the corresponding leg and having a smaller size, and a feedback circuit that equalizes the voltage across the replica transistor to the output voltage of the corresponding leg. The current detection signal may correspond to the detection current flowing through the replica transistor.

The motor driver circuit may further include a turn-on detection circuit that detects the turn-on of the lower arm of the corresponding leg. The track hold circuit may be controlled based on the output of the turn-on detection circuit.

The turn-on detection circuit may detect the turn-on of the lower arm based on the gate voltage of the lower arm.

The motor driver circuit may further include a synthesis circuit that synthesizes a plurality of current detection signals generated by the plurality of current detection circuits, and a comparator that compares the output of the synthesis circuit with a threshold value. As a result, the current limit function can be provided.

Each current detection circuit may superimpose a slope signal on the current detection signal to correct the current detection signal during the high output period. Thereby, a more accurate current detection signal can be obtained in consideration of the influence of the current ripple caused by the PWM control.

The slope of the slope signal in a certain high output period is determined based on the value of the current detection signal at the start point of the low output period immediately before that and the value of the current detection signal at the end point of the previous low output period. You may.

The motor driver circuit may be integrally integrated on one semiconductor substrate. "Integrated integration" includes the case where all the components of the circuit are formed on the semiconductor substrate and the case where the main components of the circuit are integrated, and some resistors for adjusting the circuit constants. Or a capacitor or the like may be provided outside the semiconductor substrate. By integrating the circuits on one chip, the circuit area can be reduced and the characteristics of the circuit elements can be kept uniform.

(Embodiment)
FIG. 6 is a circuit diagram of the motor driver circuit 100 according to the embodiment. The motor driver circuit 100 is an IC (Integrated Circuit) including a controller 102, an inverter circuit 110, and a plurality of current detection circuits 120, which are integrated on one semiconductor substrate.

In the present embodiment, the motor 2 to be driven in the motor driver circuit 100 is a three-phase DC motor, three-phase coils _{L A,} L B, having a _{L C.}

The inverter circuit 110 has leg plurality (three-phase) 112_A, 112_B, a 112_C, multiple legs 112_A, 112_B, 112_C, the corresponding coil _{L A,} L B, are connected to the _{L C.} Each leg 112_ # (# = A, B, C) includes an upper arm MH # and a lower arm ML #. A, B, and C may be read as U, V, and W.

The controller 102 controls the inverter circuit 110 and controls the rotation of the motor 2. In the present embodiment, the controller 102 controls the motor 2 by a 180-degree energization method (sine wave drive method) by two-phase modulation. Since the configuration of the controller 102 and the specific control method are the same as those of a general motor driver, the description thereof will be omitted.

The plurality of current detection circuits 120_A, 120_B, 120_C are provided corresponding to the plurality of legs 112_A, 112_B, 112_C, and each current detection circuit 120_ # detects the sink current of the corresponding leg 112_ #.

In the present specification, it is _{assumed that the direction in which the output current I #} of each leg flows toward the motor 2 is positive. Each current detection circuit 120_ # (# = A, B, C) detects the sink current sucked by the corresponding leg 112_ #, that is, the negative output current I _{# , based on the output voltage V # of the corresponding leg 112_ #.} Then, a current detection signal S _{DET #} indicating the detected current amount is generated. The current detection signal S _{DET #} may be an analog voltage, an analog current signal, or a digital signal.

_{The application of the current detection signal S DET} generated by the current detection circuit 120 is not limited, and may be used, for example, for overcurrent protection or for generating a drive signal for the inverter circuit 110.

Leg 112_ # inverter circuit 110 takes a current source state current I _# is positive, either the current sink state current I _# is negative. The current detection circuit 120_ # outputs a _{non-zero current detection signal S DET #} indicating the amount of sink current when the corresponding leg 112_ # is in the current sink state. When the corresponding leg 112_ # is in the current source state, the current detection signal S _{DET #} is zero.

When performing two-phase modulation, each leg 112_ # is modulated by (1) a fixed phase in which the lower arm ML # is fixedly on, or (2) a modulation in which the upper arm MH # and the lower arm ML # are switched in a complementary manner. It becomes one of the phases.

(1) Current detection in the stationary phase Leg 112_ # focuses on the stationary phase leg 112_ #. In the stationary phase, the sink current I _# flows through the lower arm ML #, so the output voltage V _# is equal to the voltage drop of the lower arm ML #.
V _# = R _ON × I _#
R _ON is the on resistance of the lower arm ML #. In other words
I _# = V _# / R _ON
Therefore, the sink current I _# is proportional to the output voltage V _#.

Therefore, the corresponding current detection circuit 120_ # generates a current detection signal S _{DET # proportional to the output voltage V #.} k is a constant of proportionality.
S _{DET #} = k × V _# … (1)

(2) Current detection in the modulated phase The output voltage V _# of the leg of the modulated phase is pulse-modulated, and its time average value changes with time. In the modulation phase, the high output period t _{H in} which the upper arm MH # is on and the lower arm ML # is off and the low output period t _{L in} which the upper arm MH # is off and the lower arm ML # is on occur alternately. Then, the duty ratio t _H / (t _H + t _L ) changes with time.

(2-i) low output period _{t L} current detection current detection circuit 120_ # of, between the lower arm ML # is on the low output period _{t L,} as with the stationary phase, the output voltage V of the leg 112_ # _# is proportional to the current detection signal _{S DET #} generates the _(L).
S _{DET # (L)} = k × V _# … (2)

(2-ii) _{Current detection of high output period t H} The current detection circuit 120_ # detects current based on the signal obtained in the immediately preceding low output period _{during the high output period t H when the upper arm is on.} Generate the signal S _{DET # (H).}

For example, the current detection circuit 120_ # samples _{the output voltage V #} of the corresponding leg 112_ # during the low output period. The output voltage sampled during the low output period is referred to as _{V # (L).} Then, during the subsequent high output period, the current detection signal S _{DET # (H) proportional to the output voltage V # (L)} sampled in the immediately preceding low output period is generated.
S _{DET # (H)} = k × V _{# (L)} … (3)

In this embodiment, the output voltage V _# is sampled at the end of the low output period and held for the subsequent high output period. Then, the current detection circuit 120_ # outputs the current detection signal S _{DET # (H) corresponding to the held output voltage V # (L)} during the high output period.

That is, the current detection circuit 120_ # is in _{the hold mode during the period when the corresponding leg 112_ # outputs high (high output period t H} in the modulation phase), and the period when the corresponding leg 112_ # outputs low (fixed phase, modulation). The low output period t _L ) in the phase, the tracking mode is set.

Controller 102, to the current detection circuit 120_ #, supplies a control signal _{S CNT #} instructing an operation mode. Operation mode of the current detection circuit 120_ # is controlled based on the control signal _{S CNT #.} For example, the control signal _{S CNT #} is the corresponding period of leg 112_ # outputs a low, first level (for example high), the corresponding period of leg 112_ # outputs a high, and a second level (e.g., low).

The above is the configuration of the motor driver circuit 100. Next, the operation will be described. 7 (a) and 7 (b) are voltage and current waveform diagrams of two-phase modulation. The horizontal axis shows time as an electrical angle, and voltage and current are shown as normalized. In this example, the current waveform has a phase delay of 10 degrees with respect to the voltage waveform.

The output voltage V _{OUT in} FIG. 7A corresponds to the duty ratio, and the period of 0 is the fixed phase and the period of non-zero is the modulation phase. For example, focusing on the A phase, the period from 0 to 240 degrees is the modulation phase, and the period from 240 to 360 degrees is the stationary phase.

Focusing on the current waveform of FIG. 7B, the negative current is the sink current, which is the target of detection by the current detection circuit 120. Focusing on the A phase, a sink current flows through the leg 112_A of the A phase for a period of 0 to 10 degrees and 190 to 360 degrees, and a source current flows for a period of 10 to 190 degrees.

FIG. 8 is an operation waveform diagram of the motor driver circuit 100. A phase in FIG. 8, B-phase, and current waveforms of the C phase, the output voltage V _A of the A-phase _leg, and the A-phase, B-phase, the sum of the sink current C-phase are shown.

T ₁ of the FIG. 8, the sink current flows in the A-phase leg, and shows the period A phase leg is stationary phase. Of FIG. FIG. _{8T 2} shows a period in which a sink current flows through the legs 112_B and 112_C of the B phase and the C phase, the B phase is the stationary phase, and the C phase is the modulation phase.

Referring to FIG. 9, the sink current _I A _(I A <0) is described a current detection of the A phase leg 112_A flowing. Figure 9 is a waveform diagram of an enlarged period T ₁ of the FIG 8. The PWM frequency is 150 kHz and the PWM period is 6.6 μs. A phase is a stationary phase, the output voltage V _A of the A-phase is fixed at the low (i.e. 0V vicinity). In reality, the output voltage _VA is not completely zero, and a voltage drop of the A-phase low-side transistor MHA appears.
V _A = _{R ON} × _{I A}

Therefore the current detection circuit 120_A of the A-phase generates a current detection signal _{S DETA} proportional to the output voltage _{V A.}

FIG. 10 is an enlarged waveform diagram of _{the period T 2 of FIG.} Since the A-phase current is positive, it is a non-detection target.

B phase has a stationary phase, therefore, operates in the tracking mode the entire period of the PWM period, the current detection signal S _DETB proportional to the output voltage V _B is generated.

The C phase is a PWM phase. Low output period _{t L} of the PWM cycle is operated in the tracking mode, the current detection signal _{S DETC} proportional to the output voltage _{V C} is generated. On the other hand, in the PWM cycle, the _{hold mode is set during the high output period t H} , the signal obtained in the immediately preceding low output period t _{L is held} , and a constant current detection signal _SDETC is generated.

The value of the current detection signal S _DETC in high-output period t _H is smaller than the value corresponding to the actual C-phase current (indicated by the broken line in FIG. 10), the difference thereof becomes the detection error.

At the bottom of FIG. 10, it corresponds to the actual amount I _{TOTAL of the total of the three-phase sink currents and the total of the detection signals S DETA} , S _DET2 , and S _DET 3 of the three-phase current detection circuits 120_A, 120_B, 120_C. The total I _{TOTAL_DET of the} sink currents to be generated is shown.

The above is the operation of the motor driver circuit 100.

In the modulation phase, the high output period t _H with the upper arm on and the low output period t _L with the lower arm on occur alternately. In each high output period t _H , an amount of sink current close to the sink current flowing in the lower arm flows in the upper arm in the low output period t _{L immediately before that.} Therefore, the sink current can be detected also in the modulation phase by estimating the amount of the sink current in the subsequent high output period t _H based on the signal obtained in the low output period t _L.

As described above, the value of the current detection signal S _{DET #} obtained in hold mode in a high output period t _H, the value corresponding to the actual current, but is a detection error exists, the detection error is corrected later Can be suppressed by.

Also during the high output period t _H, to regeneration in the upper, a case where the energy decreases are almost. Therefore, when the current detection signal S _DET is used for the current limit, there is no problem even if it is used as it is without correction.

The present invention extends to various devices and methods grasped as a block diagram or a circuit diagram of FIG. 6 or derived from the above description, and is not limited to a specific configuration. Hereinafter, more specific configuration examples and examples will be described not for narrowing the scope of the present invention but for helping to understand the essence and operation of the invention and clarifying them.

FIG. 11 is a block diagram showing a configuration example of the current detection circuit 120_ #. Here, the A phase is shown as an example, but the B phase and the C phase are also configured in the same manner.

The current detection circuit 120_ # includes a track hold circuit 122 and a conversion circuit 124. Track and hold circuit 122, when the control signal _{S CNT #} is in the first level (for example high), and passes the output voltage _{V A} of the corresponding leg 112_ #, control signal _{S CNT #} is the second level (e.g., low) when, holds the output voltage _{V a} of the corresponding leg 112_ #. For example, the track hold circuit 122 includes the switch SW1 and the capacitor C1, and the switch SW1 is turned on during the period when _{the control signal S CNT #} is high and turned off during the period when _{the control signal S CNT # is low.}

Conversion circuit 124 generates a current detection signal _{S DET #} proportional to the output voltage _{V A} 'of the track and hold circuit 122.

According to the current detection circuit 120_ # in FIG. 11, in response to the control signal S _{CNT #,} it can switch its operation mode between the tracking mode and the hold mode.

The controller 102 includes a turn-on detection circuit 104_ #. Turn detecting circuit 104_ # detects the transistor ML # turn of the lower arm, which generates a control signal _{S CNT #} instructing an operation mode of the current detection circuit 120_ #. For example turn detecting circuit 104_ # may generate a control signal _{S CNT #} based on the gate voltage _{V LG #} transistor ML #. Or transistor ML # on, it may generate a control signal S _{CNT #} according to the control signal S _L for instructing off.

12 (a) to 12 (c) are circuit diagrams showing a specific configuration example of the motor driver circuit 100. As shown in FIG. 12A, the conversion circuit 124 is _{a voltage / current (V / I) converter that converts the voltage VA} into a current I _DET proportional to the voltage VA, and is a replica transistor M11, a feedback circuit 125, and a current. Includes mirror circuit 126. The replica transistor M11 has the same configuration as the lower arm transistor ML #, and its size (W / L) is smaller than that of the transistor ML #. The same high level gate voltage as that of the transistor ML # is applied to the gate of the replica transistor M11.

The feedback circuit 125, the voltage across the replica transistor M11 (drain-source voltage) is equal to the output voltage _{V A} of the track and hold circuit 122 '. The feedback circuit 125 includes a transistor M12 and an operational amplifier OA1.

When the size ratio of the transistor ML # and the replica transistor M11 is M: N (M> N), a _{current I M11 that} is M / N times the _{sink current I # flowing through the transistor MLA flows through the replica transistor M11.}

The current mirror circuit 126 includes transistors M13 and M14, turns back _{the current IM11} on the input side, and outputs the _{detected current IDETA.}

As shown in FIG. 12A, the detected current I _DETA itself may be used as the current detection signal S _DETA. Alternatively, as shown in FIG. 12B, a resistor R11 may be provided on the path of the _{detection current I DETA} , and the voltage drop generated in the resistor R11 may be used as the _{detection signal S DETA.} Alternatively, as shown in FIG. 12C, an A / D converter 128 that converts the voltage drop of the detection resistor R11 into a digital value may be further provided, and the digital signal generated by the A / D converter 128 may be used as the _{detection signal S DET.} ..

Return to FIG. 12 (a). The turn-on detection circuit 104 includes a comparator 106. The comparator 106, the gate voltage _{V LG} transistor ML # of the lower arm, compared to the threshold voltage _{V ON,} when the V _{LG> V ON,} asserts the detection signal _{S ON} indicating the turn-on of transistor MLA of the lower arm To do. Turn detecting circuit 104 further includes a delay circuit 107 for delaying the detection signal _{S ON,} as the control signal _{S CNT #} the output of the delay circuit 107 may control the operation mode of the current detection circuit 120_ #. The delay circuit 107 may be omitted.

_{The current detection signal S DET} obtained by the current detection circuit 120 may be used for the current limit. 13 (a) and 13 (b) are a partial circuit diagram of the motor driver circuit 100 having a current limit function.

The motor driver circuit 100 of FIG. 13A further includes a synthesis circuit 130 and a comparator 132. The synthesis circuit 130 synthesizes the three-phase current detection signals I _DETA , I _DETB , and I _DETC . The synthesis circuit 130 includes a resistor R11 and switches SW1A to SW1C. Three-phase current detection signal _{S DETA,} S _DETB, the current signal is _{S DETC I DETA, I DETB,} I DETC merges via a switch SWA～SWC, flows through the resistor R12. _{A voltage drop V DET_TOTAL} corresponding to the sum of the current detection signals I _DETA , I _DETB , and I _DETC is generated in the resistor R12. This voltage drop V _{DET_TOTAL} indicates the total of the three-phase sink currents.

When a certain phase # is in the current source state, the output of the current detection circuit 120_ # shows a value irrelevant to the sink current. Therefore, the switch SW # is turned off for the phase # in the current source state.

The comparator 132 compares the output V _{DET_TOTAL} of the synthesis circuit 130 with the threshold value V _CL, and generates a current limit signal S _{CL indicating the comparison result.} For example, the controller 102 changes the state of the inverter circuit 110 so that the current flowing through the motor decreases in response to the assertion of the _{current limit signal SCL.} This makes it possible to realize circuit protection.

In FIG. 13B, the synthesis circuit 130 is an adder 131 that adds _{digital current detection signals D DETA} , D _DETB , and D _DETC. The digital comparator 134 compares the output D _{DET_TOTAL} of the adder 131 with the threshold D _CL of the current limit, and asserts the _{current limit signal S CL} when D _{DET_TOTAL} > D _CL.

Subsequently, the correction of the current detection signal S _{DET will be described.} As described above, there is a detection error between the current detection signal S _DET in high-output period t _H of the modulation phase, the actual sink current. When the current detection signal S _DET is used for the current limit, this error does not matter so much, but when the current detection value is used for the rotation control (vector control) of the motor, it is preferable to correct this error. FIG. 14 is a block diagram of the current detection circuit 120 with a correction function.

The current detection circuit 120 includes a correction circuit 140 in addition to the track hold circuit 122 and the conversion circuit 124. Correction circuit 140, during the high output period _{t H,} superimposes the slope signal _{S SLOPE} to the current detection signal _{S DET,} it corrects the current detection signal _{S DET.}

The correction circuit 140 includes a slope signal generation circuit 142 and an adder 144. _{The slope signal generation circuit 142 generates the slope signal S SLOPE} based on the slope of the current ripple caused by the PWM control.

_{The slope signal generation circuit 142 adjusts} the slope of the slope signal S SLOPE based on the slope of the ripple of the actual sink current.

The adder 144 superimposes the slope signal S _SLOPE on the current detection signal S _DET , and outputs the corrected current detection signal S _{DET_CMP.} The adder 144 in the present specification includes a subtractor.

FIG. 15 is a circuit diagram showing a specific configuration example of the current detection circuit 120 with a current correction function. Although FIG. 15 shows only the portion related to the A phase, the B phase and the C phase are similarly configured.

The current mirror circuit 126 includes two output paths. _{The detection current I DETA'flowing} through the transistor M15 is converted into a voltage by the resistor R13 and converted into a digital detection value D _DETA ' by the A / D converter 128. The A / D converter 128 converts the voltage drop of the resistor R13 into a digital value each time the output level (high / low) of the corresponding leg 112_A is switched, in other words, at the start and end points of each low output period. To do.

The slope signal generation circuit 142 includes a waveform generator 150, a D / A converter 152, and a V / I converter 154. Waveform generator 150, based on the output _{D DETA} of the A / D converter 128 ', a gradient of the slope signal _{S SLOPE} in high-output period _{t H} is estimated as follows.

When the waveform generator 150 estimates the slope of the slope signal S _{SLOPE in the high output period t H} , the value D of the current detection signal S _DET obtained at the start point (t ₂ ) of the low output period t _{L immediately before that. Using DETA} '(t ₂ ) and the current detection signal S _DET value D _DETA ' obtained at the end point (t ₁ ) of the previous low output period t _L , based on the following equation. Determine the slope α.
α = {D _DETA '(t ₁ ) -D _DETA '(t ₂ )} / (t _1- t ₂ )

Then during the high output period _{t H,} the digital slope signal having a slope α determined (the ramp _signal) to generate the _{D SLOPEA.} The D / A converter 152 converts the digital slope signal D _SLPEA into the slope signal I _SLPEA (S _SLPEA ) of the current signal. The D / A converter 152 and the V / I converter 154 may be composed of a current output D / A converter.

_{The adder 144 subtracts the slope signal I SLPEA} , which is a current signal, from the current detection signal I _DETA , which is a current signal, and outputs the corrected current detection signal I _{DETA_CMP.}

FIG. 16 is a diagram illustrating the operation of the current detection circuit 120 of FIG. According to the current detecting circuit 120 estimates the slope of the sink current _{I A} in high-output period _{t H} of the current detection circuit 120 performs the holding operation, by superimposing the correction signal, the error is small the current detection signal _{I DETA_CMP} Can be generated.

FIG. 17 is a circuit diagram showing another configuration example of the current detection circuit 120 having a current correction function. The A / D converter 128 continues to capture the _{current detection signal D DETA'at} a predetermined sampling rate during both the _{high output period t H} and the low output period t _L. The waveform generator 150 calculates the slope α based on the current detection signals D _DETA '(t ₁ ) and D _DETA '(t _{2 ) obtained at the timings t 1} and t _{2 , and obtains the digital slope signal D SLOPEA} . Generate. _{The adder 144 adds the current detection signal D DETA} ', which is the output of the A / D converter 128, and the slope signal D _SLOPEA , and outputs the corrected current detection signal D _{DETA_CMP.}

(Use)
The application of the motor driver circuit 100 is not particularly limited, but it can be used for driving a spindle motor such as a hard disk device, a DVD (Digital Versatile Disc) drive, or a Blu-ray (registered trademark) disk drive.

FIG. 18 is a diagram showing a hard disk device 300 including a motor driver circuit 100. The hard disk device 300 includes a platter 902, a swing arm 904, a head 906, a spindle motor 910, a voice coil motor 912, and a motor driver 920. The motor driver 920 drives the spindle motor 910 and the voice coil motor 912. The motor driver 920 can be configured using the architecture of the motor driver circuit 100 described above.

The present invention has been described above based on the embodiments. This embodiment is an example, and it will be understood by those skilled in the art that various modifications are possible for each of these components and combinations of each processing process, and that such modifications are also within the scope of the present invention. is there. Hereinafter, such a modification will be described.

(Modification example 1)
In FIG. 10, the value of the current detection signal at the timing of the end point of a certain low output period t _{L is held as the current detection signal in the subsequent high output period t H} , but this is not the case. For example, the value of the current detection signal at the timing of the start point or the midpoint of a certain low output period t _L may be held as the current detection signal in the _{subsequent high output period t H.}

(Modification 2)
FIG. 19 is a circuit diagram of the current detection circuit 120_A according to the second modification. In this modification, the track hold circuit 123 is provided after the conversion circuit 124. The circuit configuration of the track hold circuit 123 in this case may be determined according to the type of _{the current detection signal S DETA generated by the conversion circuit 124.} For example, if the current detection signal S _DETA is a voltage signal, the track hold circuit 123 can be configured in the same manner as the track hold circuit 122 of FIG. For example, if the current detection signal S _DETA is a digital signal, the track hold circuit 123 can be configured with a memory.

(Modification example 3)
Although the target is a three-phase motor, the present invention is also applicable to a single-phase motor. In this case, the inverter circuit 110 may be replaced with a single-phase inverter (H-bridge circuit).

2 Motor 100 Motor driver circuit 102 Controller 110 Inverter circuit 112 Leg 120 Current detection circuit 122, 123 Track hold circuit 124 Conversion circuit 125 Feedback circuit 126 Current mirror circuit 128 A / D converter 130 Synthesis circuit 132 Comparator 104 Turn-on detection circuit 140 Correction circuit 142 Slope signal generation circuit 144 Adder 150 Waveform generator 152 D / A converter 154 V / I converter

Claims (15)

An inverter circuit that has multiple legs and is connected to a motor,
A plurality of current detection circuits corresponding to the plurality of legs and detecting the sink current of each corresponding leg, and
With
Each current detection circuit
(1) When the corresponding leg is in a stationary phase with the lower arm fixedly on, it produces a current detection signal proportional to its output voltage.
(2) When the corresponding leg is a modulation phase in which the upper arm and the lower arm switch complementarily, (2-i) the output voltage of the corresponding leg during the low output period when the lower arm is on. Generate the proportional current detection signal, and (2-ii) generate the current detection signal based on the signal obtained in the immediately preceding low output period during the high output period when the upper arm is on. A motor driver circuit characterized by. Each current detection circuit
(2-i) During the low output period when the lower arm is on, the output voltage of the corresponding leg is sampled and
(2-ii) The motor driver circuit according to claim 1, wherein the current detection signal proportional to the output voltage sampled in the immediately preceding low output period is generated during the subsequent high output period. The motor driver circuit according to claim 2, wherein the output voltage is sampled at the timing of the end point of the low output period and held during the subsequent high output period. Each current detection circuit
A track hold circuit that receives the output voltage of the corresponding leg, and
A conversion circuit that generates the current detection signal proportional to the output voltage of the track hold circuit, and a conversion circuit.
The motor driver circuit according to claim 1, wherein the motor driver circuit comprises. The conversion circuit
With a replica transistor that has the same configuration as the lower arm of the corresponding leg and is smaller in size,
A feedback circuit that makes the voltage across the replica transistor equal to the output voltage of the track hold circuit.
Including
The motor driver circuit according to claim 4, wherein the current detection signal corresponds to a detection current flowing through the replica transistor. Each current detection circuit
A conversion circuit that generates the current detection signal proportional to the output voltage of the corresponding leg, and
A track hold circuit that receives the output signal of the conversion circuit and
The motor driver circuit according to claim 1, wherein the motor driver circuit comprises. The conversion circuit
With a replica transistor that has the same configuration as the lower arm of the corresponding leg and is smaller in size,
A feedback circuit that equalizes the voltage across the replica transistor with the output voltage of the corresponding leg.
The motor driver circuit according to claim 6, wherein the current detection signal corresponds to a detection current flowing through the replica transistor. It also has a turn-on detection circuit that detects the turn-on of the lower arm of the corresponding leg.
The motor driver circuit according to claim 4 or 6, wherein the track hold circuit is controlled based on the output of the turn-on detection circuit. The motor driver circuit according to claim 8, wherein the turn-on detection circuit detects the turn-on of the lower arm based on the gate voltage of the lower arm. A synthesis circuit that synthesizes a plurality of current detection signals generated by the plurality of current detection circuits, and a synthesis circuit that synthesizes the plurality of current detection signals.
A comparator that compares the output of the synthesis circuit with the threshold value,
The motor driver circuit according to any one of claims 1 to 9, further comprising. The motor driver according to any one of claims 1 to 10, wherein each current detection circuit superimposes a slope signal on the current detection signal during the high output period to correct the current detection signal. circuit. The slope of the slope signal in a certain high output period includes the value of the current detection signal at the start point of the low output period immediately before that, and the value of the current detection signal at the end point of the low output period immediately before. The motor driver circuit according to claim 11, wherein the motor driver circuit is determined based on the above. The motor driver circuit according to any one of claims 1 to 12, wherein the motor driver circuit is integrally integrated on one semiconductor substrate. Spindle motor, which is a three-phase motor,
The motor driver circuit according to any one of claims 1 to 13 for driving the spindle motor.
A hard disk device characterized by being equipped with. It ’s a motor drive method.
A step of supplying electric power to the motor by an inverter circuit having a plurality of legs,
The step of detecting the sink current flowing through each of the plurality of legs, and
With
The step of detecting the sink current is
(1) When the corresponding leg is in the stationary phase with the lower arm fixedly on, the step of generating a current detection signal proportional to the output voltage, and
(2) When the corresponding leg is a modulation phase in which the upper arm and the lower arm switch in a complementary manner, (2-i) the output voltage of the corresponding leg during the low output period when the lower arm is on. A step of generating the proportional current detection signal and (2-ii) generating the current detection signal based on the signal obtained in the immediately preceding low output period during the high output period when the upper arm is on. When,
A driving method characterized by being provided with.

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