JP2021034020A5 - - Google Patents

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JP2021034020A5
JP2021034020A5 JP2020104328A JP2020104328A JP2021034020A5 JP 2021034020 A5 JP2021034020 A5 JP 2021034020A5 JP 2020104328 A JP2020104328 A JP 2020104328A JP 2020104328 A JP2020104328 A JP 2020104328A JP 2021034020 A5 JP2021034020 A5 JP 2021034020A5
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JP7400169B2 (ja
JP2021034020A (ja
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JP2020104328A 2019-08-15 2020-06-17 ワークロードのスタティックマッピングの順不同にパイプライン化された実行を可能にする方法及び装置 Active JP7400169B2 (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US16/542,012 2019-08-15
US16/542,012 US11231963B2 (en) 2019-08-15 2019-08-15 Methods and apparatus to enable out-of-order pipelined execution of static mapping of a workload

Publications (3)

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JP2021034020A JP2021034020A (ja) 2021-03-01
JP2021034020A5 true JP2021034020A5 (https=) 2022-06-21
JP7400169B2 JP7400169B2 (ja) 2023-12-19

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JP2020104328A Active JP7400169B2 (ja) 2019-08-15 2020-06-17 ワークロードのスタティックマッピングの順不同にパイプライン化された実行を可能にする方法及び装置

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US (2) US11231963B2 (https=)
JP (1) JP7400169B2 (https=)
KR (1) KR102684511B1 (https=)
CN (2) CN112395010A (https=)
DE (1) DE102020119519A1 (https=)
TW (1) TWI802800B (https=)

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Publication number Priority date Publication date Assignee Title
US10901657B2 (en) * 2018-11-29 2021-01-26 International Business Machines Corporation Dynamic write credit buffer management of non-volatile dual inline memory module
US11231963B2 (en) 2019-08-15 2022-01-25 Intel Corporation Methods and apparatus to enable out-of-order pipelined execution of static mapping of a workload
US11599780B2 (en) * 2020-03-02 2023-03-07 Apple Inc. Asynchronous task execution for neural processor circuit
US11875247B1 (en) * 2020-06-18 2024-01-16 Amazon Technologies, Inc. Input batching with serial dynamic memory access
US11704058B2 (en) * 2020-07-28 2023-07-18 Samsung Electronics Co., Ltd. Systems and methods for resource-based scheduling of commands
CN112003846B (zh) * 2020-08-13 2023-02-03 广州市百果园信息技术有限公司 一种信用阈值的训练、ip地址的检测方法及相关装置
US12223174B2 (en) * 2020-10-26 2025-02-11 Google Llc Modulating credit allocations in memory subsystems
US11620159B2 (en) 2021-04-23 2023-04-04 Samsung Electronics Co., Ltd. Systems and methods for I/O command scheduling based on multiple resource parameters
US12001701B2 (en) * 2022-01-26 2024-06-04 Western Digital Technologies, Inc. Storage biasing for solid state drive accelerators

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US5418953A (en) * 1993-04-12 1995-05-23 Loral/Rohm Mil-Spec Corp. Method for automated deployment of a software program onto a multi-processor architecture
JP3892829B2 (ja) * 2003-06-27 2007-03-14 株式会社東芝 情報処理システムおよびメモリ管理方法
JP5349515B2 (ja) * 2011-03-14 2013-11-20 株式会社東芝 バッファ管理装置、バッファ管理方法及び記憶装置
US9395990B2 (en) * 2013-06-28 2016-07-19 Intel Corporation Mode dependent partial width load to wider register processors, methods, and systems
KR102459716B1 (ko) * 2014-07-30 2022-10-28 모비디어스 리미티드 저전력 컴퓨테이셔널 이미징
US10002099B2 (en) * 2014-11-13 2018-06-19 Cavium, Inc. Arbitrated access to resources among multiple devices
US11153223B2 (en) * 2016-04-07 2021-10-19 International Business Machines Corporation Specifying a disaggregated compute system
US10289752B2 (en) * 2016-12-12 2019-05-14 Intel Corporation Accelerator for gather-update-scatter operations including a content-addressable memory (CAM) and CAM controller
GB2569275B (en) * 2017-10-20 2020-06-03 Graphcore Ltd Time deterministic exchange
GB2569271B (en) * 2017-10-20 2020-05-13 Graphcore Ltd Synchronization with a host processor
US10649813B2 (en) * 2018-03-29 2020-05-12 Intel Corporation Arbitration across shared memory pools of disaggregated memory devices
US11669372B2 (en) * 2018-12-13 2023-06-06 Intel Corporation Flexible allocation of compute resources
US11231963B2 (en) 2019-08-15 2022-01-25 Intel Corporation Methods and apparatus to enable out-of-order pipelined execution of static mapping of a workload

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