JP2021015925A - Multilayer ceramic capacitor - Google Patents

Abstract

To provide a multilayer ceramic capacitor exhibiting excellent durability and excellent dielectric characteristics even when a dielectric layer becomes thinner and a voltage of high electric field intensity is applied.SOLUTION: A multilayer ceramic capacitor 10 includes a multilayer body 12. The multilayer body 12 includes an inner layer portion 16 including from an inner electrode layer 22 located closest to a first main surface 12a side to an inner electrode layer 22 located closest to a second main surface 12b side, a first main surface side outer layer portion 18a located on the first main surface 12a side of the inner layer portion 16, and a second main surface side outer layer portion 18b located on the second main surface 12b side of the inner layer portion 16. Only in the inner electrode layer 22 in contact with the first and second main surface side outer layer portions 18a and 18b, Cu is solved in a solid solution of Ni of the inner electrode layer 22. When a total of Ni and Cu in the inner electrode layer 22 in contact with the first and second main surface side outer layer portions 18a and 18b is set to be 100 mol, a content of Cu is equal to or more than 0.1 mol and equal to or less than 8.61 mol.SELECTED DRAWING: Figure 2

Description

The present invention relates to monolithic ceramic electronic components, especially monolithic ceramic capacitors.

In recent years, with the progress of electronics technology, multilayer ceramic capacitors are required to be smaller and have a larger capacity. In order to meet these requirements, the dielectric layer constituting the multilayer ceramic capacitor is being thinned. However, when the dielectric layer is thinned, the electric field strength applied to each layer becomes relatively high. Therefore, it is required to improve durability and reliability when a voltage is applied.

The multilayer ceramic capacitor is formed on, for example, a laminate having a plurality of laminated dielectric layers and a plurality of internal electrodes formed along the interface between the dielectric layers, and an outer surface of the laminate. , A monolithic ceramic capacitor including a plurality of external electrodes electrically connected to an internal electrode is known (see Patent Document 1). Further, in the multilayer ceramic capacitor of Patent Document 1, a capacitor using Ni as a main component is disclosed as an internal electrode.

Japanese Unexamined Patent Publication No. 11-283867

However, the multilayer ceramic capacitor of Patent Document 1 provided with an internal electrode using Ni as a main component still has durability when a high voltage is applied in order to meet the recent demand for miniaturization and large capacity. There is a problem of inadequacy.

Therefore, a main object of the present invention is to provide a monolithic ceramic capacitor that exhibits excellent durability and good dielectric properties even when the dielectric layer is thinner and a voltage with high electric field strength is applied. It is to be.

The multilayer ceramic capacitor according to the present invention includes a plurality of laminated dielectric layers, and has a first main surface and a second main surface facing the stacking direction and a first surface facing the width direction orthogonal to the stacking direction. A laminated body including the side surface and the second side surface, and a first end face and a second end face facing each other in the length direction orthogonal to the stacking direction and the width direction, and a plurality of dielectric layers are alternately laminated. , A first internal electrode layer exposed on the first end face, a second internal electrode layer exposed on the second end face, and a first arranged on the first end face connected to the first internal electrode layer. In a multilayer ceramic capacitor having an external electrode of 1 and a second external electrode connected to a second internal electrode layer and arranged on a second end face, the laminate is the first in the lamination direction. With an inner layer portion including the first internal electrode layer or the second internal electrode layer located on the main surface side of the capacitor to the first internal electrode layer or the second internal electrode layer located on the second main surface side. , The first main surface side formed from a plurality of dielectric layers located on the first main surface side and located between the first main surface and the outermost surface of the inner layer portion on the first main surface side. A second layer formed of a plurality of dielectric layers located on the outer layer portion and the second main surface side and located between the second main surface and the outermost surface of the inner layer portion on the second main surface side. A first formed of a plurality of dielectric layers located on the main surface side outer layer portion and the first side surface side and located between the first side surface and the outermost surface of the first side surface side inner layer portion. A second side surface formed from a plurality of dielectric layers located on the side surface side outer layer portion and the second side surface side and located between the second side surface and the outermost surface of the second side surface side inner layer portion. Cu is hardened only in the first inner electrode layer or the second inner electrode layer of the inner layer portion which has a side outer layer portion and is in contact with the first main surface side outer layer portion and the second main surface side outer layer portion. The first internal electrode layer or the second internal electrode layer (the first internal where Cu is melted), which is melted and is in contact with the first main surface side outer layer portion and the second main surface side outer layer portion. This is a multilayer ceramic capacitor in which the Cu content in the electrode layer or the second internal electrode layer) is 0.1 mol or more and 8.61 mol or less when the total of Ni and Cu is 100 mol.

The multilayer ceramic capacitor according to the present invention includes a plurality of laminated dielectric layers, and has a first main surface and a second main surface facing the stacking direction and a first surface facing the width direction orthogonal to the stacking direction. A laminate including the side surfaces and the second side surface, and the first end face and the second end face facing each other in the length direction orthogonal to the stacking direction and the width direction, and the plurality of dielectric layers are alternately laminated. , A first internal electrode layer exposed on the first end face, a second internal electrode layer exposed on the second end face, and a first surface connected to the first internal electrode layer and arranged on the first end face. In a multilayer ceramic capacitor having an external electrode of 1 and a second external electrode connected to a second internal electrode layer and arranged on a second end face, the laminate is the first in the lamination direction. With an inner layer portion including from the first internal electrode layer or the second internal electrode layer located on the main surface side of the above to the first internal electrode layer or the second internal electrode layer located on the most second main surface side. , The first main surface side formed from a plurality of dielectric layers located on the first main surface side and located between the first main surface and the outermost surface of the inner layer portion on the first main surface side. A second layer formed of a plurality of dielectric layers located on the outer layer portion and the second main surface side and located between the second main surface and the outermost surface of the inner layer portion on the second main surface side. A first formed of a plurality of dielectric layers located on the main surface side outer layer portion and the first side surface side and located between the first side surface and the outermost surface of the first side surface side inner layer portion. A second side surface formed from a plurality of dielectric layers located on the side surface side outer layer portion and the second side surface side and located between the second side surface and the outermost surface of the second side surface side inner layer portion. A region having a side outer layer portion and 5 μm in the inner electrode layer side from the outermost surface of the inner layer portion on the first side surface side in the inner layer portion and the innermost layer portion on the second side surface side. Cu is dissolved only in the first internal electrode layer or the second internal electrode layer in the region 5 μm on the internal electrode layer side in the width direction from the surface, and the inner layer portion on the first side surface side. The first in the region containing 5 μm on the inner electrode layer side from the outermost surface in the width direction and in the region containing 5 μm on the inner electrode layer side in the width direction from the outermost surface of the inner layer portion on the second side surface side. The content of Cu in the internal electrode layer and the second internal electrode layer (the first internal electrode layer in which Cu is dissolved or the second internal electrode layer) is 100 mol when the total of Ni and Cu is 100 mol. , 0.11 mol or more and 8.44 mol or less, which is a multilayer ceramic capacitor.

The multilayer ceramic capacitor according to the present invention includes a plurality of laminated dielectric layers, and has a first main surface and a second main surface facing the stacking direction and a first surface facing the width direction orthogonal to the stacking direction. A laminate including the side surfaces and the second side surface, and the first end face and the second end face facing each other in the length direction orthogonal to the stacking direction and the width direction, and the plurality of dielectric layers are alternately laminated. , A first internal electrode layer exposed on the first end face, a second internal electrode layer exposed on the second end face, and a first surface connected to the first internal electrode layer and arranged on the first end face. In a multilayer ceramic capacitor having one external electrode and a second external electrode connected to a second internal electrode and disposed on a second end face, the laminate is the first in the lamination direction. An inner layer portion including a first internal electrode layer or a second internal electrode layer located on the main surface side to a first internal electrode layer or a second internal electrode layer located on the second main surface side. A first main surface side outer layer formed from a plurality of dielectric layers located on the first main surface side and between the first main surface and the outermost surface of the inner layer portion on the first main surface side. A second main surface formed from a plurality of dielectric layers located on the second main surface side and between the second main surface and the outermost surface of the inner layer portion on the second main surface side. A first side surface formed from a plurality of dielectric layers located on the surface side outer layer portion and the first side surface side and located between the first side surface and the outermost surface of the first side surface side inner layer portion. A second side surface side formed from a plurality of dielectric layers located on the side outer layer portion and the second side surface side and located between the second side surface and the outermost surface of the inner layer portion on the second side surface side. The first inner electrode layer or the second inner electrode layer of the inner layer portion which has an outer layer portion and is in contact with the first main surface side outer layer portion and the second main surface side outer layer portion, and the second inner layer portion. Within the region containing 5 μm from the outermost surface of the inner layer portion on the side surface side of 1 toward the inner electrode layer side and the region containing 5 μm from the outermost surface of the inner layer portion on the second side surface side in the width direction. Cu is dissolved only in the first internal electrode layer or the second internal electrode layer, and the first internal electrode is in contact with the first main surface side outer layer portion and the second main surface side outer layer portion. When the total of Ni and Sn in the layer and the second internal electrode layer is 100 mol, the Sn content is 0.1 mol or more and 8.61 mol or more, from the outermost surface of the inner layer portion on the first side surface side. The first interior in the region containing 5 μm on the inner electrode layer side in the width direction and in the region containing 5 μm on the inner electrode layer side in the width direction from the outermost surface of the inner layer portion on the second side surface side. A multilayer ceramic capacitor having a Cu content of 0.11 mol or more and 8.44 mol or less when the total of Ni and Cu in the electrode layer and the second internal electrode layer is 100 mol.

According to the multilayer ceramic capacitor according to the present invention, Cu is applied only to the first internal electrode layer or the second internal electrode layer of the inner layer portion in contact with the first main surface side outer layer portion and the second main surface side outer layer portion. Is solid-dissolved, and the first internal electrode layer or the second internal electrode layer (the first in which Cu is solid-dissolved) of the inner layer portion in contact with the first main surface side outer layer portion and the second main surface side outer layer portion. The Cu content in the internal electrode layer or the second internal electrode layer) is 0.1 mol or more and 8.61 mol or less when the total of Ni and Cu is 100 mol. Therefore, the above-mentioned predetermined internal electrode layer Cu is dissolved in Ni, and a Ni—Cu alloy is formed at a predetermined position on the internal electrode layer. As a result, the difference in diffusion coefficient between the internal electrode layer and the external electrode can be reduced. Therefore, it is possible to suppress the formation of voids at the joint between the external electrode and the internal electrode layer caused by the difference in diffusion coefficient between the internal electrode layer and the external electrode when the external electrode is baked. In the subsequent plating process in the manufacturing process of ceramic capacitors and in the environment where ceramic capacitors are used, deterioration of insulation resistance due to infiltration of plating solution and invasion of moisture can be suppressed, and the high temperature load life of multilayer ceramic capacitors is improved. It becomes possible.

According to the multilayer ceramic capacitor according to the present invention, the inner layer portion in the region in which 5 μm is formed in the inner electrode layer side in the width direction from the outermost surface of the inner layer portion on the first side surface side in the inner layer portion and the inner layer portion on the second side surface side. Cu is solid-dissolved only in the first internal electrode layer or the second internal electrode layer in the region 5 μm on the internal electrode side from the outermost surface in the width direction, and the inner layer on the first side surface side. The first in the region containing 5 μm on the inner electrode layer side in the width direction from the outermost surface of the portion and in the region containing 5 μm on the inner electrode layer side in the width direction from the outermost surface of the inner layer portion on the second side surface side. The Cu content when the total of Ni and Cu in the internal electrode layer 1 and the second internal electrode layer (the first internal electrode layer in which Cu is solidified or the second internal electrode layer) is 100 mol. Since it is 0.11 mol or more and 8.44 mol or less, Cu is solidified in Ni of the above-mentioned predetermined internal electrode, and a Ni—Cu alloy is formed at a predetermined position of the internal electrode layer. Since the difference in diffusion coefficient between the internal electrode layer and the external electrode can be reduced, the bonding between the external electrode and the internal electrode layer caused by the difference in diffusion coefficient between the internal electrode and the external electrode when the external electrode is baked. By making it possible to suppress the formation of voids in the portions, the insulation resistance due to the infiltration of the plating solution and the intrusion of moisture in the subsequent plating process in the manufacturing process of the ceramic capacitor and the usage environment of the ceramic capacitor Deterioration can be suppressed, and the high-temperature load life of the multilayer ceramic capacitor can be improved.

According to the multilayer ceramic capacitor according to the present invention, the first inner electrode layer or the second inner electrode layer and the inner layer of the inner layer portion in contact with the first main surface side outer layer portion and the second main surface side outer layer portion. In the region containing 5 μm from the outermost surface of the inner layer portion on the first side surface side toward the inner electrode side in the width direction, and 5 μm in the width direction from the outermost surface of the inner layer portion on the second side surface side. Cu is solid-dissolved only in the first internal electrode layer or the second internal electrode layer in the region, and is in contact with the first main surface side outer layer portion and the second main surface side outer layer portion. When the total of Ni and Sn in the inner electrode layer and the second inner electrode layer is 100 mol, the Sn content is 0.1 mol or more and 8.61 mol or more, which is the maximum of the inner layer portion on the first side surface side. The first interior in the region containing 5 μm on the inner electrode layer side in the width direction from the surface and in the region containing 5 μm on the inner electrode layer side in the width direction from the outermost surface of the inner layer portion on the second side surface side. When the total of Ni and Cu in the electrode layer and the second internal electrode layer is 100 mol, the Cu content is 0.11 mol or more and 8.44 mol or less. Therefore, Cu is solidified in Ni of the above-mentioned predetermined internal electrode. As a result, the Ni—Cu alloy is formed at a predetermined position on the internal electrode layer, and as a result, the difference in diffusion coefficient between the internal electrode layer and the external electrode can be reduced. Therefore, it is possible to suppress the formation of voids at the joint between the external electrode and the internal electrode layer caused by the difference in diffusion coefficient between the internal electrode layer and the external electrode when the external electrode is baked, and the subsequent ceramic. In the plating process of the capacitor manufacturing process and the usage environment of the ceramic capacitor, it is possible to suppress the deterioration of the insulation resistance due to the infiltration of the plating solution and the invasion of moisture, and it is possible to improve the high temperature load life of the multilayer ceramic capacitor. Become.

According to the present invention, it is possible to improve the high temperature load life by suppressing the deterioration of the insulation resistance due to the infiltration of the plating solution and the invasion of moisture in the plating process in the manufacturing process of the ceramic capacitor and the environment in which the ceramic capacitor is used. A possible monolithic ceramic capacitor is obtained.

The above-mentioned object, other object, feature and advantage of the present invention will be further clarified from the description of the embodiment for carrying out the following invention with reference to the drawings.

It is an external perspective view which shows an example of the multilayer ceramic capacitor which concerns on this invention. It is sectional drawing in line II-II of FIG. 1 which shows the multilayer ceramic capacitor which concerns on this invention. FIG. 5 is a cross-sectional view taken along the line III-III of FIG. 1 showing a monolithic ceramic capacitor according to the present invention. (A) is a cross-sectional view taken along the line II-II of FIG. 1 showing a structure in which the counter electrode portion of the internal electrode layer of the multilayer ceramic capacitor according to the present invention is divided into two, and (b) the laminated ceramic according to the present invention. FIG. 2 is a cross-sectional view taken along the line II-II of FIG. 1 showing a structure in which the counter electrode portion of the internal electrode layer of the capacitor is divided into three. (C) The counter electrode portion of the internal electrode layer of the multilayer ceramic capacitor according to the present invention. Is a cross-sectional view taken along the line II-II of FIG. 1 showing a structure divided into four parts.

1. 1. First Embodiment (1) Multilayer Ceramic Capacitor The monolithic ceramic capacitor according to the first embodiment of the present invention will be described. FIG. 1 is an external perspective view showing an example of a multilayer ceramic capacitor according to the present invention. FIG. 2 is a cross-sectional view taken along the line II-II of FIG. 1 showing the multilayer ceramic capacitor according to the present invention, and FIG. 3 is a cross-sectional view taken along the line III-III of FIG. 1 showing the multilayer ceramic capacitor according to the present invention. is there.

(Laminate)
As shown in FIGS. 1 to 3, the multilayer ceramic capacitor 10 includes a rectangular parallelepiped laminate 12.

As shown in FIGS. 2 and 3, the laminated body 12 has a plurality of laminated dielectric layers 14 and a plurality of internal electrode layers 22. Further, the laminated body 12 has a first main surface 12a and a second main surface 12b facing the stacking direction x, and a first side surface 12c and a second side surface facing the width direction y orthogonal to the stacking direction x. It has 12d and a first end face 12e and a second end face 12f facing the length direction z orthogonal to the stacking direction x and the width direction y. The dimension of the laminate 12 in the length direction z is not always longer than the dimension of the width direction y.

As shown in FIGS. 2 and 3, the laminated body 12 has a plurality of internal electrode layers 22 facing each other in the stacking direction x, and an inner layer portion in which a dielectric layer 14 is formed between the internal electrode layers 22. A plurality of elements located on the first main surface 12a side and between the first main surface 12a and the outermost surface 16a of the inner layer portion on the first main surface side and the extension line of the outermost surface 16a. The outermost surface 16b of the first main surface side outer layer portion 18a formed from the dielectric layer 14 and the second main surface side inner layer portion located on the second main surface 12b side, the second main surface 12b and the second main surface side. The second main surface side outer layer portion 18b formed from the plurality of dielectric layers 14 located between the surface and the extension line of the outermost surface 16b, and the first side surface 12c located on the first side surface 12c side. The first side surface side outer layer portion 18c formed from the plurality of dielectric layers 14 located between the outermost surface 16c of the inner layer portion on the first side surface side and the extension line of the outermost surface 16c, and the second side surface side outer layer portion 18c. A second dielectric layer 14 located on the side surface 12d side and located between the second side surface 12b, the outermost surface 16d of the inner layer portion on the second side surface side, and an extension line of the outermost surface 16d. It has an outer layer portion 18d on the side surface side of 2.

Cu is solid-dissolved only in the first internal electrode layer 22a or the second internal electrode layer 22b of the inner layer portion 16 in contact with the first main surface side outer layer portion 18a and the second main surface side outer layer portion 18b. , The first internal electrode layer 22a or the second internal electrode layer 22b of the inner layer portion 16 in contact with the first main surface side outer layer portion 18a and the second main surface side outer layer portion 18b (the first in which Cu is solid-dissolved). When the total of Ni and Cu in the internal electrode layer 22a or the second internal electrode layer 22b) is 100 mol, the Cu content is 0.1 mol or more and 8.61 mol or less. As a result, Cu is dissolved in Ni of the predetermined internal electrode layer 22, and the inner layer portion in contact with the first main surface side outer layer portion 18a and the second main surface side outer layer portion 18b of the internal electrode layer 22. From the outermost surface 16c of the first inner electrode layer 22a or the second inner electrode layer 22b of 16 and the inner layer portion on the first side surface side of the inner layer portion 16 toward the inner electrode layer 22 side in the width direction y. In the region A containing 5 μm and in the region A first internal electrode layer 22a or the second internal electrode layer 22b containing 5 μm from the outermost surface of the inner layer portion 16 on the second side surface 12d side in the width direction y, Ni -Cu alloy is formed. As a result, the difference in diffusion coefficient between the internal electrode layer 22 and the external electrode 30 can be reduced. Therefore, it is possible to suppress the formation of voids at the joint between the external electrode 30 and the internal electrode layer 22 caused by the difference in diffusion coefficient between the internal electrode layer 22 and the external electrode 30 when the external electrode 22 is baked. It becomes. Therefore, in the subsequent plating process in the manufacturing process of the monolithic ceramic capacitor 10 and in the usage environment of the monolithic ceramic capacitor 10, deterioration of insulation resistance due to infiltration of plating solution and invasion of moisture can be suppressed, and the monolithic ceramic capacitor 10 can be used. It is possible to improve the high temperature load life.

Here, it is conceivable that the entire internal electrode layer 22 is made of a Ni—Cu alloy, but if the entire internal electrode layer 22 is made of a Ni—Cu alloy, the melting point of the internal electrode layer 22 is lowered and the internal electrode layer 22 is used. The continuity (coverage) of is reduced. Therefore, in the multilayer ceramic capacitor 10 of the present embodiment, the first internal electrode layer 22a or the second inside of the inner layer portion 16 in contact with the first main surface side outer layer portion 18a and the second main surface side outer layer portion 18b. By solidifying Cu only in the electrode layer 22b, a region of 5 μm from the outermost surface of the inner layer portion 16 of the first side surface side 12c of the inner layer portion 16 toward the inner electrode layer 22 side in the width direction y. The internal electrode layer only in the first internal electrode layer 22a or the second internal electrode layer 22b in the region A in which the inner layer portion 16 on the side A and the second side surface 12d is 5 μm in the width direction y from the outermost surface. Is Ni—Cu alloyed.

It should be noted that the deterioration of the insulating property due to the infiltration of the plating solution and water has a high probability of occurring at the portion where the film thickness of the external electrode 30 is the thinnest, that is, at the ridgeline portion and the corner portion of the ceramic body. Since the multilayer ceramic capacitor 10 of the present embodiment suppresses the gap at the joint between the external electrode 30 and the internal electrode layer 22 at that portion, it suppresses deterioration of the insulation resistance and secures the continuity of the internal electrode layer 22. It becomes possible to achieve both.

The laminated body 12 preferably has rounded corners and ridges. The corner portion is a portion where the three surfaces of the laminated body 12 intersect, and the ridge portion portion is a portion where the two surfaces of the laminated body 12 intersect.
As the dielectric material, for example, a dielectric ceramic containing components such as Badio ₃ , CaTIO ₃ , SrTiO ₃ , or CaZrO ₃ can be used. Further, those to which a component having a content smaller than that of the main component such as an MN compound, an Fe compound, a Cr compound, a Co compound and a Ni compound is added may be used.
The thickness of the dielectric layer 14 is preferably 0.5 μm or more and 10 μm or less.

The dimensions of the laminate are not particularly limited.

(Internal electrode layer)
The plurality of laminated internal electrode layers 22 have a plurality of first internal electrode layers 22a and a plurality of second internal electrode layers 22b, as shown in FIGS. 2 and 3.

As shown in FIGS. 2 and 3, the first internal electrode layer 22a is formed on the one end side of the first counter electrode portion 24a facing the second internal electrode layer 22b and the first internal electrode layer 22a. It is located and has a first lead-out electrode portion 26a from the first counter electrode portion 22a to the first end surface 12e of the laminated body 12. The end of the first extraction electrode portion 26a is exposed by being pulled out to the first end face 12e.
As shown in FIGS. 2 and 3, the second internal electrode layer 22b is provided on the one end side of the second counter electrode portion 24b facing the first internal electrode layer 22a and the second internal electrode layer 22b. It is located and has a second lead-out electrode portion 26b from the second counter electrode portion 22b to the second end surface 12f of the laminated body 12. The end of the second extraction electrode portion 26b is exposed by being pulled out to the second end surface 12f.

The shape of one counter electrode portion 24a of the first internal electrode layer 22a and the other counter electrode portion 24b of the second internal electrode layer 22b is not particularly limited, but is preferably rectangular. However, the corners may be rounded or the corners may be formed diagonally (tapered).
The shapes of the first extraction electrode portion 26a of the first internal electrode layer 22a and the second extraction electrode portion 26b of the second internal electrode layer 22b are not particularly limited, but are preferably rectangular. However, the corners may be rounded or the corners may be formed diagonally (tapered).
The width of the first counter electrode portion 24a of the first internal electrode layer 22a and the width of the first extraction electrode portion 26a of the first internal electrode layer 22a may be formed to be the same width, whichever is used. One may be formed narrowly. Similarly, the width of the second counter electrode portion 24b of the second internal electrode layer 22b and the width of the second extraction electrode portion 26b of the second internal electrode layer 22b may be formed to be the same width. , Either one may be formed narrowly.

As shown in FIG. 4, the internal electrode layer 22 is pulled by both the first end surface 12e and the second end surface 12f in addition to the first internal electrode layer 22a and the second internal electrode layer 22b. A floating internal electrode layer 22c that is not exposed may be provided, and the counter electrode portion 24 may be divided into a plurality of structures by the floating internal electrode layer 22c. For example, the structure may be 2 stations as shown in FIG. 4 (a), 3 stations as shown in FIG. 4 (b), or 4 stations as shown in FIG. 4 (c), and may have a structure of 4 or more stations. Needless to say. By forming the counter electrode portion 24 into a plurality of divided structures in this way, a plurality of capacitor components are formed between the opposing internal electrode layers 22a, 22b, and 22c, and these capacitor components are connected in series. It becomes a composition. Therefore, the voltage applied to each capacitor component becomes low, and the withstand voltage of the multilayer ceramic capacitor can be increased.

The first internal electrode layer 22a and the second internal electrode layer 22b contain Ni.
In the multilayer ceramic capacitor 10 according to the embodiment of the present invention, the capacitance is formed by the first internal electrode layer 22a and the second internal electrode layer 22b facing each other via the dielectric layer 14, and the characteristics of the capacitor are improved. Express.
The thickness of each of the first internal electrode layer 22a and the second internal electrode layer 22b is preferably, for example, about 0.2 μm or more and 2.0 μm or less.
The total number of the first internal electrode layer 22a and the second internal electrode layer 22b is preferably, for example, 15 or more.

(External electrode layer)
The external electrode layer 30 has a first external electrode 30a and a second external electrode 30b, as shown in FIGS. 2 and 3.
The first external electrode 30a is connected to the first internal electrode layer 22a and is arranged on the first end surface 12e. It may also be arranged on a part of the first main surface 12a and a part of the second main surface 12b, a part of the first side surface 12c and a part of the second side surface 12d.
The second external electrode 30b is connected to the second internal electrode layer and is arranged on the second end face. It may also be arranged on a part of the first main surface 12a and a part of the second main surface 12b, a part of the first side surface 12c and a part of the second side surface 12d.
The first external electrode 30a and the second external electrode 30b preferably have a base electrode layer 32 and a plating layer 34.
The base electrode layer 32 includes at least one selected from a baking layer, a conductive resin layer, a thin film layer, and the like.

The first base electrode layer 32a and the second base electrode layer 32b in which the base electrode layer 32 is formed by the baking layer will be described.
The glass component of the baking layer contains at least one selected from B, Si, Ba, Mg, Al, Li and the like.
As the metal of the baking layer, for example, Cu or an alloy containing Cu can be used.
There may be a plurality of baking layers.
The baking layer is obtained by applying a conductive paste containing glass and metal to the laminate 12 and baking it, and may be baked at the same time as the dielectric layer 14 and the internal electrode layer 22, and the dielectric layer 14 and the internal electrode may be baked. The layer 22 may be fired and then baked.
The thickness of each of the first base electrode layer 26a located on the first end surface 12e and the second base electrode layer 26b located on the second end face 12f at the center in the height direction is 15 μm or more and 160 μm or less. Is preferable.

The resin layer may include a resin layer containing conductive particles and a thermosetting resin. When the resin layer is formed, it may be formed directly on the laminate without forming the baking electrode layer.

The conductive resin layer may be a plurality of layers.
The conductive resin layer may be arranged on the baking layer so as to cover the baking layer, or may be arranged directly on the laminate.
The thickness of the first and second resin layers at the central portion in the height direction of the first and second base electrode layers located on the first end face 12e and the second end face 12f is, for example, about 10 μm or more and 120 μm or less. It is preferable to have.
Further, when the base electrode layer 32 is provided on the first main surface 12a and the second main surface 12b, the first side surface 12c and the second side surface 12d, the first main surface 12a and the second main surface 12a and the second main surface are provided. The thickness of the first and second resin layers in the central portion in the length direction, which is the first and second base electrode layers located on the surface 12b, the first side surface 12c and the second side surface 12f, is, for example, It is preferably about 5 μm or more and 40 μm or less.

The conductive resin layer contains a thermosetting resin and a metal.
Since the conductive resin layer contains a thermosetting resin, it is more flexible than, for example, a conductive layer made of a plating film or a fired product of a conductive paste. Therefore, even when a physical impact or an impact due to a thermal cycle is applied to the ceramic electronic component, the conductive resin layer functions as a buffer layer, and cracks in the ceramic electronic component can be prevented. ..
As the metal contained in the conductive resin layer, Ag, Cu, or an alloy thereof can be used. Further, the surface of the metal powder coated with Ag can be used. When using an Ag-coated metal powder, it is preferable to use Cu or Ni as the metal powder. It is also possible to use Cu that has been subjected to an antioxidant treatment.

The reason for using Ag conductive metal powder as the conductive metal is that Ag is suitable as an electrode material because it has the lowest specific resistance among metals, and Ag is a noble metal and therefore does not oxidize and has high resistance. is there. The reason for using the Ag-coated metal is that the metal of the base material can be made inexpensive while maintaining the above-mentioned characteristics of Ag.
The conductive filler, which is a metal contained in the conductive resin layer, is preferably contained in an amount of 35 vol% or more and 75 vol% or less with respect to the total volume of the conductive resin.
The shape of the conductive filler is not particularly limited. As the conductive filler, a spherical one or a flat one can be used, but it is preferable to use a mixture of the spherical metal powder and the flat metal powder.
The average particle size of the conductive filler is not particularly limited. The average particle size of the conductive filler may be, for example, about 0.3 μm or more and 10 μm or less.
The conductive filler mainly bears the electrical conductivity of the conductive resin layer. Specifically, when the conductive fillers come into contact with each other, an energization path is formed inside the conductive resin layer.
As the conductive filler, a spherical one or a flat one can be used, but it is preferable to use a mixture of the spherical metal powder and the flat metal powder.

As the resin of the conductive resin layer, for example, various known thermosetting resins such as epoxy resin, phenol resin, urethane resin, silicone resin, and polyimide resin can be used. Among them, epoxy resin having excellent heat resistance, moisture resistance, adhesion and the like is one of the most suitable resins.
The resin contained in the conductive resin layer is preferably contained in an amount of 25 vol% or more and 65 vol% or less with respect to the total volume of the conductive resin.
Further, the conductive resin layer preferably contains a curing agent together with the thermosetting resin. When an epoxy resin is used as the base resin, various known compounds such as a phenol resin, an amine type, an acid anhydride type, and an imidazole type can be used as the curing agent for the epoxy resin.

When the base electrode layer 32 is a thin film layer, the thin film layer is a layer having a thickness of 1 μm or less formed by a thin film forming method such as a sputtering method or a vapor deposition method and having metal particles deposited therein.

The plating layer 34 has a first plating layer 34a and a second plating layer 34b.
The first plating layer 34a is arranged so as to cover the first base electrode layer 32a.
The second plating layer 28b is arranged so as to cover the second base electrode layer 26b.
The first plating layer 28a and the second plating layer 28b (hereinafter, also simply referred to as the plating layer 28) are selected from, for example, Cu, Ni, Sn, Ag, Pd, Ag-Pd alloy, Au, and the like. Includes at least one.
The plating layer 28 may be formed by a plurality of layers. In this case, the plating layer 28 has a two-layer structure of a Ni plating layer and a Sn plating layer. By providing the Ni plating layer so as to cover the surface of the base electrode layer 26, it is possible to prevent the base electrode layer 26 from being eroded by the solder used for mounting when the multilayer ceramic capacitor 10 is mounted. it can. Further, by providing the Sn plating layer on the surface of the Ni plating layer, when mounting the multilayer ceramic capacitor 10, the wettability of the solder used for mounting is improved, and the mounting can be easily performed.
The thickness of one layer of the plating layer is preferably 2 μm or more and 15 μm or less.

(Multilayer ceramic capacitor)
As shown in FIG. 1, the dimension in the length direction z of the laminated ceramic capacitor 10 including the laminated body 12, the first external electrode 30a and the second external electrode 30b is defined as the L dimension, and the laminated body 12, the first external electrode The dimension of the laminated ceramic capacitor 10 including the electrode 30a and the second external electrode 30b in the stacking direction x is defined as the T dimension, and the laminated ceramic capacitor 10 including the laminated body 12, the first external electrode 30a and the second external electrode 30b. Let the dimension y in the width direction be the W dimension.
The dimensions of the multilayer ceramic capacitor 10 are such that the L dimension in the length direction z is 0.2 mm or more and 3.2 mm or less, the T dimension in the lamination direction x is 0.1 mm or more and 2.5 mm or less, and the W dimension in the width direction y is 0. It is preferably 1 mm or more and 2.5 mm or less.

(Manufacturing method of multilayer ceramic capacitors)
Next, a method for manufacturing the multilayer ceramic capacitor 10 according to the first embodiment having the above configuration will be described.

(A) Preparation of Dielectric Raw Material Powder First, Badio ₃ powder, which is the main component, is prepared. Specifically, BaCO ₃ powder and TiO ₂ powder were weighed in a predetermined amount, mixed by a ball mill for a certain period of time, and then heat-treated to obtain Badio ₃ powder as a main component.
Next, each powder of Dy ₂ O ₃ , MgO, MnO, and SiO ₂ which is a sub-component is prepared. Then, it was weighed so that Dy ₂ O ₃ was 0.75 mol, Mg O was 1 mol, MnO was 0.2 mol, and SiO ₂ was 1 mol, based on 100 mol of the main component. These powders are mixed with the main component BT powder (BaTIO ₃ powder), mixed for a certain period of time with a ball mill, and then dried and pulverized in a dry manner to obtain a raw material powder 1.
Further, in addition to the sub-ingredients Dy ₂ O ₃ , MgO, MnO, and SiO ₂ , Cu ₂ O powder was prepared. Table 1 shows 0.75 mol parts of Dy ₂ O ₃ , 1 mol part of MgO, 0.2 mol part of MnO, 1 mol part of SiO ₂ and Cu ₂ O with respect to 100 mol parts of the main component. Weighed as follows. Here, by adding Cu ₂ O, a material in which the Cu of the present embodiment is solid-solved can be obtained. These powders are mixed with the main component BT powder, mixed for a certain period of time with a ball mill, and then dried and pulverized in a dry manner to obtain a raw material powder 2.

(B) Manufacture of multilayer ceramic capacitor After that, an organic solvent such as polyvinyl butyral binder and ethanol was added to each of the raw material powder 1 (not containing Cu ₂ O) and the raw material powder 2 (containing Cu ₂ O). Wet mixing was performed with a ball mill to prepare a slurry. This ceramic slurry is sheet-molded by the doctor blade method. As a result, a 2.8 μm-thick green sheet 1 (manufactured from raw material powder 1 and does not contain Cu ₂ O) and a green sheet 2 (manufactured from raw material powder 2 and containing Cu ₂ O) are produced. Will be done. The green sheet 2 provides a solid solution of Cu in the multilayer ceramic capacitor 10 of the present embodiment.

Next, a conductive paste was prepared. Ni powder was prepared as the conductive powder, an organic solvent such as a polyvinyl butyral binder and ethanol was added, and wet-mixed with a ball mill to prepare a conductive paste.
Next, the internal electrode paste was printed on the ceramic green sheet 1 to form a conductive paste layer for forming the internal electrode layer.

Next, 50 sheets of only the green sheet 2 are stacked, the green sheet 1 on which the conductive paste is printed is stacked, 301 sheets are laminated so that the drawn sides of the conductive paste film are staggered, and further, 301 sheets are laminated on the green sheet 1. Only 50 green sheets 2 were stacked to obtain a laminated block. When cutting this laminated body block, the cutting position was adjusted to obtain a laminated body in which the thickness of the W gap after firing was about 100 μm.
These laminates are heated at a temperature of 350 ° C. in an N ₂ atmosphere to burn the binder, and then consist of H ₂ −N ₂ −H ₂₀ gas having an oxygen partial pressure of 10 ^-10 to ^-12 MPa. The temperature was raised at 20 ° C./min in a reducing atmosphere, and the mixture was calcined at 1200 ° C. for 20 minutes.
Next, a conductive paste containing Cu powder as a main component and glass frit is applied to both end faces of the fired laminate, baked at a temperature of 700 ° C. or higher and 900 ° C. or lower, and electrically connected to the internal electrode layer. External electrodes were formed. Then, Ni plating and Sn plating were formed by wet plating.

In this way, the monolithic ceramic capacitor 10 according to the first embodiment is manufactured.

2. 2. 2nd Embodiment The multilayer ceramic capacitor 10 of the 2nd embodiment is a modification of the multilayer ceramic capacitor 10 of the 1st embodiment. In the multilayer ceramic capacitor 10 of the second embodiment, Cu is solid-solved only in the inner electrode layer 22 in contact with the first side surface side outer layer portion 20a and the second side surface side outer layer portion 20b. It is different from the multilayer ceramic capacitor 10 of the first embodiment.

(Laminate)
In the inner layer portion 16, the outermost surface of the inner layer portion 16 on the second side surface 12d side and in the region A having 5 μm on the inner electrode layer 22 side in the width direction y from the outermost surface of the inner layer portion 16 on the first side surface 12c side. Cu is solid-dissolved only in the first internal electrode layer 22a or the second internal electrode layer 22b in the region A having 5 μm on the internal electrode layer side in the width direction y from the first side surface 12c. Internal electrode from the outermost surface of the inner layer portion 16 on the side in the width direction y from the outermost surface of the inner layer portion 16 in the region A having 5 μm on the inner electrode layer 22 side and on the second side surface 12c side. Ni in the first internal electrode layer 22a and the second internal electrode layer 22b (first internal electrode layer 22a or second internal electrode layer 22b in which Cu is solidified) in the region A having 5 μm on the layer 22 side. When the total of and Cu is 100 mol, the Cu content is 0.11 mol or more and 8.44 mol or less. As a result, Cu is dissolved in Ni in the predetermined internal electrode layer 22 and a Ni—CU alloy is formed at a predetermined position in the internal electrode layer 22. As a result, the difference in diffusion coefficient between the internal electrode layer 22 and the external electrode 30 can be reduced. Therefore, it is possible to suppress the formation of voids at the joint between the external electrode 30 and the internal electrode layer 22 caused by the difference in diffusion coefficient between the internal electrode layer 22 and the external electrode 30 when the external electrode 30 is baked. It becomes. Therefore, in the subsequent plating process in the manufacturing process of the monolithic ceramic capacitor 10 and in the usage environment of the monolithic ceramic capacitor 10, deterioration of the insulation resistance due to the infiltration of the plating solution and the invasion of moisture can be suppressed, and the monolithic ceramic capacitor 10 can be used. It is possible to improve the high temperature load life.

Here, it is conceivable that the entire internal electrode layer 22 is made of a Ni—Cu alloy, but if the entire internal electrode layer 22 is made of a Ni—Cu alloy, the melting point of the internal electrode layer 22 is lowered and the internal electrode layer 22 is used. The continuity (coverage) of is reduced. Therefore, in the multilayer ceramic capacitor 10 of the present embodiment, the first internal electrode layer 22a or the second internal electrode layer of the inner layer portion 16 in contact with the first side surface side outer layer portion 20a and the second side surface side outer layer portion 20b. By solidifying Cu only in 22b, the inside of the region A having 5 μm from the outermost surface of the inner layer portion 16 of the first side surface side 12c of the inner layer portion 16 toward the inner electrode layer 22 side in the width direction y. And the internal electrode layer is Ni only in the first internal electrode layer 22a or the second internal electrode layer 22b in the region A which is 5 μm from the outermost surface of the inner layer portion 16 on the second side surface 12d side in the width direction y. -Cu alloying.

It should be noted that the deterioration of the insulating property due to the infiltration of the plating solution or water has a high probability of occurring at the portion where the film thickness of the external electrode 30 is the thinnest, that is, at the ridgeline portion or the corner portion of the ceramic element body. Since the multilayer ceramic capacitor 10 of the present embodiment suppresses the gap at the joint between the external electrode 30 and the internal electrode layer 22 at that portion, it suppresses deterioration of the insulation resistance and secures the continuity of the internal electrode layer 22. It becomes possible to achieve both.

The components of the multilayer ceramic capacitor 10 of the second embodiment other than the laminate 12 are the same as the components of the multilayer ceramic capacitor 10 of the first embodiment.

(Manufacturing method of multilayer ceramic capacitors)
Next, a method for manufacturing the multilayer ceramic capacitor 10 according to the second embodiment having the above configuration will be described.

(A) Preparation of Dielectric Raw Material Powder First, Badio ₃ powder, which is the main component, is prepared. Specifically, BaCO ₃ powder and TiO ₂ powder were weighed in a predetermined amount, mixed by a ball mill for a certain period of time, and then heat-treated to obtain Badio ₃ powder as a main component.
Next, each powder of Dy ₂ O ₃ , MgO, MnO, and SiO ₂ which is a sub-component is prepared. Then, it was weighed so that Dy ₂ O ₃ was 0.75 mol, Mg O was 1 mol, MnO was 0.2 mol, and SiO ₂ was 1 mol, based on 100 mol of the main component. These powders are mixed with the main component BT powder (BaTIO ₃ powder), mixed for a certain period of time with a ball mill, and then dried and pulverized in a dry manner to obtain a raw material powder 1.
Further, in addition to the sub-ingredients Dy ₂ O ₃ , MgO, MnO, and SiO ₂ , Cu ₂ O powder was prepared. Table 1 shows 0.75 mol parts of Dy ₂ O ₃ , 1 mol part of MgO, 0.2 mol part of MnO, 1 mol part of SiO ₂ and Cu ₂ O with respect to 100 mol parts of the main component. Weighed as follows. Here, by adding Cu ₂ O, a material in which the Cu of the present embodiment is solid-solved can be obtained. These powders are mixed with the main component BT powder, mixed for a certain period of time with a ball mill, and then dried and pulverized in a dry manner to obtain a raw material powder 2.

(B) Production of Multilayer Ceramic Capacitor Slurry 2 is produced by adding a polyvinyl butyral binder and an organic solvent such as ethanol to the raw material powder 2 and wet-mixing them with a ball mill. The slurry 2 provides a solid solution of Cu in the internal electrode layer 22 of the second embodiment.

Next, a conductive paste was prepared. Ni powder was prepared as the conductive powder, an organic solvent such as a polyvinyl butyral binder and ethanol was added, and wet-mixed with a ball mill to prepare a conductive paste.
Then, the above-mentioned internal electrode paste was printed on the ceramic green sheet 1 to form a conductive paste layer for forming the internal electrode layer.

Next, 50 green sheets 1 are stacked, the green sheet 1 on which the conductive paste is printed is stacked, 301 sheets are laminated so that the drawn sides of the conductive paste film are staggered, and the green is further stacked. Fifty sheets 1 were stacked to obtain a laminated block. When cutting this laminated body block, the cut position is adjusted so that the first side surface side outer layer portion and the second side surface side outer layer portion are not provided (the inner electrode layer is also exposed in the width direction y). A laminate was obtained.

Subsequently, the first side surface side outer layer portion 20a and the second side surface side outer layer portion 20b were formed. Specifically, an aggregate in which the cut laminates are arranged on a matrix so that the side surface (LT surface) faces upward is fitted into the frame. At this time, the surface of the aggregate is located at a position lower than the surface of the frame by the thickness of the first side surface side outer layer portion 20a and the second side surface side outer layer portion 20b to be formed (here, about 130 μm). I made it. Then, by applying the first side surface side outer layer portion and the second side surface side outer layer portion forming slurry 2 with a squeegee and drying them, the first side surface side outer layer portion 20a and the second side surface side outer layer portion 20b are applied to the side surfaces. Was formed. Then, in the same manner, the first side surface side outer layer portion 20a and the second side surface side outer layer portion 20b were formed on the other side surface (LT surface). The first side surface side outer layer portion and the second side surface side outer layer portion forming slurry are preferably those having a high viscosity so as not to drip from the side surface.

Next, these laminates 12 are heated at a temperature of 350 ° C. in an N ₂ atmosphere to burn the binder, and then H ₂ −N ₂ −H ₂ having an oxygen partial pressure of 10 ^-10 to 10 ^-12 MPa. The temperature is raised at 20 ° C./min in a reducing atmosphere consisting of 0 gas, and firing is performed at 1200 ° C. for 20 minutes.
Then, a conductive paste containing Cu powder as the main component and glass frit is applied to both end faces of the fired laminate, baked at a temperature of 700 ° C. or higher and 900 ° C. or lower, and electrically connected to the internal electrodes. External electrodes were formed. Then, Ni plating and Sn plating are formed by wet plating.

In this way, the monolithic ceramic capacitor 10 according to the second embodiment is manufactured.

3. 3. Third Embodiment The multilayer ceramic capacitor 10 of the third embodiment is a modification of the multilayer ceramic capacitor 10 of the first embodiment. The multilayer ceramic capacitor 10 of the third embodiment includes not only the first main surface side outer layer portion 18a and the second main surface side outer layer portion 18b, but also the first side surface side outer layer portion 20a and the second main surface side outer layer portion 18b. It differs from the multilayer ceramic capacitor 10 of the first embodiment in that Cu is solid-solved in the internal electrode layer 22 in contact with the side outer layer portion 20b.

(Laminate)
The first main surface side outer layer portion 18a in contact with the first main surface side outer layer portion 16a in the inner layer portion 16, the second main surface side outer layer portion 18b in contact with the second main surface side outer layer portion 16b, and the second main surface side outer layer portion 18b. From the outermost surface 16c of the inner layer portion on the side surface side of No. 1 toward the width direction y from the outermost surface 16d of the inner layer portion on the inner layer portion on the second side surface side and in the region A having 5 μm on the inner electrode layer 22 side. Cu is solid-dissolved in the first internal electrode layer 22a or the second internal electrode layer 22b in the region A having 5 μm on the internal electrode layer side, and the first main surface side outer layer portion 16a in the inner layer portion 16 When the total of Ni and Sn in the first internal electrode layer 22a in contact with the first internal electrode layer 22a and the second internal electrode layer 22b in contact with the second main surface side outer layer portion 16b is 100 mol, the Sn content is 0. 1 mol or more and 8.61 mol or less, and 5 μm in the inner electrode layer 22 side from the outermost surface 16c of the inner layer portion on the first side surface side in the width direction y, and in the inner layer portion on the second side surface side. When the total of Ni and Cu in the first internal electrode layer 22a and the second internal electrode layer 22b in the region A having 5 μm on the internal electrode layer 22 side in the width direction y from the outermost surface 16d is 100 mol. The Cu content of is 0.11 mol or more and 8.44 mol or less. As a result, Cu is dissolved in Ni in the predetermined internal electrode layer 22 and a Ni—CU alloy is formed at a predetermined position in the internal electrode layer 22. As a result, the difference in diffusion coefficient between the internal electrode layer 22 and the external electrode 30 can be reduced. Therefore, it is possible to suppress the formation of voids at the joint between the external electrode 30 and the internal electrode layer 22 caused by the difference in diffusion coefficient between the internal electrode layer 22 and the external electrode 30 when the external electrode 30 is baked. It becomes. Therefore, in the subsequent plating process in the manufacturing process of the multilayer ceramic capacitor 10 and in the usage environment of the multilayer ceramic capacitor 10, deterioration of insulation resistance due to infiltration of plating solution and invasion of moisture can be suppressed, and the high temperature of the multilayer ceramic capacitor 10 can be suppressed. It is possible to improve the load life.

Here, it is conceivable that the entire internal electrode layer 22 is made of a Ni—Cu alloy, but if the entire internal electrode layer 22 is made of a Ni—Cu alloy, the melting point of the internal electrode layer 22 is lowered and the internal electrode layer 22 is used. The continuity (coverage) of is reduced. Therefore, in the multilayer ceramic capacitor 10 of the present embodiment, the first main surface side outer layer portion 18a in contact with the first main surface side outer layer portion 16a and the second main surface side outer layer portion 16b in contact with the second main surface side outer layer portion 16b. Cu only on the first inner electrode layer 22a or the second inner electrode layer 22b of the surface side outer layer portion 18b and the inner layer portion 16 in contact with the first side surface side outer layer portion 20a and the second side surface side outer layer portion 20b. In the region A and the second side surface, which is 5 μm from the outermost surface of the inner layer portion 16 of the first side surface side 12c of the inner layer portion 16 toward the inner electrode layer 22 side in the width direction y. The internal electrode layer is Ni—Cu alloyed only in the first internal electrode layer 22a or the second internal electrode layer 22b in the region A 5 μm from the outermost surface of the inner layer portion 16 on the 12d side in the width direction y. There is.

It should be noted that the deterioration of the insulating property due to the infiltration of the plating solution and water has a high probability of occurring at the portion where the film thickness of the external electrode 30 is the thinnest, that is, at the ridgeline portion and the corner portion of the ceramic body. Since the multilayer ceramic capacitor 10 of the present embodiment suppresses the gap at the joint between the external electrode 30 and the internal electrode layer 22 at that portion, it suppresses deterioration of the insulation resistance and secures the continuity of the internal electrode layer 22. It becomes possible to achieve both.

The components of the multilayer ceramic capacitor 10 of the second embodiment other than the laminate 12 are the same as the components of the multilayer ceramic capacitor 10 of the first embodiment.

(Manufacturing method of multilayer ceramic capacitors)
Next, a method for manufacturing the multilayer ceramic capacitor 10 according to the third embodiment having the above configuration will be described.

First, BaTIO ₃ powder, which is the main component, is prepared. Specifically, BaCO ₃ powder and TiO ₂ powder were weighed in a predetermined amount, mixed by a ball mill for a certain period of time, and then heat-treated to obtain Badio ₃ powder as a main component.
Next, each powder of Dy ₂ O ₃ , MgO, MnO, and SiO ₂ which is a sub-component is prepared. Then, it was weighed so that Dy ₂ O ₃ was 0.75 mol, Mg O was 1 mol, MnO was 0.2 mol, and SiO ₂ was 1 mol, based on 100 mol of the main component. These powders are mixed with the main component BT powder (BaTIO ₃ powder), mixed for a certain period of time with a ball mill, and then dried and pulverized in a dry manner to obtain a raw material powder 1.
Further, in addition to the sub-ingredients Dy ₂ O ₃ , MgO, MnO, and SiO ₂ , Cu ₂ O powder was prepared. Table 1 shows 0.75 mol parts of Dy ₂ O ₃ , 1 mol part of MgO, 0.2 mol part of MnO, 1 mol part of SiO ₂ and Cu ₂ O with respect to 100 mol parts of the main component. Weighed as follows. Here, by adding Cu ₂ O, a material in which the Cu of the present embodiment is solid-solved can be obtained. These powders were mixed with the main component BT powder, mixed for a certain period of time with a ball mill, and then dried and pulverized in a dry manner to obtain a raw material powder 2.

(B) Manufacture of multilayer ceramic capacitor After that, an organic solvent such as polyvinyl butyral binder and ethanol was added to each of the raw material powder 1 (not containing Cu ₂ O) and the raw material powder 2 (containing Cu ₂ O). Wet mixing was performed with a ball mill to prepare a slurry. This ceramic slurry is sheet-molded by the doctor blade method. As a result, a 2.8 μm-thick green sheet 1 (manufactured from raw material powder 1 and does not contain Cu ₂ O) and a green sheet 2 (manufactured from raw material powder 2 and containing Cu ₂ O) are produced. Will be done. The green sheet 2 provides a solid solution of Cu in the multilayer ceramic capacitor 10 of the present embodiment.

Further, an organic solvent such as a polyvinyl butyral binder and ethanol is added to the raw material powder 2 and wet-mixed by a ball mill to prepare a slurry for forming the first side surface side outer layer portion 20a and the second side surface side outer layer portion 20b. Slurry 2 was prepared. The solid solution of Cu of the present embodiment can be obtained by the first side surface side outer layer portion 20a and the second side surface side outer layer portion 20b forming slurry 2.

Next, a conductive paste was prepared. Ni powder was prepared as the conductive powder, an organic solvent such as a polyvinyl butyral binder and ethanol was added, and wet-mixed with a ball mill to prepare a conductive paste.
Then, the above-mentioned internal electrode paste was printed on the ceramic green sheet 1 to form a conductive paste layer for forming the internal electrode layer.

Next, 50 green sheets 2 are stacked, a green sheet 1 on which the conductive paste is printed is stacked, 301 sheets are laminated so that the drawn sides of the conductive paste film are staggered, and green is further stacked on the green sheet 1. Fifty sheets 2 were stacked to obtain a laminated block. When cutting this laminated body block, the cut position is adjusted so that the first side surface side outer layer portion and the second side surface side outer layer portion are not provided (the inner electrode layer is also exposed in the width direction y). A laminate was obtained.

Subsequently, the first side surface side outer layer portion 20a and the second side surface side outer layer portion 20b were formed. Specifically, an aggregate in which the cut laminates are arranged on a matrix so that the side surface (LT surface) faces upward is fitted into the frame. At this time, the surface of the aggregate is located at a position lower than the surface of the frame by the thickness of the first side surface side outer layer portion 20a and the second side surface side outer layer portion 20b to be formed (here, about 130 μm). I made it. Then, the first side surface side outer layer portion and the second side surface side outer layer portion forming slurry 2 are applied with a squeegee and dried by applying the first side surface side outer layer portion 20a and the second side surface side outer layer portion 20b to the side surface. Was formed. Then, in the same manner, the first side surface side outer layer portion 20a and the second side surface side outer layer portion 20b were formed on the other side surface (LT surface). The first side surface side outer layer portion and the second side surface side outer layer portion forming slurry are preferably those having a high viscosity so as not to drip from the side surface.

These laminates are heated at a temperature of 350 ° C. in an N ₂ atmosphere to burn the binder, and then consist of H ₂ −N ₂ −H ₂₀ gas having an oxygen partial pressure of 10 ^-10 to ^-12 MPa. The temperature was raised at 20 ° C./min in a reducing atmosphere, and the mixture was calcined at 1200 ° C. for 20 minutes.
Next, a conductive paste containing Cu powder as a main component and glass frit is applied to both end faces of the fired laminate, baked at a temperature of 700 ° C. or higher and 900 ° C. or lower, and electrically connected to the internal electrode layer. External electrodes were formed. Then, Ni plating and Sn plating were formed by wet plating.

In this way, the monolithic ceramic capacitor 10 according to the third embodiment is manufactured.

(Experimental example)
The first embodiment, the second embodiment, manufactured by the method for manufacturing the multilayer ceramic capacitor 10 of the first embodiment, the second embodiment, and the third embodiment described above. The external dimensions of the monolithic ceramic capacitor 10 of the third embodiment are 1.2 mm in width, 2.0 mm in length, and 1.2 mm in thickness, and the dielectric layer interposed between the internal electrode layers 22. The thickness was 2.2 μm. The total number of effective dielectric ceramic layers was 300, and the area of the counter electrode per layer was 1.6 × 10 ^-6 m ² . The thickness of the ineffective layer in the stacking direction z) and the thickness of the W gap 28 (invalid layer in the width direction y) were about 100 μm.

As shown in Table 1, 20 samples of sample number 1 to sample number 19 were prepared for each sample number. Next, a high-temperature load test was performed at 150 ° C. and 12 V, and the time when the insulation resistance became 10 KΩ or less was determined to be a failure. MTTF was calculated from this failure time and compared. The results are shown in Table 1.
The data of sample numbers 3 to 6 in Table 1 are the data of the multilayer ceramic capacitor 10 corresponding to the first embodiment, and the data of sample numbers 9 to 12 are the data of the second embodiment. It is the data of the corresponding multilayer ceramic capacitor 10, and the data of the sample number 15 to the sample number 18 is the data of the multilayer ceramic capacitor 10 in the third embodiment.

The vicinity of the outer layer in Table 1 is a first or second inner electrode layer in contact with the first main surface side outer layer portion and the second main surface side outer layer portion.
The vicinity of the W gap in Table 1 refers to the inner layer portion in the region A and the inner layer portion on the second side surface side, which is 5 μm in the inner electrode layer side in the width direction y from the outermost surface of the inner layer portion on the first side surface side in the inner layer portion. It is the first internal electrode layer or the second internal electrode layer in the region A having 5 μm on the internal electrode layer side in the width direction y from the outermost surface of the above.
The wt% in Table 1 is the value of Cu ₂ O / BaTIO ₃ .
At% in Table 1 is a value of Cu / (Ni + Cu).
MTTF is the mean time between failures, which is the time until failure.

When a load of 12 V was applied to the sample of the multilayer ceramic capacitor at 150 ° C., if the insulation resistance became 10 KΩ or less, it was judged that the failure occurred.
Therefore, when a load of 12 V is applied to the monolithic ceramic capacitor at 150 ° C., the time until the insulation resistance becomes 10 KΩ or less becomes MTTF.
Further, when a high temperature load test in which a load of 12 V is applied to a monolithic ceramic capacitor at 150 ° C. is performed, it is desirable that the MTTF is 70 hours or more.
Therefore, in this experiment, a high-temperature load test was performed on the monolithic ceramic capacitor at 150 ° C. and 12 V, and the monolithic ceramic capacitor having an MTTF of 70 hours or more was judged to be good.

(Evaluation)
In sample No. 1, Cu is not dissolved in the vicinity of the outer layer and the vicinity of the W gap, and the MTTF is 29 hours. Therefore, sample number 1 was determined to be defective. It is considered that the reason why Sample No. 1 was determined to be defective is that Cu was not dissolved in the vicinity of the outer layer and the vicinity of the W gap.
In sample No. 2, Cu was solid-dissolved in the vicinity of the outer layer, Cu was not solid-dissolved in the vicinity of the W gap, the amount of Cu in the vicinity of the outer layer was 0.10 at%, and the MTTF was 33 hours. .. Therefore, sample number 2 was determined to be defective. It is probable that the reason why Sample No. 2 was determined to be defective was that there was no effect because the amount of Cu dissolved in the vicinity of the outer layer was too small.

In sample numbers 3 to 6, Cu is solid-dissolved in the vicinity of the outer layer, Cu is not solid-dissolved in the vicinity of the W gap, and the amount of Cu in the vicinity of the outer layer is 0.10 at% or more and 8.61 at% or less. The MTTF was 73 to 95 hours. Therefore, sample number 3 to sample number 6 were judged to be good. Sample Nos. 3 to 6 were judged to be good because the amount of Cu dissolved in the vicinity of the outer layer was in the range of 0.1 at% or more and 8.5 at% or less, so that when the external electrode was baked. Since the formation of voids at the joint between the external electrode and the internal electrode layer caused by the difference in diffusion coefficient between the internal electrode layer and the external electrode is suppressed, the infiltration of the plating solution or the infiltration of water into the multilayer ceramic capacitor is caused. This is considered to be because the deterioration of the insulation resistance can be suppressed.

In sample No. 7, Cu was solid-dissolved in the vicinity of the outer layer, Cu was not solid-dissolved in the vicinity of the W gap, the amount of Cu in the vicinity of the outer layer was 9.88 at%, and the MTTF was 22 hours. .. Therefore, sample number 7 was determined to be defective. The reason why sample number 7 was determined to be defective is that if the amount of Cu is too large, the melting point is lowered, so that the end portion of the internal electrode is melted and spheroidized in order to minimize the surface energy. As a result, the dielectric element is compressed and thinned. Therefore, it is considered that the electric field tends to be concentrated on the thin portion when the voltage is applied, and the high temperature load life is shortened.
In sample No. 8, Cu was not solid-dissolved in the vicinity of the outer layer, Cu was solid-dissolved in the vicinity of the W gap, the amount of Cu in the vicinity of the W gap was 0.04 at%, and the MTTF was 35 hours. there were. Therefore, sample number 8 was determined to be defective. It is probable that the reason why the sample number 8 was determined to be defective was that there was no effect because the amount of Cu dissolved in the vicinity of the W gap was too small.

In sample numbers 9 to 12, Cu is not solid-dissolved in the vicinity of the outer layer, Cu is solid-dissolved in the vicinity of the W gap, and the amount of Cu in the vicinity of the W gap is 0.11 at% or more and 8.44 at. % Or less, and MTTF was 76 hours or more and 86 hours or less. Therefore, sample numbers 9 to 12 were judged to be good. Sample No. 9 to Sample No. 12 were judged to be good because the amount of Cu dissolved in the vicinity of the W gap was in the range of 0.1 at% or more and 8.5 at% or less, so that when the external electrode was baked. Since the formation of voids at the joint between the external electrode and the internal electrode layer caused by the difference in diffusion coefficient between the internal electrode layer and the external electrode is suppressed, the infiltration of the plating solution and the infiltration of moisture into the multilayer ceramic capacitor are suppressed. It is considered that this is because the deterioration of the insulation resistance due to the above can be suppressed.

In sample No. 13, Cu was not solid-dissolved in the vicinity of the outer layer, Cu was solid-dissolved in the vicinity of the W gap, the amount of Cu in the vicinity of the W gap was 10.10 at%, and the MTTF was 24 hours. there were. Therefore, sample number 13 was determined to be defective. The reason why sample number 13 was determined to be defective is that if too much Cu is dissolved in the vicinity of the W gap, the melting point decreases, so the end of the internal electrode melts and becomes spheroidized in order to minimize surface energy. .. As a result, the dielectric element is compressed and thinned. Therefore, it is considered that the electric field tends to be concentrated on the thin portion when the voltage is applied, and the high temperature load life is shortened.
In sample number 14, Cu is dissolved in the vicinity of the outer layer and the vicinity of the W gap, the amount of Cu in the vicinity of the outer layer is 0.05 at%, the amount of Cu in the vicinity of the W gap is 0.04 at%, and the MTTF is It was 29 hours. Therefore, sample number 14 was determined to be defective. It is considered that the reason why the sample number 14 was determined to be defective was that there was no effect because the amount of Cu dissolved in the vicinity of the outer layer and the vicinity of the W gap was too small.

In sample numbers 15 to 18, Cu is dissolved in the vicinity of the outer layer and the vicinity of the W gap, and the amount of Cu in the vicinity of the outer layer is 0.10 at% or more and 8.61 at% or less, and the amount of Cu in the vicinity of the W gap. Was 0.11 at% or more and 8.44 at% or less, and MTTF was 81 hours to 98 hours. Therefore, sample numbers 15 to 18 were judged to be good. Sample numbers 15 to 18 were judged to be good because the amount of Cu dissolved in the vicinity of the outer layer and the vicinity of the W gap was in the range of approximately 0.1 at% or more and 8.5 at% or less. Since the formation of voids at the joint between the external electrode and the internal electrode layer caused by the difference in diffusion coefficient between the internal electrode layer and the external electrode when the electrode is baked is suppressed, the plating solution for the multilayer ceramic capacitor can be used. It is considered that this is because the deterioration of the insulation resistance due to the infiltration and the infiltration of water can be suppressed.

In sample number 19, Cu is solid-dissolved in the vicinity of the outer layer and the vicinity of the W gap, the amount of Cu in the vicinity of the outer layer is 9.88 at%, and the amount of Cu in the vicinity of the W gap is 10.10 at%. The MTTF was 19 hours. Therefore, sample number 19 was determined to be defective. The reason why sample number 19 was determined to be defective is that if too much Cu is dissolved in the vicinity of the outer layer and the vicinity of the W gap, the melting point decreases, and the end of the internal electrode melts to minimize the surface energy. Spheroidized. As a result, the dielectric element is compressed and thinned. Therefore, it is considered that the electric field tends to be concentrated on the thin portion when the voltage is applied, and the high temperature load life is shortened.

Here, in the laminated ceramic capacitor (laminated body) after firing, Cu is contained in the internal electrode layer in contact with the first main surface side outer layer and the second main surface side outer layer portion (invalid layer in the stacking direction x). It was confirmed that it existed as follows.
It was confirmed by FE-WDX that Cu was present in the inner electrode layer in contact with the first main surface side outer layer portion and the second main surface side outer layer portion and the amount thereof was confirmed.

(1) Polishing First, the direction connecting the first end face and the second end face of each sample was erected so as to be perpendicular to the work surface, and the circumference of each sample was hardened with resin.
Polishing is performed using the WT surface (first end surface 12e or second end surface 12f) as the polishing surface by a polishing machine, and the polishing is completed at a depth of about 1/2 of the length direction z of the laminated body, and the WT cross section is cross-sectioned. Was issued.
Then, in order to eliminate the sagging of the internal electrode due to polishing, the polished surface was processed by ion milling after the polishing was completed.
The length direction z does not have to be about 1/2, but it is desirable to expose the extraction electrode portion. This is because if the polishing distance in the length direction z is short, it is indistinguishable from Cu diffused from the external electrode.

(2) Composition Analysis of Internal Electrode Layer Next, for each sample of the multilayer ceramic capacitor of Sample No. 1 to Document No. 7, as shown in FIG. 1, the inside of the sample is about z1 / 2 in the length direction of the WT cross section. From the region where the electrode layers are laminated, the first internal electrode layer 22a or the second internal electrode layer 22b, the inner layer portion, which is in contact with the first main surface side outer layer portion 18a and the second main surface side outer layer portion 18b. In region A having 5 μm on the inner electrode layer 22 side in the width direction y from the outermost surface of the inner layer portion 16 on the first side surface 12c side of 16, and in the width direction y from the outermost surface of the inner layer portion on the second side surface side. One internal electrode layer was selected from each of the first internal electrode layer and the second internal electrode layer in the region A having 5 μm on the internal electrode layer side. Quantitative analysis of Ni and Cu was performed using FE-WDX at 10 points on each internal electrode layer. Using FE-WDX and JXA-8500F (manufactured by JEOL), the measurement was performed at an acceleration voltage of 15 kV and an irradiation current of 50 nA.
Further, for the first internal electrode layer or the second internal electrode layer in contact with the first main surface side outer layer portion and the second main surface side outer layer portion, any 10 points are measured, and the first in the inner layer portion. In the region A having 5 μm in the inner electrode layer side from the outermost surface of the inner layer portion on the side surface side in the width direction y, and on the inner electrode layer side in the width direction y from the outermost surface of the inner layer portion on the second side surface side. The first internal electrode layer and the second internal electrode layer in the region A having a size of 5 μm were measured by arbitrarily selecting 5 locations on the left and right in the region A at both ends.

For each sample of the multilayer ceramic capacitor of sample number 8 to sample number 13, in the laminated ceramic capacitor (laminated body) after firing, the first side surface side outer layer portion 20a and the second side surface side outer layer portion 20b (width direction y). It was confirmed whether or not Cu was present in the internal electrode layer located within 5 μm from the ineffective layer) to the inside (effective layer side). The confirmation method is the same as the method of the first embodiment.

Further, for each sample of the laminated ceramic capacitor of sample number 14 to sample number 18, in the laminated ceramic capacitor 10 (laminated body 12) after firing, the first main surface side outer layer portion 18a and the second main surface side outer layer The internal electrode layer 22 in contact with the portion 18b (invalid layer in the stacking direction x), and the first side surface side outer layer portion 20a and the second side surface side outer layer portion 20b (invalid layer in the width direction y) to the inside (effective layer side). ), It was confirmed whether Cu was present in the internal electrode layer at a position within 5 μm. The confirmation method is the same as the method of the first embodiment.

When a high-temperature load test is performed on a monolithic ceramic capacitor at 150 ° C. under a load of 12 V, it is desirable that the MTTF is 70 hours or more.
Here, in the experimental example, sample numbers 3 to 6, sample numbers 9 to 12, and sample numbers 15 to 18 have MTTFs of 70 hours or more even when a load of 12 V is applied at 150 ° C. there were.
Therefore, the multilayer ceramic capacitor 10 having a configuration such as sample number 3 to sample number 6, sample number 9 to sample number 12, and sample number 15 to sample number 18 may be the most suitable multilayer ceramic capacitor 10. It was revealed.
From the above results, the effect of the multilayer ceramic capacitor 10 according to the present invention was proved.

As described above, the embodiments of the present invention are disclosed in the above description, but the present invention is not limited thereto.
That is, various changes can be made to the above-described embodiments with respect to the mechanism, shape, material, quantity, position, arrangement, etc., without departing from the scope of the technical idea and purpose of the present invention. They are, and they are included in the present invention.

10 Multilayer ceramic capacitor 12 Laminated body 12a First main surface 12b Second main surface 12c First side surface 12d Second side surface 12e First end surface 12f Second end surface 14 Dielectric layer 16 Inner layer part 16a First The outermost surface of the inner layer on the main surface side 16b The outermost surface of the inner layer on the second main surface side 16c The outermost surface of the inner layer on the first side surface 16d The outermost surface of the inner layer on the second side surface 18a First Main surface side outer layer part 18b Second main surface side outer layer part 20a First side surface side outer layer part 20b Second side side outer layer part 22 Internal electrode layer 22a First internal electrode layer 22b Second internal electrode layer 22c Floating Internal electrode layer 24 Counter electrode portion 24a First counter electrode portion 24b Second counter electrode portion 26a First extraction electrode portion 26b Second extraction electrode portion 28 Side portion (W gap)
30 External electrode 30a First external electrode 30b Second external electrode 32 Base electrode layer 32a First base electrode layer 32b Second base electrode layer 34 Plating layer 34a First plating layer 34b Second plating layer x Lamination Direction y Width direction z Length direction

Claims (3)

A first main surface and a second main surface that include a plurality of laminated dielectric layers and face each other in the stacking direction, and a first side surface and a second side surface that face each other in the width direction orthogonal to the stacking direction. A laminate including a first end face and a second end face facing each other in the length direction orthogonal to the stacking direction and the width direction.
A first internal electrode layer that is alternately laminated with the plurality of dielectric layers and drawn out to the first end face,
A second internal electrode layer that is alternately laminated with the plurality of dielectric layers and drawn out to the second end face.
With the first external electrode connected to the first internal electrode layer and arranged on the first end face,
With the second external electrode connected to the second internal electrode layer and arranged on the second end face,
In a multilayer ceramic capacitor with
The first internal electrode layer and the second internal electrode layer contain Ni and contain Ni.
The laminated body includes a plurality of inner layer portions in which the first internal electrode layer and the second internal electrode layer face each other.
The plurality of dielectrics located on the first main surface side and between the first main surface and the outermost surface of the inner layer portion on the first main surface side and an extension line of the outermost surface. The first main surface side outer layer formed from the layers,
A plurality of dielectric layers located on the second main surface side and between the outermost surface of the inner layer portion on the second main surface side and the extension line of the outermost surface. The second main surface side outer layer formed from
A first side surface side formed from the plurality of dielectric layers located on the first side surface side and located between the first side surface and the outermost surface of the inner layer portion on the first side surface side. With the outer layer
A second side surface side formed from the plurality of dielectric layers located on the second side surface side and located between the second side surface and the outermost surface of the inner layer portion on the second side surface side. With the outer layer
Have,
Cu is solid-solved only in the first internal electrode layer or the second internal electrode layer of the inner layer portion in contact with the first main surface side outer layer portion and the second main surface side outer layer portion. ,
The first internal electrode layer or the second internal electrode layer (the first in which Cu is solid-dissolved) of the inner layer portion in contact with the first main surface side outer layer portion and the second main surface side outer layer portion. A multilayer ceramic capacitor having a Cu content of 0.1 mol or more and 8.61 mol or less when the total of Ni and Cu in the internal electrode layer or the second internal electrode layer is 100 mol. A first main surface and a second main surface that include a plurality of laminated dielectric layers and face each other in the stacking direction, and a first side surface and a second side surface that face each other in the width direction orthogonal to the stacking direction. A laminate including a first end face and a second end face facing each other in the length direction orthogonal to the stacking direction and the width direction.
A first internal electrode layer that is alternately laminated with the plurality of dielectric layers and drawn out to the first end face,
A second internal electrode layer that is alternately laminated with the plurality of dielectric layers and drawn out to the second end face.
With the first external electrode connected to the first internal electrode layer and arranged on the first end face,
With the second external electrode connected to the second internal electrode layer and arranged on the second end face,
In a multilayer ceramic capacitor with
The first internal electrode layer and the second internal electrode layer contain Ni and contain Ni.
The laminated body includes a plurality of inner layer portions in which the first internal electrode layer and the second internal electrode layer face each other.
The plurality of dielectrics located on the first main surface side and between the first main surface and the outermost surface of the inner layer portion on the first main surface side and an extension line of the outermost surface. The first main surface side outer layer formed from the layers,
A plurality of dielectric layers located on the second main surface side and between the outermost surface of the inner layer portion on the second main surface side and the extension line of the outermost surface. The second main surface side outer layer formed from
A first side surface side formed from the plurality of dielectric layers located on the first side surface side and located between the first side surface and the outermost surface of the inner layer portion on the first side surface side. With the outer layer
A second side surface side formed from the plurality of dielectric layers located on the second side surface side and located between the second side surface and the outermost surface of the inner layer portion on the second side surface side. With the outer layer
Have,
In the inner layer portion, 5 μm in the inner electrode layer side from the outermost surface of the inner layer portion on the first side surface side in the width direction and in the width direction from the outermost surface of the inner layer portion on the second side surface side. Cu is solid-solved only in the first internal electrode or the second internal electrode layer in the region 5 μm on the internal electrode layer side toward the surface.
Inside the region containing 5 μm from the outermost surface of the inner layer portion on the first side surface side toward the inner electrode layer side and inside from the outermost surface of the inner layer portion on the second side surface side toward the width direction. Ni and Cu in the first internal electrode layer and the second internal electrode layer (the first internal electrode layer in which Cu is solidified or the second internal electrode layer) in a region containing 5 μm on the electrode side. A multilayer ceramic capacitor having a Cu content of 0.11 mol or more and 8.44 mol or less when the total of the above is 100 mol. A first main surface and a second main surface that include a plurality of laminated dielectric layers and face each other in the stacking direction, and a first side surface and a second side surface that face each other in the width direction orthogonal to the stacking direction. A laminate including a first end face and a second end face facing each other in the length direction orthogonal to the stacking direction and the width direction.
A first internal electrode layer that is alternately laminated with the plurality of dielectric layers and drawn out to the first end face,
A second internal electrode layer that is alternately laminated with the plurality of dielectric layers and drawn out to the second end face.
With the first external electrode connected to the first internal electrode layer and arranged on the first end face,
With the second external electrode connected to the second internal electrode layer and arranged on the second end face,
In a multilayer ceramic capacitor with
The first internal electrode layer and the second internal electrode layer contain Ni and contain Ni.
The laminated body includes a plurality of inner layer portions in which the first internal electrode layer and the second internal electrode layer face each other.
The plurality of dielectrics located on the first main surface side and between the first main surface and the outermost surface of the inner layer portion on the first main surface side and an extension line of the outermost surface. The first main surface side outer layer formed from the layers,
A plurality of dielectric layers located on the second main surface side and between the outermost surface of the inner layer portion on the second main surface side and the extension line of the outermost surface. The second main surface side outer layer formed from
A first side surface side formed from the plurality of dielectric layers located on the first side surface side and located between the first side surface and the outermost surface of the inner layer portion on the first side surface side. With the outer layer
A second side surface side formed from the plurality of dielectric layers located on the second side surface side and located between the second side surface and the outermost surface of the inner layer portion on the second side surface side. With the outer layer
Have,
The first inner electrode layer or the second inner electrode layer of the inner layer portion in contact with the first main surface side outer layer portion and the second main surface side outer layer portion, and the first in the inner layer portion. 5 μm in the width direction from the outermost surface of the inner layer portion on the side surface side of the inner layer portion and 5 μm in the width direction from the outermost surface of the inner layer portion on the second side surface side. Cu is solid-dissolved only in the first internal electrode layer or the second internal electrode layer in the region.
Sn when the total of Ni and Sn in the first internal electrode layer and the second internal electrode layer in contact with the first main surface side outer layer portion and the second main surface side outer layer portion is 100 mol. The content of is 0.1 mol or more and 8.61 mol or more.
Inside the region containing 5 μm from the outermost surface of the inner layer portion on the first side surface side toward the inner electrode layer side and inside from the outermost surface of the inner layer portion on the second side surface side toward the width direction. When the total of Ni and Cu in the first internal electrode layer and the second internal electrode layer in the region 5 μm on the electrode layer side is 100 mol, the Cu content is 0.11 mol or more. A multilayer ceramic capacitor having a size of 44 mol or less.

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