JP2021005757A - Image encoding device, image encoding method, and image encoding program - Google Patents

Abstract

To provide a technique for improving the coding efficiency by performing block division suitable for image coding and decoding.SOLUTION: An image encoding device includes a block vector detection unit that detects a block vector of a block to be processed, a candidate derivation unit that derives a block vector candidate for the block to be processed in a picture to be processed from coded information stored in a coded information storage memory, a selection unit that selects a block vector from block vector candidates and uses the block vector as a predicted block vector, a correction unit that corrects the prediction block vector such that the prediction block vector is included in a referenceable area and derives a correction prediction block vector, and a subtraction unit that calculates a difference block vector by subtracting the correction prediction block vector from the block vector.SELECTED DRAWING: Figure 1

Description

The present invention relates to an image coding and decoding technique for dividing an image into blocks and performing prediction.

In image coding and decoding, an image to be processed is divided into blocks which are a set of a predetermined number of pixels, and processing is performed in block units. Coding efficiency is improved by dividing into appropriate blocks and appropriately setting in-screen prediction (intra prediction) and inter-screen prediction (inter prediction).

Patent Document 1 discloses an intra-prediction technique for obtaining a predicted image using decoded pixels adjacent to a block to be encoded / decoded.

Japanese Unexamined Patent Publication No. 2009-246975

However, the technique of Patent Document 1 uses only the decoded pixels adjacent to the block to be encoded / decoded for prediction, and the prediction efficiency is poor.

In order to solve the above problem, an image coding device that encodes the image in block units in which each picture of the image is divided, in which the luminance block and the color difference block are synchronized with each other and recursively according to a common division mode. In the intra-block copy prediction that divides into and refers to the decoded pixels in the screen pointed to by the block vector as the predicted value, the coding block of the color difference below the predetermined minimum size of the color difference coding block is prohibited, and the color difference format is 4. When the luminance block is recursively divided at 2: 0 and the corresponding color difference block becomes a color difference coding block smaller than the predetermined color difference coding block minimum size when the color difference block is divided, the color difference block is divided. In the three-division mode in which the division target block is divided into three, the division target block of the luminance signal is divided into a first luminance signal coding block, a second luminance signal coding block, and a third luminance signal. It is divided into signal coding blocks, and the color difference signal division target block is not divided into one color difference signal coding block, which corresponds to the position of the lower right pixel in the center of the color difference signal coding block. By scaling the value of the block vector of the coded block including the pixel of the color difference signal, it is characterized by including an intra block copy unit which is used as the block vector of the coded block of the color difference signal.

According to the present invention, highly efficient image coding / decoding processing can be realized with a low load.

It is a block diagram of the image coding apparatus which concerns on embodiment of this invention. It is a block diagram of the image decoding apparatus which concerns on embodiment of this invention. It is a figure explaining the color difference format of an image. It is a figure which shows the mode that the input image is divided into a tree block and a coded block. It is a figure which shows the division shape of a block. It is a flowchart for demonstrating the operation which divides an image into tree blocks, and further divides each tree block into coded blocks. It is a flowchart for demonstrating the operation which divides a block. It is a figure explaining whether or not the color difference coding block of a predetermined size or less is prohibited in intra prediction or IBC prediction. It is a flowchart which shows the operation which encodes a block division information. It is a figure for demonstrating an intra prediction. It is a figure for demonstrating the reference block of an inter-prediction. It is a flowchart which shows the operation of decoding a block division information and dividing a block. It is a figure which shows the correspondence of a syntax element and a mode about inter prediction. It is a figure for demonstrating the affine transformation motion compensation of two control points. It is a figure for demonstrating the affine transformation motion compensation of three control points. It is a block diagram of the detailed structure of the inter prediction unit 102 of FIG. It is a block diagram of the detailed structure of the normal prediction motion vector mode derivation unit 301 of FIG. It is a block diagram of the detailed structure of the normal merge mode derivation part 302 of FIG. It is a flowchart for demonstrating the normal prediction motion vector mode derivation process of the normal prediction motion vector mode derivation unit 301 of FIG. It is a flowchart which shows the processing procedure of the normal prediction motion vector mode derivation processing. It is a flowchart explaining the procedure of a normal merge mode derivation process. It is a block diagram of the detailed structure of the inter-prediction unit 203 of FIG. It is a block diagram of the detailed structure of the normal prediction motion vector mode derivation unit 401 of FIG. It is a block diagram of the detailed structure of the normal merge mode derivation part 402 of FIG. It is a flowchart for demonstrating the normal prediction motion vector mode derivation process of the normal prediction motion vector mode derivation unit 401 of FIG. It is a flowchart explaining the history prediction motion vector candidate list initialization / update processing procedure. It is a flowchart of the same element confirmation processing procedure in the history prediction motion vector candidate update processing procedure. It is a flowchart of the element shift processing procedure in the history prediction motion vector candidate update processing procedure. It is a flowchart explaining the history prediction motion vector candidate derivation processing procedure. It is a flowchart explaining the history merge candidate derivation processing procedure. It is a figure explaining an example of the history prediction motion vector candidate list update processing. It is a figure explaining the effective reference area of an intrablock copy. It is a figure for demonstrating the motion compensation prediction at the time of L0 prediction, and the reference picture (RefL0Pic) of L0 is at the time before the processing target picture (CurPic). It is a figure for demonstrating motion compensation prediction at the time of L0 prediction, and the reference picture of L0 prediction is at the time after the processing target picture. It is a figure for clarifying the motion compensation prediction in the case of the bi-prediction, when the reference picture of L0 prediction is at the time before the processing target picture, and the reference picture of L1 prediction is at the time after the processing target picture. .. It is a figure for demonstrating the prediction direction of the motion compensation prediction at the time when the reference picture of L0 prediction and the reference picture of L1 prediction are at the time before the picture to be processed in the bi-prediction. It is a figure for demonstrating the prediction direction of the motion compensation prediction at the time when the reference picture of L0 prediction and the reference picture of L1 prediction are at the time after the processing target picture in the bi-prediction. It is a flowchart explaining the average merge candidate derivation processing procedure. It is a table which shows the information about a merge difference motion vector. It is a figure explaining the derivation of the merge difference motion vector. It is a block diagram of the detailed structure of the intra prediction unit 103 of FIG. It is a block diagram of the detailed structure of the intra prediction unit 204 of FIG. It is a block diagram of an intra block copy prediction unit 352. It is a block diagram of an intra block copy prediction unit 362. It is a flowchart for demonstrating the prediction intra block copy processing of the intra block copy prediction unit 352. It is a flowchart for demonstrating the prediction intra block copy processing of the intra block copy prediction unit 362. It is a flowchart for demonstrating the merge intra block copy processing. It is a flowchart which shows the processing procedure of the block vector mode derivation processing of the prediction intra block copy. It is a figure explaining the process of the reference position correction part 380 and the reference position correction part 480. It is a figure which shows the state of correcting a reference position. It is a figure explaining the position of the upper left and the lower right when the referenceable area is rectangular. It is a figure explaining the process of correcting the reference position of the part where a referenceable area is not rectangular. It is a figure which shows the state of correcting a reference position. It is a figure explaining the process of the reference position correction part 380 and the reference position correction part 480. It is a figure explaining the state of decomposing the referenceable area into two. It is a figure explaining the process which decomposes a referenceable area into two, and corrects each reference position. It is a flowchart which shows the operation which encodes the coding information of a coding block. It is a flowchart which shows the operation of decoding the coding information of a coding block. It is a figure for demonstrating the coding block of the luminance signal at the same position as the coding block of the color difference signal when the color difference format is 4: 2: 0. It is a figure for demonstrating the coding block of the luminance signal at the same position as the coding block of the color difference signal when the color difference format is 4: 2: 0. It is a figure for demonstrating the coding block of the luminance signal at the same position as the coding block of the color difference signal when the color difference format is 4: 2: 0. It is a figure for demonstrating the coding block of the luminance signal at the same position as the coding block of the color difference signal when the color difference format is 4: 2: 0.

The technology and technical terms used in this embodiment are defined.

<Color difference format>
The color difference format represents the ratio of the number of sampled pixels of three signals of one luminance information and two color difference information as X: Y: Z. Image color difference formats include 4: 2: 0, 4: 2: 2, 4: 4: 4, monochrome, and the like.

FIG. 3 is a diagram illustrating each color difference format of the image. X indicates the position of the pixel of the luminance signal on the screen plane of the image, and ◯ indicates the position of the pixel of the color difference signal.

4: 2: 0 shown in FIG. 3A is a color difference format in which the color difference signal is sampled at a density of half in both the horizontal and vertical directions with respect to the luminance signal. That is, 4: 2: 0 has the same aspect ratio of the pixels of the luminance signal and the color difference signal. At 4: 2: 0, the color difference signal may be sampled at the position shown in FIG. 3 (e).

4: 2: 2 shown in FIG. 3B is a color difference format in which the color difference signal is sampled at a density of half in the horizontal direction and the same density in the vertical direction with respect to the luminance signal. That is, the aspect ratios of the pixels of the luminance signal and the color difference signal are different in 4: 2: 2.

4: 4: 4 shown in FIG. 3C is a color difference format in which both the luminance signal and the color difference signal are sampled at the same density. That is, in 4: 4: 4, the aspect ratios of the pixels of the luminance signal and the color difference signal are the same.

Monochrome shown in FIG. 3D is a color difference format in which there is no color difference signal and only a luminance signal is used.

In the present embodiment, unless otherwise specified, the color difference format is assumed to be 4: 2: 0.

<Tree block>
In the embodiment, as shown by the thick line in FIG. 4, the screen is evenly divided into arbitrary rectangular units of the same size. This unit is defined as a tree block, and is used as a basic unit of address management for specifying a block to be processed (a block to be encoded in coding and a block to be decoded in decoding) in an image. Except for monochrome, the tree block is composed of one luminance signal and two color difference signals. The size of the tree block can be freely set to the power of 2 according to the picture size and the texture in the screen.

<Coded block>
The tree block divides the luminance signal and color difference signal in the tree block into four hierarchically (recursively), vertically into two, and vertically as necessary in order to optimize the coding process according to the texture in the screen. It can be divided into three, two horizontal or three horizontal to make a small block. Each of these blocks is defined as a coded block, and is used as a basic unit of processing when encoding and decoding. Except for monochrome, it is composed of one luminance signal coding block and two color difference signal coding blocks. The maximum size of the coded block is the same as the size of the tree block. The coded block having the minimum size of the coded block is called the minimum coded block and can be freely set.

FIG. 5 is a diagram illustrating an example of a division mode of the coded block. The block division mode includes a 4-division mode in which the block is evenly divided into 4 parts at a ratio of 1: 1 (601 in FIG. 5), and the block width is divided into 2 vertically at a ratio of 1: 1. Vertical 2-division mode in which the cross section is in the vertical direction (602 in FIG. 5), and vertical 3-division mode in which the block width is vertically divided into left, middle, and right at a ratio of 1: 2: 1 and the cross section is in the vertical direction. (603 in FIG. 5), the block height is divided vertically into two vertically at a ratio of 1: 1 and the cross section is in the horizontal direction (604 in FIG. 5), and the block height is 1: 2. There is a horizontal three-division mode (605 in FIG. 5) in which the cross section is horizontally divided into three in the upper, middle, and lower directions at a ratio of 1.

In FIG. 4, the coded block A is a single coded block without dividing the tree block. The coding block B is a coding block formed by dividing a tree block into four parts. The coded block C is a coded block formed by further dividing a block formed by dividing a tree block into four. The coded block D is a coded block formed by dividing a tree block into four and further hierarchically dividing the block into four.

The coded block E is a coded block formed by further dividing a block formed by dividing a tree block into four and further dividing the block into two vertically. The coded block F is a coded block formed by further dividing a block formed by dividing a tree block into four and further dividing the block into three vertically. The coded block G is a coded block formed by further dividing a block formed by dividing a tree block into four and further dividing it into two vertically in the horizontal direction. The coded block H is a coded block formed by further dividing a block formed by dividing a tree block into four and further dividing the block into three horizontally.

In the description of the embodiment, the color difference format is 4: 2: 0, the size of the tree block is set to 64 × 64 pixels for the luminance signal, and 32 × 32 pixels for the color difference signal, and the minimum coded block size is set. It is assumed that the luminance signal is set to 8 × 8 pixels and the color difference signal is set to 4 × 4 pixels. In FIG. 4, the size of the coding block A is 64 × 64 pixels for the luminance signal and 32 × 32 pixels for the color difference signal, and the size of the coding block B is 32 × 32 pixels for the luminance signal and 16 × 16 pixels for the color difference signal. The size of the coded block C is 16 × 16 pixels for the luminance signal and 8 × 8 pixels for the color difference signal, and the size of the coded block D is 8 × 8 pixels for the luminance signal and 4 × 4 pixels for the color difference signal. .. When the color difference format is 4: 4: 4, the size of the luminance signal and the color difference signal of each coded block are equal. When the color difference format is 4: 2: 2, the size of the coded block A is 32 × 64 pixels for the color difference signal, the size of the coded block B is 16 × 32 pixels for the color difference signal, and the size of the coded block C is The color difference signal has 8 × 16 pixels, and the size of the coded block D, which is the smallest coded block, is 4 × 8 pixels for the color difference signal.

When a certain block is divided, the block before the division is called a parent block, and each block after the division is called a child block.

<Prediction mode>
Processed image to be processed in units of coded blocks to be processed (in the coding process, the coded signal is used for decoded images, image signals, tree blocks, blocks, coded blocks, etc., and in the decoding process Intra-prediction (MODE_INTRA) and IBC (intra-block copy) prediction (MODE_IBC), and processing that make predictions from image signals around the image, image signal, tree block, block, coded block, etc. that have been decoded. Switch the inter-prediction (MODE_INTER) that makes a prediction from the image signal of the completed image. The mode for discriminating between the intra prediction (MODE_INTRA), the IBC prediction (MODE_IBC) and the inter prediction (MODE_INTER) is defined as the prediction mode (CuPredMode). The prediction mode (CuPredMode) has an intra prediction (MODE_INTRA), an IBC prediction (MODE_IBC), or an inter prediction (MODE_INTER) as values.

<Intrablock copy prediction>
The IBC (intra-block copy) prediction is a process of encoding / decoding a block to be processed by referring to a decoded pixel in a picture to be processed as a predicted value. Then, the distance from the processing target block to the reference pixel is represented by a block vector. Since the block vector refers to the picture to be processed and the reference picture is uniquely determined, the reference index is unnecessary. The difference between the block vector and the motion vector is whether the referenced picture is a processed picture or a processed picture at a different time. In addition, the block vector can be selected from 1-pixel accuracy or 4-pixel accuracy using the adaptive motion vector resolution (AMVR).

In the intra-block copy, two modes, a predictive intra-block copy mode and a merge intra-block copy mode, can be selected.

The prediction intra-block copy mode is a mode in which the block vector of the block to be processed is determined from the prediction block vector derived from the processed information and the difference block vector. The prediction block vector is derived from the processed block adjacent to the processing target block and the index for identifying the prediction block vector. The index and difference block vector for specifying the predicted block vector are transmitted as a bit stream.

The merge intra-block copy mode is a mode in which the intra-block copy prediction information of the processing target block is derived from the intra-block copy prediction information of the processed block adjacent to the processing target block without transmitting the differential motion vector.

<Inter prediction>
In the inter-prediction that predicts from the image signal of the processed image, a plurality of processed images can be used as reference pictures. In order to manage a plurality of reference pictures, two types of reference lists, L0 (reference list 0) and L1 (reference list 1), are defined, and the reference pictures are specified by using the reference indexes of each. L0 prediction (Pred_L0) is available for P-slices. For B slices, L0 prediction (Pred_L0), L1 prediction (Pred_L1), and dual prediction (Pred_BI) can be used. The L0 prediction (Pred_L0) is an inter-prediction that refers to a reference picture managed by L0, and the L1 prediction (Pred_L1) is an inter-prediction that refers to a reference picture managed by L1. The bi-prediction (Pred_BI) is an inter-prediction in which both L0 prediction and L1 prediction are performed, and one reference picture managed in each of L0 and L1 is referred to. Information that identifies L0 prediction, L1 prediction, and bi-prediction is defined as an inter-prediction mode. In the subsequent processing, it is assumed that the constants and variables with the subscript LX attached to the output are processed for each L0 and L1.

<Predicted motion vector mode>
The predicted motion vector mode is a mode in which an index for specifying a predicted motion vector, a differential motion vector, an inter-prediction mode, and a reference index are transmitted to determine inter-prediction information of a block to be processed. The predicted motion vector is a predicted motion vector candidate derived from a processed block adjacent to the processing target block or a block belonging to the processed image and located at the same position as or near (near) the processing target block, and a predicted motion. Derived from the index to identify the vector.

<Merge mode>
In the merge mode, the processed block adjacent to the processed block or the block belonging to the processed image and located at the same position as or near (near) the processed block without transmitting the differential motion vector and the reference index. In this mode, the inter-prediction information of the block to be processed is derived from the inter-prediction information of.

The processed block adjacent to the processing target block and the inter-prediction information of the processed block are defined as spatial merge candidates. Blocks that belong to the processed image and are located at the same position as or near (near) the block to be processed, and inter-prediction information derived from the inter-prediction information of that block are defined as time merge candidates. Each merge candidate is registered in the merge candidate list, and the merge index identifies the merge candidate used in the prediction of the block to be processed.

<Adjacent block>
FIG. 11 is a diagram illustrating a reference block referred to for deriving inter-prediction information in the predicted motion vector mode and the merge mode. A0, A1, A2, B0, B1, B2, and B3 are processed blocks adjacent to the processing target block. T0 is a block belonging to the processed image, and is a block located at the same position as or near (near) the processing target coding block of the processing target image.

A1 and A2 are blocks located on the left side of the processing target coding block and adjacent to the processing target coding block. B1 and B3 are blocks located above the processing target coding block and adjacent to the processing target coding block. A0, B0, and B2 are blocks located at the lower left, upper right, and upper left of the coded block to be processed, respectively.

The details of how to handle adjacent blocks in the predicted motion vector mode and the merge mode will be described later.

<Affine transformation motion compensation>
In the affine transformation motion compensation, the coding block is divided into sub-blocks of a predetermined unit, and the motion vector is set individually for each sub-block to perform the motion compensation. The motion vector of each sub-block is derived from the inter-prediction information of the processed block adjacent to the processing target block or the block belonging to the processed image and located at the same position as or near (near) the processing target block. Derived based on one or more control points. In the present embodiment, the size of the subblock is 4x4 pixels, but the size of the subblock is not limited to this, and the motion vector may be derived in pixel units.

FIG. 14 shows an example of affine transformation motion compensation when there are two control points. In this case, since the two control points have two parameters, a horizontal component and a vertical component, the affine transformation when there are two control points is called a four-parameter affine transformation. CP1 and CP2 in FIG. 14 are control points. FIG. 15 shows an example of affine transformation motion compensation when there are three control points. In this case, since the three control points have two parameters, a horizontal component and a vertical component, the affine transformation when there are three control points is called a six-parameter affine transformation. CP1, CP2, and CP3 in FIG. 15 are control points.

Affine transformation motion compensation is available in both predictive motion vector mode and merge mode. The mode in which the affine transformation motion compensation is applied in the predicted motion vector mode is defined as the subblock predicted motion vector mode, and the mode in which the affine transformation motion compensation is applied in the merge mode is defined as the subblock merge mode.

<POC>
The POC (Picture Order Count) is a variable associated with the encoded picture, and a value that increases by 1 in the output order of the picture is set. Depending on the value of POC, it is possible to determine whether the pictures are the same, determine the context between the pictures in the output order, and derive the distance between the pictures. For example, if the POCs of the two pictures have the same value, it can be determined that they are the same picture. If the POCs of the two pictures have different values, it can be determined that the picture with the smaller POC value is the picture to be output first, and the difference between the POCs of the two pictures is the distance between the pictures in the time axis direction. Shown.

(First Embodiment)
The image coding device 100 and the image decoding device 200 according to the first embodiment of the present invention will be described.

FIG. 1 is a block diagram of the image coding device 100 according to the first embodiment. The image coding device of the embodiment includes an image coding device 100, a block division unit 101, an inter prediction unit 102, an intra prediction unit 103, a decoded image memory 104, a prediction method determination unit 105, a residual signal generation unit 106, and orthogonality. It includes a conversion / quantization unit 107, a bit string coding unit 108, an inverse quantization / inverse orthogonal conversion unit 109, a decoded image signal superimposition unit 110, and a coding information storage memory 111.

The block division unit 101 divides the input image into tree blocks, and further recursively and hierarchically divides each tree block into coded blocks. In each layer, the block division unit 101 divides by four divisions, vertical two divisions, vertical three divisions, horizontal two divisions, and horizontal three divisions, and blocks division information is divided into an inter prediction unit 102, an intra prediction unit 103, and a prediction method. Supply to the decision section. Further, the generated image signal of the coded block to be processed is supplied to the inter prediction unit 102, the intra prediction unit 103, and the residual signal generation unit 106. In addition, information indicating the determined recursive division structure is supplied to the bit string coding unit 108. The detailed operation of the block dividing unit 101 will be described later.

The inter-prediction unit 102 performs inter-prediction of the coded block to be processed. Multiple inter-prediction information candidates are derived from the inter-prediction information stored in the coding information storage memory and the decoded image signal stored in the decoded image memory 104, and suitable inter-prediction is derived from the plurality of candidates. A mode is selected, and a predicted image signal corresponding to the selected inter-prediction mode and the selected inter-prediction mode is supplied to the prediction method determination unit 105. The detailed configuration and operation of the inter-prediction unit 102 will be described later.

The intra prediction unit 103 performs intra prediction and intra block copy prediction of the coded block to be processed. In the intra prediction and the intra block copy prediction, a prediction image signal is created from the same image signal as the processing target coded block stored in the decoded image memory 104, that is, the decoded area of the processing target image, and the prediction method is determined. Supply to unit 105. The detailed configuration and operation of the intra prediction unit 103 will be described later.

The decoded image memory 104 stores the decoded image generated by the decoded image signal superimposing unit 110. Further, the decoded image stored in the decoded image memory is supplied to the inter prediction unit 102 and the intra prediction unit 103.

The prediction method determination unit 105 divides each prediction into blocks by evaluating each prediction using the coding information, the code amount of the residual signal, the amount of distortion between the predicted image signal and the image signal to be processed, and the like. In each layer, it is determined whether or not to divide the block, and when the block is divided, one of 4 division, vertical 2 division, vertical 3 division, horizontal 2 division, and horizontal 3 division is determined. Further, in the coded block, it is determined whether the optimum prediction mode CuPredMode of the coded block to be processed is the intra prediction mode (PRED_INTRA), the IBC prediction mode (PRED_IBC), or the inter prediction mode (PRED_INTER). In the case of intra prediction (PRED_INTRA), the intra brightness prediction mode and the intra color difference prediction mode are determined. In the case of IBC prediction (PRED_IBC), the coding information related to IBC prediction (PRED_IBC) such as merge mode information and block vector is determined. In the case of inter-prediction (PRED_INTER), coding information related to inter-prediction (PRED_INTER) such as merge mode information, inter-prediction mode, reference picture, and motion vector is determined and supplied to the bit string coding unit 108. The determined coding information is supplied to the coding information storage memory 111.

The residual signal generation unit 106 generates a residual signal by subtracting the predicted image signal from the image signal to be processed, and supplies the residual signal to the orthogonal transformation / quantization unit 107.

The orthogonal conversion / quantization unit 107 performs orthogonal conversion and quantization on the residual signal according to the quantization parameter to generate an orthogonal conversion / quantization residual signal, and is inversely quantum with the bit string coding unit 108. It is supplied to the quantization / inverse orthogonal conversion unit 109.

In addition to the sequence, picture, and slice unit information, the bit string coding unit 108 encodes the block division information determined by the prediction method determination unit 105 and the coding information according to the prediction method for each coded block. Specifically, in each layer of block division, information indicating block division, for example, a flag indicating whether or not to divide the block, a flag indicating whether or not to divide into four, and whether or not to divide into two or three A flag indicating whether to divide vertically or horizontally, a flag indicating whether to divide into two or three, and the like are encoded. Further, the information indicating the prediction mode CuPredMode for each coding block is encoded. When the prediction mode is intra prediction (PRED_INTRA), the information regarding the intra luminance prediction mode and the intra color difference prediction mode is encoded and used as the first coded bit string. When the prediction mode is IBC prediction (PRED_IBC), the flag for determining whether or not the merge mode is used, the merge index for the merge mode, the prediction block vector index for the non-merge mode, the difference block vector, and other coding information are encoded. , The first coded bit string. If the prediction mode is inter-prediction (PRED_INTER), a flag that determines whether or not it is in merge mode, a subblock merge flag, a merge index if it is in merge mode, an inter-prediction mode if it is not in merge mode, a prediction motion vector index, and a differential motion. Coding information such as vector information and subblock prediction motion vector flags is encoded according to a specified syntax (encoding bit string syntax rule) to be a first coded bit string. Further, the bit string coding unit 108 entropy-encodes the orthogonal conversion and the quantized residual signal according to the specified syntax to generate a second coded bit string. The first coded bit string and the second coded bit string are multiplexed according to the specified syntax, and a bit stream is output.

The inverse quantization / inverse orthogonal conversion unit 109 performs inverse quantization and inverse orthogonal conversion of the orthogonal conversion / quantization residual signal supplied from the orthogonal conversion / quantization unit 107 to calculate the residual signal and decode it. It is supplied to the image signal superimposing unit 110.

The decoded image signal superimposition unit 110 superimposes the predicted image signal according to the determination by the prediction method determination unit 105 and the residual signal that has been inversely quantized and inversely orthogonally converted by the inverse quantization / inverse orthogonal conversion unit 109 to obtain the decoded image. Is generated and stored in the decoded image memory 104. The decoded image may be stored in the decoded image memory 104 after being subjected to a filtering process for reducing distortion such as block distortion due to encoding.

The coding information storage memory 111 stores coding information such as a prediction mode (intra prediction, IBC prediction, or inter prediction) determined by the prediction method determination unit 105. In the case of intra-prediction, the coding information stored in the coding information storage memory 111 is intra-prediction information such as the determined intra-luminance prediction mode and intra-color difference prediction mode. In the case of IBC prediction, it is IBC information such as a determined block vector. In the case of inter-prediction, it is inter-prediction information such as a determined motion vector, a reference list, and a reference index. The construction of the history candidate list managed by the coded information storage memory 111 will be described later.

FIG. 2 is a block showing a configuration of an image decoding device according to an embodiment of the present invention corresponding to the image coding device of FIG. The image decoding device of the embodiment includes a bit string decoding unit 201, a block division unit 202, an inter prediction unit 203, an intra prediction unit 204, a coded information storage memory 205, an inverse quantization / inverse orthogonal conversion unit 206, and a decoded image signal superimposition. A unit 207 and a decoded image memory 208 are provided.

Since the decoding process of the image decoding device of FIG. 2 corresponds to the decoding process provided inside the image coding device of FIG. 1, the coding information storage memory 205 of FIG. 2 and the inverse quantization / reverse Each configuration of the orthogonal conversion unit 206, the decoded image signal superimposing unit 207, and the decoded image memory 208 includes the inverse quantization / inverse orthogonal conversion unit 109 of the image coding apparatus of FIG. 1, the decoded image signal superimposing unit 110, and the coding information. It has a function corresponding to each configuration of the storage memory 111 and the decoded image memory 104.

The bit stream supplied to the bit string decoding unit 201 is separated according to a specified syntax rule. The separated first coded bit string is decoded to obtain sequence, picture, slice, block division information, and coded block unit coding information. Specifically, in each layer of block division, information indicating block division, for example, a flag indicating whether or not to divide the block, a flag indicating whether or not to divide into four, and whether or not to divide into two or three The flag indicating, the flag indicating whether to divide vertically or horizontally, the flag indicating whether to divide into two or three, and the like are decoded. Further, the information indicating the prediction mode CuPredMode is decoded for each coded block. When the prediction mode is intra prediction (PRED_INTRA), the intra prediction information such as the intra brightness prediction mode and the intra color difference prediction mode is decoded. In the case of IBC (PRED_IBC), the specified syntax (code) is the coding information such as the flag that determines whether or not it is in merge mode, the merge index if it is in merge mode, the predicted block vector index if it is not in merge mode, and the difference block vector. Decoding is performed according to the syntax rule of the coded bit string), and the coded information is supplied to the intra prediction unit 204 and the coded information storage memory 205. In the case of inter-prediction (PRED_INTER), the flag that determines whether or not it is in merge mode, in the case of merge mode, the merge index, subblock merge flag, in the case of predictive motion vector mode, the inter-predictive mode, predicted motion vector index, differential motion. The coded information related to the vector, the sub-block prediction motion vector flag, etc. is decoded according to the specified syntax, and the coded information is supplied to the inter-prediction unit 203 and the coded information storage memory 205. Further, the separated second coded bit string is decoded to calculate the orthogonally converted / quantized residual signal, and the orthogonally converted / quantized residual signal is supplied to the inversely quantized / inversely orthogonal converter 206. To do.

The inter-prediction unit 203 describes the code of the already decoded image signal stored in the coding information storage memory 205 when the prediction mode PredMode of the coded block to be processed is the inter-prediction (PRED_INTER) and the prediction motion vector mode. A plurality of predicted motion vector candidates are derived using the conversion information and registered in the predicted motion vector candidate list described later, and a bit string decoding is performed from the plurality of predicted motion vector candidates registered in the predicted motion vector candidate list. The predicted motion vector corresponding to the predicted motion vector index decoded and supplied by the unit 201 is selected, the motion vector is calculated from the difference vector decoded by the bit string decoding unit 201 and the selected predicted motion vector, and other coding is performed. It is stored in the coded information storage memory 205 together with the information. The coding information of the coding block supplied and stored here is the flag predFlagL0 [xP] [yP], predFlagL1 [xP] indicating whether or not to use the prediction mode PredMode, the division mode PartMode, the L0 prediction, and the L1 prediction. Reference indexes of [yP], L0, L1 refIdxL0 [xP] [yP], refIdxL1 [xP] [yP], motion vectors mvL0 [xP] [yP], mvL1 [xP] [yP] of L0, L1 etc. .. Here, xP and yP are indexes indicating the positions of the upper left pixels of the coded block in the picture. When the prediction mode PredMode is inter-prediction (MODE_INTER) and the inter-prediction mode is L0 prediction (Pred_L0), the flag predFlagL0 indicating whether to use L0 prediction is 1, and the flag predFlagL1 indicating whether to use L1 prediction. Is 0. When the inter-prediction mode is L1 prediction (Pred_L1), the flag predFlagL0 indicating whether or not to use the L0 prediction is 0, and the flag predFlag L1 indicating whether or not to use the L1 prediction is 1. When the inter-prediction mode is bi-prediction (Pred_BI), the flag predFlagL0 indicating whether or not to use L0 prediction and the flag predFlagL1 indicating whether or not to use L1 prediction are both 1. Further, when the prediction mode PredMode of the coded block to be processed is inter-prediction (PRED_INTER) and the merge mode is set, merge candidates are derived. Using the coding information of the already decoded coding block stored in the coding information storage memory 205, a plurality of merge candidates are derived, registered in the merge candidate list described later, and registered in the merge candidate list. A flag indicating whether or not to use the L0 prediction and the L1 prediction of the selected merge candidate by selecting the merge candidate corresponding to the merge index decoded and supplied by the bit string decoding unit 201 from the plurality of merge candidates. PredFlagL0 [xP] [yP], predFlagL1 [xP] [yP], reference index refIdxL0 [xP] [yP], refIdxL1 [xP] [yP], L0, L1 motion vector mvL0 [xP] [yP] ], MvL1 [xP] [yP] and other inter-prediction information is stored in the coded information storage memory 205. Here, xP and yP are indexes indicating the positions of the upper left pixels of the coded block in the picture. The detailed configuration and operation of the inter-prediction unit 203 will be described later.

The intra prediction unit 204 performs intra prediction when the prediction mode PredMode of the coded block to be processed is intra prediction (PRED_INTRA), and performs intra block copy prediction when IBC prediction (PRED_IBC). At the time of intra-prediction (PRED_INTRA), the coding information supplied from the bit string decoding unit 201 includes an intra-luminance prediction mode and an intra-color difference prediction mode, and decodes according to the intra-luminance prediction mode and the intra-color difference prediction mode. A predicted image signal is generated by intra-prediction from the decoded image signal stored in the image memory 208, and the predicted image signal is supplied to the decoded image signal superimposing unit 207. At the time of IBC prediction (PRED_IBC), a block vector is derived and intra-block copy prediction is performed based on the coding information regarding the IBC prediction (PRED_IBC) supplied from the bit string decoding unit 201. Since the intra prediction unit 204 corresponds to the intra prediction unit 103 of the image coding device 100, the same processing as that of the intra prediction unit 103 is performed. The detailed configuration and operation of the intra prediction unit 204 will be described later.

The inverse quantization / inverse orthogonal conversion unit 206 performs inverse orthogonal conversion and inverse quantization on the orthogonal conversion / quantization residual signal decoded by the bit string decoding unit 201, and is subjected to inverse orthogonal conversion / inverse quantization. Residual signal is obtained.

The decoded image signal superimposition unit 207 is inversely quantized by the inter-prediction unit 203 or the intra-prediction predicted image signal by the intra-prediction unit 204, or the inverse-orthogonal conversion unit 206. The decoded image signal is decoded and stored in the decoded image memory 208 by superimposing the inverse quantized residual signal. When storing in the decoded image memory 208, the decoded image may be stored in the decoded image memory 208 after being subjected to a filtering process for reducing block distortion or the like due to coding.

<Block division>
Next, the operation of the block dividing unit 101 in the image coding apparatus 100 will be described. In the present embodiment, a single tree mode in which the luminance block and the color difference block are synchronized and divided by the same division method will be described. FIG. 6 is a flowchart showing an operation of dividing an image into tree blocks and further dividing each tree block into coded blocks. First, the input image is divided into tree blocks of a predetermined size (step S1001). Each tree block is scanned in a predetermined order, that is, in the order of raster scan (steps S1002 to S1004), and the inside of the tree block to be processed is recursively and hierarchically divided into coded blocks (step S1003).

FIG. 7 is a flowchart showing a detailed operation of the coded block division process on the coded side of step S1003. The block division section 101 on the coding side performs division or non-division by 4 divisions, vertical 2 divisions, vertical 3 divisions, horizontal 2 divisions, and horizontal 3 divisions (steps S1101 to S1111), and corresponds to each division mode and its corresponding. Block division information such as the color difference block non-division flag chroma_non_split_flag, which will be described later, is supplied to the inter prediction unit 102, the intra prediction unit 103, and the prediction method determination unit 105. Further, the generated image signal of the coded block to be processed is supplied to the inter prediction unit 102, the intra prediction unit 103, and the residual signal generation unit 106.

First, every time the loop of steps S1101 to S1111 turns, it is divided into 4 (SPLIT_QT), 2 vertical (SPLIT_BT_VER), 3 vertical (SPLIT_TT_VER), 2 horizontal (SPLIT_BT_HOR), 3 horizontal (SPLIT_TT_HOR), and non-divided (SPLIT_TT_HOR). The division mode of SPLIT_NONE) is sequentially set, and the color difference block non-division flag chroma_non_split_flag is initialized to 0 (false) (step S1102). The color difference block non-split flag chroma_non_split_flag will be described later.

Subsequently, when the division mode set in step S1102 is 4-division (SPLIT_QT), vertical 2-division (SPLIT_BT_VER), vertical 3-division (SPLIT_TT_VER), horizontal 2-division (SPLIT_BT_HOR), or horizontal 3-division (SPLIT_TT_HOR) (step S1103). : YES), the luminance block to be divided is divided according to the division mode (step S1104). On the other hand, when the division mode set in step S1102 is non-division (SPLIT_NONE) (step S1103: NO), the division processing of steps S1104 to S1110 is skipped.

Subsequently, when the prediction mode is intra prediction (MODE_INTRA) or IBC prediction (MODE_IBC), it is determined whether or not to perform the color difference block division processing based on the division mode set in step S1102 (step S1105). In the present embodiment, in order to reduce the amount of arithmetic processing and the number of memory accesses, when the size of the coded block of the luminance signal is 16 pixels (4 × 4, 8 × 2, 2 × 8) pixels, inter-prediction is performed. Prohibit and make intra-prediction or IBC prediction. Further, when the color difference format is 4: 2: 0 or 4: 2: 2, the prediction mode is predetermined in intra prediction (MODE_INTRA) or IBC prediction (MODE_IBC) in order to reduce the amount of arithmetic processing and the number of memory accesses. Prohibit color difference coded blocks smaller than size. In the present embodiment, the color difference coded block having a color difference block size of 8 pixels or less (or less than 16 pixels), that is, 2 × 2, 4 × 2, 2 × 4 pixels is prohibited. When the color difference block to be divided is divided in the division mode set in step S1102, if the divided color difference block is 8 pixels or less, which is a predetermined size, the color difference block to be divided is not divided. It is a color difference coded block. When the color difference format is 4: 2: 0 and the size of the divided luminance block is 32 pixels or less, that is, 4 × 4, 8 × 4, 4 × 8 pixels, it is equivalent to prohibiting the division of the color difference block. Is. The above-mentioned color difference block non-division flag chroma_non_split_flag is a flag indicating that the color difference block to be divided is not divided based on the division mode in the intra prediction and the IBC prediction, but is used as the color difference coding block.

Whether or not to prohibit color difference coded blocks smaller than a predetermined size in intra prediction or IBC prediction will be described with reference to FIG. 8 by taking as an example the size of the color difference block to be divided is 8 × 4. As shown in FIG. 8A, when the division mode is the vertical two division mode, the color difference block to be divided can be vertically divided into two, and the size of the divided color difference block is 4 × 4. As shown in FIG. 8B, when the division mode is the horizontal 2-division mode, the color difference block to be divided can be horizontally divided into two, and the size of the divided color difference block is 8 × 2.

However, as shown in FIG. 8C, when the division mode is the 4-division mode, when the color difference block to be divided is divided, the size of the divided color difference block is 4 × 2, so the division is not performed. .. As shown in FIG. 8D, when the division mode is the vertical 3-division mode, when the color difference block to be divided is divided, the size of the divided left color difference block and the right color difference block becomes 2 × 4. Do not split. As shown in FIG. 8E, when the division mode is the horizontal 3-division mode, when the color difference block to be divided is divided, the upper color difference block and the lower color difference block become 8 × 1, so the division is not performed.

When it is determined in the intra prediction (MODE_INTRA) or the IBC prediction (MODE_IBC) that the color difference block is to be divided (step S1105: YES), the color difference block to be divided is divided in the division mode set in step S1102 (step S1105: YES). Step S1107).

If it is not determined in the intra prediction (MODE_INTRA) or IBC prediction (MODE_IBC) that the color difference block division processing is to be performed (step S1105: NO), the color difference block to be divided is divided in the division mode set in step S1102. Instead, the color difference coded block is used, and the color difference block non-split flag chroma_non_split_flag is set to 1 (true) (step S1106).

Subsequently, each of the divided blocks is scanned in a predetermined order, and the main coded block division process is recursively performed (steps S1108 to S1110). Specifically, each of the divided blocks is scanned in the order of the numbers shown in FIGS. 601 to 605 (hereinafter referred to as the divided index). Numbers 0 to 3, 602 and 604 of 601 in FIG. 5 and numbers 0 to 2, 603 and 695 of 0 to 604 are numbers indicating the order of division processing. The coded block division process is recursively performed for each of the divided blocks (step S1119).

When the division processing by 4 division, vertical 2 division, vertical 3 division, horizontal 2 division, horizontal 3 division, and non-division is completed (steps S1101 to S1110), the present coded block division process is completed.

In the recursive block division described here, the necessity of division may be limited depending on the number of divisions, the size of the block to be divided, and the like. The information that limits the necessity of division may be realized in a configuration that does not transmit information by making an agreement in advance between the coding device and the decoding device, or the coding device limits the necessity of division. It may be realized by the configuration which transmits to the decoding apparatus by determining the information to be performed and recording it in the coded bit string.

In the present embodiment, when the color difference format is 4: 2: 0 or 4: 2: 2, intra prediction (MODE_INTRA) or IBC prediction (MODE_IBC) is used in order to reduce the amount of arithmetic processing and the number of memory accesses. ), The color difference coding block smaller than the predetermined size is prohibited, but the color difference coding block smaller than the predetermined size may be prohibited. For example, when the predetermined minimum color difference coded block size is 16 pixels (4 × 4, 8 × 2, 2 × 8) and the color difference block to be divided is divided in the division mode set in step S1102, it is divided. If the color difference block is smaller than the minimum color difference coded block size, the color difference block to be divided is not divided and is used as the color difference coded block.

Further, in this coded block division process, the intra prediction (MODE_INTRA) or the IBC prediction (MODE_IBC) has been mainly described, but in the inter prediction (MODE_INTER), the color difference code of 2 × 2, 4 × 2, 2 × 4 When the conversion block is not prohibited, in addition to the processing for intra prediction (MODE_INTRA) or IBC prediction (MODE_IBC) (steps S1105 to S1110), the processing of steps S1106 and S1108 to S1110 is also performed for inter prediction (MODE_INTER).

<Block division information coding>
Next, the operation of encoding the block division information in the bit string coding unit 108 in the image coding apparatus 100 will be described. FIG. 9 is a flowchart showing an operation of encoding the block division information. On the coding side, the block division information determined by the prediction method determination unit 105 is encoded. This block division information is information for identifying whether the division mode is 4-division, vertical 2-division, vertical 3-division, horizontal 2-division, horizontal 3-division, or non-division in each layer of block division, and color difference block non-division. Split flag chroma_non_split_flag etc. For example, a flag indicating whether or not to divide a block, a flag indicating whether or not to divide into four, a flag indicating whether or not to divide into two or three, and whether or not to divide vertically (vertically or horizontally). A flag indicating (whether to divide) or a flag indicating whether or not to divide into two (whether to divide into two or three) is encoded. When the division mode is the 4-division mode (step S1201: YES), the flag indicating whether or not to divide the block is set to 1 (true), and the flag indicating whether or not to divide the block is set to 1 (true). (Step S1202). When the division mode is the vertical 2-division mode (step S1203: YES), the flag indicating whether or not to divide the block is 1 (true), the flag indicating whether or not to divide the block is 0 (false), and the block is vertically divided. The flag indicating whether or not to divide (horizontally divided) is set to 1 (true), and the flag indicating whether or not to divide into 2 (divided into 3) is set to 1 (true) and encoded (step S1204). ). When the division mode is the vertical 3-division mode (step S1205: YES), the flag indicating whether or not to divide the block is 1 (true), and the flag indicating whether or not to divide the block is 0 (false), vertically. The flag indicating whether to divide (divided horizontally) is set to 1 (true), and the flag indicating whether to divide into 2 (divided into 3) is set to 0 (false) and encoded (step). S1206). In the case of the horizontal 2-split mode (step S1207: YES), the flag indicating whether or not to divide the block is 1 (true), the flag indicating whether or not to divide the block is 0 (false), and whether or not to divide vertically. The flag indicating whether or not to divide (horizontally divided) is set to 0 (false), and the flag indicating whether or not to divide into two (whether to divide into three) is set to 1 (true) and encoded (step S1208). In the case of the horizontal 3-split mode (step S1209: YES), the flag indicating whether or not to divide the block is 1 (true), the flag indicating whether or not to divide the block is 0 (false), and whether or not to divide vertically. The flag indicating whether or not to divide (horizontally divided) is set to 0 (false), and the flag indicating whether or not to divide into two (whether to divide into three) is set to 0 (false) and encoded (step S1210).

When the division mode is 4-division, vertical 2-division, vertical 3-division, horizontal 2-division, or horizontal 3-division, it is subsequently determined whether or not the divided blocks based on the division mode have a predetermined size or less (step S1212). .. Specifically, when the size of the divided color difference block is 2 × 2, 4 × 2, 2 × 4 pixels which is 8 pixel blocks or less (that is, when the color difference format is 4: 2: 0, the division target As a result of dividing the luminance block, the size of the divided luminance block becomes 4 × 4, 8 × 4, 4 × 8 pixels which is 32 pixel blocks or less), and it is determined that the size is not more than a predetermined size (S1212: YES). .. If the size is less than or equal to the predetermined size, the color difference block non-split flag chroma_non_split_flag is encoded (step S1213). However, even if the color difference block non-split flag chroma_non_split_flag is not encoded, it is not encoded if it can be derived on the decoding side. For example, in I-slice, since the prediction mode is not inter-prediction (MODE_INTER), the color difference block undivided flag chroma_non_split_flag can be derived from the block size after division on the decoding side, so the color difference block undivided flag chroma_non_split_flag Does not need to be encoded. Also, when the size of the luminance block after division is 16 pixels (4 × 4 pixels), the color difference block non-division flag chroma_non_split_flag is 1 (true) because the prediction mode is not inter-prediction (MODE_INTER). , Color difference block unsplit flag chroma_non_split_flag does not need to be encoded.

In the present embodiment, when the color difference block non-split flag chroma_non_split_flag is 1 (true), the prediction mode of all the divided coded blocks is intra prediction (MODE_INTRA) or IBC prediction (MODE_IBC). When the color difference format is 4: 2: 0, as a result of dividing the luminance block to be divided, as a result of dividing the color difference block to be divided, the size of the divided color difference block is not 8 pixel blocks or less (that is, 2 × 2, In the case of (not 4 × 2, 2 × 4 pixels) (step S1212: NO), the color difference block undivided flag chroma_non_split_flag is not encoded, and the prediction mode of each divided coded block is encoded by the layer of the coded block. Will be done.

When the division mode is 4-division, vertical 2-division, vertical 3-division, horizontal 2-division, or horizontal 3-division, each block divided based on the prediction mode is subsequently scanned in a predetermined order, and this block division information code is used. The conversion process is performed recursively (steps S1214 to S1216). Specifically, each block to be divided is scanned in the order of the numbers shown in FIGS. 601 to 605 (hereinafter referred to as the division index). Numbers 0 to 3, 602 and 604 of 601 in FIG. 5 and numbers 0 to 2, 603 and 695 of 0 to 604 are numbers indicating the order of division information coding processing. This coded block division process is recursively performed for each block divided based on the prediction mode (step S1215).

On the other hand, in the non-division mode (step S1209: NO), the flag indicating whether or not to divide the block is set to 0 (false) and encoded (step S1211), and the coding information code of the coding block described later is used. The conversion process is performed (step S1217).

<Block division information decoding / block division>
Next, the operations of the bit string decoding unit 201 and the block division unit 202 in the image decoding device 200 will be described. The block division unit 202 divides the tree block by the same processing procedure as the block division unit 101 of the image coding apparatus 100. However, the block division unit 101 of the image coding apparatus 100 applies optimization methods such as estimation of the optimum shape by image recognition and optimization of the distortion rate to determine the optimum shape of the block division, whereas the image decoding apparatus The block division unit 202 in 200 is different in that the block division shape is determined by decoding the block division information recorded in the coded bit string by the bit string decoding unit 201.

FIG. 12 is a flowchart showing an operation of decoding the block division information and dividing the block. On the decoding side, the block division information is decoded from the coded bit string. This block division information is information for identifying whether the division mode is 4-division, vertical 2-division, vertical 3-division, horizontal 2-division, horizontal 3-division, or non-division in each layer of block division, and color difference block non-division. Split flag chroma_non_split_flag etc. First, the information indicating the block division is decoded (step S1401). When the information indicating the block division is 1 (true) (step S1402: YES), the process proceeds to step S1403, and when the information indicating the block division is 0 (false) (step S1402: NO), the division mode is set to the non-division mode. (Step S1405), the coding information decoding process of the coding block described later is performed.

Subsequently, when the flag indicating whether or not to divide into four is decoded (step S1403) and the flag indicating whether or not to divide into four is 1 (true) (step S1404: YES), the division mode of the layer is divided into four. If the mode is set (step S1405) and the flag indicating whether to divide into four is 0 (false) (step S1404: NO), the process proceeds to step S1406.

Subsequently, the flag indicating whether or not it is vertically divided is decoded (step S1406), and the flag indicating whether or not it is divided into two is decoded (step S1407).

When the flag indicating whether or not to divide vertically is 1 (true) (step S1408: YES) and the flag indicating whether or not to divide into 2 is 1 (true) (step S1409: YES), the division mode of the layer is vertical 2. The split mode is set (step S1410).

When the flag indicating whether or not to divide vertically is 1 (true) (step S1408: YES) and the flag indicating whether or not to divide into 2 is 0 (false) (step S1409: NO), the division mode of the layer is vertical 3. The split mode is set (step S1410).

When the flag indicating whether or not to divide vertically is 0 (false) (step S1408: NO) and the flag indicating whether or not to divide into two is 1 (true) (step S1412: YES), the division mode of the layer is horizontal 2. The split mode is set (step S1413).

When the flag indicating whether or not to divide vertically is 0 (false) (step S1408: NO) and the flag indicating whether or not to divide into two is 0 (false) (step S1412: NO), the division mode of the layer is horizontal 3. The split mode is set (step S1414).

Subsequently, as described in the block division process on the coding side, it is determined whether or not the divided blocks have a predetermined size or less based on the division mode set in steps S1405, S1410, S1411, S1413, and S1414. (Step S1416). Specifically, when the size of the divided color difference block is 2 × 2, 4 × 2, 2 × 4 pixels which is 8 pixel blocks or less (that is, when the color difference format is 4: 2: 0, the division target As a result of dividing the luminance block, the size of the divided luminance block becomes 4 × 4, 8 × 4, 4 × 8 pixels which is 32 pixel blocks or less), and it is determined that the size is not more than a predetermined size (S1416: YES). .. If the size is less than or equal to the predetermined size, the color difference block non-split flag chroma_non_split_flag is decoded or derived (step S1417). However, if the color difference block undivided flag chroma_non_split_flag can be derived on the decoding side without decoding it, the undivided flag chroma_non_split_flag is not encoded and is derived. For example, in I-slice, the prediction mode is not inter-prediction (MODE_INTER), so if the divided blocks are smaller than a predetermined size, the color difference block non-division flag chroma_non_split_flag is set to 1 (true) without decoding. Also, when the size of the luminance block after division is 16 pixels (4 x 4 pixels), the prediction mode is not inter-prediction (MODE_INTER), so the color difference block non-division flag chroma_non_split_flag is not decoded and the color difference is achieved. The block non-split flag chroma_non_split_flag is 1 (true).

When the color difference block non-split flag chroma_non_split_flag is 1 (true) (step S1419: YES), the color difference block is not divided (step S1420). At this time, the prediction modes of the coded blocks of the divided luminance signal and the coded blocks of the undivided color difference signal are all set to intra prediction (MODE_INTRA) or IBC prediction (MODE_IBC). On the other hand, when the value of the color difference block non-split flag chroma_non_split_flag is 0 (false) (step S1419: NO), the color difference block is also split based on the split mode (step S1421). The prediction mode of all the divided coded blocks is inter-prediction (MODE_INTER).

Further, when the size of the divided color difference block is not 8 pixel blocks or less (that is, not 2 × 2, 4 × 2, 2 × 4 pixels) as a result of dividing the color difference block to be divided (step S1416: NO). The color difference block is also divided based on the division mode (step S1421). At this time, the prediction mode of each divided coded block is decoded by the layer of the coded block.

Subsequently, each of the divided blocks is scanned in a predetermined order (steps S142 to S1424), and the block division information decoding and the coded block division processing are performed hierarchically and recursively (step S1423). Specifically, each of the divided blocks is scanned in the order of the numbers shown in FIGS. 601 to 605 (hereinafter referred to as the divided index). Numbers 0 to 3, 602 and 604 of 601 in FIG. 5 and numbers 0 to 2, 603 and 695 of 0 to 604 are numbers indicating the order of division processing. For each of the divided blocks, the block division information decoding and the coded block division processing are performed hierarchically and recursively (step S1122).

<Intra forecast>
The intra prediction method according to the embodiment is carried out by the intra prediction unit 103 of the image coding device of FIG. 1 and the inter prediction unit 203 of the image decoding device of FIG.

The intra prediction method according to the embodiment will be described with reference to the drawings. The intra prediction method is carried out in either coding or decoding processing in units of coded blocks.

<Explanation of Intra Prediction Unit 103 on the Encoding Side>
FIG. 41 is a diagram showing a detailed configuration of the intra prediction unit 103 of the image coding apparatus of FIG. The intra prediction unit 103 usually includes an intra prediction unit 351 and an intra block copy prediction unit 352. Normally, the intra prediction unit 351 corresponds to the prediction processing when the prediction mode of the coded block is intra prediction (MODE_INTRA), and the intra block copy prediction unit 352 predicts when the prediction mode of the coded block is IBC prediction (MODE_IBC). Corresponds to processing.

The normal intra prediction unit 351 generates a prediction image signal by normal intra prediction from decoded pixels adjacent to a coded block to be processed, selects a suitable intra prediction mode from a plurality of intra prediction modes, and selects the appropriate intra prediction mode. The predicted intra prediction mode selected and the predicted image signal corresponding to the selected intra prediction mode are supplied to the prediction method determination unit 105. FIG. 10 shows an example of normal intra-prediction. FIG. 10A shows the correspondence between the prediction direction of the normal intra prediction and the intra prediction mode number. For example, the intra prediction mode 18 is horizontal prediction, and an intra prediction image is generated by copying pixels in the horizontal direction. The intra prediction mode 50 is vertical prediction, and an intra prediction image is generated by copying pixels in the vertical direction. The intra prediction mode 66 is an oblique prediction, and an intra prediction image is generated by copying pixels in an oblique 45 degree direction. The intra prediction mode 1 is an average value prediction (DC) mode, and is a mode in which all the pixel values of the processing target block are set as the average value of the reference pixels. The intra prediction mode 0 is a plane prediction (Planar) mode, which is a mode for creating a two-dimensional intra prediction image from reference pixels in the vertical and horizontal directions. FIG. 10B is an example of generating an intra prediction image in the case of the intra prediction mode 40. For each pixel of the block to be processed, the value of the reference pixel in the direction indicated by the intra prediction mode is copied. When the reference pixel in the intra prediction mode is not an integer position, the reference pixel value is determined by interpolation from the reference pixel values at the surrounding integer positions.

The intra-block copy prediction unit 352 acquires a decoded area of the same image signal as the coded block to be processed from the decoded image memory 104, generates a prediction image signal by the intra-block copy prediction processing, and determines a prediction method. Supply to 105. The detailed configuration and processing of the intra-block copy prediction unit 352 will be described later.

<Explanation of Intra Prediction Unit 204 on the Decoding Side>
FIG. 42 is a diagram showing a detailed configuration of the intra prediction unit 204 of the image decoding apparatus of FIG. The intra prediction unit 204 usually includes an intra prediction unit 361 and an intra block copy prediction unit 362. The normal intra prediction unit 361 corresponds to the normal intra prediction processing when the prediction mode of the coded block is intra prediction (MODE_INTRA), and the intra block copy prediction unit 362 has the prediction mode of the coded block intra block copy prediction (MODE_IBC). Corresponds to the intra-block copy prediction processing at the time of.

The normal intra prediction unit 361 generates a prediction image signal by normal intra prediction from the decoded pixels adjacent to the coded block to be processed, selects a suitable intra prediction mode from a plurality of intra prediction modes, and selects the appropriate intra prediction mode. The predicted image signal corresponding to the selected intra prediction mode and the selected intra prediction mode is obtained. This predicted image signal is supplied to the decoded image signal superimposing unit 207 via the switch 364. Since the processing of the normal intra prediction unit 361 of FIG. 42 corresponds to the normal intra prediction unit 351 of FIG. 41, detailed description thereof will be omitted.

The intra-block copy prediction unit 362 acquires a decoded area of the same image signal as the coded block to be processed from the decoded image memory 208, and obtains the predicted image signal by the intra-block copy processing. This predicted image signal is supplied to the decoded image signal superimposing unit 207 via the switch 364. The detailed configuration and processing of the intra-block copy prediction unit 362 will be described later.

<Coded information coding of coded block>
Next, an operation of encoding the coding information of the coding block in the bit string coding unit 108 in the image coding apparatus 100 will be described. FIG. 57 is a flowchart showing an operation of encoding the coding information of the coding block. On the coding side, the coding information for each coding block determined by the prediction method determination unit 105 is encoded. In the present embodiment, it is possible to set whether to use IBC prediction (PRED_IBC) for each sequence, picture, or slice. Furthermore, it shall be possible to set whether to use inter-prediction (PRED_INTER) for each sequence, picture or slice. Inter-prediction (PRED_ INTER) is not used in the I-slice, which is equivalent to setting that inter-prediction (PRED_ INTER) is not used for each picture or slice.

First, the prediction mode of the coding block encodes the prediction mode information indicating any one of intra prediction (PRED_INTRA), IBC prediction (PRED_IBC), and inter prediction (PRED_INTER) (steps S1501 to S1504). For example, a flag indicating whether the prediction mode is intra-prediction (PRED_INTRA) is encoded (step S1502), and a flag indicating whether the prediction mode is IBC prediction (PRED_IBC) (step S1504) is encoded.

First, it is determined whether or not to encode a flag indicating whether or not the prediction mode of the coded block is intra prediction (PRED_INTRA) (step S1501). When encoding a flag indicating whether the prediction mode of the coded block is intra-prediction (PRED_INTRA) (step S1501: YES), a flag indicating whether the prediction mode of the coded block is intra-prediction (PRED_INTRA) is coded. (Step S1502). When the prediction mode is intra prediction (PRED_INTRA), the coding block is encoded by setting the flag indicating whether the prediction mode of the coded block is intra prediction (PRED_INTRA) to 1 (true), and the prediction mode is not intra prediction (PRED_INTRA). In the case, that is, when the prediction mode is IBC prediction (PRED_IBC) or inter prediction (PRED_INTER), the flag indicating whether the prediction mode of the coded block is intra prediction (PRED_INTRA) is set to 0 (false). To become.

Subsequently, it is determined whether or not to encode the flag indicating whether or not the prediction mode of the coded block is IBC prediction (PRED_IBC) (step S1503). If IBC prediction (PRED_IBC) is not used for each sequence, picture, or slice, or if inter-prediction (PRED_INTER) is not used for each sequence, picture, or slice, in the parent block of the coded block to be processed. , When the color difference block non-split flag chroma_non_split_flag is set to 0 (false) and encoded, the flag indicating whether the prediction mode of the coding block is IBC prediction (PRED_IBC) is not encoded. When encoding a flag indicating whether the prediction mode of the coded block is IBC prediction (PRED_IBC) (step S1503: YES), a flag indicating whether the prediction mode of the coded block is IBC prediction (PRED_IBC) is coded. (Step S1504). When the prediction mode is IBC prediction (PRED_IBC), the flag indicating whether the prediction mode of the coding block is IBC prediction (PRED_IBC) is set to 1 (true) for coding, and the prediction mode is not IBC prediction (PRED_IBC). In the case, that is, when the prediction mode is inter-prediction (PRED_INTER), the flag indicating whether the prediction mode of the coding block is IBC prediction (PRED_IBC) is set to 0 (false) for coding.

Here, in the present embodiment, in the parent block of the coded block to be processed, in the intra prediction or the IBC prediction, the color difference block to be divided is not divided based on the division mode, and the color difference coded block is used. When it is determined that, that is, when the color difference block undivided flag chroma_non_split_flag is set to 1 (true), the prediction mode of the luminance signal coding block at the same position as the color difference signal coding block is set to the color difference signal coding block. Prediction mode.

In the present embodiment, when specifying the luminance signal coding block at the same position as the color difference signal coding block, it corresponds to the lower right pixel in the center of the color difference signal coding block in the image space of the color difference signal. A luminance signal coding block containing pixels at the same position in the image space of the luminance signal is defined as a luminance signal coding block at the same position as the color difference signal coding block.

A luminance signal coding block at the same position as the color difference signal coding block in the intra color difference prediction mode when the color difference format is 4: 2: 0 will be described with reference to FIGS. 59, 60, 61, and 62. ..

FIG. 59 (a) shows a coded block of a luminance signal of 8 × 8 pixels, and FIG. 59 (b) shows a color difference signal of 4 × 4 pixels at the same position corresponding to the coded block of the luminance signal of 8 × 8 pixels. The coded block of is shown. At this time, the pixels at the same position in the image space of the luminance signal corresponding to the lower right pixel in the center of the coded block of the color difference signal in the image space of the luminance signal are the lower right pixels in the center of the encoded block of the luminance signal. is there.

FIG. 60A shows a coded block of a luminance signal in which a luminance block of 8 × 8 pixels to be divided is divided into four, and the size of each coded block is 4 × 4 pixels. FIG. 60B shows a 4 × 4 pixel color difference block at the same position corresponding to the 8 × 8 pixel luminance block to be divided, and in the present embodiment, the 2 × 2 pixel color difference signal coding block is prohibited. Therefore, it becomes a coding block of the color difference signal without being divided into four. At this time, the luminance signal coding block including the pixel at the same position in the luminance signal image space corresponding to the lower right pixel in the center of the color difference signal coding block in the color difference signal image space is the third from 0. That is, the last (lower right) coding block. This coded block is used as a coded block for the luminance signal at the same position as the coded block for the color difference signal.

FIG. 61A shows a coded block of a luminance signal in which the luminance block of 8 × 8 pixels to be divided is vertically divided into two, and the size of each coded block is 4 × 8 pixels. FIG. 61B shows a 4 × 4 pixel color difference block at the same position corresponding to the 8 × 8 pixel luminance block to be divided, and in the present embodiment, the 2 × 4 pixel color difference signal coding block is prohibited. Therefore, it becomes a color difference signal coding block without being vertically divided into two. At this time, the luminance signal coding block including the pixel at the same position in the luminance signal image space corresponding to the lower right pixel in the center of the color difference signal coding block in the color difference signal image space is the first one counting from 0. That is, the last (right side) coding block. This coded block is used as a coded block for the luminance signal at the same position as the coded block for the color difference signal.

FIG. 62A shows a coded block of a luminance signal in which the luminance block of 8 × 8 pixels to be divided is vertically divided into three, and the size of each coded block is 2 × 8 pixels. FIG. 62B shows a 4 × 4 pixel color difference block at the same position corresponding to the 8 × 8 pixel luminance block to be divided, and in the present embodiment, the 1 × 4 pixel color difference signal coding block is prohibited. Therefore, it becomes a coding block of the color difference signal without being vertically divided into three. At this time, the luminance signal coding block including the pixels at the same position in the luminance signal image space corresponding to the lower right pixel in the center of the color difference signal coding block in the color difference signal image space is the first one counting from 0. That is, the coding block in the middle. This coded block is used as a coded block for the luminance signal at the same position as the coded block for the color difference signal.

Subsequently, when the prediction mode is intra-prediction (PRED_INTRA) (step S1505: YES), the information regarding the intra-luminance prediction mode of the luminance signal coding block is encoded (step S1506). The coding of the information regarding the intra-luminance prediction mode of the luminance signal coding block will be described later.

Subsequently, it is determined whether or not to encode the information regarding the intra color difference prediction mode of the color difference signal coding block (step S1507). In the parent block of the coded block to be processed, when the color difference block to be divided is divided into the color difference coded block based on the division mode, that is, the color difference block non-division flag chroma_non_split_flag is not set to 1 (true). In the case, the information regarding the intra color difference prediction mode is encoded in all the coded blocks to be processed. Further, when the prediction mode is intra prediction (MODE_INTRA), the coding block of the color difference signal of 2 × 2, 4 × 2, 2 × 4 pixels is prohibited in the present embodiment, so that the parent of the coded block to be processed In the block, in the intra prediction or IBC prediction, when it is determined that the color difference block to be divided is not divided based on the division mode and is a color difference coded block, that is, the color difference block non-division flag chroma_non_split_flag is set to 1 (true). If set (step S1507: YES), the information about the intra-color difference prediction mode is encoded in the last divided coded block (step S1508), and in the other coded blocks (step S1507: NO), Do not encode information about intracolor difference prediction modes. For example, when the division mode in the parent block is the 4-division mode (601 in FIG. 5), the information regarding the intra color difference prediction mode is encoded in the third coding block counting from the 0th, which is the last (step S1508). In the 0th to 2nd coding blocks, the information regarding the into color difference prediction mode is not encoded. Further, when the division mode in the parent block is the vertical 2-division mode or the horizontal 2-division mode (602, 604 in FIG. 5), the intra-color difference prediction mode is related to the first coding block counting from the 0th, which is the last. The information is encoded (step S1508), and the information regarding the intra color difference prediction mode is not encoded in the 0th coding block. Further, when the division mode in the parent block is the vertical 3-division mode or the horizontal 3-division mode (603, 605 in FIG. 5), the intra-color difference prediction mode is related to the second coding block counting from the 0th, which is the last. The information is encoded (step S1508), and the information regarding the intra color difference prediction mode is not encoded in the 0th to 1st coding blocks.

On the other hand, when the prediction mode is IBC prediction (PRED_IBC) (step S1509: YES), the coding information regarding the IBC prediction (PRED_IBC) is encoded (step S1510). Specifically, a flag for determining whether or not it is in merge mode, a merge index for merge mode, a predicted block vector index for not in merge mode, a difference block vector, and other coding information are specified in the specified syntax (encoded bit string). Encode according to the syntax rules).

On the other hand, when the prediction mode is inter-prediction (PRED_INTER) (step S1509: NO), the coding information regarding inter-prediction (PRED_INTER) is encoded (step S1511). Flag to determine whether it is in merge mode, sub-block merge flag, merge index in merge mode, inter-prediction mode, predicted motion vector index in non-merge mode, information about differential motion vector, sub-block predicted motion vector flag, etc. The encoding information of is encoded according to the specified syntax (the syntax rule of the encoding bit string).

Subsequently, the information regarding the residual signal derived by the orthogonal conversion / quantization unit 107 is encoded (step 1512), and the coding information coding procedure of the present coding block is completed.

Subsequently, it is determined whether or not to encode the information regarding the residual signal of the color difference signal (step 1513). The determination of whether or not to encode the information regarding the residual signal of the color difference signal in step 1513 is the same as determining whether or not to encode the information regarding the intra color difference prediction mode of the coding block of the color difference signal in step S1507. When it is determined that the information regarding the intra-color difference prediction mode of the coded block is encoded, it is determined that the information regarding the residual signal of the color difference signal is also encoded, and it is determined that the information regarding the intra-color difference prediction mode of the coded block is not encoded. If so, it is determined that the information regarding the residual signal of the color difference signal is also not encoded.

Subsequently, when it is determined to encode the information regarding the residual signal of the color difference signal (step S1513: YES), the information regarding the residual signal of the color difference signal generated by the orthogonal transformation / quantization unit 107 is encoded (step S1513: YES). Step S1514).

<Decoding the coded information of the coded block>
Next, the operation of decoding the coding information of the coding block in the bit string decoding unit 201 of the image decoding device 200 will be described. FIG. 58 is a flowchart showing an operation of decoding the coding information of the coding block. On the decoding side, the coding information for each coding block is decoded from the coding bit string encoded on the coding side. In the present embodiment, it is possible to set whether or not to use IBC prediction (PRED_IBC) for each sequence, picture, or slice as described on the coding side. Furthermore, it shall be possible to set whether to use inter-prediction (PRED_INTER) for each sequence, picture or slice.

First, the prediction mode information indicating that the prediction mode of the coding block is any of intra prediction (PRED_INTRA), IBC prediction (PRED_IBC), and inter prediction (PRED_INTER) is decoded (steps S1601 to S1604). For example, the flag indicating whether the prediction mode is intra prediction (PRED_INTRA) is decoded (step S1602), and the flag indicating whether the prediction mode is IBC prediction (PRED_IBC) (step S1604) is decoded.

First, it is determined whether or not to decode the flag indicating whether or not the prediction mode of the coded block is intra prediction (PRED_INTRA) (step S1601). When decoding the flag indicating whether the prediction mode of the coded block is intra prediction (PRED_INTRA) (step S1601: YES), the flag indicating whether the prediction mode of the coded block is intra prediction (PRED_INTRA) is decoded. (Step S1602). When the prediction mode is intra prediction (PRED_INTRA), the flag indicating whether the prediction mode of the encoded block is intra prediction (PRED_INTRA) is 1 (true), and when the prediction mode is not intra prediction (PRED_INTRA), that is, When the prediction mode is IBC prediction (PRED_IBC) or inter prediction (PRED_INTER), the flag indicating whether the prediction mode of the coded block is intra prediction (PRED_INTRA) is 0 (false).

Subsequently, it is determined whether or not to decode the flag indicating whether or not the prediction mode of the coded block is IBC prediction (PRED_IBC) (step S1603). If IBC prediction (PRED_IBC) is not used for each sequence, picture, or slice, or if inter-prediction (PRED_INTER) is not used for each sequence, picture, or slice, in the parent block of the coded block to be processed. , When the color difference block non-split flag chroma_non_split_flag is set to 0 (false) and encoded, the flag indicating whether the prediction mode of the coding block is IBC prediction (PRED_IBC) is not decoded. When decoding the flag indicating whether the prediction mode of the coding block is IBC prediction (PRED_IBC) (step S1603: YES), the flag indicating whether the prediction mode of the coding block is IBC prediction (PRED_IBC) is decoded. (Step S1604). When the prediction mode is IBC prediction (PRED_IBC), the flag indicating whether the prediction mode of the coded block is IBC prediction (PRED_IBC) is 1 (true), and when the prediction mode is not IBC prediction (PRED_IBC), that is, When the prediction mode is inter-prediction (PRED_INTER), the flag indicating whether the prediction mode of the coded block is IBC prediction (PRED_IBC) is 0 (false).

Subsequently, when the prediction mode is intra-prediction (PRED_INTRA) (step S1605: YES), the information regarding the intra-luminance prediction mode of the luminance signal coding block is decoded (step S1606). Decoding of information regarding the intra-luminance prediction mode of the luminance signal coding block will be described later.

Subsequently, it is determined whether or not to decode the information regarding the intra color difference prediction mode of the coded block of the color difference signal (step S1607). When the prediction mode is intra prediction (MODE_INTRA), in the present embodiment, the coding block of the color difference signal of 2 × 2, 4 × 2, 2 × 4 pixels is prohibited, so that the parent block of the coded block to be processed , Intra prediction, or IBC prediction, when it is determined that the color difference block to be divided is not divided based on the division mode and is a color difference coding block, that is, the color difference block non-division flag chroma_non_split_flag is set to 1 (true). If (step S1607: YES), the information regarding the intra color difference prediction mode is decoded in the last divided coded block (step S1608), and in the other coded blocks (step S1607: NO), the intra color difference Do not decode information about predictive mode. For example, when the division mode in the parent block is the 4-division mode (601 in FIG. 5), the information regarding the intra color difference prediction mode is decoded in the third coded block counting from the 0th, which is the last (step S1608). In the 0th to 2nd coding blocks, the information regarding the into color difference prediction mode is not decoded. Further, when the division mode in the parent block is the vertical 2-division mode or the horizontal 2-division mode (602, 604 in FIG. 5), the intra-color difference prediction mode is related to the first coding block counting from the 0th, which is the last. The information is decoded (step S1608), and the information regarding the intra color difference prediction mode is not decoded in the 0th coding block. Further, when the division mode in the parent block is the vertical 3-division mode or the horizontal 3-division mode (603, 605 in FIG. 5), the intra-color difference prediction mode is related to the second coding block counting from the 0th, which is the last. The information is decoded (step S1608), and the information regarding the intra color difference prediction mode is not decoded in the 0th to 1st coding blocks. If the color difference block undivided flag chroma_non_split_flag is not set to 1 (true) in the parent block of the coded block to be processed, the information regarding the intra color difference prediction mode is decoded in the coded block to be processed.

On the other hand, when the prediction mode is IBC prediction (PRED_IBC) (step S1609: YES), the coding information regarding the IBC prediction (PRED_IBC) is decoded (step S1610). Specifically, a flag for determining whether or not it is in merge mode, a merge index for merge mode, a predicted block vector index for not in merge mode, a difference block vector, and other coding information are specified in the specified syntax (encoded bit string). Decrypt according to the syntax rules).

On the other hand, when the prediction mode is inter-prediction (PRED_INTER) (step S1609: NO), the coding information related to inter-prediction (PRED_INTER) is decoded (step S1611). Flag to determine whether it is in merge mode, sub-block merge flag, merge index in merge mode, inter-prediction mode, predicted motion vector index in non-merge mode, information about differential motion vector, sub-block predicted motion vector flag, etc. The encoding information of is decoded according to the specified syntax (the syntax rule of the encoded bit string).

Subsequently, the information regarding the residual signal is decoded (step 1612), and the coding information decoding process is completed.
<Intra-prediction mode coding>
Next, the coding process of the intra prediction mode performed by the bit string coding unit 108 of FIG. 1 and the decoding process of the intra prediction mode performed by the bit string decoding unit 201 of FIG. 2 will be described.

In the bit string coding unit 108 on the coding side, when the prediction mode (PredMode) of the coded block is intra-prediction (MODE_INTRA), the values of the syntax elements related to the intra-luminance prediction mode of the coded block of the luminance signal are respectively. Calculate and encode (step S1506). The syntax element related to the intra-luminance prediction mode is the syntax element intra_luma_mpm_flag [x0] [y0], which is a flag indicating whether or not it can be predicted from the intra-luminance prediction mode of the surrounding blocks, and the thin index indicating the encoding block of the prediction source. The tax element intra_luma_mpm_idx [x0] [y0], and the syntax element intra_luma_mpm_remainder [x0] [y0] indicating the intra-luminance prediction mode for each coded block. Note that x0, and y0 are coordinates indicating the position of the coded block. In the calculation of the value of the syntax element related to the intra-luminance prediction mode, the intra-luminance prediction mode of the peripheral blocks is used by using the correlation with the intra-luminance prediction mode of the peripheral blocks stored in the coding information storage memory 111. If it can be predicted from, the syntax element intra_luma_mpm_flag [x0] [y0], which is a flag indicating that the value is used, is set to 1 (true), and the syntax element intra_luma_mpm_idx, which is an index indicating the encoding block of the prediction source, is set. Set [x0] [y0] to a value that identifies the reference destination, and if unpredictable, set intra_luma_mpm_flag [x0] [y0] to 0 (false) to indicate the intra-luminance prediction mode to be encoded. Set the tax element intra_luma_mpm_remainder [x0] [y0] to a value that specifies the intra-brightness prediction mode.

Further, the bit string coding unit 108 on the coding side calculates and encodes the value of the syntax element intra_chroma_pred_mode [x0] [y0] relating to the intra color difference prediction mode of the color difference signal coding block (step S1508). In calculating the value of the syntax element related to the intra-color difference prediction mode, the intra-luminance prediction mode uses the correlation between the coded block of the color difference signal and the coded block of the luminance signal at the same position as the intra-luminance prediction mode. If the luminance prediction block at the same position as the signal coding block can be predicted from the intra-luminance prediction mode, the intra-luminance prediction mode value is predicted from the intra-luminance prediction mode value, and the intra-luminance prediction mode is used to predict the intra-luminance prediction mode. When the mode cannot be predicted, the intra-prediction modes typical of the intra-color difference prediction mode are 0 (plane prediction), 1 (average value prediction), 18 (horizontal prediction), 50 (vertical prediction), 66 (diagonal prediction). The amount of code is reduced by using a mechanism for setting one of the values of. The mode for predicting the value of the intra-color difference prediction mode from the value of the intra-luminance prediction mode of the coded block of the luminance signal at the same position as the coded block of the color difference signal is set to DM mode, and the syntax element intra_chroma_pred_mode [x0] [y0] When is a predetermined value, it indicates the DM mode.
<Intra prediction mode decoding>
In the bit string decoding unit 201 on the decoding side, when the prediction mode (PredMode) of the coded block is intra prediction (MODE_INTRA), the syntax element intra_luma_mpm_flag [x0] relating to the intra-luminance prediction mode of the coded block of the luminance signal from the bit string. Decrypt [y0], intra_luma_mpm_idx [x0] [y0], intra_luma_mpm_remainder [x0] [y0] to derive the intra-luminance prediction mode, and decode the syntax element intra_chroma_pred_mode [x0] [y0] for the intra-color difference prediction mode. Then, the value of the intra-color difference prediction mode is derived. When the value of intra_chroma_pred_mode [x0] [y0] indicates the DM mode, the value of the intra-color difference prediction mode is set to the intra-luminance of the luminance signal coding block at the same position as the luminance signal coding block. Set to the same value as the prediction mode.

In the present embodiment, when specifying the coded block of the luminance signal at the same position as the coded block of the color difference signal, the lower right pixel in the center of the coded block of the color difference signal in the image space of the color difference signal. The luminance signal coding block containing the pixels at the same position in the image space of the luminance signal corresponding to is the luminance signal coding block at the same position as the color difference signal coding block, but is the same as the color difference signal coding block. Coding of a luminance signal containing pixels at the same position in the image space of the luminance signal corresponding to the upper left pixel of the coding block of the luminance signal in the image space of the color difference signal when identifying the coding block of the luminance signal at the position. The block may be a coded block of the luminance signal at the same position as the coded block of the color difference signal.

<Inter prediction>
The inter-prediction method according to the embodiment is carried out by the inter-prediction unit 102 of the image coding device of FIG. 1 and the inter-prediction unit 203 of the image decoding device of FIG.

The inter-prediction method according to the embodiment will be described with reference to the drawings. The inter-prediction method is performed in either coding or decoding processing in units of coded blocks.

<Explanation of Inter Prediction Unit 102 on the Encoding Side>
FIG. 16 is a diagram showing a detailed configuration of the inter-prediction unit 102 of the image coding apparatus of FIG. The normal predicted motion vector mode derivation unit 301 derives a plurality of normal predicted motion vector candidates, selects a predicted motion vector, and calculates a difference vector from the detected motion vector. The detected inter-prediction mode, reference index, motion vector, and calculated difference vector become the inter-prediction information of the normal prediction motion vector mode. This inter-prediction information is supplied to the inter-prediction mode determination unit 305. The detailed configuration and processing of the normal prediction motion vector mode derivation unit 301 will be described later.

The normal merge mode derivation unit 302 derives a plurality of normal merge candidates, selects the normal merge candidates, and obtains inter-prediction information in the normal merge mode. This inter-prediction information is supplied to the inter-prediction mode determination unit 305. The detailed configuration and processing of the normal merge mode derivation unit 302 will be described later.

The sub-block prediction motion vector mode derivation unit 303 derives a plurality of sub-block prediction motion vector candidates, selects a sub-block prediction motion vector, and calculates a difference vector from the detected motion vector. The detected inter-prediction mode, reference index, motion vector, and calculated difference vector become the inter-prediction information of the normal prediction motion vector mode. This inter-prediction information is supplied to the inter-prediction mode determination unit 305. The detailed configuration and processing of the sub-block prediction motion vector mode derivation unit 303 will be described later.

The sub-block merge mode derivation unit 304 derives a plurality of sub-block merge candidates, selects the sub-block merge candidates, and obtains the inter-prediction information of the sub-block merge mode. This inter-prediction information is supplied to the inter-prediction mode determination unit 305. The detailed configuration and processing of the subblock merge mode derivation unit 304 will be described later.

The inter prediction mode determination unit 305 is based on the inter prediction information supplied from the normal prediction motion vector mode derivation unit 301, the normal merge mode derivation unit 302, the subblock prediction motion vector mode derivation unit 303, and the subblock merge mode derivation unit 304. , Determine the inter-prediction mode. Inter-prediction mode determination unit 305 supplies inter-prediction information according to the determination result to motion compensation prediction unit 306.

The motion compensation prediction unit 306 performs inter-prediction for the reference image signal stored in the decoded image memory 104 based on the determined inter-prediction information. The detailed configuration and processing will be described later.

<Explanation of inter-prediction unit 203 on the decoding side>
FIG. 22 is a diagram showing a detailed configuration of the inter-prediction unit 203 of the image decoding apparatus of FIG.

The normal predicted motion vector mode derivation unit 401 derives a plurality of normal predicted motion vector candidates, selects a predicted motion vector, and calculates a difference vector from the detected motion vector. The detected inter-prediction mode, reference index, motion vector, and difference vector are the inter-prediction information of the normal prediction motion vector mode. This inter-prediction information is supplied to the motion compensation prediction unit 406 via the switch 408. The detailed configuration and processing of the normal predicted motion vector mode derivation unit 401 will be described later.

The normal merge mode derivation unit 402 derives a plurality of normal merge candidates, selects the normal merge candidates, and obtains inter-prediction information in the normal merge mode. This inter-prediction information is supplied to the motion compensation prediction unit 406 via the switch 408. The detailed configuration and processing of the normal merge mode derivation unit 402 will be described later.

The sub-block prediction motion vector mode derivation unit 403 derives a plurality of sub-block prediction motion vector candidates, selects a sub-block prediction motion vector, and calculates a difference vector from the detected motion vector. The detected inter-prediction mode, reference index, motion vector, and calculated difference vector become the inter-prediction information of the normal prediction motion vector mode. This inter-prediction information is supplied to the motion compensation prediction unit 406 via the switch 408.

The sub-block merge mode derivation unit 404 derives a plurality of sub-block merge candidates, selects the sub-block merge candidates, and obtains the inter-prediction information of the sub-block merge mode. This inter-prediction information is supplied to the motion compensation prediction unit 406 via the switch 408. The motion compensation prediction unit 406 performs inter-prediction for the reference image signal stored in the decoded image memory 208 based on the determined inter-prediction information. The detailed configuration and processing are the same as on the coding side.

<Normal prediction motion vector mode derivation unit (normal AMVP)>
The normal prediction motion vector mode derivation unit 301 of FIG. 17 includes a spatial prediction motion vector candidate derivation unit 321, a time prediction motion vector candidate derivation unit 322, a history prediction motion vector candidate derivation unit 323, a prediction motion vector candidate replenishment unit 325, and a normal motion. It includes a vector detection unit 326, a predicted motion vector candidate selection unit 327, and a motion vector subtraction unit 328.

The normal prediction motion vector mode derivation unit 401 of FIG. 23 includes a space prediction motion vector candidate derivation unit 421, a time prediction motion vector candidate derivation unit 422, a history prediction motion vector candidate derivation unit 423, a prediction motion vector candidate replenishment unit 425, and a prediction motion. It includes a vector candidate selection unit 426 and a motion vector addition unit 427.

The processing procedure of the normal prediction motion vector mode derivation unit 301 on the coding side and the normal prediction motion vector mode derivation unit 401 on the decoding side will be described with reference to the flowcharts of FIGS. 19 and 25, respectively. FIG. 19 is a flowchart showing a normal motion vector mode derivation processing procedure by the normal motion vector mode derivation unit 301 on the coding side, and FIG. 25 is a normal motion vector mode derivation process by the normal motion vector mode derivation unit 401 on the decoding side. It is a flowchart which shows a procedure.

<Normal prediction motion vector mode derivation unit (normal AMVP): Explanation on the coding side>
The procedure for deriving the normal predicted motion vector mode on the coding side will be described with reference to FIG. In the description of the processing procedure of FIG. 19, the term motion vector in the specification and the term normal motion vector of FIG. 19 correspond to each other.

First, the normal motion vector detection unit 326 detects the normal motion vector for each inter-prediction mode and reference index (step S100 in FIG. 19).

Subsequently, the spatial prediction motion vector candidate derivation unit 321, the time prediction motion vector candidate derivation unit 322, the history prediction motion vector candidate derivation unit 323, the prediction motion vector candidate supplementation unit 325, the prediction motion vector candidate selection unit 327, and the motion vector subtraction unit. At 328, the difference motion vector of the motion vector used in the inter-prediction of the normal prediction motion vector mode is calculated for each L0 and L1, respectively (steps S101 to S106 in FIG. 19). Specifically, when the prediction mode PredMode of the block to be processed is inter-prediction (MODE_INTER) and the inter-prediction mode is L0 prediction (Pred_L0), the prediction motion vector candidate list mvpListL0 of L0 is calculated and the prediction motion vector mvpL0 is selected. Then, the difference motion vector mvdL0 of the motion vector mvL0 of L0 is calculated. When the inter-prediction mode of the block to be processed is L1 prediction (Pred_L1), the prediction motion vector candidate list mvpListL1 of L1 is calculated, the prediction motion vector mvpL1 is selected, and the difference motion vector mvdL1 of the motion vector mvL1 of L1 is calculated. .. When the inter-prediction mode of the block to be processed is bi-prediction (Pred_BI), both L0 prediction and L1 prediction are performed, the prediction motion vector candidate list mvpList L0 of L0 is calculated, the prediction motion vector mvpL0 of L0 is selected, and L0. The motion vector mvL0 of the motion vector mvL0 is calculated, the predicted motion vector candidate list mvpListL1 of L1 is calculated, the predicted motion vector mvpL1 of L1 is calculated, and the differential motion vector mvdL1 of the motion vector mvL1 of L1 is calculated. To do.

The difference motion vector calculation process is performed for each of L0 and L1, but both L0 and L1 are common processes. Therefore, in the following description, L0 and L1 are represented as a common LX. X is 0 in the process of calculating the differential motion vector of L0, and X is 1 in the process of calculating the differential motion vector of L1. Further, when the information of the other list is referred to instead of the LX during the process of calculating the differential motion vector of the LX, the other list is represented as LY.

When the motion vector mvLX of LX is used (step S102: YES in FIG. 19), the candidates of the predicted motion vector of LX are calculated to construct the predicted motion vector candidate list mvpListLX of LX (step S103 of FIG. 19). Multiple predicted motions in the space predicted motion vector candidate derived section 321 in the normal predicted motion vector mode derived section 301, the time predicted motion vector candidate derived section 322, the historical predicted motion vector candidate derived section 323, and the predicted motion vector candidate supplement section 325. Derivation of vector candidates and construction of predicted motion vector candidate list mvpListLX. The detailed processing procedure of step S103 of FIG. 19 will be described later using the flowchart of FIG.

Subsequently, the predicted motion vector candidate selection unit 327 selects the LX predicted motion vector mvpLX from the LX predicted motion vector candidate list mvpListLX (step S104 in FIG. 19). Calculate each difference motion vector, which is the difference between the motion vector mvLX and the candidate mvpListLX [i] of each predicted motion vector stored in the predicted motion vector candidate list mvpListLX. The amount of code when these differential motion vectors are encoded is calculated for each element of the predicted motion vector candidate list mvpListLX. Then, among the elements registered in the predicted motion vector candidate list mvpListLX, the predicted motion vector candidate mvpListLX [i] having the minimum sign amount for each candidate of the predicted motion vector is selected as the predicted motion vector mvpLX, and the candidate mvpListLX [i] is selected. Get index i. When there are multiple candidates for the predicted motion vector that is the smallest generated code in the predicted motion vector candidate list mvpListLX, the index i in the predicted motion vector candidate list mvpListLX is represented by a small number. Select the candidate mvpListLX [i] as the optimal predicted motion vector mvpLX and get its index i.

Subsequently, the motion vector subtraction unit 328 subtracts the selected LX predicted motion vector mvpLX from the LX motion vector mvLX.
mvdLX = mvLX --mvpLX
The difference motion vector mvdLX of LX is calculated as (step S105 in FIG. 19).

<Normal prediction motion vector mode derivation unit (normal AMVP): Explanation on the decoding side>
Next, the normal predicted motion vector mode processing procedure on the decoding side will be described with reference to FIG. On the decoding side, the spatial prediction motion vector candidate derivation unit 421, the time prediction motion vector candidate derivation unit 422, the history prediction motion vector candidate derivation unit 423, and the prediction motion vector candidate replenishment unit 425 are used for inter-prediction in the normal prediction motion vector mode. The motion vector is calculated for each L0 and L1 (steps S201 to S206 in FIG. 25). Specifically, when the prediction mode PredMode of the processing target block is inter-prediction (MODE_INTER) and the inter-prediction mode of the processing target block is L0 prediction (Pred_L0), the prediction motion vector candidate list mvpListL0 of L0 is calculated and the prediction motion is predicted. Select the vector mvpL0 and calculate the motion vector mvL0 of L0. When the inter-prediction mode of the block to be processed is L1 prediction (Pred_L1), the prediction motion vector candidate list mvpListL1 of L1 is calculated, the prediction motion vector mvpL1 is selected, and the motion vector mvL1 of L1 is calculated. When the inter-prediction mode of the block to be processed is bi-prediction (Pred_BI), both L0 prediction and L1 prediction are performed, the prediction motion vector candidate list mvpList L0 of L0 is calculated, the prediction motion vector mvpL0 of L0 is selected, and L0. The motion vector mvL0 of L1 is calculated, the predicted motion vector candidate list mvpList L1 of L1 is calculated, the predicted motion vector mvpL1 of L1 is calculated, and the motion vector mvL1 of L1 is calculated respectively.

Similar to the coding side, the decoding side also performs motion vector calculation processing for each of L0 and L1, but both L0 and L1 are common processing. Therefore, in the following description, L0 and L1 are represented as a common LX. LX represents an inter-prediction mode used for inter-prediction of the coded block to be processed. X is 0 in the process of calculating the motion vector of L0, and X is 1 in the process of calculating the motion vector of L1. Further, when the information of the other reference list is referred to instead of the same reference list as the LX to be calculated during the process of calculating the motion vector of the LX, the other reference list is represented as LY.

When the motion vector mvLX of LX is used (step S202: YES in FIG. 25), the candidates of the predicted motion vector of LX are calculated to construct the predicted motion vector candidate list mvpListLX of LX (step S203 of FIG. 25). Multiple predicted motions in the space predicted motion vector candidate derived section 421, the time predicted motion vector candidate derived section 422, the historical predicted motion vector candidate derived section 423, and the predicted motion vector candidate supplement section 425 in the normal predicted motion vector mode derivation section 401. Calculate vector candidates and build a predicted motion vector candidate list mvpListLX. The detailed processing procedure of step S203 of FIG. 25 will be described later using the flowchart of FIG.

Subsequently, the predicted motion vector candidate selection unit 426 selects the predicted motion vector candidate mvpListLX [mvpIdxLX] corresponding to the index mvpIdxLX of the predicted motion vector decoded and supplied by the bit string decoding unit 201 from the predicted motion vector candidate list mvpListLX. It is taken out as the predicted motion vector mvpLX (step S204 in FIG. 25).

Subsequently, the motion vector addition unit 427 adds the LX differential motion vector mvdLX and the LX predicted motion vector mvpLX, which are decoded and supplied by the bit string decoding unit 201.
mvLX = mvpLX + mvdLX
The motion vector mvLX of LX is calculated as (step S205 in FIG. 25).

<Normal prediction motion vector mode derivation unit (normal AMVP): Motion vector prediction method>
FIG. 20 shows a normal predicted motion vector mode derivation having a function common to the normal predicted motion vector mode derivation unit 301 of the image coding device and the normal predicted motion vector mode derivation unit 401 of the image decoding device according to the embodiment of the present invention. It is a flowchart which shows the processing procedure of processing.

The normal prediction motion vector mode derivation unit 301 and the normal prediction motion vector mode derivation unit 401 include a prediction motion vector candidate list mvpListLX. The predicted motion vector candidate list mvpListLX has a list structure, and is provided with a predicted motion vector index indicating the location inside the predicted motion vector candidate list and a storage area for storing the predicted motion vector candidates corresponding to the index as elements. The number of the predicted motion vector index starts from 0, and the predicted motion vector candidate is stored in the storage area of the predicted motion vector candidate list mvpListLX. In the present embodiment, the predicted motion vector candidate list mvpListLX can register at least two predicted motion vector candidates (inter-prediction information). Further, 0 is set in the variable numCurrMvpCand indicating the number of predicted motion vector candidates registered in the predicted motion vector candidate list mvpListLX.

Spatial prediction motion vector candidate derivation units 321 and 421 derive prediction motion vector candidates from blocks adjacent to the left side. In this process, the flag availableFlagLXA indicating whether or not the predicted motion vector candidate of the block (A0 or A1) adjacent to the left side is available, the motion vector mvLXA, and the reference index refIdxA are derived, and mvLXA is derived from the predicted motion vector candidate list mvpListLX. (Step S301 in FIG. 20). When L0, X is 0, and when L1, X is 1 (the same applies hereinafter). Subsequently, the spatial prediction motion vector candidate derivation units 321 and 421 derive the prediction motion vector candidates from the blocks (B0, B1 or B2) adjacent to the upper side. In this process, the flag availableFlagLXB indicating whether the predicted motion vector candidates of the adjacent blocks on the upper side are available, the motion vector mvLXB, and the reference index refIdxB are derived, and if mvLXA and mvLXB are not equal, mvLXB is predicted motion vector. Add to the candidate list mvpListLX (step S302 in FIG. 20). The processing of steps S301 and S302 in FIG. 20 is common except that the position and number of adjacent blocks to be referred to are different, and the flag availableFlagLXN indicating whether or not the predicted motion vector candidate of the coded block can be used and the motion vector mvLXN , The reference index refIdxN (N is A or B, and so on) is derived.

Subsequently, the time prediction motion vector candidate derivation units 322 and 422 derive the prediction motion vector candidates from the coding block in the picture whose time is different from the current processing target picture. In this process, the flag availableFlagLXCol indicating whether the predicted motion vector candidates of the coded blocks in the pictures at different times are available, the motion vector mvLXCol, the reference index refIdxCol, and the reference list listCol are derived, and the mvLXCol is used as the predicted motion vector candidate. Add to list mvpListLX (step S303 in FIG. 20). The detailed description of the derivation processing procedure in step S303 will be omitted.

It should be noted that the processing of the time prediction motion vector candidate derivation units 322 and 422 can be omitted in units of sequence (SPS), picture (PPS), or slice.

Subsequently, the history prediction motion vector candidate derivation units 323 and 423 add the history prediction motion vector candidates registered in the history prediction motion vector candidate list HmvpCandList to the prediction motion vector candidate list mvpListLX. (Step S304 in FIG. 20). The details of the registration processing procedure in step S304 will be described later with reference to the flowchart of FIG.

Subsequently, the predicted motion vector candidate supplementing units 325 and 425 add motion vectors having predetermined values such as until the predicted motion vector candidate list mvpListLX is satisfied (0,0) (S305 in FIG. 20).

<Normal merge mode derivation section (normal merge)>
The normal merge mode derivation unit 302 of FIG. 18 includes a spatial merge candidate derivation unit 341, a time merge candidate derivation unit 342, an average merge candidate derivation unit 344, a history merge candidate derivation unit 345, a merge candidate replenishment unit 346, and a merge candidate selection unit 347. including.

The normal merge mode derivation unit 402 of FIG. 24 includes a spatial merge candidate derivation unit 441, a time merge candidate derivation unit 442, an average merge candidate derivation unit 444, a history merge candidate derivation unit 445, a merge candidate replenishment unit 446, and a merge candidate selection unit 447. including.

FIG. 21 describes a procedure of the normal merge mode derivation process having a function common to the normal merge mode derivation unit 302 of the image coding device and the normal merge mode derivation unit 402 of the image decoding device according to the embodiment of the present invention. It is a flowchart.

The various processes will be described below in order. In the following description, unless otherwise specified, the case where the slice type slice_type is B slice is described, but it can also be applied to the case of P slice. However, when the slice type slice_type is P slice, there is only L0 prediction (Pred_L0) as the inter-prediction mode, and there is no L1 prediction (Pred_L1) and double prediction (Pred_BI), so that the processing related to L1 can be omitted.

The normal merge mode derivation unit 302 and the normal merge mode derivation unit 402 include a merge candidate list mergeCandList. Merge candidate list The mergeCandList has a list structure, and has a merge index indicating the location inside the merge candidate list and a storage area for storing the merge candidates corresponding to the indexes as elements. The number of the merge index starts from 0, and the merge candidates are stored in the storage area of the merge candidate list mergeCandList. In the subsequent processing, the merge candidate of the merge index i registered in the merge candidate list mergeCandList is represented by mergeCandList [i]. In the present embodiment, the merge candidate list mergeCandList can register at least 6 merge candidates (inter-prediction information). Further, 0 is set in the variable numCurrMergeCand indicating the number of merge candidates registered in the merge candidate list mergeCandList.

In the space merge candidate derivation unit 341 and the space merge candidate derivation unit 441, the processing target block is obtained from the coding information stored in the coding information storage memory 111 of the image coding device or the coding information storage memory 205 of the image decoding device. Spatial merge candidates A and B are derived from blocks adjacent to the left and upper sides of the above, and the derived spatial merge candidates are registered in the merge candidate list mergeCandList (step S401 in FIG. 21). Here, N indicating either spatial merge candidate A or B or time merge candidate Col is defined. Flags availableFlagN indicating whether or not the inter-prediction information of block N can be used as spatial merge candidate N, reference index refIdxL0N of L0 of spatial merge candidate N and reference index refIdxL1N of L1 and L0 indicating whether L0 prediction is performed. The prediction flags predFlagL0N and the motion vector mvL0N of the L1 prediction flags predFlagL1N and L0 indicating whether or not the L1 prediction is performed, and the motion vector mvL1N of L1 are derived. However, in the present embodiment, since the merge candidate is derived without referring to other coded blocks included in the block including the coded block to be processed, it is included in the block including the coded block to be processed. Spatial merge candidates are not derived.

Subsequently, the time merge candidate derivation unit 342 and the time merge candidate derivation unit 442 derive the time merge candidates from the pictures at different times and register the derived time merge candidates in the merge candidate list mergeCandList (FIG. 21). Step S402). Flags availableFlagCol indicating whether time merge candidates are available, L0 prediction flags predFlag L0Col indicating whether L0 prediction of time merge candidates is performed, and L1 prediction flags predFlagL1Col indicating whether L1 prediction is performed, and L0. The motion vector mvL0Col and the motion vector mvL1Col of L1 are derived. The detailed processing procedure of step S402 will be omitted.

It should be noted that the processing of the time merge candidate derivation unit 342 and the time merge candidate derivation unit 442 can be omitted in units of sequence (SPS), picture (PPS), or slice.

Subsequently, the history merge candidate derivation unit 345 and the history merge candidate derivation unit 445 add the history prediction motion vector candidates registered in the history prediction motion vector candidate list HmvpCandList to the merge candidate list mergeCandList (step S403 in FIG. 21). .. The detailed processing procedure of step S403 will be described later using the flowchart of FIG. 38.

Subsequently, the average merge candidate derivation unit 344 and the average merge candidate derivation unit 444 derive the average merge candidate from the merge candidate list mergeCandList and register the derived average merge candidate in the merge candidate list mergeCandList (step of FIG. 21). S404). The detailed processing procedure of step S404 will be described later with reference to the flowchart of FIG.

Subsequently, in the merge candidate replenishment unit 346 and the merge candidate replenishment unit 446, if the number of merge candidates numCurrMergeCand registered in the merge candidate list mergeCandList is smaller than the maximum number of merge candidates MaxNumMergeCand, it is registered in the merge candidate list mergeCandList. The number of merge candidates numCurrMergeCand is up to the maximum number of merge candidates MaxNumMergeCand, and additional merge candidates are derived and registered in the merge candidate list mergeCandList (step S405 in FIG. 21). With the maximum number of merge candidates MaxNumMergeCand as the upper limit, in the P slice, merge candidates whose motion vector has a value of (0,0) at different reference indexes and whose prediction mode is L0 prediction (Pred_L0) are added. In the B slice, a merge candidate whose motion vector has a value of (0,0) at a different reference index and whose prediction mode is bi-prediction (Pred_BI) is added.

Subsequently, the merge candidate selection unit 347 and the merge candidate selection unit 447 select the merge candidate from the merge candidates registered in the merge candidate list mergeCandList. The merge candidate selection unit 347 on the coding side selects the merge candidate by calculating the code amount and the strain amount, and sends the merge index indicating the selected merge candidate and the inter-prediction information of the merge candidate to the motion compensation prediction unit 306. Supply. On the other hand, the merge candidate selection unit 447 on the decoding side selects the merge candidate based on the decoded merge index, and supplies the selected merge candidate to the motion compensation prediction unit 406.

<Update of history prediction motion vector candidate list>
Next, a method of initializing and updating the history prediction motion vector candidate list HmvpCandList provided in the coding information storage memory 111 on the coding side and the coding information storage memory 205 on the decoding side will be described in detail. FIG. 26 is a flowchart illustrating a procedure for initializing / updating the history prediction motion vector candidate list.

In the present embodiment, the history prediction motion vector candidate list HmvpCandList is updated by the coded information storage memory 111 and the coded information storage memory 205. A history candidate list update unit may be installed in the inter prediction unit 102 and the inter prediction unit 203 to update the history prediction motion vector candidate list HmvpCandList.

Initialize the history prediction motion vector candidate list HmvpCandList at the beginning of the slice, and update the history prediction motion vector candidate list HmvpCandList on the coding side when the normal prediction vector mode or the normal merge mode is selected in the prediction method determination unit 105. Then, on the decoding side, the history prediction motion vector candidate list HmvpCandList is updated when the inter-prediction mode decoded by the bit string decoding unit 201 is the normal prediction vector mode or the normal merge mode.

The inter-prediction information used when performing inter-prediction in the normal prediction vector mode or the normal merge mode is registered in the historical prediction motion vector candidate list HmvpCandList as the inter-prediction information candidate hMvpCand. The inter-prediction information candidate hMvpCand includes the reference index refIdxL0 of L0 and the reference index refIdxL1 of L1, the L0 prediction flag predFlag L0 indicating whether L0 prediction is performed, and the L1 prediction flag predFlag L1 indicating whether L1 prediction is performed. The motion vector mvL0 of L0 and the motion vector mvL1 of L1 are included. Inter-prediction information candidate among the elements (that is, inter-prediction information) registered in the history prediction motion vector candidate list HmvpCandList provided in the coding information storage memory 111 on the coding side and the coding information storage memory 205 on the decoding side. If there is inter-prediction information with the same value as hMvpCand, delete the element from the historical prediction motion vector candidate list HmvpCandList. On the other hand, if there is no inter-prediction information with the same value as the inter-prediction information candidate hMvpCand, the first element of the historical prediction motion vector candidate list HmvpCandList is deleted, and the inter-prediction information candidate is at the end of the historical prediction motion vector candidate list HmvpCandList. Add hMvpCand.

The number of elements of the history prediction motion vector candidate list HmvpCandList provided in the coding information storage memory 111 on the coding side and the coding information storage memory 205 on the decoding side of the present invention is 6.

First, the history prediction motion vector candidate list HmvpCandList for each slice is initialized (step S2101 in FIG. 26). Empty all the elements of the historical prediction motion vector candidate list HmvpCandList at the beginning of the slice, and set the value of the number of historical prediction motion vector candidates registered in the historical prediction motion vector candidate list HmvpCandList to 0.

Although the history prediction motion vector candidate list HmvpCandList is initialized in slice units (the first coded block of the slice), it may be performed in picture units, tile units, or tree block line units.

Subsequently, the following history prediction motion vector candidate list HmvpCandList update process is repeated for each coded block in the slice (steps S2102 to S2107 in FIG. 26).

First, the initial setting is performed for each coded block. A FALSE (false) value is set in the flag identicalCandExist indicating whether or not the same candidate exists, and 0 is set in the removal target index removeIdx (step S2103 in FIG. 26).

It is determined whether or not the inter-prediction information candidate hMvpCand to be registered exists in the history prediction motion vector candidate list HmvpCandList (step S2104 in FIG. 26). When the prediction method determination unit 105 on the coding side determines the normal prediction motion vector mode or the normal merge mode, or when the bit string decoding unit 201 on the decoding side decodes the decoding as the normal prediction motion vector mode or the normal merge mode. Let the inter-prediction mode be hMvpCand. When the coding side prediction method determination unit 105 determines the intra prediction mode, subblock prediction motion vector mode, or subblock merge mode, or the decoding side bit string decoding unit 201 determines the intra prediction mode, subblock prediction motion vector mode. Or, when decoded as the sub-block merge mode, the history prediction motion vector candidate list HmvpCandList is not updated, and the inter-prediction information candidate hMvpCand to be registered does not exist. If the inter-prediction information candidate hMvpCand to be registered does not exist, steps S2105 to S2106 are skipped (step S2104: NO in FIG. 26). If the inter-prediction information candidate hMvpCand to be registered exists, the process of step S2105 or less is performed (step S2104: YES in FIG. 26).

Subsequently, it is determined whether or not the same element as the inter-prediction information candidate hMvpCand to be registered exists in each element of the history prediction motion vector candidate list HmvpCandList (step S2105 in FIG. 26). FIG. 27 is a flowchart of the same element confirmation processing procedure. Number of history prediction motion vector candidates When the value of NumHmvpCand is 0 (step S2121: NO in FIG. 27), the history prediction motion vector candidate list HmvpCandList is empty and the same candidate does not exist, so skip steps S212 to S2125 in FIG. 27. , This same element confirmation processing procedure is terminated. When the number of historically predicted motion vector candidates NumHmvpCand is greater than 0 (step S2121: YES in FIG. 27), the process of step S2123 is repeated from 0 to NumHmvpCand-1 in the historical predicted motion vector index hMvpIdx (step in FIG. 27). S2122-S2125). First, it is compared whether or not the hMvpCandList [hMvpIdx], which is the xth element of the historical prediction motion vector candidate list counting from 0, is the same as the inter-prediction information candidate hMvpCand (step S2123 in FIG. 27). If they are the same (step S2123: YES in FIG. 27), a TRUE (true) value is set in the flag identicalCandExist indicating whether or not the same candidate exists, and a value of hMVpIndex is set in the removeIdx index to be deleted. The element confirmation process ends. If they are not the same (step S2123: NO in FIG. 27), hMvpIdx is incremented by 1, and if the historical prediction motion vector index hMvpIdx is NumHmvpCand-1 or less, the processes after step S2123 are performed (steps S212 to S2125 in FIG. 27). ..

Returning to the flowchart of FIG. 26 again, the elements of the history prediction motion vector candidate list HmvpCandList are shifted and added (step S2106 of FIG. 26). FIG. 28 is a flowchart of the element shift / addition processing procedure of the history prediction motion vector candidate list HmvpCandList in step S2106 of FIG. First, it is determined whether to remove the elements stored in the historical prediction motion vector candidate list HmvpCandList and then add a new element, or to add a new element without removing the elements. Specifically, it compares whether or not the flag identicalCandExist indicating whether or not the same candidate exists is TRUE (true) or NumHmvpCand is 6 (step S2141 in FIG. 28). If the flag identicalCandExist indicating whether or not the same candidate exists satisfies either TRUE (true) or NumHmvpCand satisfies either of 6 (step S2141: YES in FIG. 28), it is stored in the historical prediction motion vector candidate list HmvpCandList. Remove the existing element and then add a new element. Set the initial value of index i to the value of removeIdx + 1. The element shift process in step S2143 is repeated from this initial value to NumHmvpCand. (Steps S2142 to S2144 in FIG. 28). By copying the elements of HMVPCandList [i] to HMVPCandList [i-1], the elements are shifted forward (step S2143 in FIG. 28) and i is incremented by 1 (steps S2142 to S2144 in FIG. 28). When the index i becomes NumHmvpCand + 1 and the element shift processing in step S2143 is completed, the inter-prediction information candidate hMvpCand is added to the end of the history prediction motion vector candidate list (step S2145 in FIG. 28). Here, the end of the history prediction motion vector candidate list is the (NumHmvpCand-1) th HMVPCandList [NumHmvpCand-1] counting from 0. This completes the element shift / addition processing of this history prediction motion vector candidate list HMVPCandList. On the other hand, when the flag identicalCandExist indicating whether or not the same candidate exists does not satisfy any of the conditions of TRUE (true) and NumHmvpCand of 6 (step S2141: NO in FIG. 28), it is stored in the historical prediction motion vector candidate list HmvpCandList. The inter-prediction information candidate hMvpCand is added to the end of the historical prediction motion vector candidate list without excluding the elements (step S2146 in FIG. 28). Here, the last of the history prediction motion vector candidate list is the HMV PCandList [NumHmvpCand] which is the NumHmvpCand th from 0. In addition, NuMHmvpCand is incremented by 1 to end the element shift / addition process of this history prediction motion vector candidate list HMVPCandList.

FIG. 31 is a diagram illustrating an example of the update process of the history prediction motion vector list. When 6 elements (inter prediction information) are registered in the history prediction motion vector candidate list HMVPCandList and new inter prediction information is added, each element of the history prediction motion vector candidate list HMVPCandList and a new inter from the front Comparing the prediction information (Fig. 31 (a)), if the new inter-prediction information has the same value as the third element from the beginning of the historical prediction motion vector candidate list HMVPCandList, HMVP2, from the historical prediction motion vector candidate list HMVPCandList. Delete the element HMVP2, shift (copy) the rear elements HMVP3 to HMVP5 one by one, and add new inter-prediction information to the end of the history prediction motion vector candidate list HMVPCandList (Fig. 31 (b)). , The update of the history prediction motion vector candidate list HMVPCandList is completed (Fig. 31 (c)).

<History prediction motion vector candidate derivation process>
Next, the history prediction motion vector candidate derivation unit 323 of the normal prediction motion vector mode derivation unit 301 on the coding side and the history prediction motion vector candidate derivation unit 423 of the normal prediction motion vector mode derivation unit 401 on the decoding side perform common processing. A method of deriving the history prediction motion vector candidate from the history prediction motion vector candidate list HMVPCandList, which is the processing procedure of step S304 of FIG. 20, will be described in detail. FIG. 29 is a flowchart illustrating a history prediction motion vector candidate derivation processing procedure.

When the current number of predicted motion vector candidates numCurrMvpCand is equal to or greater than the maximum number of elements in the predicted motion vector candidate list mvpListLX (here, 2) or the number of historical predicted motion vector candidates is 0 (step S2201: in FIG. 29). NO), the process of steps S2202 to S2209 of FIG. 29 is omitted, and the history prediction motion vector candidate derivation process procedure is completed. When the current number of predicted motion vector candidates numCurrMvpCand is less than 2, which is the maximum number of elements in the predicted motion vector candidate list mvpListLX, and when the value of the number of historical predicted motion vector candidates NumHmvpCand is greater than 0 (step S2201: in FIG. 29). YES), the processes of steps S2202 to S2209 of FIG. 29 are performed.

Subsequently, the processes of steps S2203 to S2208 of FIG. 41 are repeated until the index i is 1 to 4 and the number of historical prediction motion vector candidates NuMHmvpCand, whichever is smaller (steps S2202 to S2209 of FIG. 29). When the current number of predicted motion vector candidates numCurrMvpCand is 2 or more, which is the maximum number of elements of the predicted motion vector candidate list mvpListLX (steps S2203: NO in FIG. 29), the processing of steps S2204 to S2209 in FIG. 29 is omitted. The history prediction motion vector candidate derivation processing procedure ends. When the current number of predicted motion vector candidates numCurrMvpCand is smaller than 2, which is the maximum number of elements of the predicted motion vector candidate list mvpListLX (step S2203: YES in FIG. 29), the processes after step S2204 in FIG. 29 are performed.

Subsequently, the processes from steps S2205 to S2207 are performed for 0 and 1 (L0 and L1) in Y, respectively (steps S2204 to S2208 in FIG. 29). When the current number of predicted motion vector candidates numCurrMvpCand is 2 or more, which is the maximum number of elements of the predicted motion vector candidate list mvpListLX (steps S2205: NO in FIG. 29), the processing of steps S2206 to S2209 in FIG. 29 is omitted. The history prediction motion vector candidate derivation processing procedure ends. When the current number of predicted motion vector candidates numCurrMvpCand is smaller than 2, which is the maximum number of elements of the predicted motion vector candidate list mvpListLX (step S2205: YES in FIG. 29), the processes after step S2206 in FIG. 29 are performed.

Next, when the reference index of LY in the historical prediction motion vector candidate list HmvpCandList [NumHmvpCand --i] is the same as the reference index refIdxLX of the encoded / decoded motion vector (step S2206: YES in FIG. 29), the predicted motion vector candidate. As the last element of the list, numCurrMvpCand th element mvpListLX [numCurrMvpCand] counting from 0 in the predicted motion vector candidate list (NumHmvpCand-i) th element HmvpCandList [[NumHmvpCand-] The motion vector of LY of i] is added (step S2207 in FIG. 29), and the number of current predicted motion vector candidates numCurrMvpCand is incremented by 1. If the reference index of LY in the historical prediction motion vector candidate list HmvpCandList [NumHmvpCand --i] is not the same as the reference index refIdxLX of the motion vector to be encoded / decoded (step S2206: NO in FIG. 29), the additional processing of step S2207 is performed. skip.

The above processes of steps S2205 to S2207 of FIG. 29 are performed at both L0 and L1 (steps S2204 to S2208 of FIG. 29).

When the index i is incremented by 1 and the index i is 4 or less than the smaller value of the number of historical prediction motion vector candidates NuMHmvpCand, the processes after step S2203 are performed again (steps S2202 to S2209 in FIG. 29).

<History merge candidate derivation process>
Next, the process of step S403 in FIG. 21, which is a process common to the history merge candidate derivation unit 345 of the normal merge mode derivation unit 302 on the coding side and the history merge candidate derivation unit 445 of the normal merge mode derivation unit 402 on the decoding side. The method of deriving the history merge candidate from the history merge candidate list HmvpCandList, which is a procedure, will be described in detail. FIG. 30 is a flowchart illustrating a history merge candidate derivation processing procedure.

First, the initialization process is performed (step S2301 in FIG. 30). Set the value of FALSE to each element from 0 to (numCurrMergeCand -1) of isPruned [i], and set the variable numOrigMergeCand to the number of elements registered in the current merge candidate list, numCurrMergeCand.

Subsequently, the initial value of the index hMvpIdx is set to 1, and the additional processing from step S2303 to step S2310 in FIG. 30 is repeated from this initial value to NuMHmvpCand (steps S2302 to S2311 in FIG. 30). If the number of elements registered in the current merge candidate list numCurrMergeCand is not less than or equal to (maximum number of merge candidates MaxNumMergeCand-1), merge candidates have been added to all the elements in the merge candidate list. The process ends (step S2303: NO in FIG. 30). When the number of elements registered in the current merge candidate list numCurrMergeCand is (maximum number of merge candidates MaxNumMergeCand-1) or less (step S2303: YES in FIG. 30), the processes after step S2304 are performed.

First, a FALSE value is set in sameMotion (step S2304 in FIG. 30). Subsequently, the initial value of the index i is set to 0, and the processes of steps S2306 and S2307 of FIG. 30 are performed from this initial value to 1 (S2305 to S2308 of FIG. 30).

Next, is the (NumHmvpCand-hMvpIdx) th element HmvpCandList [NumHmvpCand-hMvpIdx] counted from 0 in the historical motion vector prediction candidate list and the i-th element mergeCandList [i] counted from 0 in the merge candidate list the same value? Whether or not they are compared (step S2306 in FIG. 30). Here, the same value of the merge candidate indicates that the values of all the components (inter-prediction mode, reference index, motion vector) of the merge candidate are the same. However, the processing in step S2306 is limited to the case where hMvpIdx is larger than NuMHmvpCand-2, mergeCandList [i] is a spatial merge candidate, and isPruned [i] is FALSE (false). If the values are the same (step S2306: YES in FIG. 30), TRUE (true) is set for both sameMotion and isPruned [i] (step S2307 in FIG. 30). If the values are not the same (step S2306: NO in FIG. 30), the process of step S2307 is skipped. When the iterative processing from step S2305 to step S2308 in FIG. 30 is completed, it is compared whether or not sameMotion is FALSE (false) (step S2309 in FIG. 30), and when sameMotion is FALSE (false) (step S2309 in FIG. 30: YES), add the (NumHmvpCand --hMvpIdx) th element HmvpCandList [NumHmvpCand --hMvpIdx] to the mergeCandList [numCurrMergeCand] of the numCurrMergeCand of the merge candidate list, and increment numCurrMergeCand1. Step S2310 in FIG. 30). The index hMvpIdx is incremented by 1 (step S2302 in FIG. 30), and the iterative processing of steps S2302 to S2311 in FIG. 30 is repeated.

When the confirmation of all the elements of the history prediction motion vector candidate list is completed or the merge candidates are added to all the elements of the merge candidate list, the derivation process of this history merge candidate is completed.

<Average merge candidate derivation process>
Next, the process of step S404 of FIG. 21, which is a process common to the average merge candidate derivation unit 344 of the normal merge mode derivation unit 302 on the coding side and the average merge candidate derivation unit 444 of the normal merge mode derivation unit 402 on the decoding side. The method of deriving the average merge candidate, which is a procedure, will be described in detail. FIG. 38 is a flowchart illustrating the procedure for deriving the average merge candidate.

First, the initialization process is performed (step S1301 in FIG. 38). Set the variable numOrigMergeCand to the number of elements registered in the current merge candidate list, numCurrMergeCand.

Then, the merge candidate list is scanned in order from the beginning, and two motion informations are determined. It is assumed that the index i = 0 indicating the first motion information and the index j = 1 indicating the second motion information. (Steps S1302 to S1303 in FIG. 38). If the number of elements registered in the current merge candidate list numCurrMergeCand is not less than or equal to (maximum number of merge candidates MaxNumMergeCand-1), merge candidates have been added to all the elements in the merge candidate list. The process ends (step S1304 in FIG. 38). If the number of elements registered in the current merge candidate list numCurrMergeCand is (maximum number of merge candidates MaxNumMergeCand-1) or less, the processing of step S1305 and subsequent steps is performed.

It is determined whether the i-th motion information mergeCandList [i] of the merge candidate list and the j-th motion information mergeCandList [j] of the merge candidate list are both invalid (step S1305 in FIG. 38), and both are invalid. In that case, move to the next element without deriving the average merge candidates of mergeCandList [i] and mergeCandList [j]. If both mergeCandList [i] and mergeCandList [j] are not invalid, the following processing is repeated with X as 0 and 1 (steps S1306 to 1314 in FIG. 38).

It is determined whether the LX prediction of mergeCandList [i] is valid (step S1307 of FIG. 38). When the LX prediction of mergeCandList [i] is valid, it is determined whether the LX prediction of mergeCandList [j] is valid (step S1308 in FIG. 38). If the LX prediction of mergeCandList [j] is valid, that is, if both the LX prediction of mergeCandList [i] and the LX prediction of mergeCandList [j] are valid, then the motion vector of the LX prediction of mergeCandList [i] and the mergeCandList The average merge candidate of the LX prediction having the motion vector of the LX prediction obtained by averaging the movement vectors of the LX prediction of [j] and the reference index of the LX prediction of mergeCandList [i] is derived and set to the LX prediction of the averageCand, and the averageCand Enable LX prediction (step S1309 in FIG. 38). In step S1308 of FIG. 38, if the LX prediction of mergeCandList [j] is not valid, that is, if the LX prediction of mergeCandList [i] is valid and the LX prediction of mergeCandList [j] is invalid, then mergeCandList [i] The average merge candidate of the LX prediction having the motion vector and the reference index of the LX prediction is derived and set to the LX prediction of the averageCand, and the LX prediction of the averageCand is valid (step S1310 in FIG. 38). If the LX prediction of mergeCandList [i] is not valid in step S1307 of FIG. 38, it is determined whether or not the LX prediction of mergeCandList [j] is valid (step S1311 of FIG. 38). If the LX prediction of mergeCandList [j] is valid, that is, if the LX prediction of mergeCandList [i] is invalid and the LX prediction of mergeCandList [j] is valid, then the motion vector of the LX prediction of mergeCandList [j] The average merge candidate of the LX prediction having the reference index is derived and set to the LX prediction of the averageCand to enable the LX prediction of the averageCand (step S1312 in FIG. 38). In step S1311 of FIG. 38, if the LX prediction of mergeCandList [j] is not valid, that is, if both the LX prediction of mergeCandList [i] and the LX prediction of mergeCandList [j] are invalid, the LX prediction of averageCand is invalidated. (Step S1312 in FIG. 38).

The average merge candidate averageCand of the L0 prediction, L1 prediction or BI prediction generated as described above is added to the mergeCandList [numCurrMergeCand] of the numCurrMergeCand th numCurrMergeCand of the merge candidate list, and the numCurrMergeCand is incremented by 1 (step S1315 in FIG. 38). This completes the process of deriving the average merge candidate.

The average merge candidate is averaged for each of the horizontal component of the motion vector and the vertical component of the motion vector.

<Motion compensation prediction processing>
The motion compensation prediction unit 306 acquires the position and size of the block currently subject to prediction processing in coding. Further, the motion compensation prediction unit 306 acquires the inter prediction information from the inter prediction mode determination unit 305. The reference index and motion vector are derived from the acquired inter-prediction information, and the reference picture specified by the reference index in the decoded image memory is moved from the same position as the image signal of the coded block by the motion vector. A prediction signal is generated after the image signal is acquired.

When the inter-prediction mode in inter-prediction is prediction from a single reference picture such as L0 prediction or L1 prediction, the prediction signal acquired from one reference picture is used as the motion compensation prediction signal, and the inter-prediction mode is BI. When the prediction mode is prediction from two reference pictures such as prediction, the weighted average of the prediction signals acquired from the two reference pictures is used as the motion compensation prediction signal, and the motion compensation prediction signal is used to determine the prediction method. Supply to the department. Here, the ratio of the weighted averages of the biprediction is 1: 1, but weighted averages may be performed using other ratios. For example, the weighting ratio may be increased as the distance between the picture to be predicted and the reference picture is closer. Further, the weighting ratio may be calculated by using the correspondence table between the combination of picture intervals and the weighting ratio.

The motion compensation prediction unit 406 has the same function as the motion compensation prediction unit 306 on the coding side. The motion compensation prediction unit 406 transfers the inter-prediction information from the normal prediction motion vector mode derivation unit 401, the normal merge mode derivation unit 402, the subblock prediction motion vector mode derivation unit 403, and the subblock merge mode derivation unit 404 to the switch 408. Get through.

The motion compensation prediction unit 406 supplies the obtained motion compensation prediction signal to the decoded image signal superimposition unit 207.

<About inter-prediction mode>
The process of making a prediction from a single reference picture is defined as a simple prediction, and in the case of a single prediction, one of the two reference pictures registered in the reference lists L0 and L1, which is L0 prediction or L1 prediction, is used. Make a prediction. The L0 prediction and the L1 prediction may be forward prediction (prediction that refers to a front reference image) or backward prediction (prediction that refers to a rear reference image). 33 to 34 are diagrams for explaining motion compensation prediction in L0 prediction (single prediction).

FIG. 33 shows a case where the inter-prediction mode is L0 prediction and the reference picture (RefL0Pic) of L0 is at a time before the processing target picture (CurPic). FIG. 33 shows a case where the reference picture of L0 is at a time after the picture to be processed in the L0 prediction. Similarly, the reference picture for the L0 prediction in FIGS. 33 and 34 can be replaced with the reference picture for the L1 prediction (RefL1Pic) to perform simple prediction.

The process of making a prediction from two reference pictures is defined as a double prediction, and in the case of a double prediction, both the L0 prediction and the L1 prediction are used to express the double prediction. FIGS. 35 to 37 are diagrams for explaining motion compensation prediction in bi-prediction. FIG. 35 shows a case where the reference picture of the L0 prediction is at a time before the processing target picture and the reference picture of the L1 prediction is at a time after the processing target picture in the bi-prediction. FIG. 36 shows a case where the reference picture of the L0 prediction and the reference picture of the L1 prediction are at a time before the processing target picture in the bi-prediction. FIG. 37 shows a case where the reference picture of the L0 prediction and the reference picture of the L1 prediction are at a time after the processing target picture in the bi-prediction.

In this way, the relationship between the prediction type of L0 / L1 and time is limited to L0 for forward prediction (prediction that refers to the front reference image) and L1 for backward prediction (prediction that refers to the rear reference image). It can be used without it. Further, in the case of bi-prediction, L0 prediction and L1 prediction may be performed using the same reference picture. It should be noted that the determination of whether the motion compensation prediction is performed by simple prediction or double prediction is determined based on, for example, information (for example, a flag) indicating whether or not to use L0 prediction and whether or not to use L1 prediction. To.

<About reference index>
In the embodiment of the present invention, in order to improve the accuracy of motion compensation prediction, it is possible to select the optimum reference picture from a plurality of reference pictures in motion compensation prediction. Therefore, the reference picture used in the motion compensation prediction is used as the reference index, and the reference index is encoded together with the coding vector in the coding stream.

<Motion compensation processing based on normal predicted motion vector mode>
As shown in the inter-prediction unit 102 on the coding side of FIG. 16, the motion compensation prediction unit 306 is used when the inter-prediction information by the normal prediction motion vector mode derivation unit 301 is selected in the inter-prediction mode determination unit 305. Acquires this inter-prediction information from the inter-prediction mode determination unit 305, derives the inter-prediction mode, reference index, and motion vector of the block currently being processed, and generates a motion compensation prediction signal. The generated motion compensation prediction signal is supplied to the prediction method determination unit 105.

Similarly, the motion compensation prediction unit 406 is normally used when the switch 408 is connected to the normal prediction motion vector mode derivation unit 401 in the process of decoding, as shown by the inter prediction unit 203 on the decoding side of FIG. The inter-prediction information by the prediction motion vector mode derivation unit 401 is acquired, the inter-prediction mode, the reference index, and the motion vector of the block currently being processed are derived, and the motion compensation prediction signal is generated. The generated motion compensation prediction signal is supplied to the decoded image signal superimposing unit 207.

<Motion compensation processing based on normal merge mode>
As shown in the inter-prediction unit 102 on the coding side of FIG. 16, the motion compensation prediction unit 306 is used when the inter-prediction information by the normal merge mode derivation unit 302 is selected in the inter-prediction mode determination unit 305. This inter-prediction information is acquired from the inter-prediction mode determination unit 305, the inter-prediction mode, reference index, and motion vector of the block currently being processed are derived, and a motion compensation prediction signal is generated. The generated motion compensation prediction signal is supplied to the prediction method determination unit 105.

Similarly, the motion compensation prediction unit 406 is in the normal merge mode when the switch 408 is connected to the normal merge mode derivation unit 402 in the decoding process, as shown by the inter prediction unit 203 on the decoding side in FIG. The inter-prediction information by the derivation unit 402 is acquired, the inter-prediction mode, the reference index, and the motion vector of the block currently being processed are derived, and the motion compensation prediction signal is generated. The generated motion compensation prediction signal is supplied to the decoded image signal superimposing unit 207.

<Merge differential motion vector (MMVD)>
A differential motion vector can be added to the motion vectors of the top two merge candidates (merge candidates with merge indexes 0 and 1 in the merge candidate list). This differential motion vector is called a merge differential motion vector.

When the merge difference motion vector is added in the merge candidate selection unit 347 on the coding side, the motion vector to which the merge difference motion vector is added is supplied to the motion compensation prediction unit 306 via the inter prediction mode determination unit 305. Further, the bit string coding unit 108 encodes the information regarding the merge difference motion vector. The information about the merged difference motion vector is an index mmvd_distance_idx indicating the distance to be added to the motion vector and an index mmvd_direction_idx indicating the direction to add the motion vector. These indexes are defined as shown in the tables shown in FIGS. 39 (a) and 39 (b). Then, when the x and y components of the merge difference motion vector offset MmvdOffset are expressed by MmvdOffset [0] and MmvdOffset [1], respectively,
MmvdOffset [0] = (MmvdDistance << 2) * MmvdSign [0]
MmvdOffset [1] = (MmvdDistance << 2) * MmvdSign [1]
Will be. The merged difference motion vector is derived from the merged difference motion vector offset MmvdOffset in the above equation. The details of deriving the merged difference motion vector will be described in the case of the decoding side below.

When the merge differential motion vector exists on the decoding side, the information about the merge differential motion vector is separated from the bit stream supplied to the bit string decoding unit 201, and the merge differential motion vector offset MmvdOffset is derived. Further, the merge candidate selection unit 447 derives the merge difference motion vector from the decoded merge difference motion vector offset. After adding this merge difference motion vector to the motion vector, the motion vector is supplied to the motion compensation prediction unit 406.

The derivation of the merge difference motion vector mMvdLX in the merge candidate selection unit 447 will be described with reference to the flowchart of FIG. First, it is determined whether or not the inter-prediction mode of the coded block is bi-prediction (PRED_BI) (step S4402). If it is not bi-prediction (step S4402: No), it is determined whether or not it is L0 prediction (PRED_L0) (step S4404). In the case of L0 prediction (step S4404: Yes),
mMvdL0 = MmvdOffset
mMvdL1 = 0
(Step S4406), the process of deriving the merged difference motion vector ends. In the case of L1 prediction (step S4404: No),
mMvdL0 = 0
mMvdL1 = MmvdOffset
(Step S4408), the process of deriving the merge difference motion vector is completed.

On the other hand, in the case of bi-prediction (step S4402: Yes), the difference between the POC of the picture to be processed and the POC of the reference picture is calculated for each reference list and set to currPocDiffL0 and currPocDiffL1 respectively (step S4410). Here, the difference between the POCs of picA and picB, DiffPicOrderCnt (picA, picB), is
DiffPicOrderCnt (picA, picB) = [picA POC]-[picB POC]
Is shown. Further, the reference picture RefPicList0 [refIdxL0] is a picture indicated by the reference index refIdxL0 of the reference list L0. Similarly, the reference picture RefPicList1 [refIdxL1] is a picture indicated by the reference index refIdxL1 of the reference list L1.

Next, it is determined whether or not -currPocDiffL0 * currPocDiffL1> = 0 (step S4412). If this determination is true (step S4412: Yes),
mMvdL0 = MmvdOffset
mMvdL1 = -MmvdOffset
(Step S4414), the process of deriving the merged difference motion vector ends. On the other hand, when this determination is false (step S4412: No),
mMvdL0 = MmvdOffset
mMvdL1 = MmvdOffset
(Step S4416). Next, it is determined whether or not the absolute value of the difference in POC from the reference list L0 is equal to or greater than the absolute value of the difference in POC from the reference list L1 (step S4418). If this determination is true (step S4418: Yes), then X = 0, Y = 1 (step S4420), and the merged difference motion vector mMvdL1 of L1 is scaled (step S4424). Here, mMvdLY indicates that it is mMvdL0 when Y = 0 and mMvdL1 when Y = 1. On the other hand, when this determination is false (step S4418: No), X = 1, Y = 0 (step S4422), and the merge differential motion vector mMvdL0 of L0 is scaled (step S4424). The scaling of the merge differential motion vector mMvdLY is
td = Clip3 (-128, 127, currPocDiffLX)
tb = Clip3 (-128, 127, currPocDiffLY)
tx = (16384 + Abs (td) >> 1) / td
distScaleFactor = Clip3 (-4096, 4095, (tb * tx + 32) >> 6)
mMvdLY = Clip3 (-131072, 131071, Sign (distScaleFactor * mMvdLY)
* ((Abs (distScaleFactor * mMvdLY) + 127) >> 8))
Derived as. Here, it is shown that currPocDiffLX is currPocDiffL0 when X = 0 and currPocDiffL1 when X = 1. Similarly, currPocDiffLY indicates that it is currPocDiffL0 when Y = 0 and currPocDiffL1 when Y = 1. Clip3 (x, y, z) is a function that limits the minimum value to x and the maximum value to y for the value z. Sign (x) is a function that returns the sign of the value x, which is 1 when the value x is positive, 0 when the value x is 0, and -1 when the value x is negative. Abs (x) is a function that returns the absolute value of the value x. >> is a bit operator indicating that the operand on the left side is bit-shifted to the right by the number of bits of the operand on the right side. This completes the process of deriving the merged difference motion vector.

The merge difference motion vector may be added to the top two motion vectors of the subblock merge candidates. In this case, the index mmvd_distance_idx indicating the distance to be added to the motion vector is defined as shown in the table shown in FIG. 39 (c). Since the operation of the subblock merge candidate selection unit 386 is the same as that of the merge candidate selection unit 347, the description thereof will be omitted. Further, since the operation of the subblock merge candidate selection unit 486 is the same as that of the merge candidate selection unit 447, the description thereof will be omitted.

As described above, MmvdDistance is defined as shown in the tables shown in FIGS. 39 (a) and 39 (c). Since these tables are defined with 1/4 pixel precision, the merged difference motion vector generated may include decimal pixel precision. However, by encoding / decoding the flag indicating that the pixel precision of these tables is 1 in slice units, the generated merge difference motion vector can be changed so as not to include the decimal pixel precision. ..

<Adaptive motion vector resolution (AMVR)>
The resolution of the differential motion vector can be adaptively changed for each coded block. This resolution is called the adaptive motion vector resolution.

A case where the adaptive motion vector resolution is used for the normal predicted motion vector mode will be described. In this case, the motion vectors of the derived candidates in the spatial prediction motion vector candidate derivation units 321 and 421, the time prediction motion vector candidate derivation units 322 and 422, and the history prediction motion vector candidate derivation units 323 and 423 depend on the resolution. It is rolled up. The resolution can be selected from 1/4, 1 and 4 pixel precision, and if the resolution is not changed, it will be 1/4 pixel precision. The rounding process is performed according to the resolution of the motion vector in the coded block to be processed. That is, the derived candidate motion vector mvX is
rightShift = leftShift = MvShift + 2
offset = (1 << (rightShift --1))
mvX = ((mvX + offset-(mvX> = 0)) >> rightShift) << leftShift
Is rounded. However, when rightShift = 0, offset = 0. Here, when the resolution of the motion vector in the coded block to be processed is 1/4 pixel accuracy, MvShift = 0. Similarly, when the resolution of the motion vector is 1 pixel accuracy, MvShift = 2, and when the resolution of the motion vector is 4 pixels accuracy, MvShift = 4. According to the above equation, each of the x and y components of mvX is processed.

Adaptive motion vector resolution can also be used for subblock predictive motion vector modes. In this case, the resolution is different from the above-mentioned normal predicted motion vector mode. That is, in the Affin inheritance prediction motion vector candidate derivation units 361 and 461, the Affin construction prediction motion vector candidate derivation units 362 and 462, and the Affin same prediction motion vector candidate derivation units 363 and 463, the motion vectors of the derived candidates have resolutions. It is rolled according to. The resolution can be selected from 1/16, 1/4, and 1 pixel precision, and if the resolution is not changed, the resolution will be 1/4 pixel precision. The rounding process is performed according to the resolution of the motion vector in the coded block to be processed. That is, the derived candidate motion vector mvX is rounded by the above equation. Here, when the resolution of the motion vector in the coded block to be processed is 1/4 pixel accuracy, MvShift = 0. Similarly, when the resolution of the motion vector is 1/16 pixel accuracy, MvShift = -2, and when the resolution of the motion vector is 1 pixel accuracy, MvShift = 2. According to the above formula, each of the x and y components of mvX is processed.

<Intrablock copy (IBC)>
The effective reference area of the intra-block copy will be described with reference to FIG. FIG. 32A is an example in which the effective reference area is determined by using the coded tree block unit as the intra-block copy reference block. Reference numerals 500, 501, 502, 503, and 504 in FIG. 32A are coded tree blocks, and 504 is a coded tree block to be processed. Reference numeral 505 is a coded block to be processed. The processing order of the coded tree blocks is 500, 501, 502, 503, 504. In this case, the three coding tree blocks 501, 502, and 503 processed immediately before the coding tree block 504 including the processing target coding block 505 are set as effective reference areas of the processing target coding block 505. A coded tree block processed before the coded tree block 501, and a coded tree block containing the process target coded block 505 regardless of whether or not the processing is completed before the process target coded block 505. All areas included in 504 are invalid reference areas.

FIG. 32B is an example in which the effective reference area is determined by using the unit obtained by dividing the coded tree block into four as the intra-block copy reference block. Reference numerals 515 and 516 in FIG. 32B are coded tree blocks, and 516 is a coded tree block to be processed. The coded tree block 515 is divided into 506, 507, 508, and 509, and 516 is divided into 510, 511, 512, and 513. Reference numeral 514 is a coded block to be processed. The processing order of the intra-block copy reference block is 506, 507, 508, 509, 510, 511, 512, 513. In this case, the three intra-block copy reference blocks 508, 509, and 510 processed immediately before the intra-block copy reference block 511 including the processing target coding block 514 are set as the effective reference area of the processing target coding block 514. Intra-block copy Intra-block copy including the coded tree block processed before the reference block 508 and the coded block 514 to be processed, regardless of whether the processing is completed before the coded block 514 to be processed. All the areas included in the reference block 511 are invalid reference areas.

FIG. 43 is a block diagram for explaining the configuration of the intra-block copy prediction unit 352 on the coding side. The intra block copy prediction unit 352 of FIG. 43 is at least an IBC space block vector candidate derivation unit 371, an IBC history block vector candidate derivation unit 372, an IBC prediction block vector replenishment unit 373, an IBC merge candidate selection unit 374, and an IBC block vector detection unit. 375, IBC prediction block vector candidate selection unit 376, IBC prediction mode determination unit 377, block vector subtraction unit 378 are included.
Further, the intra-block copy prediction unit 352 of FIG. 43 may further include a reference position correction unit 380 and a block vector subtraction unit 381.

FIG. 44 is a block diagram for explaining the configuration of the intra-block copy prediction unit 362 on the decoding side. The intra-block copy prediction unit 362 of FIG. 44 has at least an IBC space block vector candidate derivation unit 471, an IBC history block vector candidate derivation unit 472, an IBC prediction block vector replenishment unit 473, an IBC merge candidate selection unit 474, a switch 475, and an IBC prediction. It includes a block vector candidate selection unit 476, a block copy unit 477, and a block vector addition unit 478.
Further, the intra-block copy prediction unit 362 of FIG. 44 may further include a reference position correction unit 480.
The IBC spatial block vector candidate derivation units 371 and 471 derive the candidates for the predicted block vector in the spatial direction that have been decoded and can be referred to in the intra-block copy, and construct the predicted block vector candidate list.
The IBC history block vector candidate derivation units 372 and 472 derive the prediction block vector candidates from the history block vector candidates registered in the history block vector candidate list, and construct the prediction block vector candidate list.
The IBC prediction block vector replenishment units 373 and 473 construct the prediction block vector candidate list by adding block vectors having predetermined values until the prediction block vector candidate list is satisfied (0,0).
The IBC merge candidate selection units 374 and 474 select one of the intra-block merge candidates registered in the intra-block merge candidate list.
The IBC block vector detection unit 375 detects the block vector from the decoded and referenceable area in the intra block copy.
The IBC prediction block vector candidate selection units 376 and 476 select the prediction block vector from the prediction block vector candidate list.
The IBC prediction mode determination unit 377 selects the prediction mode by calculating the code amount and the strain amount. Here, the prediction mode can be selected from the prediction intra-block copy mode and the merge intra-block copy mode. Further, the predictive merge intra-block copy mode may be selected.
The block vector subtraction units 378 and 381 acquire the block vector and the predicted block vector, and calculate the difference block vector.
The reference position correction units 380 and 480 perform processing for correcting the reference position when the prediction block vector to be processed intends to refer to the outside of the referenceable area.
The switch 475 selects the supply destination of various information to be supplied according to the prediction mode in the intra-block copy processing.
The block vector addition unit 478 acquires the predicted block vector and the difference block vector, and calculates the block vector.
The block copy unit 477 acquires the decoded image at the reference position from the decoded image memory based on the block vector and supplies it.
Predictive intra-block copy processing is realized by configuring each of the above parts. A more detailed description of the intra-block copy prediction units 352 and 362 will be described later.

<Predictive intra-block copy: Explanation on the coding side>
The prediction intra-block copy processing procedure on the coding side will be described with reference to FIGS. 43 and 45.

First, the block vector detection unit 375 detects the block vector mvL, which is the motion vector of the luminance block (step S4500 in FIG. 45).

Subsequently, the IBC space block vector candidate derivation unit 371, the IBC history prediction block vector candidate derivation unit 372, the IBC prediction block vector candidate supplementation unit 373, the IBC prediction block vector candidate selection unit 376, and the block vector subtraction unit 378 in FIG. 43. The difference block vector of the block vector used in the predicted block vector mode is calculated (steps S4501 to S4503 in FIG. 45).

A block vector candidate list mvpList is constructed by calculating candidates for the prediction block vector (step S4501 in FIG. 45). A plurality of prediction block vector candidates are derived by the IBC space block vector candidate derivation unit 371, the IBC history block vector candidate derivation unit 372, and the IBC prediction block vector candidate supplementation unit 373 in FIG. 43 to construct a prediction block vector candidate list mvpList. .. The detailed processing procedure of step S4501 of FIG. 45 will be described later with reference to the flowchart of FIG. 48.

Subsequently, the IBC prediction block vector candidate selection unit 376 of FIG. 43 selects the prediction block vector mvpL from the prediction block vector candidate list mvpListL (step S4502 of FIG. 45). Calculate each difference block vector which is the difference between the block vector mvL and the candidate mvpListL [i] of each prediction block vector stored in the prediction block vector candidate list mvpListL. The amount of code when these difference block vectors are encoded is calculated for each element of the predicted block vector candidate list mvpListL. Then, among the elements registered in the prediction block vector candidate list mvpListL, the prediction block vector candidate mvpListL [i] having the minimum sign amount for each candidate of the prediction block vector is selected as the prediction block vector mvpL, and the candidate mvpListL [i] is selected. Get index i. When there are multiple candidates for the predicted block vector that is the smallest generated code in the predicted block vector candidate list mvpListL, the predicted block vector whose index i in the predicted block vector candidate list mvpListL is represented by a small number. The candidate mvpListL [i] of is selected as the optimal prediction block vector mvpL, and its index i is acquired.

Subsequently, the block vector subtraction unit 378 of FIG. 43 subtracts the predicted block vector mvpL selected from the block vector mvL.
mvdL = mvL --mvpL
The difference block vector mvdL is calculated as (step S4503 in FIG. 45).

<Intrablock copy (prediction): Explanation on the decoding side>
Next, the prediction block vector mode processing procedure on the decoding side will be described with reference to FIGS. 44 and 46. On the decoding side, the IBC space prediction block vector candidate derivation unit 471, the IBC history block vector candidate derivation unit 472, and the IBC prediction block vector replenishment unit 473 of FIG. 44 calculate the block vector used in the prediction block vector mode (FIG. 46). Steps S4600 to S4602). Specifically, the prediction block vector candidate list mvpListL is calculated, the prediction block vector mvpL is selected, and the block vector mvL is calculated.

Prediction block vector candidates are calculated to construct a prediction block vector candidate list mvpListL (step S4601 in FIG. 46). IBC space block vector candidate derivation unit 471, IBC history block vector candidate derivation unit 472, and IBC block vector replenishment unit 473 in the intra block copy prediction unit 362 calculate multiple prediction block vector candidates, and the prediction block vector candidate list. Build mvpListL.

Subsequently, the IBC prediction block vector candidate selection unit 476 obtains the prediction block vector candidate mvpListL [mvpIdxL] corresponding to the prediction block vector index mvpIdxL decoded and supplied by the bit string decoding unit 201 from the prediction block vector candidate list mvpListL. Extracted as the selected predicted block vector mvpL (step S4601 in FIG. 46).

Subsequently, the difference block vector mvdL decoded and supplied by the bit string decoding unit 201 by the block vector addition unit 478 and the prediction block vector mvpL are added.
mvL = mvpL + mvdL
The block vector mvL is calculated as (step S4602 in FIG. 46).

<Prediction block vector mode: Block vector prediction method>
FIG. 48 shows a processing procedure of the prediction intra-block copy mode derivation process having a function common to the intra-block copy prediction unit 352 of the image coding device and the intra-block copy prediction unit 362 of the image decoding device according to the embodiment of the present invention. It is a flowchart which shows.

The intra-block copy prediction unit 352 and the intra-block copy prediction unit 362 include a prediction block vector candidate list mvpListL. The predicted block vector candidate list mvpListL has a list structure, and is provided with a predicted block vector index indicating the location inside the predicted block vector candidate list and a storage area for storing the predicted block vector candidates corresponding to the index as elements. The number of the prediction block vector index starts from 0, and the prediction block vector candidate is stored in the storage area of the prediction block vector candidate list mvpListL. In the present embodiment, the prediction block vector candidate list mvpListL can register three prediction block vector candidates. Further, 0 is set in the variable numCurrMvpIbcCand indicating the number of predicted block vector candidates registered in the predicted block vector candidate list mvpListL.

The IBC spatial block vector candidate derivation units 371 and 471 derive candidates for the predicted block vector from the blocks adjacent to the left side (step S4801 in FIG. 48). In this process, the flag availableFlagLA indicating whether or not the predicted block vector candidate of the block (A0 or A1) adjacent to the left side is available and the block vector mvLA are derived, and mvLA is added to the predicted block vector candidate list mvpListL. Subsequently, the IBC spatial block vector candidate derivation units 371 and 471 derive candidates for the predicted block vector from the blocks (B0, B1 or B2) adjacent to the upper side (step S4802 in FIG. 48). In this process, the flag availableFlagLB indicating whether the predicted motion vector candidates of the adjacent blocks on the upper side are available and the block vector mvLB are derived, and if mvLA and mvLB are not equal, mvLB is added to the predicted block vector candidate list mvpListL. to add. The processing of steps S4801 and S4802 of FIG. 48 is common except that the position and number of adjacent blocks to be referred to are different, and the flag availableFlagLN indicating whether or not the predicted block vector candidate of the coded block can be used, and the motion vector mvLN (N is A or B, and so on) is derived.

Subsequently, the IBC history block vector candidate derivation units 372 and 472 add the history block vector candidates registered in the history block vector candidate list HmvpIbcCandList to the prediction block vector candidate list mvpListL. (Step S4803 in FIG. 48). For details of the registration processing procedure in step S4803, in the description of the operation shown in the flowchart of FIG. 29, the motion vector is the block vector, the reference index list is L0, and the history prediction motion vector candidate list HmvpCandList is the history block vector candidate list. Since the operation may be the same as that of HmvpIbcCandList, the description is omitted.

Subsequently, the IBC prediction block vector replenishment units 373 and 473 add block vectors having predetermined values, such as until the prediction block vector candidate list mvpListL is satisfied (0,0) (S4804 in FIG. 48).

<Merge Intrablock Copy Mode Derivation Unit>
The intra-block copy prediction unit 352 of FIG. 43 includes an IBC space block vector candidate derivation unit 371, an IBC history block vector candidate derivation unit 372, an IBC block vector replenishment unit 373, a reference position correction unit 380, an IBC merge candidate selection unit 374, and an IBC. Prediction mode determination unit 377 is included.

The intra-block copy prediction unit 362 of FIG. 44 includes an IBC space block vector candidate derivation unit 471, an IBC history block vector candidate derivation unit 472, an IBC block vector replenishment unit 473, an IBC merge candidate selection unit 474, a reference position correction unit 480, and a block. Includes copy section 477.

FIG. 47 shows a procedure for merging intra-block copy mode derivation processing having a function common to the intra-block copy prediction unit 352 of the image coding device and the intra-block copy prediction unit 362 of the image decoding device according to the embodiment of the present invention. It is a flowchart to explain.

The intra-block copy prediction unit 352 and the intra-block copy prediction unit 362 include a merge intra-block copy candidate list mergeIbcCandList. Merge intra-block copy candidate list mergeIbcCandList has a list structure, and has a merge index indicating the location inside the merge intra-block copy candidate and a storage area for storing the merge intra-block copy candidate corresponding to the index as an element. The numbers in the merge index start from 0, and the merge intrablock copy candidates are stored in the storage area of the mergeIbcCandList merge intrablock copy candidate list. In the subsequent processing, the merge candidate of the merge index i registered in the merge intra-block copy candidate list mergeIbcCandList is represented by mergeIbcCandList [i]. In the present embodiment, the merge candidate list mergeCandList can register at least three merge intra-block copy candidates. Further, 0 is set in the variable numCurrMergeIbcCand indicating the number of merge intrablock copy candidates registered in the mergeIbcCandList merge intrablock copy candidate list.

In the IBC space block vector candidate derivation unit 371 and the IBC space block vector candidate derivation unit 471, from the coding information stored in the coding information storage memory 111 of the image coding device or the coding information storage memory 205 of the image decoding device, , Spatial merge candidates A and B from blocks adjacent to the left and upper sides of the block to be processed are derived, and the derived spatial merge candidates are registered in the merge intra-block copy candidate list mergeIbcCandList (step S4701 in FIG. 47). Here, N indicating either one of the spatial merge candidates A and B is defined. The flag availableFlagN and the block vector mvL indicating whether or not the intra-block copy prediction information of the block N can be used as the space block vector merge candidate N are derived. However, in the present embodiment, since the block vector merge candidate is derived without referring to other coded blocks included in the block including the coded block to be processed, the block including the coded block to be processed is derived. Spatial block vector merge candidates included in are not derived.

Subsequently, the IBC history block vector candidate derivation unit 372 and the IBC history block vector candidate derivation unit 472 add the history prediction block vector candidates registered in the history prediction block vector candidate list HmvpIbcCandList to the merge intrablock copy candidate list mergeIbcCandList. (Step S4702 in FIG. 47). In this embodiment, if the block vector already added to the mergeIbcCandList and the block vector of the history prediction block vector candidate have the same value, the block vector is not added to the mergeIbcCandList.

Next, when the number of merge candidates numCurrMergeIbcCand registered in the mergeintra block copy candidate list mergeIbcCandList is smaller than the maximum number of intrablock merge candidates MaxNumMergeIbcCand, the IBC prediction block vector replenishment unit 373 and the IBC prediction block vector replenishment unit 473 are used. Merge candidate number of merge candidates registered in mergeIbcCandList numCurrMergeIbcCand is added up to the maximum number of merge candidates MaxNumMergeIbcCand Intrablock merge candidates are derived and registered in the mergeintrablock copy candidate list mergeIbcCandList (Fig. 47). Step S4703). Up to the maximum number of merge candidates MaxNumMergeIbcCand, a block vector with a value of (0,0) is added to the mergeintra block copy candidate list mergeIbcCandList.

Subsequently, the IBC merge candidate selection unit 374 and the IBC merge candidate selection unit 474 select one from the merge intrablock copy candidates registered in the intrablock merge candidate list mergeIbcCandList (step S4704 in FIG. 47). The IBC merge candidate selection unit 374 selects the merge candidate by acquiring the decoded image at the reference position from the decoded image memory 104 and calculating the code amount and the strain amount, and selects the merge index indicating the selected intra-block merge candidate. It is supplied to the IBC prediction mode determination unit 377. The IBC prediction mode determination unit 377 selects whether or not it is in the merge mode by calculating the code amount and the strain amount, and supplies the result to the prediction method determination unit 105. On the other hand, the decoding side IBC merge candidate selection unit 474 selects an intra block merge candidate based on the decoded merge index, and supplies the selected intra block merge candidate to the reference position correction unit 480. Here, the block copy unit 477 copies the luminance component and the color difference component.

Subsequently, the reference position correction unit 380 and the reference position correction unit 480 perform a process of correcting the reference position for the intra-block merge candidate (step S4705 in FIG. 47). Details of the processing of the reference position correction unit 380 and the reference position correction unit 480 will be described later.

The block copy unit 477 acquires the decoded image at the reference position from the decoded image memory 208 and supplies it to the decoded image signal superimposing unit 207.

<Color difference block vector>
The block vector mvL indicates the brightness block vector. The color difference block vector mvC is when the color difference format is 4: 2: 0.
mvC = ((mvL >> (3 + 2))) * 32
Will be. According to the above equation, each of the x and y components of mvC is processed.

Here, in the present embodiment, in the parent block of the coded block to be processed, in the intra prediction or the IBC prediction, the color difference block to be divided is not divided based on the division mode, and the color difference coded block is used. When it is determined that, that is, when the color difference block undivided flag chroma_non_split_flag is set to 1 (true), it is described above based on the block vector mvL of the luminance signal coding block at the same position as the luminance signal coding block. The block vector mvC of the coded block of the luminance signal is calculated by the formula.

In the present embodiment, when specifying the luminance signal coding block at the same position as the color difference signal coding block, the lower right pixel in the center of the color difference signal coding block in the image space of the color difference signal. A luminance signal coding block containing pixels at the same position in the image space of the luminance signal corresponding to is defined as a luminance signal coding block at the same position as the color difference signal coding block.

<Reference position correction unit>
FIG. 49 is a diagram illustrating the processing of the reference position correction unit 380 and the reference position correction unit 480. Now, it is assumed that the unit of the intra-block copy reference block is the coded tree block (CTU), and its size is not 128x128 pixels.

First, the upper left and lower right positions of the reference block are calculated (step S6001). The reference block refers to a block that the coded block to be processed refers to using a block vector. If the upper left of the reference block is (xRefTL, yRefTL) and the lower right is (xRefBR, yRefBR),
(xRefTL, yRefTL) = (xCb + (mvL [0] >> 4), yCb + (mvL [1] >> 4))
(xRefBR, yRefBR) = (xRefTL + cbWidth --1, yRefTL + cbHeight --1)
Will be. Here, the position of the coded block to be processed is (xCb, yCb), the block vector is (mvL [0], mvL [1]), the width of the coded block to be processed is cbWidth, and the height is cbHeight.

Next, it is determined whether or not the size of the CTU is 128x128 pixels (step S6002). Since the size is not 128x128 pixels (step S6002: NO), the upper left and lower right positions of the referenceable area are calculated (step S6003). If the upper left of the referenceable area is (xAvlTL, yAvlTL) and the lower right is (xAvlBR, yAvlBR),
NL = Min (1, 7 --CtbLog2SizeY)-(1 << ((7 --CtbLog2SizeY) << 1))
(xAvlTL, yAvlTL) = (((xCb >> CtbLog2SizeY) + NL) << CtbLog2SizeY,
(yCb >> CtbLog2SizeY) << CtbLog2SizeY)
(xAvlBR, yAvlBR) = (((xCb >> CtbLog2SizeY) << CtbLog2SizeY)-1,
(((yCb >> CtbLog2SizeY) + 1) << CtbLog2SizeY) ―― 1)
Will be. Here, the size of CTU is CtbLog2SizeY.

Next, it is determined whether or not the reference position of the reference block in the x direction is smaller than the upper left of the referenceable area (step S6004). If the determination is false (step S6004: NO), the process proceeds to the next process (step S6006). On the other hand, if the determination is true (step S6004: YES), the reference position in the x direction is corrected according to the upper left of the referenceable area (step S6005).

FIG. 50 is a diagram showing how the reference position is corrected. 6001 indicates a processing target coding tree block, 6002 indicates a processing target coding block, and 6003 indicates a referenceable area. Assuming that the reference block r2 is located at 6011, the reference position in the x direction is smaller than the upper left of the referenceable area (step S6004: YES). Therefore, the reference position is corrected to the position of 6012 with xRefTL = xAvlTL (step S6005). Here, since xRefBR = xRefTL + cbWidth-1 as in S6001, xRefBR is also corrected as xRefTL is corrected. In the correction of this reference position, the block vector mvL [0] may be corrected. In other words
mvL [0] = (xAvlTL-xCb) << 4
To correct. As a result, xRefTL = xAvlTL, so the reference position can be corrected.

In this way, when the reference block is located outside the referenceable area, it can be referred to by correcting the reference position.

It is assumed that some block vectors in the block vector candidate list constructed by the intra-block copy prediction unit 352 are outside the referenceable area. If the reference position is not corrected, those block vectors cannot be used as candidates for the IBC merge mode because they cannot be referenced by the block vectors. On the other hand, when the reference position is corrected in the present invention, all the block vectors of the constructed block vector candidate list are inside the referenceable area. Therefore, it is possible to refer to all the block vectors, and all the block vectors can be candidates for the IBC merge mode. Therefore, in the IBC merge mode selection unit 374, the optimum prediction mode can be selected from the candidates of each IBC merge mode corresponding to all the block vectors, so that the coding efficiency is improved.

It is assumed that some block vectors in the block vector candidate list constructed by the intra-block copy prediction unit 362 are outside the referenceable area. If the reference position is not corrected, reference by those block vectors is impossible, so the IBC merge mode using those block vectors cannot be decoded. In a coding device other than the present invention, the merge index indicating the IBC merge mode using those block vectors operates as unencoded. However, due to malfunction or the like, such a merge index may be encoded to generate a bitstream. Alternatively, a part of the bitstream may be missing due to packet loss or the like, and the decoding result may become such a merge index. Attempting to decode such an incomplete bitstream may access the decoded image memory at the wrong location in an attempt to reference outside the referable area. As a result, the decoding result may differ depending on the decoding device, or the decoding process may stop. On the other hand, when the reference position is corrected in the present invention, all the block vectors of the constructed block vector candidate list are inside the referenceable area. Therefore, even if such an incomplete bit stream is decoded, the reference position is corrected inside the referenceable area and reference is possible. By correcting the reference position in this way, the memory access range is guaranteed. As a result, the decoding result becomes the same depending on the decoding device, and the decoding process can be continued, so that the robustness of the decoding device can be improved.

Further, when the block vector is corrected in the correction of the reference position, the target is the brightness block vector. Here, the color difference block vector is calculated from the luminance block vector. That is, if the luminance block vector is corrected, the color difference block vector is also corrected. Therefore, it is not necessary to correct the reference position again in the color difference. Compared with the need to determine whether or not reference is possible based on both the luminance and the color difference when the block vector is not corrected, the amount of processing can be reduced.

In addition, when the block vector is corrected in the correction of the reference position, the corrected block vector is stored in the coding information storage memory 111 or the coding information storage memory 205 as the block vector of the coded block to be processed. That is, the corrected reference position and the position pointed to by the block vector are the same. Here, a deblocking filter process may be performed when the decoding result is saved in the decoded image memory. In this filtering process, the strength of the filter is controlled by the difference between the block vectors of the two blocks facing the block boundary. When the block vector is not corrected, the corrected reference position and the position pointed to by the block vector are different, and the filter strength is more appropriate, so that the coding efficiency can be improved.

Subsequently, it is determined whether or not the reference position of the reference block in the y direction is smaller than the upper left of the referenceable area (step S6006). If the determination is false (step S6006: NO), the process proceeds to the next process (step S6008). On the other hand, if the determination is true (step S6006: YES), the reference position in the y direction is corrected according to the upper left of the referenceable area (step S6007).

Assuming that the reference block r4 is located at 6021, the reference position in the y direction is smaller than the upper left of the referenceable area (step S6006: YES). Therefore, the reference position is corrected to the position of 6022 with yRefTL = yAvlTL (step S6007). Here, since yRefBR = yRefTL + cbHeight-1 as in step S6001, yRefBR is also corrected as yRefTL is corrected. In the correction of this reference position, the block vector mvL [1] may be corrected. In other words
mvL [1] = (yAvlTL --yCb) << 4
To correct. As a result, yRefTL = yAvlTL, so the reference position can be corrected.

Subsequently, it is determined whether or not the reference position of the reference block in the x direction is larger than the lower right of the referenceable area (step S6008). If the determination is false (step S6008: NO), the process proceeds to the next process (step S6010). On the other hand, if the determination is true (step S6008: YES), the reference position in the x direction is corrected according to the lower right of the referenceable area (step S6009).

Assuming that the reference block r7 is located at 6031, the reference position in the x direction is larger than the lower right of the referenceable area (step S6008: YES). Therefore, the reference position is corrected to the position of 6032 by setting xRefBR = xAvlBR (step S6009). Here, since xRefBR = xRefTL + cbWidth-1 as in step S6001, that is, xRefTL = xRefBR- (cbWidth-1), xRefTL is also corrected as xRefBR is corrected. In the correction of this reference position, the block vector mvL [0] may be corrected. In other words
mvL [0] = (xAvlBR-(xCb + cbWidth --1)) << 4
To correct. As a result, xRefBR = xAvlBR, so the reference position can be corrected.

Subsequently, it is determined whether or not the reference position of the reference block in the y direction is larger than the lower right of the referenceable area (step S6010). If the determination is false (step S6010: NO), the process ends. On the other hand, if the determination is true (step S6010: YES), the reference position in the y direction is corrected according to the lower right of the referenceable area (step S6011).

Assuming that the reference block r5 is located at 6041, the reference position in the y direction is larger than the lower right of the referenceable area (step S6010: YES). Therefore, the reference position is corrected to the position of 6042 by setting yRefBR = yAvlBR (step S6011). Here, since yRefBR = yRefTL + cbHeight-1 as in step S6001, that is, yRefTL = yRefBR- (cbHeight-1), yRefTL is also corrected as yRefBR is corrected. In the correction of this reference position, the block vector mvL [1] may be corrected. In other words
mvL [1] = (yAvlBR-(yCb + cbHeitght --1)) << 4
To correct. As a result, yRefBR = yAvlBR, so the reference position can be corrected.

Here, the case where the reference block r1 is located at 6051 will be described. In this case, the reference position in the x direction is corrected as in the case where the reference block is r2. Further, the reference position in the y direction is corrected as in the case where the reference block is r4. As a result, the reference block r1 is located at 6052, which is inside the referenceable area.

If the reference block r3 is located at 6061, the reference block r6 is located at 6062, and the reference block r8 is located at 6063, the reference positions in the x and y directions are set in the same manner as above. to correct. As a result, each reference block is located inside the referenceable area.

With the above, the processing when the size of CTU is not 128x128 pixels is completed. On the other hand, when the size of the CTU is 128x128 pixels (step S6002: YES), the upper left and lower right positions when the referenceable area is rectangular are calculated (step S6012).

FIG. 51 is a diagram for explaining the upper left and lower right positions when the referenceable area is rectangular. In the case of FIG. 51 (a), the coded tree block 6101 to be processed is divided into four, and the coded block 6102 to be processed is located at the upper left of the division. At this time, the referenceable area has an inverted L shape like the shaded area in 6103. When the referenceable area is rectangular, the range is 6103. When the referenceable area is rectangular, if the upper left of the reference block is (xRefTL, yRefTL) and the lower right is (xRefBR, yRefBR),
offset [4] = {0, 64, 128, 128}
NL = -offset [3 --blk_idx], NR = offset [blk_idx]
(xAvlTL, yAvlTL) = ((xCb >> CtbLog2SizeY) << CtbLog2SizeY + NL,
(yCb >> CtbLog2SizeY) << CtbLog2SizeY)
(xAvlBR, yAvlBR) = (((xCb >> CtbLog2SizeY) << CtbLog2SizeY) -1 + NR,
(((yCb >> CtbLog2SizeY) + 1) << CtbLog2SizeY) ―― 1)
Will be. Here, blk_idx is an index indicating the position of the coded block to be processed. If the coded block to be processed is divided into four and the coded block to be processed is located in the upper left, blk_idx = 0 is set. Similarly, if the coded blocks to be processed are located at the upper right, lower left, and lower right, respectively, blk_idx is set to 1, 2, and 3. FIG. 51 (a) is a diagram showing the case of blk_idx = 0. Similarly, FIGS. 51 (b) to 51 (d) are diagrams showing the cases of blk_idx = 1 to 3, respectively.

Next, the reference position of the portion where the referenceable area is not rectangular is corrected (step S6013). FIG. 52 is a diagram illustrating a process of correcting a reference position in a portion where the referenceable area is not rectangular. First, the upper left position of the referenceable area is calculated (step S6021). Since the referenceable area is the shaded area in FIG. 51, there are two upper left positions, 6111 and 6112, except when blk_idx = 3. If they are (X1, Y1) and (X2, Y2), respectively,
offset [4] = {64, 128, 64, 0}, NL = offset [blk_idx]
(X1, Y1) = (xAvlTL, yAvlTL + 64)
(X2, Y2) = (xAvlTL + NL, yAvlTL)
Will be.

Next, it is determined whether or not to correct the reference position according to the upper left of the referenceable area (step S6022). In this determination, if blk_idx = 3 is not satisfied and the reference block is located in a region smaller than X2 and Y1, it is determined to be true (step S6022: YES). If false (step S6022: NO), the process proceeds to the next process (step S6026).

Next, it is determined whether or not the difference between the reference block and the referenceable area in the x direction is smaller than the difference between the reference block and the referenceable area in the y direction (step S6023). If the determination is true (step S6023: YES), the reference position in the x direction is corrected (step S6024). On the other hand, when the determination is false (step S6023: NO), the reference position in the y direction is corrected (step S6025).

FIG. 53A is a diagram showing how the reference position is corrected in step S6024 and step S6025. Now, blk_idx = 0. Assuming that the reference block r1 is located at 6201, blk_idx = 3 is not satisfied, and the upper left of the reference block is located in a region smaller than X2 (x direction of 6112) and Y1 (y direction of 6111) (step S6022). : YES). Further, the difference between the reference block and the referenceable area in the x direction is smaller than the difference between the reference block and the referenceable area in the y direction (step S6023: YES). Therefore, xRefTL = xAvlTL + NL is set to correct the reference position in the x direction to the position of 6202 (step S6024). Here, since xRefBR = xRefTL + cbWidth-1 as in step S6001, xRefBR is also corrected as xRefTL is corrected. In the correction of this reference position, the block vector mvL [0] may be corrected. In other words
mvL [0] = (xAvlTL + NL-xCb) << 4
To correct. As a result, xRefTL = xAvlTL + NL, so the reference position can be corrected.

On the other hand, if the reference block r2 is located at 6203, blk_idx = 3 is not satisfied, and the upper left of the reference block is located in a region smaller than X2 (x direction of 6112) and Y1 (y direction of 6111) ( Step S6022: YES). Further, the difference between the reference block and the referenceable area in the x direction is not smaller than the difference between the reference block and the referenceable area in the y direction (step S6023: NO). Therefore, the reference position in the y direction is corrected to the position of 6204 by setting yRefTL = yAvlTL + 64 (step S6025). Here, since yRefBR = yRefTL + cbHeight-1 as in step S6001, yRefBR is also corrected as yRefTL is corrected. In the correction of this reference position, the block vector mvL [0] may be corrected. In other words
mvL [1] = (yAvlTL + 64 --yCb) << 4
To correct. As a result, yRefTL = yAvlTL + 64, so the reference position can be corrected.

Here, it is assumed that the reference block r3 is located at 6205. In this case, the difference between the reference block and the referenceable area in the x direction is smaller than the difference between the reference block and the referenceable area in the y direction (step S6023: YES). Therefore, it is located at 6206 by correcting the reference position in the x direction in the same manner as the reference block r1 (step S6024). At this point, the reference block is outside the referenceable area. However, the reference position in the y direction is corrected by the processing of steps S6006 and S6007 described later. After all, the reference block is inside the referenceable area.

Subsequently, the lower right position of the referenceable area is calculated (step S6026). Since the referenceable area is the shaded area in FIG. 51, there are two lower right positions, 6113 and 6114, except when blk_idx = 0. If each is (X3, Y3), (X4, Y4),
offset [4] = {0, 64, 128, 64}, NR = offset [blk_idx]
(X3, Y3) = (xAvlBR, yAvlBR --64)
(X4, Y4) = (xAvlBR --NR, yAvlBR)
Will be.

Next, it is determined whether or not to correct the reference position according to the lower right of the referenceable area (step S6027). In this determination, if blk_idx = 0 is not satisfied and the reference block is located in a region larger than X4 and Y3, it is determined to be true (step S6027: YES). If false (step S6027: NO), the process ends.

Next, it is determined whether or not the difference between the reference block and the referenceable area in the x direction is smaller than the difference between the reference block and the referenceable area in the y direction (step S6028). If the determination is true (step S6028: YES), the reference position in the x direction is corrected (step S6029). On the other hand, when the determination is false (step S6028: NO), the reference position in the y direction is corrected (step S6030).

FIG. 53 (b) is a diagram showing how the reference position is corrected in steps S6029 and S6030. Now, blk_idx = 3. Assuming that the reference block r1 is located at 6211, blk_idx = 0 is not present, and the lower right corner of the reference block is located in a region larger than X4 (x direction of 6114) and Y3 (y direction of 6113) (step). S6027: YES). Further, the difference between the reference block and the referenceable area in the x direction is smaller than the difference between the reference block and the referenceable area in the y direction (step S6028: YES). Therefore, the reference position in the x direction is corrected to the position of 6212 by setting xRefBR = xAvlBR (step S6029). Here, since xRefBR = xRefTL + cbWidth-1 as in step S6001, that is, xRefTL = xRefBR- (cbWidth-1), xRefTL is also corrected as xRefBR is corrected. In the correction of this reference position, the block vector mvL [0] may be corrected. In other words
mvL [0] = (xAvlBR --NR-(xCb + cbWitdh --1)) << 4
To correct. As a result, xRefBR = xAvlBR, so the reference position can be corrected.

On the other hand, if the reference block r2 is located at 6213, blk_idx = 0 is not satisfied, and the lower right of the reference block is located in a region larger than X4 (x direction of 6114) and Y3 (y direction of 6113). (Step S6027: YES). Further, the difference between the reference block and the referenceable area in the x direction is not smaller than the difference between the reference block and the referenceable area in the y direction (step S6028: NO). Therefore, the reference position in the y direction is corrected to the position of 6214 with yRefBR = yAvlBR (step S6030). Here, since yRefBR = yRefTL + cbHeight-1 as in step S6001, that is, yRefTL = yRefBR- (cbHeight-1), yRefTL is also corrected as yRefBR is corrected. In the correction of this reference position, the block vector mvL [1] may be corrected. In other words
mvL [1] = (yAvlBR --64-(yCb + cbHeight --1)) << 4
To correct. As a result, yRefBR = yAvlBR, so the reference position can be corrected.

Here, it is assumed that the reference block r3 is located at 6215. In this case, the difference between the reference block and the referenceable area in the x direction is not smaller than the difference between the reference block and the referenceable area in the y direction (step S6028: NO). Therefore, it is located at 6216 by correcting the reference position in the y direction in the same manner as the reference block r2 (step S6030). At this point, the reference block is outside the referenceable area. However, the reference position in the x direction is corrected by the processing of step S6008 and step S6009 described later. After all, the reference block is inside the referenceable area.

In FIG. 53, the process of correcting the reference position has been described by taking the cases of blk_idx = 0 and 3 as an example. When blk_idx = 1 or 2, the reference position is corrected in the same way as when blk_idx = 0 and 3.

After the process of correcting the reference position of the portion where the referenceable area is not rectangular (step S6013), the processes of steps S6004 to S6011 are performed. With the above, the processing when the size of CTU is 128x128 pixels is completed.

Now, it is assumed that in the process of correcting the reference position of the portion where the referenceable area is not rectangular (step S6013), the process of correcting the reference position in the x direction according to the upper left of the referenceable area (step S6024) is performed. Then, since the reference position of the reference block in the x direction is not smaller than the upper left of the referenceable area, the determination in step S6004 is always false (step S6004: NO). Therefore, when the process of step S6024 is performed, the process of step S6004 and step S6005 may not be performed. Similarly, when the processing of step S6025 is performed, the processing of steps S6006 and S6007 may be omitted, and when the processing of step S6029 is performed, the processing of steps S6008 and S6009 may not be performed. When the process of step S6030 is performed, the process of step S6010 and step S6011 may not be performed.

Further, in the flowchart of FIG. 52, the comparison process of step S6023 may be omitted and the configuration may be such that step S6024 is always executed, or the configuration may be such that step S6025 is always executed. Similarly, the comparison process of step S6028 may be omitted, and the configuration may be such that step S6029 is always executed, or the configuration may be such that step S6030 is always executed. In such a configuration, the reference position can be corrected by a simple process. In FIG. 49, when the size of the CTU is 128x128 pixels, the reference position is corrected by using the processes of S6012, S6013, and S6004 to S6011. Instead of this, as shown in FIG. 54, it can also be realized by a process (S6101) of decomposing the referenceable area into two and correcting each reference position.

FIG. 55 is a diagram illustrating how the referenceable region is decomposed into two. Unlike the rectangular shape of the referenceable area in FIG. 51, the referenceable area is decomposed into two in FIG. 55. If the coded block (6102) to be processed is located in the upper left of the coded tree block (6101) to be processed, blk_idx = 0 is set. Similarly, if the coded blocks to be processed are located at the upper right, lower left, and lower right, respectively, blk_idx is set to 1, 2, and 3. FIG. 55 (a) is a diagram showing the case where blk_idx = 0. Similarly, FIGS. 55 (b) to 55 (d) are diagrams showing the cases of blk_idx = 1 to 3, respectively. Further, one referenceable area (6301) is designated as a referenceable area A, and the other referenceable area (6302) is designated as a referenceable area B.

FIG. 56 is a diagram illustrating a process (S6101) of decomposing a referenceable region into two and correcting each reference position. In FIG. 56, the same process as in FIG. 49 is assigned the same step number, and the description thereof will be omitted. First, the upper left and lower right positions of the referenceable area A are calculated (S6111). If the upper left of the referenceable area A is (xAvlTL, yAvlTL) and the lower right is (xAvlBR, yAvlBR),
xOffsetTL [4] = {-128, -128, -64, 0}, yOffsetTL [4] = {64, 64, 64, 0}
xOffsetBR [4] = {0, 0, 0, 128}, yOffsetBR [4] = {128, 128, 128, 64}
(xAvlTL, yAvlTL) = ((xCb >> CtbLog2SizeY) << CtbLog2SizeY
+ xOffsetTL [blk_idx],
(yCb >> CtbLog2SizeY) << CtbLog2SizeY + yOffsetTL [blk_idx])
(xAvlBR, yAvlBR) = (((xCb >> CtbLog2SizeY) << CtbLog2SizeY) -1
+ xOffsetBR [blk_idx],
(((yCb >> CtbLog2SizeY) + 1) << CtbLog2SizeY) -1 + yOffsetBR [blk_idx]).

Next, regarding whether or not the reference block is outside the referenceable area A,
out_xRefTL = xRefTL <xAvlTL
out_yRefTL = yRefTL <yAvlTL
out_xRefBR = xRefBR> xAvlBR
out_yRefBR = yRefBR> yAvlBR
Is calculated as (S6112).

Next, the upper left and lower right positions of the referenceable area B are calculated (S6113). If the upper left of the referenceable area B is (xAvlTL, yAvlTL) and the lower right is (xAvlBR, yAvlBR),
xOffsetTL [4] = {-64, 0, 0, 0}, yOffsetTL [4] = {0, 0, 0, 0}
xOffsetBR [4] = {0, 64, 128, 64}, yOffsetBR [4] = {128, 64, 64, 128}
(xAvlTL, yAvlTL) = ((xCb >> CtbLog2SizeY) << CtbLog2SizeY
+ xOffsetTL [blk_idx],
(yCb >> CtbLog2SizeY) << CtbLog2SizeY + yOffsetTL [blk_idx])
(xAvlBR, yAvlBR) = (((xCb >> CtbLog2SizeY) << CtbLog2SizeY) -1
+ xOffsetBR [blk_idx],
(((yCb >> CtbLog2SizeY) + 1) << CtbLog2SizeY) -1 + yOffsetBR [blk_idx])
Will be.

Next, it is determined whether or not the reference position of the reference block in the x direction is smaller than the upper left of the referenceable area A and the reference position of the reference block in the x direction is smaller than the upper left of the referenceable area B (S6114). If the determination is false (S6114: NO), the process proceeds to the next process (S6116). On the other hand, if the determination is true (S6114: YES), the reference position in the x direction is corrected according to the upper left of the referenceable area B (S6005). Since the process of S6005 has already been described, the description thereof will be omitted.

Subsequently, it is determined whether or not the reference position of the reference block in the y direction is smaller than the upper left of the referenceable area A and the reference position of the reference block in the y direction is smaller than the upper left of the referenceable area B (S6116). If the determination is false (S6116: NO), the process proceeds to the next process (S6118). On the other hand, if the determination is true (S6116: YES), the reference position in the y direction is corrected according to the upper left of the referenceable area B (S6007). Since the process of S6007 has already been described, the description thereof will be omitted.

Next, it is determined whether or not the reference position of the reference block in the x direction is larger than the lower right of the referenceable area A and the reference position of the reference block in the x direction is larger than the lower right of the referenceable area B (S6118). .. If the determination is false (S6118: NO), the process proceeds to the next process (S6120). On the other hand, if the determination is true (S6118: YES), the reference position in the x direction is corrected according to the lower right of the referenceable area B (S6009). Since the process of S6009 has already been described, the description thereof will be omitted.

Next, it is determined whether or not the reference position of the reference block in the y direction is larger than the lower right of the referenceable area A and the reference position of the reference block in the y direction is larger than the lower right of the referenceable area B (S6120). .. If the determination is false (S6120: NO), the process ends. On the other hand, if the determination is true (S6120: YES), the reference position in the y direction is corrected according to the lower right of the referenceable area B (S6011). Since the process of S6011 has already been described, the description thereof will be omitted.

As described above, when the size of the CTU is 128x128 pixels, even if the reference block is located outside the referenceable area, the reference position can be corrected and the reference can be made. Further, by decomposing the referenceable area into two and correcting each reference position, the processing can be simplified and the amount of calculation can be reduced. Here, one referenceable area (6301) is designated as a referenceable area A, and the other referenceable area (6302) is designated as a referenceable area B. Alternatively, the referenceable area A and the referenceable area B may be exchanged so that one referenceable area (6301) becomes the referenceable area B and the other referenceable area (6302) is treated as the referenceable area A. ..

In this embodiment, it is determined whether or not the size of the CTU is 128x128 pixels (S6002), and the processing is switched. This may determine whether the intra-block copy reference block is a unit obtained by dividing the coded tree block into four, or whether the size of the CTU is larger than the maximum size of the coded block. You may do so.

In all of the embodiments described above, the coded bitstream output by the image coding apparatus has a specific data format so that it can be decoded according to the coding method used in the embodiment. doing. The coded bit stream may be recorded and provided on a recording medium readable by a computer such as an HDD, SSD, flash memory, or optical disk, or may be provided from a server via a wired or wireless network. Therefore, the image decoding device corresponding to this image coding device can decode the coded bit stream of this specific data format regardless of the providing means.

When a wired or wireless network is used to exchange the coded bitstream between the image encoding device and the image decoding device, the coded bitstream is converted into a data format suitable for the transmission mode of the communication path. It may be transmitted. In that case, the transmission device that converts the coded bit stream output by the image coding device into coded data in a data format suitable for the transmission form of the communication path and transmits it to the network, and the transmission device that receives the coded data from the network A receiving device that restores the coded bitstream and supplies it to the image decoding device is provided. The transmission device includes a memory that buffers the coded bit stream output by the image coding device, a packet processing unit that packets the coded bit stream, and a transmission unit that transmits the packetized coded data via the network. And include. The receiving device generates a coded bit stream by packet processing the coded data and a receiver that receives the coded data packetized via the network, a memory that buffers the received coded data, and the coded data. Includes a packet processing unit provided to the image decoding device.

When a wired or wireless network is used to exchange a coded bitstream between the image encoding device and the image decoding device, in addition to the transmitting device and the receiving device, the coded data transmitted by the transmitting device is further transmitted. A relay device that receives and supplies to the receiving device may be provided. The relay device includes a receiving unit that receives the packetized encoded data transmitted by the transmitting device, a memory that buffers the received encoded data, and a transmitting unit that transmits the packetized encoded data to the network. Including. Further, the relay device packetizes the received packet processing unit that packet-processes the packetized encoded data to generate the encoded bit stream, the recording medium that stores the encoded bit stream, and the encoded bit stream. A transmission packet processing unit may be included.

Further, the display device may be used by adding a display unit for displaying the image decoded by the image decoding device to the configuration. In that case, the display unit reads the decoded image signal generated by the decoded image signal superimposing unit 207 and stored in the decoded image memory 208 and displays it on the screen.

Further, by adding an image pickup unit to the configuration and inputting the captured image into the image coding device, the image pickup device may be used. In that case, the image pickup unit inputs the captured image signal to the block division unit 101.

The above processing related to coding and decoding may be realized as a transmission, storage, and reception device using hardware, and is stored in a ROM (read-only memory), a flash memory, or the like. It may be realized by firmware or software such as a computer. The firmware program and software program may be recorded on a recording medium readable by a computer or the like and provided, or may be provided from a server via a wired or wireless network, or terrestrial or satellite digital broadcasting data broadcasting. May be provided as.

The present invention has been described above based on the embodiments. Embodiments are examples, and it is understood by those skilled in the art that various modifications are possible for each of these components and combinations of each processing process, and that such modifications are also within the scope of the present invention. ..

100 image coding device, 101 block division unit, 102 inter-prediction unit, 103 intra-prediction unit, 104 decoded image memory, 105 prediction method determination unit, 106 residual signal generation unit, 107 orthogonal conversion / quantization unit, 108-bit string code Quantization unit, 109 inverse quantization / inverse orthogonal conversion unit, 110 decoded image signal superimposition unit, 111 coded information storage memory, 200 image decoding device, 201 bit string decoding unit, 202 block division unit, 203 inter prediction unit 204 intra prediction unit , 205 Coding information storage memory, 206 inverse quantization / inverse orthogonal conversion unit, 207 decoded image signal superimposition unit, 208 decoded image memory.

Claims (1)

An image coding device that encodes the image in block units that divide each picture of the image.
The luminance block and the color difference block are synchronized with each other and recursively divided according to a common division mode.
In the intra-block copy prediction that refers to the decoded pixels in the screen pointed to by the block vector as the predicted value, the coded block of the color difference less than the predetermined minimum size of the color difference coded block is prohibited.
When the color difference format is 4: 2: 0, the luminance block is recursively divided, and the corresponding color difference block becomes a color difference coded block smaller than a predetermined color difference coded block minimum size when divided. If the color difference block is not divided,
In the three-division mode in which the division target block is divided into three, the division target block of the luminance signal is divided into a first luminance signal coding block, a second luminance signal coding block, and a third luminance signal coding block. At the same time, the division target block of the color difference signal is not divided into one coded block of the color difference signal.
Intra to obtain the block vector of the coded block of the color difference signal by scaling the value of the block vector of the coded block containing the pixel of the color difference signal corresponding to the position of the lower right pixel of the center of the coded block of the color difference signal. An image coding device including a block copy unit.

Images