JP2020178238A - Gate drive circuit - Google Patents

Abstract

To provide a gate drive circuit capable of supplying a constant current to a gate in a short time when a gate drive type semiconductor element is driven.SOLUTION: A gate drive circuit 2 drives an IGBT 1 to be controlled with a target constant current ID. The gate drive circuit 2 includes a drive MOS transistor 4, a control circuit 5, a differential amplifier 6, and a reference power supply 7. A DC power supply VD is connected to the gate of the IGBT 1 via a current detection resistor 3 and an MOS transistor 4. The control circuit 5 shortens a start-up time and a rise-up time by setting a voltage VREF in the differential amplifier 6 by the reference power supply 7 for a reference voltage Vref1 lower than a reference voltage Vref0 of the target constant current ID. When the current ID of the MOS transistor 4 reaches the target constant current I0, the voltage VREF is switched to the reference voltage Vref0.SELECTED DRAWING: Figure 1

Description

The present invention relates to a gate drive circuit.

As a gate drive circuit, there is one that drives a gate drive type semiconductor element with a constant current. In this method, for example, an IGBT (Insulated Gate Bipolar Transistor) or a SiC (silicon carbide) MOS transistor as a gate-driven semiconductor element is driven with a constant current to reduce the switching loss at the time of rising.

In this case, in the circuit that supplies a constant current, for example, a current detection resistor and a MOS transistor for current supply are provided in the energization path to the gate of the semiconductor element, and the voltage drop generated by the current detection resistor by the differential amplifier is referred to. There is a configuration in which the MOS transistor is driven and controlled so as to match the voltage.

In such a gate drive circuit, it takes a circuit start-up time and a start-up time (hereinafter, referred to as start-up time) from the time when the drive signal is given until the constant current is supplied to the gate of the semiconductor element. Therefore, depending on the usage pattern of the semiconductor element, this start-up time may be adversely affected.

For example, when a gate-driven semiconductor element is used in a bridge circuit such as an inverter, it is necessary to set a dead time so that two semiconductor elements connected in series do not turn on at the same time. In this case, if the above-mentioned start-up time is long, the dead time becomes long. Therefore, a current in the opposite direction flows through the parasitic diode or the like with respect to the semiconductor element in the off state, and a power loss is generated by the amount of the forward voltage.

Japanese Unexamined Patent Publication No. 2012-227825

The present invention has been made in consideration of the above circumstances, and an object of the present invention is to provide a gate drive circuit capable of supplying a constant current to a gate in a short time when driving a gate drive type semiconductor element. There is.

The gate drive circuit according to claim 1 is a gate drive circuit that drives a gate drive type semiconductor element (1) with a constant current, and is a drive MOS transistor (4) that supplies a constant current to the gate of the semiconductor element. A differential amplifier (6) that gives a drive signal to the gate of the drive MOS transistor, and a reference power supply (7) that gives the differential amplifier a reference voltage for passing a target constant current through the drive MOS transistor. The reference power supply is such that the current value flowing through the drive MOS transistor is detected and the current value is larger than the target constant current during the period until the detected current value reaches the target constant current. It is provided with a control circuit (5) for setting a reference voltage according to the above.

By adopting the above configuration, the control circuit, when a drive signal is given from the outside, is larger than the target constant current until the current of the drive MOS transistor with respect to the reference power supply reaches the target constant current. Set the reference voltage corresponding to the current. As a result, the differential amplifier is started under the condition of outputting a large constant current until the target constant current is reached, so that the start-up time and the rise time are shortened, and the target is set at the gate of the drive MOS transistor. A drive signal for passing an electric current can be given quickly. As a result, the gate of the gate-driven semiconductor element can be driven by quickly applying a gate voltage.

Electrical configuration diagram showing the first embodiment Voltage and current timing chart Electrical configuration diagram showing the second embodiment Electrical configuration diagram showing a specific example Electrical configuration diagram showing a third embodiment Electrical configuration diagram showing a specific example Electrical configuration diagram showing a fourth embodiment Voltage and current timing chart

(First Embodiment)
Hereinafter, the first embodiment of the present invention will be described with reference to FIGS. 1 and 2.
In FIG. 1, the IGBT 1 is a gate drive type semiconductor element, and the gate drive circuit 2 drives the IGBT 1 with a constant current. The gate drive circuit 2 has input terminals A and B and an output terminal C. One terminal of the current detection resistor 3 is connected to the DC power supply VD and is connected to the input terminal A, and the other terminal is connected to the input terminal B. The gate of the IGBT 1 is connected to the output terminal C.

The gate drive circuit 2 is provided with a p-channel drive MOS transistor (hereinafter, simply referred to as a MOS transistor) 4, a control circuit 5, a differential amplifier 6, and a reference power supply 7. In the MOS transistor 4, the source is connected to the input terminal B and the drain is connected to the output terminal C. In the control circuit 5, the detection voltage VP by the current detection resistor 3 is input from the input terminal B, and the voltage VREF of the reference power supply 7 is switched and set according to the detection voltage VP.

In the differential amplifier 6, the voltage VP given to the input terminal B is input to the inverting input terminal, and the voltage VREF is given to the non-inverting input terminal from the reference power supply 7. The output terminal of the differential amplifier 6 is connected to the gate of the MOS transistor 4, and a drive signal corresponding to the voltage difference between the non-inverting input terminal and the inverting input terminal is given to the gate of the MOS transistor 4.

The reference power supply 7 sets the voltage VREF to the non-inverting input terminal of the differential amplifier 6. Specifically, the reference voltage Vref0 for setting the target constant current and the reference voltage Vref1 set at startup are set. It is provided so that it can be switched and set.

For the specific configuration of the voltage VREF switching setting by the reference power supply 7, for example, the resistance part and the constant current part are connected in series to switch the resistance value of the resistance part or the constant current value of the constant current part. And so on, various configurations can be adopted.

Next, the operation of the above configuration will be described with reference to FIG.
FIG. 2 shows the waveforms of the voltage and current of each part, and it is assumed that the drive signal of the IGBT 1 is given at time t0. When a drive signal is given, the control circuit 5 controls the reference power supply 7 to set the reference voltage Vref 1 as the voltage VREF set in the differential amplifier 6. As shown in FIG. The reference voltage Vref1 is set to a voltage lower than the reference voltage Vref0 for setting the target constant current I0, and satisfies the condition of the following equation (1).
Vref1 <Vref0 ... (1)

At time t0, the MOS transistor 4 is in the off state and the current ID has not yet flowed. Therefore, the voltage VP input to the differential amplifier 6 is at the same level as the DC power supply VD as shown by the thick broken line in FIG. Is. In the differential amplifier 6, as shown in the following equation (2), the difference voltage ΔV1 between the input reference voltage Vref1 and the detection voltage VP is larger than the difference voltage ΔV0 when the reference voltage Vref0, so that the start-up time TB And the rise time TR becomes shorter.
ΔV1 = VP-Vref1, ΔV0 = VP-Vref0
ΔV1> ΔV0 ... (2)

Since the output signal of the differential amplifier 6 is held at a high level during the start-up time TB from the time t0 to t1, the MOS transistor 4 is held in the off state and the current ID is zero. Therefore, the detection voltage VP of the input terminal B is also in a state equal to the power supply voltage VD without a voltage drop at the current detection resistor 3.

Subsequently, when the rising period TR from time t1 to t2 is reached, the output voltage of the differential amplifier 6 with respect to the MOS transistor 4 gradually decreases, so that the current ID of the MOS transistor 4 also increases accordingly. At this time, the current ID of the MOS transistor 4 rises at an increase rate corresponding to the difference voltage ΔV1 until the target constant current value I0 is reached. Further, when the current ID of the MOS transistor 4 increases, the voltage drop of the current detection resistor 3 increases, which causes the detection voltage VP input to the differential amplifier 6 to decrease.

When the detection voltage VP drops at time t2 and reaches the reference voltage Vref0, the control circuit 5 determines this and switches to the reference voltage Vref0 for setting the constant current I0 aiming at the voltage VREF with respect to the reference power supply 7. To do. As a result, the current ID of the MOS transistor 4 becomes equal to the target constant current I0 corresponding to the reference voltage Vref0, and this state is maintained.

In FIG. 2, in order to show the effect of the present embodiment, the voltage VREF is not set as the reference voltage Vref1 lower than the reference voltage Vref0 for setting the target constant current I0, that is, the voltage VREF is set to the reference voltage Vref0 from the beginning. If it is set, it is shown as a comparative example. Here, the detection voltage of the comparative example will be described as Vp, and the current of the MOS transistor 4 will be described as Id.

In this case, at time t0, the MOS transistor 4 is in the off state and the current Id has not yet flowed. Therefore, the voltage Vp input to the differential amplifier 6 is a DC power supply as shown by the middle dotted line in FIG. It is the same level as VD. At this time, in the differential amplifier 6, the start-up time Tb and the start-up time Tr become longer than in the above-mentioned case according to the difference voltage ΔV0 between the input reference voltage Vref0 and the voltage Vp.

As shown in the above equation (2), since ΔV0 is smaller than ΔV1, the start-up time Tb of the differential amplifier 6 is extended from the time t0 to t1x, which is longer than the start-up time TB described above. Further, since ΔV0 is smaller than ΔV1 also for the rise time Tr from the time t1x, the current Id of the MOS transistor 4 reaches the target constant current value I0 in a longer time than described above according to the difference voltage ΔV0. Rise. Therefore, the rise time Tr until the time t2x when the current Id reaches the target constant current I0 is also longer than the rise time TR described above.

As described above, in the present embodiment, the reference voltage Vref1 lower than the reference voltage Vref0 for setting the constant current I0 is given until the current ID to the gate of the IGBT1 reaches the target constant current I0. By operating the dynamic amplifier 6, the start-up time TB and the start-up time TR are shortened, and then the reference voltage Vref0 is switched to when the target constant current I0 is reached. As a result, the start-up time and start-up time can be shortened, and even when the IGBT 1 is used in an inverter circuit or the like, the dead time can be shortened so that the IGBT 1 can be used efficiently.

(Second Embodiment)
3 and 4 show the second embodiment, and the parts different from the first embodiment will be described below. In this embodiment, in the gate drive circuit 2a, a configuration for changing and setting the voltage VREF by the reference power supply 7a is specifically shown.

FIG. 3 shows a change element of the voltage VREF of the reference power supply 7a, and the reference power supply 7a has a configuration in which a series circuit of the variable resistor portion 8 and the constant current source 9 is connected between the input terminal A and the ground. It is said. The voltage VREF is applied to the differential amplifier 6 from the common connection point between the variable resistance unit 8 and the constant current source 9. The resistance value of the variable resistance unit 8 is controlled so as to be changed and set by the control circuit 5.

According to this configuration, the product of the current value of the constant current source 9 and the resistance value of the variable resistance unit 8 is the voltage VREF. Therefore, the voltage VREF is changed by changing and setting the resistance value of the variable resistance unit 8 by the control circuit 5. Can be changed and set.

FIG. 4 shows the configuration of the control circuit 5a and the reference power supply 7a, which are concrete circuits of the configuration of FIG. The control circuit 5a has a comparator 11 and a reference power supply 12. The inverting input terminal of the comparator 11 is connected to the input terminal B, and the detection voltage VP is input. The non-inverting input terminal of the comparator 11 is connected from the input terminal A via the reference power supply 12, and the reference voltage Vref0 for setting the target constant current I0 is input.

Further, the variable resistance portion 8 of the reference power supply 7a has a series circuit of the resistors 13 and 14 and a switch 15 for short-circuiting the resistors 13. A control signal is given to the switch 15 from the output terminal of the comparator 11 of the control circuit 5a.

In the above configuration, in the reference power supply 7a, when the switch 15 is off, the current of the constant current source 9 flows through the resistors 13 and 14, so that the voltage VREF is set to the low reference voltage Vref1 and the switch 15 is turned on. In the state of, the voltage VREF is set to a high reference voltage Vref0 by the current of the constant current source 9 flowing through the resistor 14. On the other hand, in the control circuit 5a, a control signal for driving the switch 15 off is output from the comparator 11 from the comparator 11 until the detection voltage VP of the input terminal B reaches the reference voltage Vref0 from the power supply voltage VD, and the detection voltage VP When the reference voltage Vref0 is reached, the switch 15 is turned on.
Therefore, even with such a second embodiment, the same effect as that of the first embodiment can be obtained.

In this embodiment, the circuit configuration shown in FIG. 4 is shown as a specific example of the variable resistance unit 8 in FIG. 3, but the present invention is not limited to this. For example, two resistors are connected in parallel and one of them is opened by a switch. By doing so, a configuration for switching the resistance value can be used.

(Third Embodiment)
5 and 6 show the third embodiment, and the parts different from the first embodiment will be described below. In this embodiment, a configuration different from that of the second embodiment is specifically shown for the configuration for changing and setting the voltage VREF by the reference power supply 7b.

FIG. 5 shows a change element of the voltage VREF of the reference power supply 7b, and the reference power supply 7b has a configuration in which a series circuit of a resistor 8a and a variable current source 9a is connected between the input terminal A and the ground. .. The voltage VREF is applied to the differential amplifier 6 from the common connection point between the resistor 8a and the variable current source 9a. The current value of the variable current source 9a is controlled so as to be changed and set by the control circuit 5.

According to this configuration, the product of the resistor 8a and the current value of the variable current source 9a is the voltage VREF. Therefore, the voltage VREF is changed and set by changing and setting the current value of the variable current source 9a by the control circuit 5. Can be done.

FIG. 6 shows the configuration of the control circuit 5b and the reference power supply 7b, which are concrete circuits of the configuration of FIG. The control circuit 5b has a comparator 21 and a reference power supply 22. The non-inverting input terminal of the comparator 21 is connected to the input terminal B, and the detection voltage VP is input. The inverting input terminal of the comparator 21 is connected from the input terminal A via the reference power supply 22, and the reference voltage Vref0 for setting the target constant current I0 is input.

Further, the variable current source 9a of the reference power source 7b has a parallel circuit of the constant current sources 23 and 24 and a switch 25 for opening the constant current source 24. A control signal is given to the switch 25 from the output terminal of the comparator 21 of the control circuit 5b.

In the above configuration, when the switch 25 is on, the reference power source 7b sets the voltage VREF to a low reference voltage Vref1 by flowing the currents of the constant current sources 23 and 24 through the resistor 8a, and the switch 25 is off. Then, the current of the constant current source 23 flows through the resistor 8a, so that the voltage VREF is set to a high reference voltage Vref0. On the other hand, in the control circuit 5b, a control signal for turning on the switch 25 is output from the comparator 21 while the detection voltage VP of the input terminal B is from the power supply voltage VD to the reference voltage Vref0, and the detection voltage VP is increased. When the reference voltage Vref0 is reached, the switch 15 is driven off.
Therefore, even with such a third embodiment, the same effect as that of the first embodiment can be obtained.

(Fourth Embodiment)
7 and 8 show the fourth embodiment, and the parts different from the third embodiment will be described below. In this embodiment, the control circuit 5c of the gate drive circuit 2c changes the voltage VREF of the reference power supply 7c according to the magnitude of the current ID of the MOS transistor 4.

The reference power supply 7c has a configuration in which a series circuit of a resistor 8a and a constant current source 9 is connected between the input terminal A and the ground. The constant current source 9 is a circuit that sets the reference voltage Vref0 as the voltage VREF in the differential amplifier 6 by passing a constant current through the resistor 8a. On the other hand, the control circuit 5c controls the voltage VREF by increasing the current flowing through the resistor 8a of the reference power supply 7c.

The control circuit 5c includes a current amplifier 31 and a reference power supply 32. The current amplifier 31 has an amplifier unit 31a and an output unit 31b. In the amplifier unit 31a, the detection voltage VP of the input terminal B is input to the non-conversion input terminal, and the reference voltage is input to the inverting input terminal from the input terminal A via the reference power supply 32. The amplifier unit 31a controls the output unit 31b to flow a current proportional to the difference in the input voltage. The reference voltage of the reference power supply 32 is set so that the reference voltage Vref1 is set as the voltage VREF at startup.

Next, the operation of the above configuration will be described with reference to FIG.
When a drive signal is given, the control circuit 5c controls to set the reference voltage Vref1 as the voltage VREF set by the reference power supply 7c, as shown in FIG. The reference power source 7c is a constant current flowing through the resistor 8a by the constant current source 9, and the reference voltage Vref0 is set as the voltage VREF. The control circuit 5c increases the current flowing through the resistor 8a.

Since the current ID does not flow through the MOS transistor 4 at the time of startup, the voltage drop due to the current detection resistor 3 does not occur, and the detection voltage VP of the input terminal B is equal to the power supply voltage VD. Therefore, in the control circuit 5c, the output unit 31b is controlled so that the input voltage difference of the current amplifier 31 becomes equal to the reference voltage and a current proportional to the voltage difference flows.

In the reference power source 7c, the current flowing through the resistor 8a is added to the current flowing through the output unit 31b of the current amplifier 31 in addition to the current flowing through the constant current source 9. As a result, the voltage drop of the resistor 8a increases, and as shown in FIG. 8, the reference voltage Verf1 is set as the voltage VREF at the non-inverting input terminal of the differential amplifier 6.

As a result, at the time of start-up, in the differential amplifier 6, the start-up time TB and the start-up time TR are determined according to the voltage ΔV1 of the difference between the input reference voltage Vref1 and the detection voltage VP equal to the power supply voltage VD. The start-up time TB up to the time t1 when the current starts to flow in the transistor 4 is shortened.

After that, when the differential amplifier 6 starts to rise from time t1 and drives the MOS transistor 4 to cause the current ID to flow, the voltage drop of the current detection resistor 3 occurs, and the detection voltage VP of the input terminal B drops. come. When the detection voltage VP decreases, the input voltage difference to the current amplifier 31 decreases in the control circuit 5c, so that the current value of the output unit 31b is controlled to decrease.

As a result, in the reference power source 7c, the voltage drop of the resistor 8a decreases and the value of the voltage VREF gradually increases. As a result, the value of the voltage VREF increases from the reference voltage Vref1. After that, when the current ID of the MOS transistor 4 reaches the target constant current I0 at time t2a, the detection voltage VP becomes equal to the reference voltage Vref0.

At this time, in the control circuit 5c, the input voltage difference of the current amplifier 31 also disappears, so that the current by the output unit 31b also becomes zero. As a result, the reference power source 7c becomes a voltage VREF based only on the constant current of the constant current source 9, becomes equal to the reference voltage Vref0, and the current ID of the MOS transistor 4 holds the target constant current I0.

In such a fourth embodiment, a differential amplifier is provided with a voltage VREF lower than the reference voltage Vref0 for setting the constant current I0 until the current ID to the gate of the IGBT 1 reaches the target constant current I0. 6 was made to operate. As a result, the start-up time TB and the start-up time TR can be shortened, and the same effect as that of the first embodiment can be obtained.

In the above embodiment, the setting of the voltage VREF by the reference power supply is shown as a method of switching the reference voltage Vref1 to Vref0 and a method of setting the reference voltage Vref1 to Vref0 continuously. It is also possible to adopt a configuration that switches in stages over time.

(Other embodiments)
The present invention is not limited to the above-described embodiment, and can be applied to various embodiments without departing from the gist thereof. For example, the present invention can be modified or extended as follows.

Further, in each of the above embodiments, the reference power supplies 7, 7a, 7b, and 7c are configured to have a resistance portion and a constant current portion, but the present invention is not limited to this, and a power supply may be separately provided. The voltage VREF can be set by controlling an active element or the like.

Although the present disclosure has been described in accordance with the examples, it is understood that the present disclosure is not limited to the examples and structures. The present disclosure also includes various modifications and modifications within an equal range. In addition, various combinations and forms, as well as other combinations and forms that include only one element, more, or less, are also within the scope of the present disclosure.

In the drawing, 1 is an IGBT (gate drive type semiconductor element), 2, 2a, 2b, 2c is a gate drive circuit, 3 is a current detection resistor, 4 is a p-channel type drive MOS transistor, 5, 5a, 5b, 5c is a control circuit, 6 is a differential amplifier, 7, 7a, 7b, 7c is a reference power supply, 8 is a variable resistance unit, 8a is a resistor, 9 is a constant current source, 9a is a variable current source, and 31 is a current amplifier. ..

Claims (7)

A gate drive circuit that drives a gate-driven semiconductor element with a constant current.
A driving MOS transistor (4) that supplies a constant current to the gate of the semiconductor element, and
A differential amplifier (6) that gives a drive signal to the gate of the drive MOS transistor, and
A reference power supply (7, 7a, 7b, 7c) that supplies a reference voltage to the differential amplifier for passing a target constant current through the driving MOS transistor, and
Reference by the reference power source so that the current value flowing through the driving MOS transistor is detected and the current value becomes larger than the target constant current during the period until the detected current value reaches the target constant current. A gate drive circuit including a control circuit (5, 5a, 5b, 5c) for setting a voltage. The control circuit (5, 5a, 5b) is claimed to switch and set the reference voltage by the reference power supply so that the detected current value reaches the target constant current when the detected current value reaches the target constant current. Item 1. The gate drive circuit according to item 1. A current detection resistor (3) is provided in the energization path of the drive MOS transistor.
The control circuit (5a) switches and sets the reference voltage by the reference power supply (7a) when the voltage between the terminals of the current detection resistor reaches the reference voltage for setting the target constant current (11). The gate drive circuit according to claim 2. The gate drive circuit according to claim 2 or 3, wherein the reference power supply (7a) is configured so that the resistance value for setting the reference voltage can be changed. The gate drive circuit according to claim 2 or 3, wherein the reference power supplies (7b, 7c) are configured so that the current value flowing through the resistor for setting the reference voltage can be changed. The control circuit (5c) continuously or steps the reference voltage from the reference power source until it reaches the reference voltage corresponding to the target constant current until the detected current value reaches the target constant current. The gate drive circuit according to claim 1. A current detection resistor (3) is provided in the energization path of the drive MOS transistor.
The reference power supply (7c) includes a resistor (8a) for the reference voltage and a constant current source (9) for setting the target constant current.
In the control circuit, a current proportional to the difference voltage between the terminal voltage of the current detection resistor and the reference voltage for setting the target constant current is passed through the resistance of the reference power supply, and the reference voltage is set to the target. The gate drive circuit according to claim 6, further comprising a current amplifier (31) that sets the current below the reference voltage.

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