JP2020159691A - Insulation state monitoring device - Google Patents

Insulation state monitoring device Download PDF

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JP2020159691A
JP2020159691A JP2019055807A JP2019055807A JP2020159691A JP 2020159691 A JP2020159691 A JP 2020159691A JP 2019055807 A JP2019055807 A JP 2019055807A JP 2019055807 A JP2019055807 A JP 2019055807A JP 2020159691 A JP2020159691 A JP 2020159691A
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JP7235548B2 (en
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拓朗 風間
Takuro Kazama
拓朗 風間
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Hikari Trading Co Ltd
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Abstract

To provide an insulation state monitoring device that monitors an insulation state of electrical equipment in the horizontal and vertical directions.SOLUTION: Based on a first AC voltage V1 and current I1, total impedance Z, total insulation resistance R, and total capacitance C between a horizontal electrode 1 and a vertical electrode 2 are calculated. Based on a third voltage V3 between the horizontal electrode 1 and a common electrode 3, a fourth voltage V4 between the vertical electrode 2 and the common electrode 3, a voltage difference ΔV between the third voltage V3 and the fourth voltage V4, and the total impedance Z, an insulation resistance RH and a static capacitance CH between the horizontal electrode 1 and the common electrode 3, and an insulation resistance RV and a static capacitance CV between the vertical electrode 2 and the common electrode 3 are obtained.SELECTED DRAWING: Figure 1

Description

本発明は、 電気設備内の電気機器における絶縁状態の劣化を診断する絶縁状態監視装置に係り、特に、電気機器の水平方向および垂直方向における絶縁状態の劣化を診断する装置に関する。 The present invention relates to an insulation state monitoring device for diagnosing deterioration of the insulation state of an electric device in an electric facility, and more particularly to a device for diagnosing deterioration of the insulation state in the horizontal and vertical directions of the electric device.

キュービクルや配電盤、工場等の電気設備においては、電気設備内の電気機器に塵埃等が堆積すると、当該電気機器の絶縁状態が劣化し、最悪の場合火災等が生じる恐れがある。そこで、従来は、定期的に電気設備等の清掃やメンテナンス等を行い、電気機器の絶縁性を維持している。 In electrical equipment such as cubicles, switchboards, and factories, if dust or the like accumulates on the electrical equipment in the electrical equipment, the insulation state of the electrical equipment deteriorates, and in the worst case, a fire or the like may occur. Therefore, conventionally, the insulation of electrical equipment is maintained by regularly cleaning and maintaining the electrical equipment.

特開2015−162320号公報Japanese Unexamined Patent Publication No. 2015-162320 特開平8−210890号公報Japanese Unexamined Patent Publication No. 8-210890

しかし、どの程度の期間でどの程度の塵埃が堆積するのか、どの程度の塵埃が堆積するとどの程度の絶縁劣化が生じるのかが不明であるため、メンテナンス性の効率化を図ることができない。 However, since it is unclear how much dust is accumulated in what period and how much dust is accumulated to cause deterioration of insulation, it is not possible to improve the efficiency of maintainability.

また、場所や季節や風向き等により、電気機器に堆積する塵埃等の量が異なる。定期的に電気設備等の清掃やメンテナンスを行う場合、一般的には、塵埃等が多い状況を想定してメンテナンスのスケジュールを組むため、清掃やメンテナンスの間隔が短くなり、清掃やメンテナンスの回数が多くなる。 In addition, the amount of dust and the like accumulated on electrical equipment varies depending on the location, season, wind direction, and the like. When cleaning and maintaining electrical equipment on a regular basis, the maintenance schedule is generally set assuming a situation with a lot of dust, so the interval between cleaning and maintenance is shortened, and the number of cleanings and maintenance is reduced. More.

また、電気機器には立体的構造のものもあり、塵埃は電気機器の水平方向だけでなく、風向き等の環境により電気機器の垂直方向にも堆積することがある。 In addition, some electric devices have a three-dimensional structure, and dust may accumulate not only in the horizontal direction of the electric device but also in the vertical direction of the electric device depending on the environment such as the wind direction.

以上示したようなことから、絶縁状態監視装置において、電気機器の水平方向および垂直方向における絶縁状態を監視することが課題となる。 From the above, it is an issue to monitor the insulation state of the electric device in the horizontal direction and the vertical direction in the insulation state monitoring device.

本発明は、前記従来の問題に鑑み、案出されたもので、その一態様は、水平面電極と、前記水平面電極に対して略直角に設けられた垂直面電極と、前記水平面電極と略平行に所定の距離離して配置された第1電極および前記垂直面電極と略平行に所定の距離離して配置された第2電極を有する共通電極と、前記水平面電極の一端と前記垂直面電極の一端と前記共通電極の一端とを接続した接続点と前記共通電極との間に第1交流電圧を発生させ、絶縁状態に応じて電圧を自動調整できる第1電圧発生手段と、前記水平面電極と前記垂直面電極との間に前記第1交流電圧とは異なる周波数の第2交流電圧を発生させる第2電圧発生手段と、前記第1交流電圧と、前記共通電極と前記接続点間に流れる電流に基づいて、前記水平面電極と前記垂直面電極間の総合インピーダンスZおよび総合絶縁抵抗および総合静電容量を算出し、前記水平面電極と前記共通電極間の第3電圧、および、前記垂直面電極と前記共通電極間の第4電圧、および、前記第3電圧と前記第4電圧の電圧差、および、前記総合インピーダンスに基づいて、前記水平面電極と前記共通電極間の絶縁抵抗および静電容量、かつ、前記垂直面電極と前記共通電極間の絶縁抵抗および静電容量を求める演算器と、を備えたことを特徴とする。 The present invention has been devised in view of the above-mentioned conventional problems, and one aspect thereof is a horizontal plane electrode, a vertical plane electrode provided substantially perpendicular to the horizontal plane electrode, and substantially parallel to the horizontal plane electrode. A common electrode having a first electrode arranged at a predetermined distance and a second electrode arranged at a predetermined distance substantially parallel to the vertical plane electrode, one end of the horizontal plane electrode and one end of the vertical plane electrode. A first voltage generating means capable of generating a first AC voltage between a connection point connecting one end of the common electrode and the common electrode and automatically adjusting the voltage according to an insulation state, the horizontal plane electrode and the above. To the second voltage generating means for generating a second AC voltage having a frequency different from the first AC voltage between the vertical plane electrodes, the first AC voltage, and the current flowing between the common electrode and the connection point. Based on this, the total impedance Z, the total insulation resistance, and the total capacitance between the horizontal plane electrode and the vertical plane electrode are calculated, and the third voltage between the horizontal plane electrode and the common electrode, and the vertical plane electrode and the above. Based on the fourth voltage between the common electrodes, the voltage difference between the third voltage and the fourth voltage, and the total impedance, the insulation resistance and capacitance between the horizontal plane electrode and the common electrode, and It is characterized by including an arithmetic unit for obtaining the insulation resistance and capacitance between the vertical plane electrode and the common electrode.

本発明によれば、絶縁状態監視装置において、電気機器の水平方向および垂直方向における絶縁状態を監視することが可能となる。 According to the present invention, it is possible to monitor the insulation state of an electric device in the horizontal direction and the vertical direction in the insulation state monitoring device.

実施形態における絶縁状態監視装置を示す概略図。The schematic diagram which shows the insulation state monitoring apparatus in embodiment. V1,VZの関係を示す等価回路。Equivalent circuit showing a relation of V1, V Z. V1,Vr,VZ,I1の関係を表すベクトル図。V1, Vr, vector diagram representing the relationship between V Z, I1. Z,IR,I1,ICの関係を表すベクトル図。V Z, vector diagram representing the relationship between I R, I1, I C. V2,V3,V4の関係を表す等価回路。An equivalent circuit that represents the relationship between V2, V3, and V4. V2,V3,V4,ΔVの関係を表すベクトル図。The vector figure which shows the relationship of V2, V3, V4, ΔV. V3,I3,Zの関係を表すベクトル図。The vector figure which shows the relationship of V3, I3, Z. V4,I4,Zの関係を表すベクトル図。The vector diagram which shows the relationship of V4, I4, Z.

以下、本願発明における絶縁状態監視装置の実施形態を図1〜図8に基づいて詳述する。 Hereinafter, embodiments of the insulation state monitoring device according to the present invention will be described in detail with reference to FIGS. 1 to 8.

[実施形態]
まず、本実施形態における絶縁状態監視装置の構成を図1の概略図に基づいて説明する。本実施形態における絶縁状態監視装置は、電気設備内に設置されるものとする。図1に示すように、絶縁状態監視装置は、水平面電極1と垂直面電極2と共通電極3と、を備える。
[Embodiment]
First, the configuration of the insulation state monitoring device in the present embodiment will be described with reference to the schematic diagram of FIG. The insulation condition monitoring device in this embodiment shall be installed in the electrical equipment. As shown in FIG. 1, the insulation state monitoring device includes a horizontal plane electrode 1, a vertical plane electrode 2, and a common electrode 3.

水平面電極1は地面に対して略平行に設けられる。垂直面電極2は水平面電極1に対して約90°(略直角)の角度差が設けられている。共通電極3は、水平面電極1と略平行に所定の距離離して配置された第1電極3aと、垂直面電極2と略平行に所定の距離離して配置された第2電極3bと、を有する。 The horizontal electrode 1 is provided substantially parallel to the ground. The vertical surface electrode 2 is provided with an angle difference of about 90 ° (approximately right angle) with respect to the horizontal surface electrode 1. The common electrode 3 has a first electrode 3a arranged substantially parallel to the horizontal plane electrode 1 at a predetermined distance, and a second electrode 3b arranged substantially parallel to the vertical plane electrode 2 at a predetermined distance. ..

図1では、所定の形状の水平面電極1、垂直面電極2、共通電極3を示しているが、水平面電極1と垂直面電極2とが約90°の角度差を有し、共通電極3が水平面電極1と略平行に所定の距離離して配置された第1電極3aと、垂直面電極2と略平行に所定の距離離して配置された第2電極3bと、を有していれば、その他の形状であってもよい。 FIG. 1 shows a horizontal surface electrode 1, a vertical surface electrode 2, and a common electrode 3 having a predetermined shape. However, the horizontal surface electrode 1 and the vertical surface electrode 2 have an angle difference of about 90 °, and the common electrode 3 has an angle difference of about 90 °. If the first electrode 3a arranged substantially parallel to the horizontal plane electrode 1 at a predetermined distance and the second electrode 3b arranged substantially parallel to the vertical plane electrode 2 at a predetermined distance are provided. Other shapes may be used.

本実施形態では、プリント基板上のパターン(銅箔等)により水平面電極1および垂直面電極2および共通電極3を構成するものとするが、その他の材質等によって水平面電極1,垂直面電極2,共通電極3を構成してもよい。 In the present embodiment, the horizontal plane electrode 1, the vertical plane electrode 2, and the common electrode 3 are formed by a pattern (copper foil or the like) on the printed substrate, but the horizontal plane electrode 1, the vertical plane electrode 2, and the like are made of other materials. The common electrode 3 may be configured.

水平面電極1の一端と垂直面電極2の一端と共通電極3の一端同士は接続される。本実施形態では、水平面電極1の一端と垂直面電極2の一端とは後述するトランスTrの2次側を介して接続される。共通電極3の一端はトランスTrの2次側の中性点に接続される。 One end of the horizontal plane electrode 1, one end of the vertical plane electrode 2 and one end of the common electrode 3 are connected to each other. In the present embodiment, one end of the horizontal electrode 1 and one end of the vertical electrode 2 are connected via the secondary side of the transformer Tr, which will be described later. One end of the common electrode 3 is connected to the neutral point on the secondary side of the transformer Tr.

共通電極3とトランスTrの2次側の中性点(前記接続点)との間には、第1交流電圧V1を発生させる第1電圧発生手段4が設けられる。なお、第1電圧発生手段4と共通電極3およびトランスTrの2次側の中性点との間には、フィルタ5,増幅回路6,抵抗r,r1が設けられる。第1電圧発生手段4は、共通電極3と水平面電極1および垂直面電極2間の絶縁抵抗を計測するため、絶縁状態に応じて電圧を自動調整できるものとする。 A first voltage generating means 4 for generating a first AC voltage V1 is provided between the common electrode 3 and the neutral point (the connection point) on the secondary side of the transformer Tr. A filter 5, an amplifier circuit 6, and resistors r and r1 are provided between the first voltage generating means 4 and the common electrode 3 and the neutral point on the secondary side of the transformer Tr. Since the first voltage generating means 4 measures the insulation resistance between the common electrode 3, the horizontal electrode 1, and the vertical electrode 2, the voltage can be automatically adjusted according to the insulation state.

水平面電極1と垂直面電極2との間には、トランスTrを介して第2交流電圧V2を発生させる第2電圧発生手段7が設けられる。第2交流電圧V2は第1交流電圧V1の周波数f1とは異なる周波数f2とする。また、トランスTrの2次側と水平面電極1および垂直面電極2との間には、図1に示すようにヒューズ8a,8bを設けても良い。 A second voltage generating means 7 for generating a second AC voltage V2 is provided between the horizontal surface electrode 1 and the vertical plane electrode 2 via a transformer Tr. The second AC voltage V2 has a frequency f2 different from the frequency f1 of the first AC voltage V1. Further, fuses 8a and 8b may be provided between the secondary side of the transformer Tr and the horizontal electrode 1 and the vertical electrode 2 as shown in FIG.

電流検出手段9は、接続点と共通電極3間の電流I1を検出する。電流I1は水平面電極1および垂直面電極2と共通電極3間の絶縁状態により値が異なる。電流検出手段9で検出された電流I1は、フィルタ10,増幅回路11,A/D変換器12を介して演算器13に出力される。 The current detecting means 9 detects the current I1 between the connection point and the common electrode 3. The value of the current I1 varies depending on the state of insulation between the horizontal electrode 1 and the vertical electrode 2 and the common electrode 3. The current I1 detected by the current detecting means 9 is output to the arithmetic unit 13 via the filter 10, the amplifier circuit 11, and the A / D converter 12.

第2交流電圧V2により、水平面電極1と共通電極3との間に第3電圧V3が印加され、垂直面電極2と共通電極3との間に第4電圧V4が印加される。電圧検出手段14は、第3電圧V3および第4電圧V4を検出し、第3電圧V3と第4電圧V4の電圧差ΔVを算出する。電圧検出手段14で検出された第3電圧V3および第4電圧V4および電圧差ΔVは、フィルタ15,増幅回路16,A/D変換器12を介して演算器13に出力される。 Due to the second AC voltage V2, the third voltage V3 is applied between the horizontal plane electrode 1 and the common electrode 3, and the fourth voltage V4 is applied between the vertical plane electrode 2 and the common electrode 3. The voltage detecting means 14 detects the third voltage V3 and the fourth voltage V4, and calculates the voltage difference ΔV between the third voltage V3 and the fourth voltage V4. The third voltage V3, the fourth voltage V4, and the voltage difference ΔV detected by the voltage detecting means 14 are output to the arithmetic unit 13 via the filter 15, the amplification circuit 16, and the A / D converter 12.

演算器13は、第1交流電圧V1と電流I1から水平面電極1と垂直面電極2間の総合インピーダンスZ,総合絶縁抵抗R,総合静電容量Cを演算式Aによって演算する。また、演算器13は、第3電圧V3,第4電圧V4,電圧差ΔV,総合インピーダンスZに基づいて、水平面電極1と共通電極3間の絶縁抵抗RHおよび静電容量CH、かつ、垂直面電極2と共通電極3間の絶縁抵抗RVおよび静電容量CVを演算式Bによって演算する。 The arithmetic unit 13 calculates the total impedance Z, the total insulation resistance R, and the total capacitance C between the horizontal plane electrode 1 and the vertical plane electrode 2 from the first AC voltage V1 and the current I1 by the calculation formula A. Further, the arithmetic unit 13 has an insulation resistance R H and a capacitance C H between the horizontal electrode 1 and the common electrode 3 based on the third voltage V3, the fourth voltage V4, the voltage difference ΔV, and the total impedance Z, and The insulation resistance R V and the capacitance C V between the vertical surface electrode 2 and the common electrode 3 are calculated by the calculation formula B.

表示手段17は、演算器13において演算式Bによって演算された絶縁抵抗RHおよび静電容量CH、絶縁抵抗RVおよび静電容量CVを表示する。 The display means 17 displays the insulation resistance R H and the capacitance C H , the insulation resistance R V and the capacitance C V calculated by the calculation formula B in the arithmetic unit 13.

警報手段18は、絶縁抵抗RHおよび静電容量CH、絶縁抵抗RVおよび静電容量CVと予め設定された所定の閾値とを比較し、前記各数値が閾値以下となった場合に、表示または音響による警報を行う。 The alarm means 18 compares the insulation resistance R H and the capacitance C H , the insulation resistance R V and the capacitance C V with a predetermined threshold value set in advance, and when each of the above values becomes equal to or less than the threshold value. , Display or sound alarm.

次に、水平面電極1と垂直面電極2間の総合インピーダンスZ,総合絶縁抵抗R並びに総合静電容量Cを求めるための演算式Aについて説明する。図2は、第1交流電圧V1と総合インピーダンスZにかかる電圧VZの関係を示す等価回路である。図2において、水平面電極1と共通電極3間の絶縁抵抗をRH,静電容量をCHとし、垂直面電極2と共通電極3間の絶縁抵抗をRV,静電容量をCVとする。また、接続点と共通電極3間の抵抗rの両端に発生する電圧をVr、電流をI1とし、総合インピーダンスZにかかる電圧をVZとする。また、第1交流電圧V1の周波数をf1とする。 Next, an arithmetic expression A for obtaining the total impedance Z, the total insulation resistance R, and the total capacitance C between the horizontal plane electrode 1 and the vertical plane electrode 2 will be described. FIG. 2 is an equivalent circuit showing the relationship between the first AC voltage V1 and the voltage V Z applied to the total impedance Z. In FIG. 2, the insulation resistance between the horizontal electrode 1 and the common electrode 3 is RH , the capacitance is C H , the insulation resistance between the vertical electrode 2 and the common electrode 3 is R V , and the capacitance is C V. To do. Further, the voltage generated across the resistor r between the connection point and the common electrode 3 is Vr, the current is I1, and the voltage applied to the total impedance Z is V Z. Further, the frequency of the first AC voltage V1 is f1.

水平面電極1と垂直面電極2間の総合インピーダンスZは、図2に示すように、水平面電極1と垂直面電極2の総合絶縁抵抗Rと総合静電容量Cを並列合成した値である。総合インピーダンスZにかかる電圧VZは、第1交流電圧V1、総合インピーダンスZに流れる電流I1から以下の(1)式となる。 As shown in FIG. 2, the total impedance Z between the horizontal surface electrode 1 and the vertical surface electrode 2 is a value obtained by synthesizing the total insulation resistance R and the total capacitance C of the horizontal surface electrode 1 and the vertical surface electrode 2 in parallel. The voltage V Z applied to the total impedance Z is given by the following equation (1) from the first AC voltage V1 and the current I1 flowing through the total impedance Z.

Figure 2020159691
Figure 2020159691

総合インピーダンスZは、第1交流電圧V1によって総合インピーダンスZに流れる電流I1と(1)式から以下の(2)式となる。 The total impedance Z is changed from the current I1 flowing through the total impedance Z by the first AC voltage V1 and the equation (1) to the following equation (2).

Figure 2020159691
Figure 2020159691

図3は、第1交流電圧V1,降下電圧Vr,総合インピーダンスZにかかる電圧VZ,電流I1をベクトルとして表した図である。第1交流電圧V1と降下電圧Vr間の位相差をθr,第1交流電圧V1と総合インピーダンスZにかかる電圧VZ間の位相差をθz,総合インピーダンスZにかかる電圧VZと電流I1間の位相差をθ1とすると、位相差θ1は以下の(3)式となる。 FIG. 3 is a diagram showing the first AC voltage V1, the voltage drop Vr, the voltage V Z applied to the total impedance Z, and the current I1 as vectors. The phase difference between the first AC voltage V1 and the drop voltage Vr is θr, the phase difference between the first AC voltage V1 and the voltage V Z applied to the total impedance Z is θz, and the phase difference between the voltage V Z applied to the total impedance Z and the current I1. Assuming that the phase difference is θ1, the phase difference θ1 is given by the following equation (3).

Figure 2020159691
Figure 2020159691

総合インピーダンスZ、および、上記(3)式により、総合絶縁抵抗R、総合静電容量Cは以下の(4)式となる。 Based on the total impedance Z and the above equation (3), the total insulation resistance R and the total capacitance C are the following equations (4).

Figure 2020159691
Figure 2020159691

図4は、電流I1,総合絶縁抵抗Rに流れる電流IR,総合静電容量Cに流れる電流IC,総合インピーダンスZにかかる電圧VZをベクトルとして表した図である。電流IRと電流I1間の位相差をθ1とすると、電流IR,電流ICは以下の(5)式となる。 Figure 4 is a diagram showing currents I1, overall insulation resistance current flowing through the R I R, Comprehensive capacitance current flowing through the C I C, the voltage V Z according to total impedance Z as a vector. When θ1 a phase difference between current I R and the current I1, a current I R, the current I C the following equation (5).

Figure 2020159691
Figure 2020159691

電流IR、電流ICを用いて、総合絶縁抵抗R,総合静電容量Cを以下の(6)式と表すことができる。 Using current I R, the current I C, overall insulation resistance R, a comprehensive electrostatic capacitance C is represented as the following equation (6).

Figure 2020159691
Figure 2020159691

総合インピーダンスZは、総合絶縁抵抗Rと総合静電容量Cを並列合成した値であるため、以下の(7)式となる。 Since the total impedance Z is a value obtained by synthesizing the total insulation resistance R and the total capacitance C in parallel, it is given by the following equation (7).

Figure 2020159691
Figure 2020159691

次に、水平面電極1と共通電極3間の絶縁抵抗RHおよび静電容量CH、かつ、垂直面電極2と共通電極3間の絶縁抵抗RVおよび静電容量CVを求めるための演算式Bについて説明する。 Next, an operation for obtaining the insulation resistance R H and the capacitance C H between the horizontal electrode 1 and the common electrode 3 and the insulation resistance R V and the capacitance C V between the vertical surface electrode 2 and the common electrode 3 Equation B will be described.

図5は、第2交流電圧V2,第3電圧V3,第4電圧V4の関係を示す等価回路である。第2交流電圧V2は周波数f2であり、トランスTrの2次側の中性点でV2/2,V2/2に2分割される。図5のHorizonは水平面電極1と接続される側を示し、Verticalは垂直面電極2と接続される側を示している。水平面電極1(Horizon)と共通電極3(Common)間の電圧がV3であり、垂直面電極2(Vertical)と共通電極3(Common)間の電圧がV4である。水平面電極1と共通電極3間のインピーダンスをZHとし、垂直面電極2と共通電極3間のインピーダンスをZVとする。水平面電極1と共通電極3間に流れる電流をI3とし、垂直面電極2と共通電極3間に流れる電流をI4とする。トランスTrの2次側中性点(接続点)と共通電極3間の抵抗をrとし、抵抗rに流れる電流をIrとする。第3電圧V3と第4電圧V4の電圧差をΔVとする。 FIG. 5 is an equivalent circuit showing the relationship between the second AC voltage V2, the third voltage V3, and the fourth voltage V4. The second AC voltage V2 has a frequency f2 and is divided into V2 / 2 and V2 / 2 at the neutral point on the secondary side of the transformer Tr. Horizon in FIG. 5 indicates the side connected to the horizontal electrode 1, and Vertical indicates the side connected to the vertical electrode 2. The voltage between the horizontal plane electrode 1 (Horizon) and the common electrode 3 (Common) is V3, and the voltage between the vertical plane electrode 2 (Vertical) and the common electrode 3 (Common) is V4. Let Z H be the impedance between the horizontal surface electrode 1 and the common electrode 3, and let Z V be the impedance between the vertical plane electrode 2 and the common electrode 3. The current flowing between the horizontal surface electrode 1 and the common electrode 3 is I3, and the current flowing between the vertical plane electrode 2 and the common electrode 3 is I4. Let r be the resistance between the neutral point (connection point) on the secondary side of the transformer Tr and the common electrode 3, and let Ir be the current flowing through the resistance r. Let the voltage difference between the third voltage V3 and the fourth voltage V4 be ΔV.

等価回路を表す図5に示すように、共通電極3(Common)に流れ込む電流Irは以下の(8)式となる。 As shown in FIG. 5, which represents an equivalent circuit, the current Ir flowing into the common electrode 3 (Common) is given by the following equation (8).

Figure 2020159691
Figure 2020159691

上記(8)式を、Ir=ΔV/r,I3=V3/ZH,I4=V4/ZVを使用して書き替えると以下の(9)式となる。 When the above equation (8) is rewritten using Ir = ΔV / r, I3 = V3 / Z H , I4 = V4 / Z V , the following equation (9) is obtained.

Figure 2020159691
Figure 2020159691

合成インピーダンスは、以下の(10)式となる。 The combined impedance is given by the following equation (10).

Figure 2020159691
Figure 2020159691

次に、水平面電極1と共通電極3間のインピーダンスZHと垂直面電極2と共通電極3間のインピーダンスZVを求める。まず、第2交流電圧V2,第3電圧V3,第4電圧V4の関係は以下の(11)式となる。 Next, the impedance Z H between the horizontal surface electrode 1 and the common electrode 3 and the impedance Z V between the vertical plane electrode 2 and the common electrode 3 are obtained. First, the relationship between the second AC voltage V2, the third voltage V3, and the fourth voltage V4 is given by the following equation (11).

Figure 2020159691
Figure 2020159691

電位差ΔV=V3+V4であるため、V3=V4+ΔV、V4=V3−ΔVとなる。これを(11)式に代入すると、以下の(12)式となる。 Since the potential difference ΔV = V3 + V4, V3 = V4 + ΔV and V4 = V3-ΔV. Substituting this into equation (11) gives equation (12) below.

Figure 2020159691
Figure 2020159691

上記(9)式,(10)式,(11)式より、水平面電極1と共通電極3間のインピーダンスZHと垂直面電極2と共通電極3間のインピーダンスZVは以下の(13)式となる。 From the above equations (9), (10), and (11), the impedance Z H between the horizontal electrode 1 and the common electrode 3 and the impedance Z V between the vertical surface electrode 2 and the common electrode 3 are the following equations (13). It becomes.

Figure 2020159691
Figure 2020159691

次に、第3電圧V3の実部V3re,虚部V3im,位相θ3,第4電圧V4の実部V4re,虚部V4im,位相θ4を求める。図6は第2交流電圧V2,第3電圧V3,第4電圧V4,電圧差ΔVの関係を示すベクトル図である。第2交流電圧V2と第3電圧V3間の位相差をθ3、第2交流電圧V2と第4電圧V4間の位相差をθ4、第2交流電圧V2と電圧差ΔV間の位相差をΔθとする。第3電圧V3の実部V3re,虚部V3im,位相差θ3,第4電圧V4の実部V4re,虚部V4im,位相差θ4は以下の(14)式となる。なお、添字のreはベクトル実部の大きさを示し、imは虚部の大きさを示す。図6において横軸をre,縦軸をimとする。 Next, the real part V3re, the imaginary part V3im, the phase θ3 of the third voltage V3, the real part V4re, the imaginary part V4im, and the phase θ4 of the fourth voltage V4 are obtained. FIG. 6 is a vector diagram showing the relationship between the second AC voltage V2, the third voltage V3, the fourth voltage V4, and the voltage difference ΔV. The phase difference between the second AC voltage V2 and the third voltage V3 is θ3, the phase difference between the second AC voltage V2 and the fourth voltage V4 is θ4, and the phase difference between the second AC voltage V2 and the voltage difference ΔV is Δθ. To do. The real part V3re, the imaginary part V3im, the phase difference θ3 of the third voltage V3, the real part V4re, the imaginary part V4im, and the phase difference θ4 of the fourth voltage V4 are given by the following equation (14). The subscript re indicates the size of the real part of the vector, and im indicates the size of the imaginary part. In FIG. 6, the horizontal axis is re and the vertical axis is im.

Figure 2020159691
Figure 2020159691

図7は、第3電圧V3と電流I3と総合インピーダンスZを表すベクトル図である。第3電圧V3の位相をθ3、総合インピーダンスZの位相をθz、電流I3の位相をθI3とする。 FIG. 7 is a vector diagram showing the third voltage V3, the current I3, and the total impedance Z. Let θ3 be the phase of the third voltage V3, θz be the phase of the total impedance Z, and θ I3 be the phase of the current I3.

図8は、第4電圧V4と電流I4と総合インピーダンスZを表すベクトル図である。第4電圧V4の位相をθ4、総合インピーダンスZの位相をθz、電流I4の位相をθI4とする。 FIG. 8 is a vector diagram showing the fourth voltage V4, the current I4, and the total impedance Z. Let the phase of the fourth voltage V4 be θ4, the phase of the total impedance Z be θz, and the phase of the current I4 be θ I4 .

V=0と仮定すると、電流I3は以下の(15)式となる。 Assuming Z V = 0, the current I3 is given by Eq. (15) below.

Figure 2020159691
Figure 2020159691

(15)式から位相θI3は以下の(16)式となる。 From equation (15), the phase θ I3 is given by equation (16) below.

Figure 2020159691
Figure 2020159691

そして、電流I3のうち絶縁抵抗成分に流れる電流I3R,電流I3のうち静電容量成分に流れる電流I3Cは以下の(17)式となる。 Then, the current I3 R flowing in the insulation resistance component of the current I3 and the current I3 C flowing in the capacitance component of the current I3 are given by the following equation (17).

Figure 2020159691
Figure 2020159691

H=0と仮定すると、電流I4は以下の(18)式となる。 Assuming that Z H = 0, the current I4 is given by the following equation (18).

Figure 2020159691
Figure 2020159691

(18)式から位相θI4は以下の(19)式となる。 From the equation (18), the phase θ I4 becomes the following equation (19).

Figure 2020159691
Figure 2020159691

そして、電流I4のうち絶縁抵抗成分に流れる電流I4R,電流I4のうち静電容量成分に流れる電流I4Cは以下の(20)式となる。 Then, the current I4 R flowing in the insulation resistance component of the current I4 and the current I4 C flowing in the capacitance component of the current I4 are given by the following equation (20).

Figure 2020159691
Figure 2020159691

第2交流電圧V2および上記のI3R,I3C,I4R,I4Cに基づいて、水平面電極1と共通電極3間の絶縁抵抗RHおよび静電容量CH、かつ、垂直面電極2と共通電極3間の絶縁抵抗RVおよび静電容量CVを、以下の(21)式により求める。 Based on the second AC voltage V2 and the above I3 R , I3 C , I4 R , I4 C , the insulation resistance R H and capacitance C H between the horizontal plane electrode 1 and the common electrode 3 and the vertical plane electrode 2 The insulation resistance R V and capacitance C V between the common electrodes 3 are obtained by the following equation (21).

Figure 2020159691
Figure 2020159691

以上示したように、本実施形態における絶縁状態監視装置によれば、電気機器の絶縁状態を検出することが可能となる。また、水平面電極1と共通電極3間の絶縁抵抗RHおよび静電容量CH、かつ、垂直面電極2と共通電極3間の絶縁抵抗RVおよび静電容量CVを演算し、電気機器の水平方向および垂直方向の汚染状態に応じた各電極の絶縁状態をそれぞれ監視することが可能となる。電気機器には、立体的構造のものもあり、塵埃等は電気機器の水平方向だけでなく、風向き等の環境により電気機器の垂直方向にも堆積することがある。そのため、電気機器の水平方向と垂直方向の絶縁状態を同時に監視することにより、電気機器全体の絶縁状況を正確に把握することが可能となる。また、電気機器の水平方向および垂直方向それぞれに絶縁状態監視装置を設ける必要がなく、一つの絶縁状態監視装置でよい。 As shown above, according to the insulation state monitoring device of the present embodiment, it is possible to detect the insulation state of the electric device. In addition, the insulation resistance R H and capacitance C H between the horizontal surface electrode 1 and the common electrode 3 and the insulation resistance R V and capacitance C V between the vertical surface electrode 2 and the common electrode 3 are calculated to calculate the electrical equipment. It is possible to monitor the insulation state of each electrode according to the horizontal and vertical pollution states. Some electric devices have a three-dimensional structure, and dust and the like may accumulate not only in the horizontal direction of the electric device but also in the vertical direction of the electric device depending on the environment such as the wind direction. Therefore, by simultaneously monitoring the insulation state of the electric device in the horizontal direction and the vertical direction, it is possible to accurately grasp the insulation state of the entire electric device. Further, it is not necessary to provide an insulation state monitoring device in each of the horizontal direction and the vertical direction of the electric device, and one insulation state monitoring device may be used.

なお、実施形態では塵埃が電気機器に堆積した場合について説明したが、本願発明は、塵埃の堆積に限らず、電気機器に何らかの物質が付着して絶縁状態が劣化した場合も絶縁状態を監視することが可能である。 In the embodiment, the case where dust is accumulated on the electric device has been described, but the present invention monitors the insulation state not only when the dust is accumulated but also when some substance adheres to the electric device and the insulation state deteriorates. It is possible.

以上、本発明において、記載された具体例に対してのみ詳細に説明したが、本発明の技術思想の範囲で多彩な変形および修正が可能であることは、当業者にとって明白なことであり、このような変形および修正が特許請求の範囲に属することは当然のことである。 Although the above has been described in detail only with respect to the specific examples described in the present invention, it is clear to those skilled in the art that various modifications and modifications are possible within the scope of the technical idea of the present invention. It goes without saying that such modifications and modifications fall within the scope of patent claims.

1:水平面電極
2:垂直面電極
3:共通電極
4:第1電圧発生手段
5,10,15:フィルタ
6,11,16:増幅回路
7:第2電圧発生手段
8a,8b:ヒューズ
9:電流検出手段
12:A/D変換器
13:演算器
14:電圧検出手段
17:表示手段
18:警報手段
1: Horizontal electrode 2: Vertical electrode 3: Common electrode 4: First voltage generating means 5, 10, 15: Filter 6, 11, 16: Amplifier circuit 7: Second voltage generating means 8a, 8b: Fuse 9: Current Detection means 12: A / D converter 13: Arithmetic unit 14: Voltage detection means 17: Display means 18: Alarm means

Claims (3)

水平面電極と、
前記水平面電極に対して略直角に設けられた垂直面電極と、
前記水平面電極と略平行に所定の距離離して配置された第1電極および前記垂直面電極と略平行に所定の距離離して配置された第2電極を有する共通電極と、
前記水平面電極の一端と前記垂直面電極の一端と前記共通電極の一端とを接続した接続点と前記共通電極との間に第1交流電圧を発生させ、絶縁状態に応じて電圧を自動調整できる第1電圧発生手段と、
前記水平面電極と前記垂直面電極との間に前記第1交流電圧とは異なる周波数の第2交流電圧を発生させる第2電圧発生手段と、
前記第1交流電圧と、前記共通電極と前記接続点間に流れる電流に基づいて、前記水平面電極と前記垂直面電極間の総合インピーダンスおよび総合絶縁抵抗および総合静電容量を算出し、前記水平面電極と前記共通電極間の第3電圧、および、前記垂直面電極と前記共通電極間の第4電圧、および、前記第3電圧と前記第4電圧の電圧差、および、前記総合インピーダンスに基づいて、前記水平面電極と前記共通電極間の絶縁抵抗および静電容量、かつ、前記垂直面電極と前記共通電極間の絶縁抵抗および静電容量を求める演算器と、
を備えたことを特徴とする絶縁状態監視装置。
Horizontal electrode and
A vertical surface electrode provided at a substantially right angle to the horizontal surface electrode and
A common electrode having a first electrode arranged substantially parallel to the horizontal plane electrode at a predetermined distance and a second electrode arranged substantially parallel to the vertical plane electrode at a predetermined distance.
A first AC voltage can be generated between the connection point connecting one end of the horizontal plane electrode, one end of the vertical plane electrode, and one end of the common electrode, and the common electrode, and the voltage can be automatically adjusted according to the insulation state. The first voltage generating means and
A second voltage generating means for generating a second AC voltage having a frequency different from that of the first AC voltage between the horizontal plane electrode and the vertical plane electrode.
Based on the first AC voltage and the current flowing between the common electrode and the connection point, the total impedance, total insulation resistance, and total capacitance between the horizontal plane electrode and the vertical plane electrode are calculated, and the horizontal plane electrode is used. Based on the third voltage between the common electrode, the fourth voltage between the vertical plane electrode and the common electrode, the voltage difference between the third voltage and the fourth voltage, and the total impedance. An arithmetic unit for obtaining the insulation resistance and capacitance between the horizontal plane electrode and the common electrode, and the insulation resistance and capacitance between the vertical plane electrode and the common electrode.
An insulation condition monitoring device characterized by being equipped with.
前記第1交流電圧と、前記共通電極と前記接続点間に流れる電流に基づいて、以下の(1)式〜(4)式により、前記水平面電極と前記垂直面電極間の前記総合絶縁抵抗および前記総合静電容量を算出することを特徴とする請求項1記載の絶縁状態監視装置。
Figure 2020159691
Figure 2020159691
Figure 2020159691
Figure 2020159691
ただし、r:接続点と共通電極間の抵抗
Z:総合インピーダンスZの電圧
V1:第1交流電圧
Vr:抵抗rの両端に発生する電圧
I1:共通電極と接続点間に流れる電流
θ1:VzとI1の位相差
θr:V1とVrの位相差
θz:V1とVzの位相差
R:総合絶縁抵抗
C:総合静電容量
f1:第1交流電圧の周波数
Z:総合インピーダンス
Based on the first AC voltage and the current flowing between the common electrode and the connection point, the total insulation resistance between the horizontal surface electrode and the vertical surface electrode is determined by the following equations (1) to (4). The insulation state monitoring device according to claim 1, wherein the total capacitance is calculated.
Figure 2020159691
Figure 2020159691
Figure 2020159691
Figure 2020159691
However, r: resistance between the connection point and the common electrode
V Z : Voltage of total impedance Z
V1: First AC voltage
Vr: Voltage generated across the resistor r
I1: Current flowing between the common electrode and the connection point
θ1: Phase difference between Vz and I1
θr: Phase difference between V1 and Vr
θz: Phase difference between V1 and Vz
R: Total insulation resistance
C: Total capacitance
f1: Frequency of the first AC voltage
Z: Total impedance
前記水平面電極と前記共通電極間の第3電圧、および、前記垂直面電極と前記共通電極間の第4電圧、および、前記第3電圧と前記第4電圧の電圧差、および、前記総合インピーダンスに基づいて、以下の(11)式,(12)式,(15)式〜(21)式により、前記水平面電極と前記共通電極間の絶縁抵抗および静電容量、かつ、前記垂直面電極と前記共通電極間の絶縁抵抗および静電容量を求めることを特徴とする請求項1または2記載の絶縁状態監視装置。
Figure 2020159691
Figure 2020159691
V=0と仮定すると、
Figure 2020159691
Figure 2020159691
Figure 2020159691
H=0と仮定すると、
Figure 2020159691
Figure 2020159691
Figure 2020159691
Figure 2020159691
ただし、I3:水平面電極と共通電極間に流れる電流
I4:垂直面電極と共通電極間に流れる電流
V2:第2交流電圧
V3:水平面電極と共通電極間の電圧
V4:垂直面電極と共通電極間の電圧
ΔV:V3とV4の電圧差
r:接続点と共通電極間の抵抗
H:水平面電極と共通電極間のインピーダンス
V:垂直面電極と共通電極間のインピーダンス
Z:総合インピーダンス
θ3:V3の位相
θ4:V4の位相
θI3:I3の位相
θZ:Zの位相
I3R=I3のうち絶縁抵抗成分に流れる電流
I3C=I3のうち静電容量成分に流れる電流
θI4:I4の位相
I4R=I4のうち絶縁抵抗成分に流れる電流
I4C=I4のうち静電容量成分に流れる電流
H:水平面電極と共通電極間の絶縁抵抗
H:水平面電極と共通電極間の静電容量
V:垂直面電極と共通電極間の絶縁抵抗
V:垂直面電極と共通電極間の静電容量
f2:第2交流電圧の周波数
To the third voltage between the horizontal plane electrode and the common electrode, the fourth voltage between the vertical plane electrode and the common electrode, the voltage difference between the third voltage and the fourth voltage, and the total impedance. Based on the following equations (11), (12), (15) to (21), the insulation resistance and capacitance between the horizontal electrode and the common electrode, and the vertical electrode and the above. The insulation state monitoring device according to claim 1 or 2, wherein the insulation resistance and capacitance between the common electrodes are obtained.
Figure 2020159691
Figure 2020159691
Assuming Z V = 0
Figure 2020159691
Figure 2020159691
Figure 2020159691
Assuming Z H = 0
Figure 2020159691
Figure 2020159691
Figure 2020159691
Figure 2020159691
However, I3: Current flowing between the horizontal electrode and the common electrode
I4: Current flowing between the vertical plane electrode and the common electrode
V2: 2nd AC voltage
V3: Voltage between the horizontal electrode and the common electrode
V4: Voltage between vertical plane electrode and common electrode
ΔV: Voltage difference between V3 and V4
r: Resistance between the connection point and the common electrode
Z H : Impedance between the horizontal electrode and the common electrode
Z V : Impedance between the vertical plane electrode and the common electrode
Z: Total impedance
θ3: Phase of V3
θ4: Phase of V4
θ I3 : Phase of I3
θ Z : Phase of Z
Current flowing through the insulation resistance component of I3 R = I3
Current flowing through the capacitance component of I3 C = I3
θ I4 : Phase of I4
Current flowing through the insulation resistance component of I4 R = I4
Current flowing through the capacitance component of I4 C = I4
R H : Insulation resistance between the horizontal electrode and the common electrode
C H : Capacitance between the horizontal electrode and the common electrode
R V : Insulation resistance between the vertical plane electrode and the common electrode
C V : Capacitance between the vertical plane electrode and the common electrode
f2: Frequency of the second AC voltage
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CN113064029A (en) * 2021-03-17 2021-07-02 南京传积兴自动化科技有限公司 High-voltage direct-current insulation monitoring system and monitoring method

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