JP2020155195A - Magnetic disc device - Google Patents

Abstract

To provide a magnetic disc device capable of widening a data region.SOLUTION: According to an embodiment, provided are: a disc part having a magnetic disc, a magnetic head including a write head and a read head arranged separately from the write head in a rotation direction of the magnetic disc by a predetermined distance, and a preamplifier having a first circuit which generates, on the magnetic disc, a recording current by the write head and a second circuit which amplifies output reproduced from the magnetic disc by the read head; and a control part which executes processing of generating, on the magnetic disc, the recording current by the write head in the preamplifier and processing of receiving output reproduced from the magnetic disc by the read head. In the preamplifier, processing of reading the data from the magnetic disc by the read head is executed in parallel to processing of writing the data transferred from the control part into the magnetic disc by the write head.SELECTED DRAWING: Figure 4

Description

The embodiment relates to a magnetic disk apparatus.

In the magnetic disk device, a predetermined special pattern is recorded and played back to measure the head gap interval for each head, and the data recording start timing is set for each head based on the time difference corresponding to the measured head gap interval for each head. The technology to compensate by changing to is known.

U.S. Pat. No. 7,106,534 U.S. Pat. No. 6,980,382 Japanese Unexamined Patent Publication No. 2011-008880

The read / write of the magnetic disk device is performed by the magnetic head. The magnetic head includes a read head that reads data from the magnetic disk and a write head that writes data to the magnetic disk. The read head and the write head are displaced from each other in the rotation direction of the magnetic disk and are arranged at a predetermined distance. Here, even when data is being written to the magnetic disk by the write head, it is necessary to read the servo data from the magnetic disk by the read head. Therefore, in general, the data writing is stopped before the data reading is started. I'm letting you. Therefore, there is an area that cannot be used as a data area.

An object of the present invention to be solved is to provide a magnetic disk device capable of expanding a data area.

The magnetic disk device according to one embodiment includes a magnetic disk unit and a control unit. The magnetic disk unit includes a magnetic disk and a write head, a magnetic head including a read head arranged at a predetermined distance from the light head in the rotation direction of the magnetic disk, and data is transmitted to the magnetic disk by the write head. It has a first circuit that generates a recording current to be written, and a preamplifier that has a second circuit that amplifies a signal reproduced by the read head from the magnetic disk. The control unit executes a process of generating a recording current for the write head to write to the magnetic disk in the preamplifier, and a process of receiving the signal reproduced by the read head from the magnetic disk by the read head. .. In the preamplifier, a process of reading data from the magnetic disk by the read head is executed in parallel with a process of writing the data transferred from the control unit to the magnetic disk by the write head.

The figure which shows an example of the schematic structure of the magnetic disk apparatus which concerns on 1st Embodiment of this invention. The figure which shows the configuration example of the R / W channel and the preamplifier which concerns on the same embodiment. The figure which shows an example of the relationship between the magnetic head and the data recorded on the magnetic disk in the same embodiment. The figure for demonstrating the expansion process of the data area which concerns on this embodiment. The flowchart which shows an example of the expansion process of the data area which concerns on the same embodiment. The figure which shows an example of comparison of the processing which concerns on the same embodiment. The figure which shows an example of the comparison of the processing which concerns on the modification of this embodiment. The figure which shows an example of the schematic structure of the magnetic disk apparatus which concerns on 2nd Embodiment of this invention. The figure which shows the configuration example of the R / W channel and the preamplifier which concerns on the same embodiment. The figure which shows an example of the relationship between the magnetic head and the data recorded on the magnetic disk in the same embodiment. The figure for demonstrating the expansion process of the data area which concerns on this embodiment. The flowchart which shows an example of the expansion process of the data area which concerns on the same embodiment. The figure which shows an example of comparison of the processing which concerns on the same embodiment. The flowchart which shows an example of the expansion process of the data area which concerns on 3rd Embodiment. The figure which shows the configuration example of the R / W channel and the preamplifier which concerns on 4th Embodiment. The figure which shows the configuration example of the R / W channel and the preamplifier which concerns on 5th Embodiment. The figure which shows the configuration example of the R / W channel and the preamplifier which concerns on the same embodiment. The figure which shows the configuration example of the R / W channel and the preamplifier which concerns on the same embodiment.

Hereinafter, embodiments will be described with reference to the drawings. The disclosure is merely an example, and the invention is not limited by the contents described in the following embodiments. Modifications that can be easily conceived by those skilled in the art are naturally included in the scope of disclosure. In order to clarify the explanation, in the drawings, the size, shape, etc. of each part may be changed with respect to the actual embodiment and represented schematically. In a plurality of drawings, the corresponding elements may be given the same reference number and detailed description may be omitted.

(First Embodiment)
FIG. 1 is a diagram showing an example of a schematic configuration of a magnetic disk device 100.
As shown in FIG. 1, the magnetic disk device 100 includes a disk unit 110 and a control unit 130. The disk unit 110 includes a magnetic disk 111, a spindle motor (hereinafter referred to as “SPM”) 112, a magnetic head 113, a voice coil motor (hereinafter referred to as “VCM”) 116, and a preamplifier 117. The magnetic head 113 has a write head 114 and a read head 115. Further, the control unit 130 includes a system-on-chip (hereinafter referred to as “SOC”) 131, a servo combo (hereinafter referred to as “SVC”) 135, and a memory 136. The SOC (control unit) 131 is configured by providing a CPU 132, a hard disk controller (hereinafter referred to as “HDC”) 133, and an R / W (read / write) channel 134 as a processing unit on one chip. The memory 136 includes a ROM 137 and a RAM 138. Further, the preamplifier 117 and the R / W channel 134 are connected by a plurality of signal lines 139 including a power save signal line for setting the active / power save of the signal led by the lead head 115. The active / power save instruction of the power save signal is transmitted from the HDC 133 to the preamplifier 117 via the R / W channel 134.

The magnetic disk 111 has, for example, a substrate formed in a disk shape and made of a non-magnetic material. On each surface of the substrate, a soft magnetic layer made of a material exhibiting soft magnetic properties as a base layer, a magnetic recording layer having magnetic anisotropy in the direction perpendicular to the disk surface, and an upper layer portion thereof. The protective film layer is laminated in the order described. Here, the direction of the magnetic head 113 is the upper layer.

The magnetic disk 111 is fixed to a spindle motor (SPM) 112 and rotated by the SPM 112 at a predetermined speed. The number of magnetic disks 111 is not limited to one, and a plurality of magnetic disks 111 may be installed in the SPM 112. The SPM 112 is driven by a drive current (or drive voltage) supplied from the SVC 135.

The magnetic head 113 includes a slider 113a at its tip, a write head 114 formed on the slider 113a, and a lead head 115 (see: FIG. 3). A plurality of magnetic heads 113 are provided according to the number of magnetic disks 111.

The VCM 116 is rotatably installed with an actuator having a magnetic head 113 at its tip. By rotating the actuator with the VCM 116, the magnetic head 113 is moved and positioned on the desired track of the magnetic disk 111. The VCM116 is driven by a drive current (or drive voltage) supplied by the SVC135.

The preamplifier 117 supplies a light signal (light current) corresponding to the write data supplied from the R / W channel 134 to the light head 114. Further, the preamplifier 117 amplifies the read signal output from the read head 115 and transmits it to the R / W channel 134.

The CPU 132 is the main controller of the magnetic disk device 100, and executes the control of the read / write operation of the disk unit 110 and the servo control necessary for positioning the magnetic head 113.

The R / W channel 134 is a signal processing circuit that processes signals related to read (read) / write (write). The R / W channel 134 includes a read channel that executes signal processing of read data and a write channel that executes signal processing of write data. The R / W channel 134 converts the read signal into digital data and demodulates the read data from the digital data. The R / W channel 134 encodes the write data transferred from the HDC 133 and transfers the encoded write data to the preamplifier 117.

The HDC 133 controls writing data to the magnetic disk 111 via the magnetic head 113, the preamplifier 117, the R / W channel 134, and the CPU 132, and reading data from the magnetic disk 111. The HDC 133 constitutes an interface between the magnetic disk device 100 and the host, and executes transfer control of read data and write data. That is, the HDC 133 functions as a host interface controller that receives the signal transferred from the host and transfers the signal to the host. When the signal is transferred to the host, the HDC 133 executes an error correction process of the data of the reproduced signal read and demodulated by the magnetic head 113 according to the CPU 132. Further, the HDC 133 receives a command (write command, read command, etc.) transferred from the host, and transmits the received command to the CPU 132.

The SVC 135 controls the driving of the SPM 112 and the VCM 116 according to the control of the CPU 132. By driving the SPM 112 and the VCM 116, the magnetic head 113 is positioned on the target track on the magnetic disk 111.

The memory 136 includes a ROM 137 which is a non-volatile memory and a RAM 138 which is a volatile memory. The memory 136 stores programs and parameters required for processing by the CPU 132.

FIG. 2 is a diagram showing an example of the configuration of the R / W channel 134 and the preamplifier 117.
As shown in FIG. 2, the R / W channel 134 includes a demodulation circuit (third circuit) 134a and a recording signal generation circuit (fourth circuit) 134b. Further, the preamplifier 117 includes an amplifier circuit (second circuit) 117a and a recording current generation circuit (first circuit) 117b. The demodulation circuit 134a demodulates the reproduced waveform transferred from the amplifier circuit 117a. The recording signal generation circuit 134b transfers the recording signal to the recording current generation circuit 117b. The amplifier circuit 117a amplifies the signal reproduced by the read head 115 from the magnetic disk 111. The recording current generation circuit 117b generates a recording current for writing data on the magnetic disk 111 by the write head 114. In FIG. 2, the connection lines other than the connection line between the demodulation circuit 134a and the amplifier circuit 117a and the connection line between the recording signal generation circuit 134b and the recording current generation circuit 117b are omitted.

The data read from the magnetic disk 111 by the lead head 115 is transferred as a read signal from the disk unit 110 to the control unit 130 via the amplifier circuit 117a and the demodulation circuit 134a. Further, the write signal is transferred from the control unit 130 to the write head 114 of the disk unit 110 via the recording signal generation circuit 134b and the recording current generation circuit 117b.

Further, the R / W channel 134 and the preamplifier 117 are connected by a power save signal line (see: FIG. 1), and the R / W channel 134 transmits a power save signal to the preamplifier 117 based on the instruction of the CPU 132. You can send it. Further, in the present embodiment, the timing at which the CPU 132 turns on / off the power save signal can be adjusted. Here, the adjustment is to secure a transient time for transitioning from the idle state or the sleep mode to the read mode. For example, the power save signal is negated a predetermined time before the timing of actually asserting the servo gate. That is. In addition, the timing of asserting the power save signal can also be adjusted. Here, the adjustment is to secure a time for acquiring the servo signal waveform to the end, for example, to assert the power save signal after a predetermined time of the timing of actually negating the servo gate. Further, considering that a circuit delay occurs, it is conceivable that the adjustment of the negate timing of the power save signal is set to a predetermined time before the timing of actually asserting the servo gate. Further, the CPU 132 can adjust the timing of negating / asserting the power save signal to coincide with the timing of actually asserting / negating the servo gate. For such adjustment, a plurality of adjustment modes are prepared in advance in the memory 136, and for example, 1 CPU 132 appropriately sets the mode according to the status of the data transferred to the R / W channel 134, and R / The W channel 134 and the preamplifier 117 are controlled.

FIG. 3 is a diagram showing an example of the relationship between the magnetic head 113 and the data recorded on the magnetic disk 111.
As shown in FIG. 3, a slider 113a constituting the tip of the magnetic head 113 is located above the magnetic disk 111. The slider 113a includes a write head 114 and a read head 115. Further, the magnetic disk 111 records data D1 which is user data and servo data D2 for positioning the magnetic head 113 on the magnetic disk 111. The rotation direction of the magnetic disk 111 is on the left side of the drawing as shown by the arrow.

The write head 114 and the lead head 115 are separated from each other by a predetermined distance (hereinafter, also referred to as “head gap”) in the rotation direction of the magnetic disk 111. Therefore, when the expansion processing of the data area described with reference to FIGS. 4 and 5 is not executed, it becomes necessary to end the writing of the data of the write head 114 at the timing when the read head 115 reads the servo data D2. The data area between the head gaps may not be utilized.

Next, the expansion processing of the data area will be described with reference to FIGS. 4 and 5.
FIG. 4 is a diagram for explaining the data area expansion process, and FIG. 5 is a flowchart showing an example of the data area expansion process.

The waveform of the reproduction signal RD, the servo gate signal SG, the write gate signal WG, and the power save signal are shown on the upper side of FIG. The waveform of the reproduction signal RD is a waveform obtained by amplifying the output read from the magnetic disk 111 by the read head 115 by the preamplifier 117. The servo gate signal SG is a signal for specifying a position for reading servo data in order to demodulate the servo signal. The servo gate signal SG is designed to read servo data when it is ON. The write gate signal WG is a signal for specifying a position where data is written on the magnetic disk 111 by the write head 114. When the write gate signal WG is ON, the data is written to the magnetic disk. The power save signal PWR_SAVE is a signal that turns off the amplifier circuit 117a of the preamplifier 117. More specifically, when the power save signal PWR_SAVE is OFF, the amplifier circuit 117a is turned ON, so that the output of the waveform read by the read head 115 is amplified, and the reproduction signal RD is output from the preamplifier 117a. Further, when the power save signal PWR_SAVE is ON, the amplifier circuit 117a is turned OFF, so that the output of the waveform read by the read head 115 is not amplified, and the reproduction signal RD is not output from the preamplifier 117a.

On the lower side of FIG. 4, the slider 113a located at the position P1 schematically shows a state in which the slider 113a is temporally transitioned to the position P2 along the arrow shown in the drawing. The slider 113a located at the position P1 is shown by a broken line, and the slider 113a located at the position P2 is shown by a solid line. Further, the head gap W1 indicates the distance between the write head 114 and the lead head 115.

Next, the operation of the data area expansion processing will be described with reference to FIGS. 4 and 5. The expansion processing of this data area is executed by receiving the instruction of the CPU 132 by the R / W channel 134 and transmitting it from the R / W channel 134 to the preamplifier 117.

As shown in FIG. 5, after the start of data writing (ST1: YES), it is determined whether or not the lead head 115 is located at the servo position to lead the servo data D2 (ST2). When it is determined that the servo is located at the servo position (ST2: YES), the servo gate is asserted and the servo gate signal SG is turned ON (ST3). At this time, the slider 113a is located at the position P1 in FIG. 4, and the lead head 115 is located at the position TC1. The position of the light head 114 is separated by the amount of the head gap W1. Further, the power save signal PWR_SAVE is turned off at the timing when the lead head 115 is located at the position TC1, the amplifier circuit 117a of the preamplifier 117 operates, the output of the waveform read by the read head 115 is amplified, and the output of the waveform read by the preamplifier 115 is amplified and reproduced from the preamplifier 117. The signal RD (that is, servo data) will be output. At this time, since the write gate signal WG remains asserted, the writing of data to the magnetic disk 111 is continued.

The explanation will be continued by returning to FIG. When the servo gate is asserted as described above (ST3), the servo data D2 is read (ST4). Next, if it is determined whether or not the data write is completed (ST5), and if it is determined that the data write is not completed (ST5: NO), the reading of the servo data D2 is continued (ST4), and the data write is continued. If it is determined that is finished (ST5: YES), the light gate is negated. (ST6). At this time, the slider 113a is located at P2 in FIG. 4, the lead head 115 is located at position TC2, and the write head 114 is located at position TC1. Further, since the servo gate is still asserted, the reading of the servo data D2 is continued, but since the write gate is negated, the writing of the data is terminated.

As shown in FIG. 4, the write gate is asserted from the position TC1 to the position TC2 corresponding to the head gap W1, and the servo gate is also asserted. Therefore, the servo data D2 can be read during data writing. Therefore, when the configuration of the present embodiment is not used, the writing of the data is terminated before the position where the servo gate is asserted in order to lead the servo data D2, but in the present embodiment, the head gap W1 The data from the position TC1 to the position TC2 corresponding to the above can be set as a data extension area W2 capable of writing data.

FIG. 6 is a diagram showing an example of comparison between the case where the processing described with reference to FIGS. 4 and 5 is performed (case S12) and the case where the processing is not performed (case S11). The case S11 is shown on the upper side of FIG. 6, and the case S12 is shown on the lower side.

First, the case of case S11 will be described. The write gate is negated at the timing when the position of the lead head 115 becomes the position TC1, and the writing of the data is finished. At this time, the position of the light head 114 is located in front of the head gap W1. As described above, in the case of Case S11, since the data is controlled not to be written and the data is read in parallel, the region of the head gap W1 cannot be used as the data region.

Next, the case of case S12 will be described. At the same time that the power save signal PWR_SAVE is turned off at position TC1, the servo gate is also asserted. As a result, the output of the waveform read by the read head 115 is amplified by the amplifier circuit 117a and output from the preamplifier 117. In the case of case S12, even if the data can be read in this way, the write gate is not negated and the data writing is continued. Then, when the rotation of the magnetic disk 111 progresses and the position of the lead head 115 is located at the position TC2, the write gate is negated and the data writing is terminated. That is, between the position TC1 and the position TC2 corresponding to the head gap W1, the reading of the servo data is executed in parallel during the writing of the data. By doing so, it is possible to make the data extension area W2 from the position TC1 to the position TC2 into which data can be written. As a result, in the case of the case S12, the area of the magnetic disk 111 that cannot be utilized as the data area can be reduced as in the case S11.

As described above, according to the magnetic disk apparatus 100 of the present embodiment, by reading the servo data D2 during data writing, data writing and data reading are performed in parallel at the time of designing the data format. The expansion area W2 can be secured, and the area where data processing can be performed on the magnetic disk 111 can be expanded.

(Modification example)
FIG. 7 describes the operation when the servo data D2 is written to the data expansion area W2 instead of the user data D1. The upper side of FIG. 7 shows the case S12 described above, and the lower side of FIG. 7 shows the case S13 of the present modification.

The case of case S13 will be described. Since the servo data D2 is written to the data expansion area W2, the read is read earlier by the time corresponding to the data expansion area W2 (in other words, the head gap W1) during the data write as compared with the case of the case S12. Start. At this time, the write gate is asserted and the data continues to be written. Then, although the servo gate is asserted, the write gate is negated when the time corresponding to the head gap W1 has elapsed, in other words, when the lead head 115 is located at the position TD2. With this configuration, the magnetic disk device 100 can use the data expansion area W2 as an area for writing servo data in advance. Since the area where the servo data D2 can be written can be increased, the amount of data of the servo data D2 can be increased, or the pitch for writing the data can be sufficiently widened, the magnetic disk apparatus 100 uses the servo. The accuracy of reading the data D2 can be improved.

In the above embodiment, the case where the servo gate signal SG is also turned on at the timing when the power save signal PWR_SAVE is turned off has been described, but the timing is not limited to this. For example, even if the power save signal PWR_SAVE is turned on, a circuit delay or the like occurs, and it is assumed that the amplifier circuit 117a does not operate immediately. Therefore, it is conceivable that the timing of turning off the power save signal PWR_SAVE is earlier than the timing of turning on the servo gate signal SG. When the timing of the power save signal PWR_SAVE is shifted in this way, as shown in FIG. 11 described later, it is assumed that the user data may be read slightly before reading the servo data D2. Such data may be removed by, for example, filtering.

Further, in the above embodiment, the case where the time of the head gap W1 and the time of the data expansion region W2 match has been described, but they do not always match. As shown in FIG. 11, which will be described later, the data expansion region W2 may become long due to a circuit delay or the like.

In the following second embodiment, a mode in which the power save signal PWR_SAVE is turned off earlier than the timing at which the servo gate signal SG is turned on and the data expansion region W2 is lengthened will be described. The reproduction signal RD of the first embodiment corresponds to the reproduction signal (at the time of lighting) shown in FIG. The reproduction signal (at the time of reading) is described for reference in comparison with the time of writing. Further, the following description of the third to fifth embodiments can be applied to the magnetic disk device 100 of the first embodiment and the magnetic disk device 1 described below.

(Second Embodiment)
FIG. 8 is a diagram showing an example of a schematic configuration of the magnetic disk device 1.
As shown in FIG. 8, the magnetic disk device 1 includes a disk unit 10 and a control unit 30. The disk unit 10 includes a magnetic disk 11, a spindle motor (hereinafter referred to as “SPM”) 12, a magnetic head 13, a voice coil motor (hereinafter referred to as “VCM”) 16, and a preamplifier 17. The magnetic head 13 has a write head 14 and a read head 15. Further, the control unit 30 includes a system-on-chip (hereinafter referred to as “SOC”) 31, a servo combo (hereinafter referred to as “SVC”) 35, and a memory 36. The SOC (control unit) 31 is configured by providing a CPU 32, a hard disk controller (hereinafter referred to as “HDC”) 33, and an R / W (read / write) channel 34 as a processing unit on one chip. The memory 36 includes a ROM 37 and a RAM 38. Further, the preamplifier 17 and the R / W channel 34 are connected by a plurality of signal lines 39 including a power save signal line for setting the active / power save of the signal led by the lead head 15. The active / power save instruction of the power save signal is transmitted from the HDC 33 to the preamplifier 17 via the R / W channel 34.

The magnetic disk 11 has, for example, a substrate formed in a disk shape and made of a non-magnetic material. On each surface of the substrate, a soft magnetic layer made of a material exhibiting soft magnetic properties as a base layer, a magnetic recording layer having magnetic anisotropy in the direction perpendicular to the disk surface, and an upper layer portion thereof. The protective film layer is laminated in the order described. Here, the direction of the magnetic head 13 is the upper layer.

The magnetic disk 11 is fixed to the spindle motor (SPM) 12, and is rotated by the SPM 12 at a predetermined speed. The number of magnetic disks 11 is not limited to one, and a plurality of magnetic disks 11 may be installed in the SPM 12. The SPM 12 is driven by the drive current (or drive voltage) supplied from the SVC 35.

The magnetic head 13 includes a slider 13a at its tip, a write head 14 formed on the slider 13a, and a lead head 15 (see: FIG. 10). A plurality of magnetic heads 13 are provided according to the number of magnetic disks 11.

The VCM 16 is rotatably installed with an actuator having a magnetic head 13 at its tip. By rotating the actuator with the VCM 16, the magnetic head 13 is moved and positioned on the desired track of the magnetic disk 11. The VCM 16 is driven by a drive current (or drive voltage) supplied from the SVC 35.

The preamplifier 17 supplies a light signal (light current) corresponding to the write data supplied from the R / W channel 34 to the light head 14. Further, the preamplifier 17 amplifies the read signal output from the read head 15 and transmits it to the R / W channel 34.

The CPU 32 is the main controller of the magnetic disk device 1 and executes servo control necessary for controlling the read / write operation of the disk unit 10 and positioning the magnetic head 13.

The R / W channel 34 is a signal processing circuit that processes signals related to read (read) / write (write). The R / W channel 34 includes a read channel that executes signal processing of read data and a write channel that executes signal processing of write data. The R / W channel 34 converts the read signal into digital data and demodulates the read data from the digital data. The R / W channel 34 encodes the write data transferred from the HDC 33 and transfers the encoded write data to the preamplifier 17.

The HDC 33 controls the writing of data to the magnetic disk 11 via the magnetic head 13, the preamplifier 17, the R / W channel 34, and the CPU 32, and the reading of data from the magnetic disk 11. The HDC 33 constitutes an interface between the magnetic disk device 1 and the host, and executes transfer control of read data and write data. That is, the HDC 33 functions as a host interface controller that receives the signal transferred from the host and transfers the signal to the host. When the signal is transferred to the host, the HDC 33 executes an error correction process of the data of the reproduced signal read and demodulated by the magnetic head 13 according to the CPU 32. Further, the HDC 33 receives a command (write command, read command, etc.) transferred from the host, and transmits the received command to the CPU 32.

The SVC 35 controls the drive of the SPM 12 and the VCM 16 according to the control of the CPU 32. By driving the SPM 12 and the VCM 16, the magnetic head 13 is positioned on the target track on the magnetic disk 11.

The memory 36 includes a ROM 37 which is a non-volatile memory and a RAM 38 which is a volatile memory. The memory 36 stores programs and parameters required for processing by the CPU 32.

FIG. 9 is a diagram showing an example of the configuration of the R / W channel 34 and the preamplifier 17.
As shown in FIG. 9, the R / W channel 34 includes a demodulation circuit (third circuit) 34a and a recording signal generation circuit (fourth circuit) 34b. Further, the preamplifier 17 includes an amplifier circuit (second circuit) 17a and a recording current generation circuit (first circuit) 17b. The demodulation circuit 34a demodulates the reproduced waveform transferred from the amplifier circuit 17a. The recording signal generation circuit 34b transfers the recording signal to the recording current generation circuit 17b. The amplifier circuit 17a amplifies the signal reproduced by the read head 15 from the magnetic disk 11. The recording current generation circuit 17b generates a recording current for writing data on the magnetic disk 11 by the write head 14. In FIG. 9, the connection lines other than the connection line between the demodulation circuit 34a and the amplifier circuit 17a and the connection line between the recording signal generation circuit 34b and the recording current generation circuit 17b are omitted.

The data read from the magnetic disk 11 by the lead head 15 is transferred as a read signal from the disk unit 10 to the control unit 30 via the amplifier circuit 17a and the demodulation circuit 34a. Further, the write signal is transferred from the control unit 30 to the write head 14 of the disk unit 10 via the recording signal generation circuit 34b and the recording current generation circuit 17b.

Further, the R / W channel 34 and the preamplifier 17 are connected by a power save signal line (see: FIG. 8), and the R / W channel 34 sends a power save signal to the preamplifier 17 based on the instruction of the CPU 32. You can send it. Further, in the present embodiment, the timing at which the CPU 32 turns on / off the power save signal can be adjusted. Here, the adjustment is to secure a transient time for transitioning from the idle state or the sleep mode to the read mode. For example, the power save signal is negated a predetermined time before the timing of actually asserting the servo gate. That is. In addition, the timing of asserting the power save signal can also be adjusted. Here, the adjustment is to secure a time for acquiring the servo signal waveform to the end, for example, to assert the power save signal after a predetermined time of the timing of actually negating the servo gate. Further, considering that a circuit delay occurs, it is conceivable that the adjustment of the negate timing of the power save signal is set to a predetermined time before the timing of actually asserting the servo gate. Further, the CPU 32 can make the adjustment of the timing of negating / asserting the power save signal coincide with the timing of actually asserting / negating the servo gate. For such adjustment, a plurality of adjustment modes are prepared in advance in the memory 36, and for example, the CPU 32 appropriately sets the mode according to the status of the data to be transferred to the R / W channel 34, and R / The W channel 34 and the preamplifier 17 are controlled.

FIG. 10 is a diagram showing an example of the relationship between the magnetic head 13 and the data recorded on the magnetic disk 11.
As shown in FIG. 10, a slider 13a constituting the tip of the magnetic head 13 is located above the magnetic disk 11. The slider 13a includes a write head 14 and a lead head 15. Further, the magnetic disk 11 records data D1 which is user data and servo data D2 for positioning the magnetic head 13 on the magnetic disk 11. The rotation direction of the magnetic disk 11 is on the left side of the drawing as shown by the arrow.

The write head 14 and the lead head 15 are separated from each other by a predetermined distance (hereinafter, also referred to as “head gap”). Therefore, when the expansion processing of the data area described with reference to FIGS. 11 and 12 is not executed, it becomes necessary to end the writing of the data of the write head 14 at the timing when the read head 15 reads the servo data D2. The data area between the head gaps may not be utilized.

Next, the expansion processing of the data area will be described with reference to FIGS. 11 and 12.
FIG. 11 is a diagram for explaining the data area expansion process, and FIG. 12 is a flowchart showing an example of the data area expansion process.

FIG. 11 shows a waveform of a reproduction signal (at the time of writing), a waveform of a reproduction signal (at the time of reading), a servo gate signal SG, a write gate signal WG, and a PWR_SAVE signal which is a signal for negating / asserting power save. The waveform of the reproduced signal is a waveform obtained by amplifying the output reproduced by the read head 15 by the preamplifier 17. The servo gate signal SG is a signal for specifying the servo position in order to demodulate the servo signal. The light gate signal WG is a signal for specifying a position where data is written by the light head 14. The power save signal PWR_SAVE is a signal that turns off the amplifier circuit 17a of the preamplifier 17. Further, FIG. 11 schematically shows a state in which the slider 13a located at the position P1 has moved to the position P2 along the arrow shown in the drawing. The slider 13a located at the position P1 is shown by a broken line, and the slider 13a located at the position P2 is shown by a solid line. Further, the head gap W1 indicates the distance between the write head 14 and the lead head 15.

Next, the operation of the data area expansion processing will be described with reference to FIGS. 11 and 12. The expansion processing of this data area is executed by receiving the instruction of the CPU 32 by the R / W channel 34 and transmitting it from the R / W channel 34 to the preamplifier 17.

After the start of data writing (ST101: YES), it is determined whether or not the lead head 15 is located at the servo position where the servo data D2 is read (ST102). When it is determined that the servo is located at the servo position (ST102: YES), the servo gate is asserted and the servo gate signal SG is turned ON (ST103). At this time, the slider 13a is located at the position P1 in FIG. 11, the lead head 15 is located at the position TA1, and the position of the write head 14 is located at the position TA2. Since the power save signal PWR_SAVE is negated, the read signal is output, and when the servo gate signal SG is turned ON, the servo data D2 can be read. At this time, since the write gate signal WG remains asserted, the data writing is continued.

When the servo gate is asserted as described above (ST103), the servo data D2 is read (ST104). Next, if it is determined whether or not the data write is completed (ST105), and if it is determined that the data write is not completed (ST105: NO), the reading of the servo data D2 is continued (ST104), and the data write is continued. If it is determined that is complete (ST105: YES), the light gate is negated. (ST106). At this time, the slider 13a is located at P2 in FIG. 11, the lead head 15 is located at position TB1, and the write head 14 is located at position TB2. At this time, since the servo gate is still asserted, the reading of the servo data D2 is continued, but since the write gate is negated, the writing of the data is terminated.

As described above, the write gate is asserted from the position TA1 to the position TB1, and the servo gate is also asserted. Therefore, the servo data D2 can be read during data writing. Therefore, when the configuration of the present embodiment is not used, the write is terminated at a position (between the position TA1 and the position TB2) before the position where the servo gate is asserted in order to lead the servo data D2. In the present embodiment, the data expansion area W2 can be set from the position to the position where the light ends (position TB1).

FIG. 13 is a diagram showing an example of comparison between the case where the processing described with reference to FIGS. 11 and 12 is performed (case S2) and the case where the processing is not performed (case S1). The case S1 is shown on the upper side of FIG. 13, and the case S2 is shown on the lower side.

First, the case of case S1 will be described. The write gate is negated at the position of the lead head 15 at the position T2, and the write is terminated. At this time, the position of the light head 14 is at the position T1. In this way, since data writing and data reading are controlled so as not to be performed in parallel, an area that cannot be used as a data area occurs.

Next, the case of case S2 will be described. After the power save signal PWR_SAVE is turned off at position T1 and data can be read, the position of the read head 15 does not negate the write gate in the vicinity of position T2, and data writing is continued. Then, the servo gate is asserted from the time when the position of the lead head 15 is the position T3, and the reading of the servo data D2 is started. At this time as well, the data writing is not terminated, and when the write head 14 is located at the position T4, the write gate is negated and the data writing is terminated. That is, between the position T3 and the position T4, the servo data is read in parallel during the data writing. By doing so, the data expansion area W2 from the position T2 to the position T4 can be provided, and the area that cannot be utilized as the data area can be reduced as in case S1.

As described above, according to the magnetic disk apparatus 1 of the present embodiment, by reading the servo data D2 during data writing, data writing and data reading are performed in parallel at the time of designing the data format. The expansion area W2 can be secured, and the area where data processing can be performed on the magnetic disk 11 can be expanded.

(Third Embodiment)
The third embodiment is different from the first and second embodiments in that a process is added when the servo data cannot be read. The same configurations as those in the second embodiment are designated by the same reference numerals, and detailed description of these configurations will be omitted.

FIG. 14 is a flowchart showing an example of the data area expansion process. Since the processes of steps ST101 to ST106 are the same as those of the first embodiment, the added processes of steps ST201 to ST204 will be described. It should be noted that the R / W channel 34 receives the instruction of the CPU 32, transmits it from the R / W channel 34 to the preamplifier 17, and executes the process, as in the first embodiment.

When the process of step ST104 is completed, it is determined whether or not the servo data D2 can be read (ST201). If the servo data D2 cannot be read (ST201: NO), that is, if the servo data D2 can be read, the process proceeds to step ST105, and the above-described process is executed.

Further, when the servo data D2 cannot be read (ST201: YES), it is determined whether or not the write retry is performed (ST202). If it is determined that the write retry is not performed (ST202: NO), the process proceeds to step ST105, and the above-described process is executed.

On the other hand, when it is determined that the write retry is performed (ST202: YES), the retry mode for writing is set based on the previous servo data (ST203), and the data write is retried (ST204). Then, the process of step ST106 is executed. As a result, the magnetic disk device 1 can execute the write process even when the servo data D2 cannot be read. If data is read when writing data, the data on the write head 14 and the data on the read head 15 are read at the same time, so noise may be added to the servo signal and the data is written. However, by retrying the data write, the magnetic disk device 1 can surely execute the data write.

(Fourth Embodiment)
The fourth embodiment is different from the first and second embodiments in that a bandpass filter circuit is provided in the demodulation circuit 34a and the amplifier circuit 17a. The same configurations as those in the second embodiment are designated by the same reference numerals, and detailed description of these configurations will be omitted.

FIG. 15 is a diagram schematically showing an example of the configuration of the R / W channel 34 and the preamplifier 17. A bandpass filter setting circuit 51 is provided in the demodulation circuit 34a of the R / W channel 34, and a bandpass filter setting circuit 52 is provided in the amplifier circuit 17a of the preamplifier 17. In the present embodiment, the case where both the R / W channel 34 and the preamplifier 17 include the bandpass filter setting circuits 51 and 52 has been described, but it may be provided in either the / W channel 34 or the preamplifier 17. Good.

The bandpass filter setting circuits 51 and 52 are designed to pass frequencies in a predetermined range, respectively. The predetermined range can be set by, for example, the CPU 32. By setting the frequency in a predetermined range, the bandpass filter setting circuits 51 and 52 can be both a high-pass filter and a low-pass filter. Further, in the present embodiment, the bandpass filter setting circuits 51 and 52 receive the servo gate assert / negate instruction and the write gate negate instruction from the CPU 32 via the R / W channel 34, and the write head. It is configured to be active while the write of 14 data and the read of data of the read head 15 are executed simultaneously (in other words, during the data expansion area W2 described above).

With this configuration, the signals read by the demodulation circuit 34a and the amplifier circuit 17a can be filtered, so that the write of the data of the write head 14 and the read of the data of the read head 15 are executed at the same time. Unnecessary noise that may be removed can be removed to obtain a highly accurate lead signal.

(Fifth Embodiment)
The fifth prison sentence is different from the first and second embodiments in that a cancel circuit is provided in the R / W channel 34 and the preamplifier 17, or in any of the R / W channel 34 and the preamplifier 17. The same configurations as those in the second embodiment are designated by the same reference numerals, and detailed description of these configurations will be omitted.

FIG. 16 is a diagram schematically showing an example of the configuration of the R / W channel 34 and the preamplifier 17. The R / W channel 34 is provided with a cancel (recording signal invert) circuit 34c, and the preamplifier 17 is provided with a cancel (recording signal invert) circuit 17c. Further, the recording signal generation circuit 34b can output a signal to the cancel (recording signal invert) circuit 34c, and the cancel (recording signal invert) circuit 34c can output a signal to the demodulation circuit 34a. .. Further, the recording current generation circuit 17b can output a signal to the cancel (recording signal invert) circuit 17c, and the cancel (recording signal invert) circuit 17c can output a signal to the amplifier circuit 17a. ..

The cancel (recorded signal invert) circuit 34c and the cancel (recorded signal invert) circuit 17c perform a process of canceling the waveform of the light data which is a noise source based on the output and frequency of the invert waveform of the write data input from the SOC 31. .. As a result, unnecessary noise that may be generated when the data write of the write head 14 and the data read of the read head 15 are executed at the same time can be removed, and a highly accurate read signal can be obtained.

Further, in FIG. 16, the case where the cancel (recording signal invert) circuit 34c is provided in the R / W channel 34 and the cancel (recording signal invert) circuit 17c is provided in the preamplifier 17 has been described, but the arrangement of the cancel circuit is limited to this. is not. For example, as shown in FIG. 17, instead of providing a cancel circuit in the preamplifier 17, a cancel (recording signal invert) circuit 34d is provided in the R / W channel 34, and the cancel (recording signal invert) circuit 34d is used with respect to the demodulation circuit 34a. The process of canceling the waveform of the write data may be performed. Further, as shown in FIG. 18, the cancel (recording signal invert) circuit 34e is provided in the preamplifier 17 without providing the cancel circuit in the R / W channel 34, and the cancel (recording signal invert) circuit 34e to the amplifier circuit 17a is provided. The process of canceling the waveform of the write data may be performed.

In each of the above embodiments, the case where the servo data D2 is read during data writing has been described, but the present invention is not limited to this. It is possible to apply the expansion processing of the data area of the above embodiment even when reading data such as user data during data writing.

Further, in the magnetic disk device, the servo gate is asserted during the generation of the write data in order to prevent the write of the data of the write head 14 and the read of the data of the read head 15 from being executed at the same time. In some cases, it may have a configuration that causes a gate fault. In such a configuration, when the magnetic disk device reads while writing data, by stopping the control as a gate fault, the data write of the write head 14 and the data of the read head 15 are read. It can be possible to execute with the lead at the same time. For example, when the CPU 32 reads data during writing, the magnetic disk apparatus performs data during writing of data by executing a process of stopping control that causes a gate fault for a certain period of time after the servo gate is asserted. Can lead to.

Although some embodiments of the present invention have been described, these embodiments are presented as examples and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other embodiments, and various omissions, replacements, and changes can be made without departing from the gist of the invention. These embodiments and modifications thereof are included in the scope and gist of the invention, and are also included in the scope of the invention described in the claims and the equivalent scope thereof.

1,100 ... Magnetic disk device, 10,110 ... Disk section, 11,111 ... Magnetic disk, 13,113 ... Magnetic head, 14,114 ... Write head, 15,115 ... Lead head, 17,117 ... Preamplifier, 17a , 117a ... Amplifier circuit, 17b, 117b ... Recording current generation circuit, 17c, 117c ... Cancel circuit, 30,130 ... Control unit, 31,131 ... SOC, 32,132 ... CPU, 34,134 ... R / W channel, 34a, 134a ... Demodulation circuit, 34b, 134b ... Recording signal generation circuit, 34c, 34d ... Cancel circuit, 35 ... SVC, 51, 52 ... Band path filter setting circuit, W1 ... Head gap, W2 ... Data expansion area

Claims (8)

Magnetic disk equipment
A magnetic head including a magnetic disk, a write head, and a read head arranged at a predetermined distance from the light head in the rotation direction of the magnetic disk, and a recording current for writing data to the magnetic disk by the write head are generated. A magnetic disk unit having a first circuit and a preamplifier having a second circuit for amplifying a signal reproduced by the read head from the magnetic disk.
The preamplifier includes a processing unit that executes a process of generating a recording current that the write head writes to the magnetic disk and a process of receiving the output reproduced by the read head from the magnetic disk. A control unit that controls the magnetic disk unit and
With
In the preamplifier, a process of reading data from the magnetic disk by the read head is executed in parallel with a process of writing the data transferred from the control unit to the magnetic disk by the write head.
Magnetic disk device. When the servo data cannot be read, the control unit retries the write of the data based on the previously read servo data.
The magnetic disk apparatus according to claim 1. During the assertion of the first circuit, the second circuit is asserted based on the instruction from the control unit.
The magnetic disk apparatus according to claim 1 or 2. The timing of asserting / negating the first circuit is adjusted based on the instruction from the control unit.
The magnetic disk apparatus according to claim 3. The second circuit includes a bandpass filter circuit that passes frequencies in a predetermined range.
The magnetic disk apparatus according to claim 3 or 4. The preamplifier includes a cancel circuit that cancels the output of the invert waveform of the data to be written input from the control unit and the waveform of the read data based on the frequency.
The magnetic disk apparatus according to any one of claims 1 to 5. The processing unit
A read / write channel having a third circuit that transfers a recorded signal to the first circuit and a fourth circuit that demodulates a reproduced waveform transferred from the second circuit is provided.
During the assertion of the third circuit, the fourth circuit is asserted based on the instruction from the control unit.
The magnetic disk apparatus according to any one of claims 1 to 6. Magnetic disk equipment
A magnetic head including a magnetic disk, a write head, and a read head arranged at a predetermined distance from the light head in the rotation direction of the magnetic disk, and a first circuit for generating a recording current on the magnetic disk by the write head. A magnetic disk unit having a second circuit that amplifies the output reproduced by the read head from the magnetic disk, and a magnetic disk unit having a second circuit.
The preamplifier includes a processing unit that executes a process of generating a current recorded by the write head on the magnetic disk and a process of receiving the output reproduced by the read head from the magnetic disk of the read head. A control unit that controls the magnetic disk unit and
A power save signal line that is connected to the preamplifier and the control unit and sets the active / power save of the output reproduced by the lead head.
With
In parallel with the process of generating the current to be recorded on the magnetic disk, the signal reproduced by the lead head is activated based on the instruction via the power save signal line.
Magnetic disk device.

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