JP2020136084A - Electronic device - Google Patents

Abstract

To provide an electronic device capable of improving reliability of wiring.SOLUTION: The electronic device includes: a substrate having an element region and a peripheral region surrounding the element region; a laminated insulating film, having an inorganic insulating film and an organic insulating film on the substrate in this order, having a groove penetrating the inorganic insulating film and the organic insulating film in the peripheral region, and having a distance from the groove to a second end surface of the organic insulating film toward the groove, different from a distance from the groove to a first end surface of the inorganic insulating film toward the groove; and a conductive layer provided on the laminated insulating film and covering an inner wall surface and a bottom surface of the groove.SELECTED DRAWING: Figure 4

Description

The present technology relates to electronic devices having electrodes on a substrate.

In an organic EL (Electro Luminescence) display device, a plurality of organic EL elements are provided in a display area of a substrate. The organic EL element has, for example, a thin film transistor (see, for example, Patent Document 1 and Patent Document 2). Further, the organic EL display device has an organic layer between the first electrode and the second electrode (see, for example, Patent Document 2).

JP-A-2017-168642 JP-A-2017-168308

In electronic devices such as organic EL display devices, it is desired to improve the reliability of wiring.

Therefore, it is desirable to provide an electronic device capable of increasing the reliability of wiring.

The electronic device (1) according to the embodiment of the present technology has a substrate having an element region and a peripheral region surrounding the element region, and has an inorganic insulating film and an organic insulating film on the substrate in this order and peripherals. The region has a groove that penetrates the inorganic insulating film and the organic insulating film, and the distance from the groove to the first end face toward the groove of the inorganic insulating film and from the groove to the second end face toward the groove of the organic insulating film. It is provided with a laminated insulating film having a different distance from the above, and a conductive layer provided on the laminated insulating film and covering the inner wall surface and the bottom surface of the groove.

In the electronic device (1) according to the embodiment of the present technology, the distance from the groove to the first end face toward the groove of the inorganic insulating film and the distance from the groove to the second end face toward the groove of the organic insulating film are different. It is configured as follows. As a result, the inclination of the inner wall surface of the groove becomes gentler than when the distance from the groove to the first end face toward the groove of the inorganic insulating film and the distance from the groove toward the groove of the organic insulating film are the same. ..

The electronic device (2) according to another embodiment of the present technology is provided on a substrate having an element region and a peripheral region surrounding the element region, and an inorganic insulating having a through groove in the peripheral region. It is provided with a film and a conductive layer that is in contact with the inorganic insulating film in the vicinity of the through groove and covers the inner wall surface and the bottom surface of the through groove.

In the electronic device (2) according to another embodiment of the present technology, the conductive layer is in contact with the inorganic insulating film in the vicinity of the through groove, and the conductive layer covers the inner wall surface and the bottom surface of the through groove. That is, since the organic insulating film is not provided on the inorganic insulating film in the vicinity of the through groove, the influence of the organic insulating film on the conductive layer can be suppressed.

According to the electronic device (1) according to the embodiment of the present technology, since the inclination of the inner wall surface of the groove portion is made gentle, the surface of the second end surface (end surface of the organic insulating film) constituting the inner wall surface. It is possible to suppress the increase in roughness, thereby suppressing the occurrence of short circuits in the conductive layer covering the inner wall surface and improving the reliability of the wiring.

Further, according to the electronic device (2) according to another embodiment of the present technology, since the organic insulating film is not provided in the vicinity of the through groove, the conductive layer has a relatively rough surface in the through groove. It can cover the end face of a small inorganic insulating film. Therefore, it is possible to reduce the occurrence of short circuit of the conductive layer covering the inner wall surface of the through groove and improve the reliability of the wiring. The effects described here are not necessarily limited, and may be any of the effects described in the present disclosure.

It is a plan schematic diagram which shows the schematic structure of the display device which concerns on 1st Embodiment of this disclosure. It is a block diagram which shows the whole structure of the display device shown in FIG. It is a schematic diagram which shows the arrangement of the pixel shown in FIG. It is a schematic diagram which shows the cross-sectional structure along the IV-IV'line shown in FIG. It is a schematic diagram which shows the cross-sectional structure of the 2nd groove shown in FIG. It is a perspective view which shows the structure of the 2nd groove shown in FIG. It is a flow chart which shows the manufacturing method of the display device shown in FIG. 4 in the order of a process. It is a schematic diagram which shows the cross-sectional structure of the 2nd groove of the display device which concerns on a comparative example. It is a schematic diagram which shows the cross-sectional structure of the 2nd groove of the display device which concerns on modification 1. FIG. It is a schematic diagram which shows the cross-sectional structure of the display device which concerns on 2nd Embodiment of this disclosure. It is a schematic diagram which shows the cross-sectional structure of the main part of the display device shown in FIG. It is a schematic diagram which shows the cross-sectional structure of the 2nd groove shown in FIG. It is a schematic diagram which shows the cross-sectional structure of the display device which concerns on modification 2. It is a schematic diagram which shows the cross-sectional structure of the display device shown in FIG. It is a schematic diagram which shows the cross-sectional structure of the display device which concerns on modification 3. It is a block diagram which shows the schematic configuration example of the display device shown in FIG. It is a block diagram which shows the schematic configuration example of the image pickup apparatus as an electronic device of this technology. FIG. 5 is a block diagram showing an application example to an electronic device provided with the display device shown in FIG. 16 or the imaging device shown in FIG.

Hereinafter, embodiments of the present technology will be described in detail with reference to the drawings. The explanation will be given in the following order.
1. 1. 1st Embodiment (Display device in which the distance from the second groove to the end face of the inorganic insulating film is larger than the distance from the groove to the second end face of the organic insulating film)
2. 2. Modification 1 (Example in which the distance from the second groove to the end face of the inorganic insulating film is smaller than the distance from the groove to the second end face of the organic insulating film)
3. 3. Second embodiment (display device in which an organic insulating film is not provided below the second conductive layer in the peripheral region)
4. Modification 2 (Example in which the organic insulating film is not provided below the second conductive layer in the display region and the peripheral region)
5. Modification 3 (Example in which an organic insulating film above the second conductive layer is provided in the vicinity of the second conductive layer in the peripheral region)
6. Application example

<First Embodiment>
[Configuration of display device 1]
FIG. 1 schematically shows an overall configuration of a display device (display device 1) according to the first embodiment of the present disclosure. The display device 1 is, for example, an organic EL display using an organic electroluminescent element, and for example, light of any color of R (red), G (green), or B (blue) is emitted from the upper surface side. , Top emission type (top emission type) display device. The display device 1 has a central display area 1X (element area) and a peripheral area 1Y outside the display area 1X. The display area 1X has, for example, a quadrangular shape. The peripheral area 1Y is provided in a frame shape so as to surround the display area 1X.

The display device 1 has a first substrate 11 and a second substrate 31 provided so as to face each other. A display area 1X and a peripheral area 1Y are provided on the first substrate 11. The peripheral region 1Y is provided with an annular second groove G2 (described later) at a position separated from the display region 1X. The second substrate 31 is provided in a region including the display region 1X and the peripheral region 1Y on the outer periphery thereof up to the second groove G2.

FIG. 2 shows an example of the functional configuration of the display area 1X and the peripheral area 1Y. The display area 1X has a plurality of pixels pr, pg, and pb arranged two-dimensionally. An image is displayed in the display area 1X based on a video signal input from the outside, for example, by an active matrix method. The peripheral region 1Y is provided with, for example, a circuit unit (scanning line driving unit 3, signal line driving unit 4, and power supply line driving unit 5) for driving the display area 1X. From the display area 1X to the peripheral area 1Y, for example, a plurality of scanning lines WSL extending along the row direction of the pixel array, a plurality of signal lines DTL extending along the column direction, and a plurality of signal lines DTL extending along the row direction. A plurality of existing power line DSLs are provided. Each pixel pr, pg, pb is electrically connected to the scanning line driving unit 3 via the scanning line WSL, to the signal line driving unit 4 via the signal line DTL, and to the power supply line driving unit 5 via the power supply line DSL. It is connected to the. Each of the pixels pr, pg, and pb corresponds to, for example, a sub-pixel, and a set of these pixels pr, pg, and pb constitutes one pixel (pixel Pix).

FIG. 3 shows an example of the planar configuration of the pixel Pix (pixel pr, pg, pb) shown in FIG. Each surface shape of the pixels pr, pg, and pb has, for example, a rectangular shape, and is arranged in a striped shape as a whole. In the direction along the rectangular long side of the pixels pr, pg, and pb (column direction in FIG. 3), pixels of the same emission color are arranged side by side. The pixel pr is for displaying red (R), the pixel pg is for displaying, for example, green (G), and the pixel pb is for displaying, for example, blue (B). Each of these pixels pr, pg, and pb has a pixel circuit PXLC including an organic EL element 20 (FIG. 2).

In the following, when it is not necessary to distinguish each of the pixels pr, pg, and pb, they will be referred to as "pixels P".

The pixel circuit PXLC controls light emission and quenching in each pixel pr, pg, and pb, and includes, for example, an organic EL element (display element) 10, a holding capacitance Cs, a writing transistor WsTr, and a driving transistor DsTr. It is composed of. Here, the circuit configuration of 2Tr1C is illustrated as the pixel circuit PXLC, but the configuration of the pixel circuit PXLC is not limited to this. The pixel circuit PXLC may have a circuit configuration in which various capacitances, transistors, and the like are further added to the 2Tr1C circuit.

The write transistor WsTr controls the application of a video signal (signal voltage) to the gate electrode of the drive transistor DsTr. Specifically, the write transistor WsTr samples the voltage (signal voltage) of the signal line DTL according to the voltage applied to the scanning line WSL, and writes the signal voltage to the gate electrode of the drive transistor DsTr. The drive transistor DsTr is connected in series with the organic EL element 20, and controls the current flowing through the organic EL element 20 according to the magnitude of the signal voltage sampled by the write transistor WsTr. These drive transistor DsTr and write transistor WsTr are formed by, for example, an n-channel MOS type or p-channel MOS type thin film transistor (TFT). These drive transistor DsTr and write transistor WsTr may also be of a single gate type or a dual gate type. The holding capacitance Cs holds a predetermined voltage between the gate electrode and the source electrode of the drive transistor DsTr.

The gate electrode of the write transistor WsTr is connected to the scanning line WSL. One of the source electrode and the drain electrode of the write transistor WsTr is connected to the signal line DTL, and the other electrode is connected to the gate electrode of the drive transistor DsTr. One of the source electrode and the drain electrode of the drive transistor DsTr is connected to the power supply line DSL, and the other electrode is connected to the anode of the organic EL element 20 (the first electrode 21 described later). The holding capacitance Cs is inserted between the gate electrode of the drive transistor DsTr and the electrode on the organic EL element 20 side.

The scanning line WSL is for supplying each pixel P with a selection pulse for selecting a plurality of pixels P arranged in the display area 1X line by line. The scanning line WSL is connected to an output end (not shown) of the scanning line driving unit 3 and a gate electrode of a writing transistor WsTr described later. The signal line DTL is for supplying signal pulses (signal potential Vsig and reference potential Vofs) corresponding to the video signal to each pixel P. This signal line DTL is connected to the output end (not shown) of the signal line drive unit 4 and the source electrode or drain electrode of the write transistor WsTr described later. The power line DSL is for supplying a fixed potential (Vcc) as electric power to each pixel P. This power supply line DSL is connected to the output end (not shown) of the power supply line drive unit 5 and the source electrode or drain electrode of the drive transistor DsTr described later. The cathode of the organic EL element 20 (second electrode 24 described later) is connected to a common potential line (cathode line).

The scanning line driving unit 3 outputs a predetermined selection pulse to each scanning line WSL in line sequence to perform each operation such as anode reset, Vth correction, signal potential Vsig writing, mobility correction, and light emission operation. Each pixel P is made to execute at a predetermined timing. The signal line driving unit 4 generates an analog video signal corresponding to a digital video signal input from the outside and outputs the analog video signal to each signal line DTL. The power supply line drive unit 5 outputs a constant potential to each power supply line DSL. The scanning line driving unit 3, the signal line driving unit 4, and the power supply line driving unit 5 are controlled so as to operate in conjunction with each other by a timing control signal output by a timing control unit (not shown). Further, the digital video signal input from the outside is corrected by a video signal receiving unit (not shown) and then input to the signal line driving unit 4.

The specific configuration of the display device 1 will be described below.

FIG. 4 schematically shows a cross-sectional configuration from the display region 1X to the peripheral region 1Y of the display device 1, and corresponds to the cross-sectional configuration along the IV-IV'line shown in FIG. In the display device 1, a plurality of organic EL elements 20 are sealed between the first substrate 11 (substrate) and the second substrate 31 that face each other. On the first substrate 11, the first conductive layer 12 (gate electrode), the passivation film 13, the first organic insulating film 14, the second conductive layer 15, and the second organic insulating film 16 (flattening film) are arranged in this order. It is provided. The organic EL element 20 is provided on the second organic insulating film 16 and has a first electrode 21, an organic layer 23 (functional layer), and a second electrode 24 from a position close to the second organic insulating film 16. .. An element separation membrane 22 is provided between adjacent organic EL elements 20. For example, a protective film 25 is provided on the organic EL element 20, and a second substrate 31 is bonded onto the protective film 25 via a packing layer 33. A sealing portion 34 is provided on the peripheral edge of the second substrate 31, and the organic EL element 20 is sealed between the first substrate 11 and the second substrate 31.

The first substrate 11 is a specific example of the "board" of the present disclosure. The first substrate 11 is made of, for example, glass, quartz, silicon, a resin material, a metal plate, or the like. Examples of the resin material include PET (polyethylene terephthalate), PI (polyimide), PC (polycarbonate), PEN (polyethylene naphthalate) and the like.

The first conductive layer 12 on the first substrate 11 is a conductive layer that is the same layer as the conductive layer that constitutes the gate electrode of the thin film transistor, or a conductive layer that constitutes the gate electrode. In the case of a conductive layer constituting the gate electrode, for example, a semiconductor layer (not shown) such as a transparent amorphous oxide semiconductor (TAOS: Transparent Amorphous Oxide Semiconductor) layer is provided in the lower layer via a gate insulating film (not shown). , A thin film in which the first conductive layer 12 is a gate electrode is configured. In the display region 1X, the thin film transistor is a transistor such as a drive transistor DsTr and a write transistor WsTr that constitute the pixel circuit PXLC (FIG. 2), and constitutes a drive circuit unit provided with the pixel circuit PXLC. Further, the thin film transistor constitutes a peripheral circuit unit provided with a scanning line driving unit 3, a signal line driving unit 4, and a power supply line driving unit 5 in the peripheral region 1Y. The first conductive layer 12 is provided with a scanning line WSL, a signal line DTL, and a power supply line DSL, which extend from the display area 1X to the peripheral area 1Y.

A UC (Under Coat) film may be provided between the first substrate 11 and the semiconductor layer (not shown). The UC film is for preventing substances such as sodium ions from moving from the first substrate 11 to the upper layer, and is composed of an insulating material such as a silicon nitride (SiN) film and a silicon oxide (SiO ₂ ) film. Has been done.

The passivation film 13 covering the first conductive layer 12 is provided over the display region 1X and the peripheral region 1Y. The passivation film 13 is a specific example of the "inorganic insulating film" of the present disclosure. The thickness of the passivation film 13 is, for example, 10 nm to 500 nm. The passivation film 13 is composed of an inorganic insulating film such as a SiO ₂ film. As the passivation film 13, a SiN film, a silicon nitride (SiON) film, a titanium oxide (TiO ₂ ) film, an aluminum oxide (Al ₂ O ₃ ) film, or the like may be used, and these may be laminated and used. It may be. For example, a laminate of Al ₂ O ₃ / SiO ₂ / n + Al ₂ O ₃ can be used. By adjusting the film thickness and the like of each layer of Al ₂ O ₃ / SiO ₂ / n + Al ₂ O ₃ , hydrogen is suppressed from diffusing from the layer above the passivation film 13 (for example, the protective film 25, etc.). As a result, it is possible to suppress fluctuations in the Voff characteristics of the transistor in the peripheral region 1Y.

The first organic insulating film 14 covers the first conductive layer 12 with the passivation film 13 in between. The first organic insulating film 14 is a specific example of the "organic insulating film" of the present disclosure. The thickness of the first organic insulating film 14 is, for example, 1 μm to 10 μm. For the first organic insulating film 14, for example, a polyimide resin film can be used. An epoxy resin, a novolak resin, an acrylic resin, or the like may be used for the first organic insulating film 14.

The first organic insulating film 14 is provided over the display region 1X and the peripheral region 1Y. The first organic insulating film 14 is provided with a first groove G1 in the vicinity of the peripheral edge of the display region 1X in the peripheral region 1Y. The width of the first groove G1 (for example, the size in the X direction in FIG. 4) is preferably 1 μm or more, and is, for example, 1 μm to 2000 μm. The first groove G1 penetrates, for example, the first organic insulating film 14 and the passivation film 13 and reaches the first conductive layer 12. The second electrode 24 is electrically connected to the first conductive layer 12 via the third conductive layer 17 (described later) and the second conductive layer 15 by the first groove G1.

Further, the first organic insulating film 14 is provided with a second groove G2 outside the first groove 14G in the peripheral region 1Y. The second groove G2 is a specific example of the "groove portion" of the present disclosure. The width of the second groove G2 is preferably 1 μm or more, for example, 1 μm to 2000 μm. The second groove G2 penetrates the first organic insulating film 14 and the passivation film 13.

The second conductive layer 15 covers the inner wall surface and bottom surface of the first groove G1 and the inner wall surface and bottom surface of the second groove G2, and is formed on the upper layer of the first organic insulating film 14. The second conductive layer 15 is a specific example of the "conductive layer" of the present disclosure. The second conductive layer 15 is a conductive layer of the same layer as the wiring connected to the source / drain region of the thin film transistor provided in the display region 1X and the peripheral region 1Y, or a conductive layer constituting the wiring connected to the source / drain region. .. In the present disclosure, the second conductive layer 15 is also referred to as source / drain wiring. As the constituent material of the second conductive layer 15, for example, a single layer or multi-layer metal film of a metal element such as titanium (Ti) and aluminum (Al) or an alloy, and light transmittance such as ITO (indium tin oxide) are used. A transparent conductive film having a transparent conductive film or a laminated film of a metal film and a transparent conductive film can be used.

The second organic insulating film 16 covers the first organic insulating film 14 with the second conductive layer 15 in between. The second organic insulating film 16 is provided over the display region 1X and the peripheral region 1Y. The second organic insulating film 16 is provided with through grooves at the same positions as the first groove G1 and the second groove G2, respectively, and reaches the second conductive layer 15. As the second organic insulating film 16, a film of the same material having the same film thickness as the first organic insulating film 14 can be used.

The first groove G1 provided in the peripheral area 1Y surrounds the display area 1X along the peripheral edge of the display area 1X, and the first groove G1 is surrounded by the second groove G2. The first groove G1 and the second groove G2 have, for example, a quadrangular planar shape. By providing the first groove G1 and the second groove G2 in the first organic insulating film 14 having a high water transmittance, the cause is caused by the first organic insulating film 14 from the peripheral region 1Y outside the second groove G2 to the display region 1X. It is possible to suppress the infiltration of water. The same applies to the second organic insulating film 16, and by providing a through groove at the same position as the first groove G1 and the second groove G2, it is possible to suppress the infiltration of water into the display region 1X.

In the peripheral region 1Y outside the second groove G2, the passivation film 13, the first organic insulating film 14, the second organic insulating film 16, and the like are removed, and the first conductive layer 12 and the second conductive layer 15 and the like are removed. An exposed terminal area (not shown) is provided and is connected to external wiring.

An organic EL element 20 is arranged for each pixel pr, pg, and pb in the display region 1X on the second organic insulating film 16. A plurality of first electrodes 21 of the organic EL element 20 are arranged on the second organic insulating film 16. These plurality of first electrodes 21 are provided separately from each other.

The first electrode 21 is, for example, a reflective electrode that functions as an anode, and is provided for each pixel P. Examples of the constituent material of the first electrode 21 include Al, chromium (Cr), gold (Au), platinum (Pt), nickel (Ni), copper (Cu), tungsten (W), silver (Ag) and the like. Elemental substances or alloys of metal elements can be mentioned. Further, the first electrode 21 may include a laminated film of a metal film made of a simple substance or an alloy of these metal elements and a conductive material (transparent conductive film) having light transmittance. Examples of the transparent conductive film include ITO, IZO (indium tin oxide) and zinc oxide (ZnO) -based materials. Examples of the zinc oxide-based material include zinc oxide (AZO) to which aluminum (Al) has been added, zinc oxide (GZO) to which gallium (Ga) has been added, and the like.

As a conductive layer of the same layer as the first electrode 21, for example, a third conductive layer 17 is provided. The third conductive layer 17 is used as wiring embedded in a through groove provided in the second organic insulating film 16.

The element separation film 22 covers a plurality of first electrodes 21 in the display region 1X, and is provided between the surface of each of the first electrodes 21 and the adjacent first electrodes 21. The element separation membrane 22 has an opening facing each first electrode 21. In this opening, the first electrode 21 is exposed from the element separation membrane 22, and the organic layer 23 is arranged on the exposed first electrode 21. The element separation film 22 defines the light emitting region of each pixel P and is for ensuring the insulating property between the first electrode 21 and the second electrode 24. The element separation film 22 functions as a so-called partition wall when the organic layer 23 is formed by a wet process. The element separation film 22 contains, for example, a photosensitive resin such as an acrylic resin, a polyimide resin, a fluorine resin, a silicon resin, a fluorine polymer, a silicon polymer, a novolac resin, an epoxy resin, or a norbornene resin. It is composed of. Alternatively, those in which pigments are dispersed in these resin materials may be used. Further, an inorganic material such as silicon oxide, silicon nitride and silicon oxynitride may be used for the element separation membrane 22.

The organic layer 23 containing the organic light emitting material has, for example, a hole injection layer, a hole transport layer, a light emitting layer, an electron transport layer, and an electron injection layer in this order from a position close to the first electrode 21. The organic layer 23 may be provided in the opening of the element separation membrane 22 for each pixel pr, pg, pb, or may be provided in common in the pixels pr, pg, pb. The light emitting layer may have light emitting layers having different colors for each pixel pr, pg, pb, for example. For example, the light emitting layer of the pixel pr generates red, the light emitting layer of the pixel pg emits green, and the light emitting layer of the pixel pb generates blue. Alternatively, the light emitting layers of the pixels pr, pg, and pb may all generate the same color. For example, all the light emitting layers of the pixels pr, pg, and pb generate white color.

The hole injection layer is a layer for preventing leakage, and is composed of, for example, hexaazatriphenylene (HAT) or the like. The thickness of the hole injection layer is, for example, 1 nm to 20 nm. The hole transport layer is composed of, for example, α-NPD [N, N'-di (1-naphthyl) -N, N'-diphenyl- [1,1'-biphenyl] -4,4'-diamine]. There is. The thickness of the hole transport layer is, for example, 15 nm to 100 nm.

The light emitting layer is configured to emit light of a predetermined color by combining holes and electrons, and has a thickness of, for example, 5 nm to 50 nm. The light emitting layer that emits light in the red wavelength region is composed of, for example, rubrene doped with a pyrromethene boron complex. At this time, rubrene is used as a host material. The light emitting layer that emits light in the green wavelength region is composed of, for example, Alq3 (trisquinolinol aluminum complex). The light emitting layer that emits light in the blue wavelength region is composed of, for example, ADN (9,10-di (2-naphthyl) anthracene) doped with a diaminochrysene derivative. At this time, ADN is deposited on the hole transport layer as a host material with a thickness of, for example, 20 nm, and the diaminochrysene derivative is doped as a dopant material at a relative film thickness ratio of 5%.

The electron transport layer is composed of BCP (2,9-dimethyl-4,7-diphenyl-1,10-phenanthroline). The thickness of the electron transport layer is, for example, 15 nm to 200 nm. The electron injection layer is composed of, for example, lithium fluoride (LiF). The thickness of the electron injection layer is, for example, 15 nm to 270 nm.

The second electrode 24 functions as, for example, a cathode, and faces the first electrode 21 with an organic layer 23 in between. The second electrode 24 is provided over the entire surface of the display region 1X (as an electrode common to all pixels P). The second electrode 24 extends to the peripheral region 1Y and constitutes the shielding layer 24A. The shielding layer 24A suppresses the diffusion of hydrogen from the layer above the shielding layer 24A (for example, the protective film 25 or the like) to the transistor in the peripheral region 1Y. As a result, it is possible to suppress fluctuations in the Voff characteristics of the transistor in the peripheral region 1Y. The second electrode 24 is made of, for example, a light-transmitting conductive material (transparent conductive film). The transparent conductive film constituting the second electrode 24 contains, for example, a metal or a metal oxide. Specifically, the second electrode 24 includes Ag, Al, ZnO, indium oxide (In ₂ O ₃ ), tin oxide (SnO ₂ ), Al ₂ O ₃ , gallium oxide (Ga ₂ O ₃ ), TiO ₂ , and so on. It contains niobium oxide (Nb ₂ O ₅ ) or SiO ₂ . The second electrode 24 may have a laminated structure of a plurality of conductive films.

Similar to the second electrode 24, the protective film 25 covering the second electrode 24 is provided over the entire surface of the display region 1X and extends from the display region 1X to the peripheral region 1Y. The protective film 25 is made of, for example, SiN, SiO ₂ , SiON, TiO ₂ , Al ₂ O ₃ , or the like. The protective film 25 has a function of preventing moisture from entering the organic EL element 20 and preventing changes in characteristics such as luminous efficiency.

The packing layer 33 is for bonding the protective film 25 and the second substrate 31 and sealing the organic EL element 20. The packing layer 33 is provided over one surface on the protective film 25. Examples of the material of the packing layer 33 include acrylic resin, polyimide resin, fluorine resin, silicon resin, fluorine polymer, silicon polymer, novolac resin, epoxy resin, norbornene resin and the like. Alternatively, those in which pigments are dispersed in these resin materials may be used.

The seal portion 34 is provided in the peripheral region 1Y outside the packing layer 33. The seal portion 34 is provided in an annular shape surrounding the display area 1X, and is arranged on the peripheral edge of the second substrate 31. The sealing portion 34 seals each portion between the first substrate 11 and the second substrate 31 together with the organic EL element 20 between them. The seal portion 34 is made of a resin material such as an epoxy resin or an acrylic resin.

For example, a color filter layer (not shown) may be provided on the surface of the second substrate 31 facing the first substrate 11. The color filter layer includes, for example, a red filter, a green filter and a blue filter. The color filter layer includes a red filter in a region facing the organic EL element 20 of the pixel pr, a green filter in a region facing the organic EL element 20 of the pixel pg, and a region facing the organic EL element 20 of the pixel pb. A blue filter is provided in each. These red filter, green filter and blue filter are each composed of a resin mixed with a pigment.

A black matrix layer may be provided in the region between the red filter, the green filter, and the blue filter (the region between pixels). This black matrix layer is composed of, for example, a resin film mixed with a black colorant or a thin film filter utilizing the interference of the thin film. The thin film filter is, for example, one in which one or more thin films made of a metal, a metal nitride or a metal oxide are laminated, and light is attenuated by utilizing the interference of the thin films. Specific examples of the thin film filter include those in which Cr and chromium (III) oxide (Cr ₂ O ₃ ) are alternately laminated.

The second substrate 31 seals the organic EL element 20 together with the packing layer 33. The second substrate 31 is made of, for example, a material such as glass or plastic that is transparent to the light generated by the organic EL element 20.

FIG. 5 is an enlarged representation of the cross-sectional configuration in the vicinity of the second groove G2 shown in FIG. A first conductive layer 12, a passivation film 13, a first organic insulating film 14, and a second conductive layer 15 are laminated on the upper layer of the first substrate 11. In FIG. 5, the layer above the second conductive layer 15 is omitted. A second groove G2 penetrating the laminated insulating film is provided in the laminated insulating film having the passivation film 13 and the first organic insulating film 14. The first conductive layer 12 is not provided in the second groove G2. The second groove region RG2 is a region in which the second groove G2 penetrates the passivation film 13 and the first organic insulating film 14, and corresponds to a region on the bottom surface of the second groove G2 on the first substrate 11. Here, among the end faces from the second groove G2 toward the second groove G2 of the passivation film 13, the end face closest to the second groove G2 is referred to as the first end face 13E, and the second groove G2 to the first organic insulating film 14 is the first. The end face closest to the second groove G2 among the end faces facing the two grooves is referred to as the second end face 14E. The distance d1 from the second groove G2 to the first end surface 13E toward the second groove G2 of the passivation film 13 and the distance d2 from the second groove G2 to the second end surface 14E toward the second groove of the first organic insulating film 14. Is different. Here, as the distance d1 and the distance d2, when the first end surface 13E and the second end surface 14E exist at the same height (size in the thickness direction), the second groove region RG2 at the same height The distance from the edge of. That is, the distance from the end of the second groove region RG2 to the first end surface 13E at a predetermined height h is d1, and the distance from the end of the second groove region RG2 to the second end surface 14E is d2. The height h can be appropriately selected in the range from the surface of the first substrate 11 to the upper end of the second end surface 14E. When the first end surface 13E and the second end surface 14E do not exist at the same height, the ends of the first end surface 13E and the second groove region RG2 at the positions closest to the second end surface 14E, as will be described later in Modification 1. Let d1 be the distance from. Further, the distance between the second end surface 14E and the end of the second groove region RG2 at the position closest to the first end surface 13E is d2. In the display device 1, the distance d1 from the second groove G2 to the first end surface 13E toward the second groove G2 of the passivation film 13 is the second groove G2 from the second groove G2 toward the second groove G2 of the first organic insulating film 14. It is larger than the distance d2 to the two end faces 14E. The inner wall surface SS of the second groove G2 is composed of the second end surface 14E. The second conductive layer 15 is provided so as to cover the inner wall surface SS (second end surface 14E) of the second groove G2 and the bottom surface of the second groove G2 (the surface of the first substrate 11 in the second groove region RG2).

FIG. 6 is a perspective view schematically showing the configuration of the second conductive layer 15 provided in the vicinity of the second groove G2 shown in FIG. The plurality of second conductive layers 15 are formed on the first organic insulating film 14 so as to cover the inner wall surface SS and the bottom surface of the second groove G2. The plurality of second conductive layers 15 are provided separately from each other and are electrically separated from each other. Here, each of the plurality of second conductive layers 15 is formed in a predetermined pattern of stretching in a direction substantially orthogonal to the stretching direction of the second groove G2.

[Manufacturing method of display device 1]
Such a display device 1 is manufactured, for example, through the steps shown in FIG. 7.

When the manufacturing method of the display device 1 is started (step S201), first, the first conductive layer 12 and the passivation film 13 are formed on the first substrate 11 (step S202). The first conductive layer 12 is formed, for example, by forming a conductor on the first substrate 11 by a CVD (Chemical Vapor Deposition) method or the like and processing it into a predetermined pattern. The passivation film 13 is formed by, for example, forming a laminated body of Al ₂ O ₃ / SiO ₂ / n + Al ₂ O ₃ by a CVD method or the like so as to cover the first conductive layer 12. Next, the passivation film 13 in the second groove region RG2 is pattern-removed. Here, it is removed in a region larger than the second groove region RG2.

Subsequently, the passivation film 13 is covered to form the first organic insulating film 14 (step S203). The first organic insulating film 14 is formed by, for example, a spin coating method or a slit coating method, and is subjected to exposure, development, and firing treatment. At this time, in the second groove region RG2, the first organic insulating film 14 is formed in a pattern in which the first organic insulating film 14 is not formed. In this way, the second groove G2 is formed.

Next, the second conductive layer 15 is formed on the upper layer of the first organic insulating film 14, and the second organic insulating film 16 is further formed on the upper layer (step S204). The second conductive layer 15 is formed by forming a conductive material so as to cover the bottom surface and the inner wall surface of the second groove G2 by, for example, a sputtering method, and then pattern-processing by photolithography and etching. The second organic insulating film 16 is formed by, for example, a spin coating method or a slit coating method, and is subjected to etching treatment such as exposure, development, firing, and dry etching.

Subsequently, the first electrode 21, the element separation membrane 22, the organic layer 23, and the second electrode 24 are formed (step S205). The first electrode 21 is formed by, for example, forming a conductive material by a sputtering method and patterning it. The element separation film 22 is formed by forming an insulating material and then patterning it so as to have an opening on the first electrode 21. The organic layer 23 is formed by a coating method such as a vapor deposition method or an inkjet method. The organic layer 23 may be provided not only on the opening of the element separation film 22 but also on the element separation film 22. The second electrode 24 is formed by, for example, forming a conductive material by a sputtering method and patterning it.

Next, each layer on the first substrate 11 is sealed with the second substrate 31 (step S206). Specifically, the protective film 25 is formed on the first substrate 11, the second substrate 31 is attached to the protective film 25 with the packing layer 33 in between, and the sealing portion 34 is formed on the peripheral edge of the second substrate 31. .. As described above, the display device 1 is manufactured, and the manufacturing method is completed (step S207).

The display device 1 is completed by the above steps.

[Action and effect of display device 1]
In the display device 1 of the first embodiment, the distance d1 from the second groove G2 to the first end surface 13E toward the second groove G2 of the passivation film 13 is the first of the second groove G2 to the first organic insulating film 14. The configuration is larger than the distance d2 to the second end surface 14E toward the two-groove G2. As a result, the distance d1 from the second groove G2 to the first end surface 13E toward the second groove G2 of the passivation film 13 and the second end surface 14E from the second groove G2 toward the second groove G2 of the first organic insulating film 14 The inclination of the second end surface 14E, which is the inner wall surface SS of the second groove G2, is gentler than when the distance d2 to the second groove is the same. As a result, it is possible to suppress an increase in the surface roughness of the second end surface 14E in a dry etching process or the like, thereby suppressing the occurrence of a short circuit in the second conductive layer 15 covering the second end surface 14E. .. This makes it possible to improve the reliability of the wiring. This will be described below.

FIG. 8 schematically shows the cross-sectional configuration of the second groove of the display device 1R according to the comparative example. A first conductive layer 112, a passivation film 113, a first organic insulating film 114, and a second conductive layer 115 are laminated on the upper layer of the first substrate 111. In FIG. 8, the layer above the second conductive layer 115 is omitted. A second groove G2 penetrating the laminated insulating film is provided in the laminated insulating film having the passivation film 113 and the first organic insulating film 114. The first conductive layer 112 is not provided in the second groove G2. The second groove region RG2 is a region in which the second groove G2 penetrates the passivation film 113 and the first organic insulating film 114, and corresponds to a region on the bottom surface of the second groove G2. Here, the distance from the second groove G2 to the first end surface 113E toward the second groove G2 of the passivation film 113 and from the second groove G2 to the second end surface 114E toward the second groove G2 of the first organic insulating film 114. Is the same as the distance of. The inner wall surface SS of the second groove G2 includes a first end surface 113E and a second end surface 114E. The second conductive layer 115 covers the inner wall surface SS (first end surface 113E and second end surface 114E) of the second groove G2 and the bottom surface of the second groove G2 (the surface of the first substrate 111 in the second groove region RG2). It is provided.

In the display device 1R, the distance from the second groove G2 to the first end surface 113E toward the second groove G2 of the passivation film 113 and the second end surface from the second groove G2 toward the second groove G2 of the first organic insulating film 114. The configuration is substantially the same as the distance to 114E. The side wall surface of the second groove G2 is composed of a first end surface 113E and a second end surface 114E. The end face (second end face 114E) of the first organic insulating film 114 is laminated on the end face (first end face 113E) of the passivation film 113. Since the lower layer has the first end surface 113E, the inclination of the second end surface 114E is steep. In the second end surface 114E of the first organic insulating film 114 made of an organic material, the larger the inclination of the second end surface 114E, the greater the surface roughness of the second end surface 114E in the dry etching process. When the surface roughness of the second end surface 114E is large, the second conductive layer 115 formed over the second end surface 114E also has a large surface roughness. When the second conductive layer 115 having a large surface roughness is patterned, a processing residue is likely to remain, and a short circuit is likely to occur between the second conductive layers 115. As a result, the reliability of the wiring has deteriorated.

On the other hand, in the display device 1 according to the first embodiment, as described above, the distance d1 from the second groove G2 to the first end surface 13E toward the second groove G2 of the passivation film 13 is the second groove G2. 1 The distance d2 to the second end surface 14E toward the second groove G2 of the organic insulating film 14 is larger. The first end surface 13E is recessed from the second end surface 14E, the first end surface 13E is no longer the inner wall surface SS, and the inclination of the second end surface 14E becomes gentle. As a result, it is possible to suppress an increase in the surface roughness of the second end surface 14E in a dry etching process or the like, thereby suppressing the occurrence of a short circuit in the second conductive layer 15 covering the second end surface 14E. .. This makes it possible to improve the reliability of the wiring.

As described above, in the display device 1, since the inclination of the second end surface 14E constituting the inner wall surface SS of the second groove G2 is made gentle, it is possible to suppress the increase in the surface roughness of the second end surface 14E. This makes it possible to suppress the occurrence of a short circuit in the second conductive layer 15 covering the second end surface 14E and improve the reliability of the wiring.

Hereinafter, a modified example of the first embodiment and other embodiments will be described. In the following description, the same components as those of the first embodiment are designated by the same reference numerals, and the description thereof will be appropriately described. Omit.

<Modification example 1>
In the above display device 1, the distance d1 from the second groove G2 to the first end surface 13E is larger than the distance d2 from the second groove G2 to the second end surface 14E, but the present invention is not limited to this. The distance d1 from the second groove G2 to the first end surface 13E may be smaller than the distance d2 from the second groove G2 to the second end surface 14E.

FIG. 9 schematically shows the cross-sectional configuration of the second groove of the display device 1A as the first modification. A first conductive layer 12, a passivation film 13, a first organic insulating film 14, and a second conductive layer 15 are laminated on the upper layer of the first substrate 11. In FIG. 9, the layer above the second conductive layer 15 is omitted. Here, among the end faces from the second groove G2 toward the second groove G2 of the passivation film 13, the end face closest to the second groove G2 is referred to as the first end face 13E1. Further, among the end faces from the second groove G2 toward the second groove of the first organic insulating film 14, the end face closest to the second groove G2 is referred to as the second end face 14E1. Regarding the distance d1 and the distance d2, when the first end surface 13E1 and the second end surface 14E1 do not exist at the same height, the first end surface 13E1 and the second groove region RG2 at the position closest to the second end surface 14E1. Let d1 be the distance from the edge. Further, the distance between the second end surface 14E1 and the end of the second groove region RG2 at the position closest to the first end surface 13E1 is d2. In the display device 1A, the distance d1 from the second groove G2 to the first end surface 13E1 toward the second groove G2 of the passivation film 13 is the second groove G2 from the second groove G2 toward the second groove G2 of the first organic insulating film 14. It is smaller than the distance d2 to the two end faces 14E1. The second end surface 14E1 is recessed from the first end surface 13E1. The inner wall surface SS of the second groove G2 includes the end faces 13E2, 13E3, 13E4 of the passivation film 13 in addition to the first end face 13E1 and the second end face 14E1. The inclination of the inner wall surface SS of the second groove G2 becomes gentle as a whole, and the inclination of the second end surface 14E1 becomes gentle. As a result, it is possible to suppress an increase in the surface roughness of the second end surface 14E1 in a dry etching process or the like, thereby suppressing the occurrence of a short circuit in the second conductive layer 15 covering the second end surface 14E1. .. This makes it possible to improve the reliability of the wiring.

Since the display device 1A has a gentle inclination of the second end surface that is the inner wall surface of the second groove, it is possible to suppress an increase in the surface roughness of the second end surface, whereby the second end surface can be suppressed. It is possible to suppress the occurrence of a short circuit in the second conductive layer that covers the wiring and improve the reliability of the wiring.

<Second Embodiment>
[Configuration of display device 1B]
The overall configuration of the display device (display device 1B) according to another embodiment (second embodiment) of the present disclosure is the same as that of the display device 1 shown in FIGS. 1 to 3, and the description thereof will be described. Omit.

FIG. 10 schematically shows a cross-sectional structure extending from the display area 1X to the peripheral area 1Y of the display device 1B. In the display device 1B, a plurality of organic EL elements 20 are sealed between the first substrate 11 (substrate) and the second substrate 31 which face each other. On the first substrate 11, the first conductive layer 12 (gate electrode), the passivation film 13, the first organic insulating film 14, the second conductive layer 15 (source / drain wiring), and the second organic insulating film 16 (flattening). Membranes) are provided in this order. In the peripheral region 1Y, a second groove G2 penetrating the passivation film 13 is provided, and the second conductive layer 15 is formed so as to cover the inner wall surface and the bottom surface of the second groove G2. The first substrate 11 is a specific example of the "board" of the present disclosure. The passivation film 13 is a specific example of the "inorganic insulating film" of the present disclosure. The second conductive layer 15 is a specific example of the "conductive layer" of the present disclosure. The second groove G2 is a specific example of the "through groove" of the present disclosure. Here, the first organic insulating film 14 is formed only in the display region 1X, and is not formed in the peripheral region 1Y. The organic EL element 20 is provided on the second organic insulating film 16 and has a first electrode 21, an organic layer 23 (functional layer), and a second electrode 24 from a position close to the second organic insulating film 16. .. An element separation membrane 22 is provided between adjacent organic EL elements 20. For example, a protective film 25 is provided on the organic EL element 20, and a second substrate 31 is bonded onto the protective film 25 via a packing layer 33. A sealing portion 34 is provided on the peripheral edge of the second substrate 31, and the organic EL element 20 is sealed between the first substrate 11 and the second substrate 31. The height of the second conductive layer 15 is different between the display region 1X and the peripheral region 1Y depending on the presence or absence of the first organic insulating film 14. Further, the second organic insulating film 16 is thicker than the display region 1X in the peripheral region 1Y, and the surface of the second organic insulating film 16 is adjusted to be flat in the display region 1X and the peripheral region 1Y. ing. Except for the above, the configuration is the same as that of the display device 1.

FIG. 11 is a schematic view showing a cross-sectional configuration of the display device 1B. The display device 1B has a thin film transistor TR1 in the display region 1X and a thin film transistor TR2 in the peripheral region 1Y. In the display region 1X, the thin film semiconductor layer 40A is provided on the first substrate 11, and the first conductive layer 12 is provided on the first substrate 11 via the gate insulating film 40B. In this way, the thin film transistor TR1 is provided. The semiconductor layer 40A and the first conductive layer 12 are covered with a passivation film 13, and a first organic insulating film 14 is provided on the passivation film 13. A contact hole CH penetrating the first organic insulating film 14 and the passivation film 13 is provided, and the second conductive layer 15 is embedded so as to be connected to the source / drain of the thin film transistor. A second organic insulating film 16 is formed on the entire surface of the upper layer of the second conductive layer 15, a shielding layer 24A is provided on the upper layer thereof, and a protective film 25 is provided on the upper layer thereof. The second substrate 31 is attached to the upper layer of the protective film 25 via the filling layer 33, but the display is omitted in FIG.

In the peripheral region 1Y, the thin film semiconductor layer 40A is provided on the first substrate 11, and the first conductive layer 12 is provided on the upper layer via the gate insulating film 40B. In this way, the thin film transistor TR2 is provided. The semiconductor layer 40A and the first conductive layer 12 are covered with the passivation film 13. A contact hole CH penetrating the passivation film 13 is provided, and a second conductive layer 15 is embedded so as to be connected to the source drain of the thin film transistor. A second organic insulating film 16 is formed on the entire surface of the upper layer of the second conductive layer 15, a shielding layer 24A is provided on the upper layer thereof, and a protective film 25 is provided on the upper layer thereof.

FIG. 12 schematically shows a cross-sectional configuration of a second groove of the display device 1B as the second embodiment. The first conductive layer 12, the passivation film 13, and the second conductive layer 15 are laminated on the upper layer of the first substrate 11. In FIG. 12, the layer above the second conductive layer 15 is omitted. Here, the second conductive layer 15 is provided so as to be in contact with the passivation film 13 in the vicinity of the second groove G2 and to cover the inner wall surface and the bottom surface of the second groove G2. The inner wall surface SS of the second groove G2 includes the first end surface 13E5 and the end surfaces 13E6 and 13E7 of the passivation film 13. In the peripheral region 1Y, the second conductive layer 15 is in contact with the passivation film 13 in the vicinity of the second groove G2, and the second conductive layer 15 covers the inner wall surface and the bottom surface of the second groove G2. That is, since the organic insulating film is not provided in the vicinity of the second groove G2, the second conductive layer 15 covers the end surface of the inorganic insulating film (passivation film 13) having a relatively small surface roughness in the second groove G2. be able to.

[Action and effect of display device 1B]
In the display device 1B of the second embodiment, in the peripheral region 1Y, the second conductive layer 15 is in contact with the passivation film 13 in the vicinity of the second groove G2, and the second conductive layer 15 is the inner wall surface of the second groove G2 and It covers the bottom. That is, the organic insulating film is not provided in the vicinity of the second groove G2. Therefore, the second conductive layer 15 can cover the end surface of the inorganic insulating film (passivation film 13) having a relatively small surface roughness in the second groove G2. Therefore, it is possible to reduce the occurrence of a short circuit in the second conductive layer 15 that covers the inner wall surface of the second groove G2 and improve the reliability of the wiring.

As described above, in the display device 1B, since the second conductive layer covers the end face of the passivation film in the second groove of the peripheral region, the occurrence of a short circuit in the second conductive layer is suppressed and the reliability of the wiring is reduced. Can be increased.

<Modification 2>
In the above display device 1B, the first organic insulating film 14 is formed only in the display region 1X and not in the peripheral region 1Y, but is not limited to this, and the display region 1X and The configuration may be such that the first organic insulating film 14 is not formed in the peripheral region 1Y.

FIG. 13 schematically shows a cross-sectional configuration extending from the display area 1X to the peripheral area 1Y of the display device 1C as the second modification. The first organic insulating film 14 formed only in the display region 1X in the display device 1B is not formed in both the display region 1X and the peripheral region 1Y in the display device 1C. Except for the above, the configuration is the same as that of the display device 1B.

FIG. 14 schematically shows a cross-sectional configuration of the display device 1C. The display device 1C has a thin film transistor TR1 in the display region 1X and a thin film transistor TR2 in the peripheral region 1Y. In the display area 1X, the thin film transistor TR1 is provided as in the display device 1B. The semiconductor layer 40A and the first conductive layer 12 are covered with the passivation film 13. A contact hole CH penetrating the passivation film 13 is provided, and a second conductive layer 15 is embedded so as to be connected to the source drain of the thin film transistor. A second organic insulating film 16 is formed on the entire surface of the upper layer of the second conductive layer 15, a shielding layer 24A is provided on the upper layer thereof, and a protective film 25 is provided on the upper layer thereof.

The peripheral region 1Y has the same configuration as the thin film transistor TR2 in the peripheral region 1Y of the display device 1B, and the description thereof will be omitted.

In the display device 1C, the second groove G2 has the same configuration as the display device 1B shown in FIG. In the peripheral region 1Y of the second conductive layer 15, the second conductive layer 15 is in contact with the passivation film 13 in the vicinity of the second groove G2, and the second conductive layer 15 covers the inner wall surface and the bottom surface of the second groove G2. .. Therefore, the second conductive layer 15 can cover the end surface of the inorganic insulating film (passivation film 13) having a relatively small surface roughness in the second groove G2. Therefore, it is possible to reduce the occurrence of a short circuit in the second conductive layer 15 that covers the inner wall surface of the second groove G2 and improve the reliability of the wiring.

<Modification example 3>
In the above display device 1C, the first organic insulating film 14 is not formed in the display region 1X and the peripheral region 1Y, but the second organic insulating film 16 is further formed in the peripheral region 1Y as the second conductive layer 15. The configuration may be provided in the vicinity of.

FIG. 15 schematically shows the cross-sectional configuration of the display device 1D as the third modification. The display device 1D has a thin film transistor TR1 in the display region 1X and a thin film transistor TR2 in the peripheral region 1Y.

The display area 1X has the same configuration as the thin film transistor TR1 in the display area 1X of the display device 1C, and the description thereof will be omitted.

In the peripheral region 1Y, the thin film transistor TR2 is provided as in the display device 1C. The semiconductor layer 40A and the first conductive layer 12 are covered with the passivation film 13. A contact hole CH penetrating the passivation film 13 is provided, and a second conductive layer 15 is embedded so as to be connected to the source drain of the thin film transistor. A second organic insulating film 16 is formed in the vicinity of the second conductive layer 15 on the upper layer of the second conductive layer 15. The vicinity of the second conductive layer 15 is a portion that covers the upper surface of the second conductive layer 15 exposed from the surface of the passivation film 13, and is between the second conductive layer 15 and the first conductive layer 12 and the first. The second organic insulating film 16 is not provided directly above the conductive layer 12. A shielding layer 24A is provided on the upper layer thereof, and a protective film 25 is provided on the upper layer thereof.

The peripheral region 1Y has the same configuration as the thin film transistor TR2 in the peripheral region 1Y of the display device 1B, and the description thereof will be omitted.

In the display device 1D, the second groove G2 has the same configuration as the display device 1B shown in FIG. In the display device 1D, in the peripheral region 1Y, the second conductive layer 15 is in contact with the passivation film 13 in the vicinity of the second groove G2, and the second conductive layer 15 is the inner wall surface of the second groove G2 and It covers the bottom. Therefore, the second conductive layer 15 can cover the end surface of the inorganic insulating film (passivation film 13) having a relatively small surface roughness in the second groove G2. Therefore, it is possible to reduce the occurrence of a short circuit in the second conductive layer 15 that covers the inner wall surface of the second groove G2 and improve the reliability of the wiring.

In the display device 1D, since the second organic insulating film 16 is not formed on the entire surface in the peripheral region 1Y, peeling of the second organic insulating film 16 can be suppressed. Further, since the second organic insulating film 16 is not provided directly above the thin film transistor in the peripheral region 1Y, it is possible to suppress fluctuations in the characteristics of the transistor due to the influence of outgas from the second organic insulating film 16. Further, since the second organic insulating film 16 is not continuously provided in the direction parallel to the main surface of the first substrate 11, it is possible to suppress the ingress of moisture through the second organic insulating film 16. Can be done.

<Application example>
[Example of block configuration of display device 1]
FIG. 16 shows the display devices 1, 1A, 1B, 1C, and 1D according to the first embodiment, the first embodiment, the second embodiment, and the second and third embodiments (hereinafter, as the display device 1 as a representative). The schematic configuration example of (shown) is schematically shown in a block diagram. The first embodiment, the modified example 1, the second embodiment, and the modified examples 2 to 3 are hereinafter referred to as the above-described embodiment and the like. The display device 1 displays a video signal input from the outside or a video signal generated inside as a video, and is applied to, for example, a liquid crystal display in addition to the above-mentioned organic EL display. The display device 1 includes, for example, a timing control unit 41, a signal processing unit 42, a drive unit 43, and a display pixel unit 44.

The timing control unit 41 has a timing generator that generates various timing signals (control signals), and performs drive control of the signal processing unit 42 and the like based on these various timing signals.

The signal processing unit 42, for example, performs a predetermined correction on a digital video signal input from the outside, and outputs the video signal obtained by the correction to the drive unit 43.

The drive unit 43 is configured to include, for example, a scanning line drive circuit, a signal line drive circuit, and the like, and drives each pixel of the display pixel unit 44 via various control lines.

The display pixel unit 44 includes, for example, a display element such as an organic EL element 20 or a liquid crystal display element, and a pixel circuit for driving the display element for each pixel.

[Example of block configuration of imaging device 2]
In the above-described embodiment and the like, the display device 1 has been described as a specific example of the electronic device in the present disclosure, but the electronic device in the present disclosure is a device other than the display device 1 (for example, an image pickup device). It may be configured.

FIG. 17 is a block diagram schematically showing a schematic configuration example of the image pickup apparatus 2 as an electronic device. The image pickup device 2 is, for example, a solid-state image pickup device that acquires an image as an electric signal, for example, a CCD (Charge Coupled Device) or a CMOS (Complementary Metal).
Oxide Semiconductor) Consists of image sensors and the like. The image pickup apparatus 2 includes, for example, a timing control unit 45, a drive unit 46, an image pickup pixel unit 47, and a signal processing unit 48.

The timing control unit 45 has a timing generator that generates various timing signals (control signals), and controls the drive of the drive unit 46 based on these various timing signals.

The drive unit 46 is configured to include, for example, a row selection circuit, an AD (Analog-to-Digital) conversion circuit, a horizontal transfer scanning circuit, and the like, and drives a signal to be read from each pixel of the image pickup pixel unit 47 via various control lines. Is to do.

The image pickup pixel unit 47 includes, for example, an image pickup element (photoelectric conversion element) such as a photodiode and a pixel circuit for reading a signal. In addition to the element that detects visible light, such an imaging element may be an element that directly or indirectly detects, for example, infrared light, ultraviolet light, radiation (X-ray, etc.), and the like. ..

The signal processing unit 48 performs various signal processing on the signal obtained from the imaging pixel unit 47.

[Example of electronic device configuration]
The above electronic device (display device 1, image pickup device 2, etc.) can be applied to various types of electronic devices.

FIG. 18 is a block diagram showing an application example to an electronic device (electronic device 6) provided with the display device 1 shown in FIG. 16 or the image pickup device 2 shown in FIG. Examples of such an electronic device 6 include a television device, a personal computer (PC), a smartphone, a tablet PC, a mobile phone, a digital still camera, a digital video camera, and the like.

The electronic device 6 includes, for example, the above-mentioned display device 1 or image pickup device 2 and an interface unit 60. The interface unit 60 is an input unit to which various signals, power supplies, and the like are input from the outside. The interface unit 60 may also include a user interface such as a touch panel, a keyboard, or operation buttons.

Although the embodiments have been described above, the present technology is not limited to the above-described embodiments and can be modified in various ways. For example, the material, thickness, or film forming method and film forming condition of each layer described in the above-described embodiment are not limited to those listed, and other materials, thickness or film forming method and film forming condition are not limited to those listed. May be.

Further, the organic layer 23 may include at least a light emitting layer, and for example, the organic layer 23 may be composed of only a light emitting layer.

Further, in the above embodiment, the case of the active matrix type display device has been described, but the present disclosure can also be applied to the passive matrix type display device. Further, the configuration of the pixel circuit PXLC for driving the active matrix is not limited to that described in the above embodiment, and a capacitive element or a transistor may be added as needed. In that case, a necessary drive circuit may be added in addition to the scanning line driving unit 3, the signal line driving unit 4, and the power supply line driving unit 5 according to the change of the pixel circuit PXLC.

The effect described in the above embodiment is an example, and the effect of the present disclosure may be another effect or may further include another effect.

The present technology can also have the following configurations.
(1)
A substrate having an element region and a peripheral region surrounding the element region,
An inorganic insulating film and an organic insulating film are provided on the substrate in this order, a groove portion penetrating the inorganic insulating film and the organic insulating film is provided in the peripheral region, and the inorganic insulating film is formed from the groove portion. A laminated insulating film in which the distance from the groove to the first end surface toward the groove and the distance from the groove to the second end surface of the organic insulating film toward the groove are different.
An electronic device provided on the laminated insulating film and provided with a conductive layer covering the inner wall surface and the bottom surface of the groove portion.
(2)
The electronic device according to (1), wherein the distance from the groove to the first end surface of the inorganic insulating film toward the groove is larger than the distance from the groove to the second end surface of the organic insulating film toward the groove.
(3)
The electronic device according to (1), wherein the distance from the groove to the first end surface of the inorganic insulating film toward the groove is smaller than the distance from the groove to the second end surface of the organic insulating film toward the groove.
(4)
A substrate having an element region and a peripheral region surrounding the element region,
An inorganic insulating film provided on the substrate and having a through groove in the peripheral region,
An electronic device provided with a conductive layer that comes into contact with the inorganic insulating film on the inorganic insulating film and covers the inner wall surface and the bottom surface of the through groove.
(5)
The electronic device according to (4) above, further comprising an upper organic insulating film provided on the upper layer of the conductive layer in the peripheral region.
(6)
The electronic device according to (5), wherein the conductive layer and the upper organic insulating film are provided in the element region.
(7)
The electronic device according to (6) above, further comprising a conductive layer and a lower organic insulating film provided below the upper organic insulating film in the device region.
(8)
The electronic device according to (5), wherein the upper organic insulating film is provided in the vicinity of the conductive layer in the peripheral region.

1,1A, 1B, 1C, 1D ... Display device, 1X ... Display area, 1Y ... Peripheral area, DsTr ... Drive transistor, WsTr ... Writing transistor, Cs ... Holding capacity, 11 ... First substrate, 12 ... First conductive layer , 13 ... Passion film, 13E ... 1st end face, 14 ... 1st organic insulating film, 14E ... 2nd end face, SS ... Inner wall surface, 15 ... 2nd conductive layer, 16 ... 2nd organic insulating film, 17 ... 3rd Conductive layer, G1 ... 1st groove, G2 ... 2nd groove, 20 ... Organic EL element, 21 ... 1st electrode, 22 ... Element separation film, 23 ... Organic layer, 24 ... 2nd electrode, 25 ... Protective film, 31 ... 2nd substrate, 33 ... Filling layer, 34 ... Sealing unit, 3 ... Scanning line driving unit, 4 ... Signal line driving unit, 5 ... Power supply line driving unit, 6 ... Electronic equipment, 60 ... Interface unit, Pix, P, pr, pg, pb ... Pixel.

Claims (8)

A substrate having an element region and a peripheral region surrounding the element region,
An inorganic insulating film and an organic insulating film are provided on the substrate in this order, a groove portion penetrating the inorganic insulating film and the organic insulating film is provided in the peripheral region, and the inorganic insulating film is formed from the groove portion. A laminated insulating film in which the distance from the groove to the first end surface toward the groove and the distance from the groove to the second end surface of the organic insulating film toward the groove are different.
An electronic device provided on the laminated insulating film and provided with a conductive layer covering the inner wall surface and the bottom surface of the groove portion. The electronic device according to claim 1, wherein the distance from the groove to the first end surface of the inorganic insulating film toward the groove is larger than the distance from the groove to the second end surface of the organic insulating film toward the groove. The electronic device according to claim 1, wherein the distance from the groove to the first end surface of the inorganic insulating film toward the groove is smaller than the distance from the groove to the second end surface of the organic insulating film toward the groove. A substrate having an element region and a peripheral region surrounding the element region,
An inorganic insulating film provided on the substrate and having a through groove in the peripheral region,
An electronic device provided with a conductive layer that is in contact with the inorganic insulating film in the vicinity of the through groove and covers the inner wall surface and the bottom surface of the through groove. The electronic device according to claim 4, further comprising an upper organic insulating film provided on the upper layer of the conductive layer in the peripheral region. The electronic device according to claim 5, wherein the conductive layer and the upper organic insulating film are provided in the element region. The electronic device according to claim 6, further comprising the conductive layer and the lower organic insulating film provided below the upper organic insulating film in the device region. The electronic device according to claim 5, wherein the upper organic insulating film is provided in the vicinity of the conductive layer in the peripheral region.

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