JP2020129903A - Power conversion device - Google Patents

Abstract

To provide a power conversion device which can make a signal system electronic component difficult to adversely affect a surge in accordance with switching operation of a power switching element.SOLUTION: A conductor pattern comprises: a power system power supply pattern 30; a floating pattern (solid pattern) 40; and a signal system electronic component mounting pattern 60. Power switching elements Q1 to Q8 are mounted on the power system power supply pattern 30, and signal system electronic components 90, 100 are mounted on the signal system electronic component mounting pattern 60. The conductor pattern comprises decoupling capacitors 70, 71, 72 formed by the power system power supply pattern 30 and the floating pattern 40 facing each other.SELECTED DRAWING: Figure 2

Description

The present invention relates to a power conversion device.

It is necessary to place a decoupling capacitor in the vicinity of the power switching element for stable operation of the power switching element (transistor or the like). In addition, there is a technique of forming a grounding capacitor by a capacitance between a conductor surface and a ground surface of a substrate (for example, Patent Documents 1 and 2).

JP-A-8-204341 JP, 7-326840, A

By the way, when a power switching element is mounted on the power system power supply pattern of the board and a signal system electronic component is mounted on the signal system electronic component mounting pattern, a surge occurs in the power system power supply pattern due to the switching operation of the power switching device. It is feared that the signal electronic components will be adversely affected.

An object of the present invention is to provide a power conversion device in which signal system electronic components are less likely to adversely affect a surge associated with a switching operation of a power switching element.

A power conversion device for solving the above problems includes a multilayer substrate having conductor patterns of three layers or more, and a power switching element and a signal electronic component mounted on the multilayer substrate, wherein the conductor pattern is a power source. A system power supply pattern, a floating pattern, and a signal system electronic component mounting pattern, the power switching device is mounted on the power system power source pattern and the signal system electronic component is mounted on the signal system electronic component mounting pattern, The gist of the present invention is to have a decoupling capacitor formed by the power system power supply pattern and the floating pattern facing each other.

According to this, even if a surge occurs in the power system power supply pattern during the switching operation of the power switching element, the radiated electric field is generated by the decoupling capacitor formed by the power system power supply pattern and the floating pattern facing each other. It is possible to suppress adverse effects on the signal system electronic components due to the displacement current flowing in the reflection or floating patterns.

Further, in the power conversion device, the conductor pattern has a signal system wiring pattern between the floating pattern and the signal system electronic component mounting pattern, and the signal system electronic component mounting pattern and the signal system wiring pattern Are preferably connected using non-penetrating via holes.

In the power converter, the conductor pattern may further include a signal system floating pattern, and a signal system decoupling capacitor formed by the signal system wiring pattern and the signal system floating pattern facing each other. ..

In addition, in the power conversion device, it is preferable that only one surface of the multilayer substrate has the power system power supply pattern, and the other surface of the multilayer substrate has only the signal system electronic component mounting pattern.

According to the present invention, it is possible to prevent the signal electronic components from adversely affecting the surge associated with the switching operation of the power switching element.

The circuit diagram of the power converter in an embodiment. (A) is a top view of the power converter device in embodiment, (b) is sectional drawing in the AA line of (a). (A) is a top view of the power converter of another example, (b) is sectional drawing in the AA line of (a). (A) is a top view of the power converter of another example, (b) is sectional drawing in the AA line of (a). (A), (b) is a time chart which shows the change of the gate signal at the time of switching operation of a power switching element. The schematic sectional drawing of a power converter device. The schematic sectional drawing of a power converter device. Schematic sectional view for comparison. Schematic sectional view for comparison.

Hereinafter, an embodiment of the present invention will be described with reference to the drawings.
As shown in FIG. 1, an inverter 10 as a power converter converts DC power into AC power. The inverter 10 has a positive electrode side bus Lp, a negative electrode side bus Ln, and an AC output terminal (OUT).

An upper arm power switching element Qu (Q1 to Q4) and a lower arm power switching element Qd (Q5 to Q8) are connected in series between the positive electrode side bus Lp and the negative electrode side bus Ln. The upper arm power switching element Qu is composed of four power switching elements Q1 to Q4 connected in parallel. The lower arm power switching element Qd is composed of four power switching elements Q5 to Q8 connected in parallel. An output terminal (OUT) extends from between the upper arm power switching element Qu (Q1 to Q4) and the lower arm power switching element Qd (Q5 to Q8). A power MOSFET, an IGBT or the like is used for each of the power switching elements Q1 to Q8.

As shown in FIG. 1, a drive circuit (gate circuit) 110 is connected to the gates of the power switching elements Q1 to Q8. The drive circuit (gate circuit) 110 turns on each of the power switching elements Q1 to Q8 at an appropriate timing to convert DC power between the positive electrode side bus Lp and the negative electrode side bus Ln into AC power, and an AC output terminal. Output from (OUT) as U-phase AC power.

For example, 0 to 300 V is applied between the positive electrode side bus Lp and the negative electrode side bus Ln, and the drive circuit 110 drives at 0 to 5 V. Further, a switching element such as a transistor is included as a component of the drive circuit 110.

As shown in FIGS. 2A and 2B, an inverter 10 as a power conversion device includes a multilayer substrate 20 on which power switching elements Q1 to Q8 are mounted. The multi-layer substrate 20 has three insulating layers 21, 22, and 23 stacked. The insulating layer 21 is the uppermost layer, the insulating layer 23 is the lowermost layer, and the insulating layer 22 is located between the insulating layers 21 and 23.

The multilayer substrate 20 has a power system power supply pattern 30, a floating pattern 40, a signal system wiring pattern 50, and a signal system electronic component mounting pattern 60. The power system power supply pattern 30 is a conductor pattern formed on the surface layer of the insulating layer 21. The floating pattern 40 is a conductor pattern formed between the insulating layers 21 and 22. The floating pattern 40 is a solid pattern. The signal system wiring pattern 50 is a conductor pattern formed between the insulating layer 22 and the insulating layer 23. The signal system electronic component mounting pattern 60 is a conductor pattern formed on the surface layer of the insulating layer 23. Each conductor pattern (patterns 30, 40, 50, 60) is made of, for example, copper foil.

The power system power supply pattern 30 has a positive electrode side bus bar pattern 31, a negative electrode side bus bar pattern 32, and an AC output terminal (OUT) pattern 33. In FIG. 2A, the positive electrode side bus bar pattern 31 extends in a strip shape in the X direction. In FIG. 2A, the negative electrode side bus bar pattern 32 extends in a strip shape in the X direction. In FIG. 2A, the AC output terminal (OUT) pattern 33 extends in a strip shape in the X direction. In FIG. 2A, the positive electrode side busbar pattern 31 and the negative electrode side busbar pattern 32 are arranged apart from each other in the Y direction, and an AC output terminal (OUT) is provided between the positive electrode side busbar pattern 31 and the negative electrode side busbar pattern 32. ) The pattern 33 is arranged separately from the positive electrode side bus bar pattern 31 and the negative electrode side bus bar pattern 32.

Four power switching elements Q1 to Q4 forming the upper arm power switching element Qu are mounted so as to straddle the positive electrode side bus bar pattern 31 and the AC output terminal (OUT) pattern 33. Further, four power switching elements Q5 to Q8 forming the lower arm power switching element Qd are mounted so as to straddle the negative electrode side bus bar pattern 32 and the AC output terminal (OUT) pattern 33. Specifically, the power switching elements Q1 to Q8 are surface-mounted components, and are surface-mounted on the patterns 31, 32, and 33. In this way, the power switching elements Q1 to Q8 are mounted on the power system power supply pattern 30.

As shown in FIG. 2B, the signal system wiring pattern 50 has a wiring pattern 51 for the upper arm power switching element and a wiring pattern 52 for the lower arm power switching element.

As shown in FIG. 2B, the power system power supply pattern 30 and the floating pattern 40 face each other. As a result, the decoupling capacitors 70, 71, 72 are formed. Specifically, the positive electrode side bus bar pattern 31 and the floating pattern 40 are opposed to each other, whereby the decoupling capacitor 70 is formed. The negative electrode side bus bar pattern 32 and the floating pattern 40 face each other, and thereby a decoupling capacitor 71 is formed. The AC output terminal (OUT) pattern 33 and the floating pattern 40 are opposed to each other, whereby a decoupling capacitor 72 is formed.

As shown in FIG. 2B, the signal electronic components 90 and 100 are mounted on the signal electronic component mounting pattern 60. The drive circuit 110 of FIG. 1 is composed of signal system electronic components 90 and 100. The signal system wiring pattern 50 and the signal system electronic component mounting pattern 60 are connected using a non-penetrating via hole (IVH: Interstitial Via Hole) 80.

Thus, only the power system power supply pattern 30 is provided on one surface of the multilayer substrate 20, and only the signal system electronic component mounting pattern 60 is provided on the other surface of the multilayer substrate 20. Then, in the multilayer substrate 20, on one surface, four power switching elements Q1 to Q4 connected in parallel forming the power switching element Qu for the upper arm and four connected in parallel forming the power switching element Qd for the lower arm are connected. Two power switching elements Q5 to Q8 are arranged. Further, on the other surface of the multilayer substrate 20, the signal system electronic components 90 and 100 that form the drive circuit 110 of FIG. 1 are arranged. Further, on the opposite side (immediately below) of the power system power supply pattern 30 and the power switching elements Q1 to Q8, the signal system wiring pattern 50, the signal system electronic component mounting pattern 60, and the signal system electronic components 90 and 100 are arranged.

Instead of FIGS. 2A and 2B, a second layer pattern 40 from the top of the multilayer substrate is replaced by two conductor patterns 41 and 42 as shown in FIGS. 3A and 3B. You may divide into.

In addition, instead of FIGS. 2(a) and 2(b), five conductor patterns may be provided as shown in FIGS. 4(a) and 4(b). In FIGS. 4A and 4B, the conductor pattern of the second layer from the top in the multilayer substrate is a solid pattern (floating pattern 40), and the signal pattern is used as the conductor pattern of the third layer from the top in the multilayer substrate. A floating pattern 45 is added. The signal system floating pattern 45 has a floating pattern 46 for the upper arm signal system wiring and a floating pattern 47 for the lower arm signal system wiring, and has two conductors as shown in FIGS. 3(a) and 3(b). It is divided into patterns. The signal system floating pattern 45 is a solid pattern. The signal system decoupling capacitor 75 is formed by the wiring pattern 51 of the signal system wiring pattern 50 and the floating pattern 46 for the upper arm signal system wiring facing each other. The signal system decoupling capacitor 76 is formed by the wiring pattern 52 of the signal system wiring pattern 50 and the floating pattern 47 for the lower arm signal system wiring facing each other. As a result, the signal-system wiring pattern 50 is floated in terms of potential, so that noise resistance is improved by having the divided patterns bear protection for each potential.

Next, the operation will be described.
When the decoupling capacitor is mounted near the power switching element, there is no effect unless the decoupling capacitor is arranged near the power switching element. Further, it is necessary to dispose a decoupling capacitor near the power switching element, but it may be difficult to place it near the decoupling capacitor due to wiring. Further, when the power switching elements are connected in parallel and operated as shown in FIG. 1, they cannot be arranged evenly. Further, in a power circuit, when a power switching element is connected in parallel to operate a large current in order to operate, it is difficult to similarly place a decoupling capacitor for each power switching element, and a plurality of decoupling capacitors are also arranged. A capacitor is needed. Further, the impedance based on the capacitance of the capacitor determines the frequency band in which it can be effectively attenuated. Therefore, a decoupling capacitor having a plurality of capacities is required in order to have a decoupling effect in a wide band.

On the other hand, in the present embodiment, a solid pattern (floating pattern 40) is formed as large as possible as the conductor pattern in the second layer from the top of the multilayer substrate 20 and faces the solid pattern (floating pattern 40). The decoupling capacitors 70, 71, 72 between the power supplies are formed by the distributed constant between the wirings (power system power supply pattern 30) of the uppermost layer (first layer). For example, a capacitance of about several hundred pF is formed to provide decoupling for high frequency operation. In order to change the capacitance of the capacitor, the facing area and distance between the conductor solid pattern (floating pattern 40) and the conductor pattern (power system power supply pattern 30) of the first layer may be adjusted. Further, since this decoupling capacitor is arranged in the immediate vicinity of the power switching element regardless of the arrangement of the power switching element, it is an optimal arrangement position for the decoupling capacitor.

Thus, the decoupling capacitors 70, 71 and 72 are used as distributed constant elements by using the internal structure of the multilayer substrate. Therefore, a power switching element is mounted as a conductor pattern (power system power supply pattern 30) in the uppermost layer (first layer) of the multilayer substrate 20, and a thick wiring is used to handle a large current.

On the other hand, the signal system wiring is formed as the conductor pattern of the third layer from the top of the multilayer substrate 20, and the wiring connection of the third layer and the fourth layer does not interfere with the formation of the solid pattern of the second layer. A non-penetrating via hole (IVH) 80 is used.

The signal system electronic component mounting pattern 60 is used as the conductor pattern in the lowermost layer (fourth layer) of the multilayer substrate 20, and the signal system electronic components 90 and 100 are mounted.
With such a configuration, the waveform stability is good, and the surge of the gate signal can be reduced by performing the decoupling with the solid pattern.

Specifically, as shown in FIG. 5A, in the half bridge circuit operation, when the upper arm power switching element Qu (Q1 to Q4) is turned off, the lower arm power switching element Qd (Q5 to Q8) is delayed. Turns on. As shown in FIG. 5B, when the lower arm power switching element Qd (Q5 to Q8) is turned off, the upper arm power switching element Qu (Q1 to Q4) is turned on with a delay. When operating in this way, as shown in FIG. 5A, it is possible to reduce the magnitude ΔV1 of the gate vibration after the upper arm power switching elements Qu (Q1 to Q4) are switched from on to off. .. Further, as shown in FIG. 5B, it is possible to reduce the magnitude ΔV2 of the gate vibration before the upper arm power switching elements Qu (Q1 to Q4) are switched from OFF to ON.

Further, the number of parts can be reduced. In particular, since the decoupling capacitor can be formed by the internal structure of the multilayer substrate, the capacitor cost can be reduced.
Further, since the number of parts can be reduced, the space between the power switching elements can be narrowed and the device can be downsized. In addition, the degree of freedom in wiring is high. Further, since wiring is easy, reduction in design cost and board manufacturing cost can be expected.

Incidentally, in the case of the printed circuit board built-in type bypass capacitor shown in FIG. 8 for stabilizing the power supply of the IC. In the case of the microwave semiconductor integrated circuit module of Patent Document 2 shown in FIG. 9, the electrical impedance to the power supply system is reduced by reducing the characteristic impedance of the MMIC power supply system wiring (potential fluctuation due to pulsating current). Reduction).

In the present embodiment shown in FIG. 6, the main circuit (power circuit) and the drive circuit (gate drive circuit) are separated. Objects to be decoupled are the main circuit (P) and the main circuit (OUT), the main circuit (OUT) and the main circuit (N), or the main circuit (P) and the main circuit (N) shown in FIG. The power switching element causes the main circuit (OUT) to switch between the main circuit (P potential) and the main circuit (N) potential intermittently, but the surge generated at the timing of this potential switching should not reach the drive circuit. Therefore, a floating (solid) pattern is arranged in the inner layer of the substrate. That is, in the cases of Patent Documents 1 and 2, the inner layer is grounded, but in the present embodiment shown in FIG. 6, it is floating, and by floating the inner layer, the electric field radiated from the main circuit side is reflected or The displacement current generated in the floating pattern is transmitted to another main circuit side having a lower potential, so that the drive circuit can be protected. In addition, as shown in FIG. 7 which is an explanatory view corresponding to FIG. 4, strictly speaking, the drive circuit wiring is for the upper arm and the lower arm, and different potentials are provided on the secondary side (the side connected to the power switching element) of the drive circuit. Therefore, the coupling between the upper and lower arm drive circuits can be further suppressed.

In FIG. 8, when the wiring to be mounted on the IC mounting surface of the multilayer substrate is used as a power source (+), and when a capacitor is formed using a dielectric inside the substrate, the opposing internal wiring layer is a power source (-) or GND. And need to. With this structure, the decoupling capacitor conventionally arranged on the outer layer of the substrate is composed of only the substrate wiring. That is, it is applied only to circuits of the same power supply system. Further, it is necessary to make the upper and lower wiring layers face each other due to this shape.

As described above, although Patent Document 1 is effective in a circuit of the same potential system, a circuit of a different potential system such as a switching power supply (0-300V for the drive system, 0-5V for the control system, and 0V for the drive system In the case where 0V of the control system is different), the configuration of FIG. 2 cannot be applied because it causes a malfunction rather.

In the case of the microwave semiconductor integrated circuit module of Patent Document 2 shown in FIG. 9, the board on which the MMIC is mounted is designed by MSL (Micro Strip Line) or SL (Strip Line). Since the impedance is high (inductive), a voltage change occurs due to a current change caused by an instantaneous change in consumption current during MMIC operation. In order to minimize this potential fluctuation, the characteristic impedance of the wiring is reduced. In other words, the line is wide and capacitive wiring (<50Ω) is used. In order to take this structure, the multi-layer substrate on which the MMIC is mounted needs to have the MSL structure, and therefore the internal ground layer needs to be connected to the power supply and the signal system GND. As described above, since the patent document 2 is a wiring structure mainly composed of the MSL structure and the SL structure, the substrate structure is different from the present embodiment shown in FIG. 6 in the first place, and the line impedance is lowered in the present embodiment shown in FIG. For that purpose, since the inner layer is made to float in the first place, it does not have the MSL or SL structure.

Next, the correspondence when the power switching elements Q1 to Q8 and the signal system electronic components 90 and 100 are mounted together will be described.
In this embodiment, as shown in FIGS. 2A and 2B, only the power system power supply pattern 30 is provided on one surface of the multilayer substrate 20, and the signal system electronics is provided on the other surface of the multilayer substrate 20. It has only the component mounting pattern 60. That is, the power switching elements Q1 to Q8 are arranged on one surface of the multilayer substrate 20, and the signal system electronic components 90, 100 are arranged on the other surface of the multilayer substrate 20.

First, regarding wiring restrictions, if a drive circuit (gate driver, voltage sensing circuit, etc.) for controlling a power switching element or the like is mounted near the power switching element, thick wiring cannot be formed. Therefore, when the power system power supply line is provided in the inner layer of the multi-layer substrate, the heat of the pattern is trapped inside the multi-layer substrate, and the heat dissipation is deteriorated. Furthermore, the line directly connected to the power switching element, which is a noise generation source, passes through the inside of the multilayer substrate and directly below the signal electronic components 90 and 100 mounted on the outer layers, so that it is easily affected by noise.

In addition, regarding the failure due to through-hole connection, the inner layer of the multilayer substrate is wired, so the through-hole is connected to the outer layer pattern, but since the thickness of the through-hole itself is thin, many through-holes are required to pass current. Moreover, it is difficult to control the thickness of the metal part of the through hole, and thus resistance loss occurs.

In this embodiment, one side of the outer layer of the multi-layer substrate is a power switching element Q1 to Q8, and the other side is a signal system electronic component 90, 100.
As a result, the degree of freedom of wiring is improved, and the power switching elements Q1 to Q8 and the signal system electronic components 90 and 100 are separated, so that the wirings do not cross each other. Can be wired.

Further, since the heat dissipation can be improved and the wirings directly connected to the power switching elements Q1 to Q8 which are heat sources are integrated on one side, the cooler only needs to cool this side. Further, since the through hole is not applied to the power system power supply wiring, current limitation and resistance loss due to the through hole do not occur.

That is, in the half bridge circuit, when the power switching elements are connected in parallel to operate, the power switching element and the decoupling capacitor, the resistors 121 and 131 and the capacitors 122 and 132 that configure the snubber circuits 120 and 130 shown in FIG. The signal system electronic components other than the above are arranged on the upper surface of the multilayer substrate 20, and the lower surface of the multilayer substrate 20.

By arranging in this way, the power input (+,-) and power output wirings can be formed on one surface, and thus it is not necessary to use through holes in the power lines. In a power conversion device that is often used for vehicles, efficiency is required, and such an arrangement is optimal for a surface mounting type power switching element that is advantageous for high-speed switching operation. It should be noted that in the conventional board layout, since complicated routing and wiring patterns result in high speed switching (high frequency operation), parasitic oscillation is likely to occur due to a slight wiring inductance and malfunction may occur. If so, an increase in wiring inductance due to the multi-layering of through holes and wiring can be suppressed, so that a device equipped with a power switching element using a HEMT such as GaN can be stably operated.

In this way, since power wiring is not performed on the inner layer of the multi-layer substrate, if one surface of the substrate is cooled, not only the power switching element but also the wiring can be cooled at the same time, and the heat dissipation is good. Further, since the gate drive circuit is arranged directly below the power switching element, the gate drive circuit wiring becomes shortest. Further, since the power system wiring can be formed on one surface, it is simple and the shortest wiring is possible. Further, since the wiring inductance is reduced, the influence of parasitic oscillation can be reduced (stable operation) even if the power conversion device is configured with a HEMT capable of high frequency switching.

According to the above embodiment, the following effects can be obtained.
(1) As a configuration of the inverter 10 as a power conversion device, a multilayer substrate 20 having conductor patterns of three or more layers, power switching elements Q1 to Q8 and signal system electronic components 90 and 100 mounted on the multilayer substrate 20, Equipped with. The conductor pattern includes a power system power supply pattern 30, a floating pattern (solid pattern) 40, and a signal system electronic component mounting pattern 60. The power switching elements Q1 to Q8 are mounted on the power system power supply pattern 30, and the signal system electronic components 90 and 100 are mounted on the signal system electronic component mounting pattern 60. It has decoupling capacitors 70, 71, 72 formed by the power system power supply pattern 30 and the floating pattern 40 facing each other.

Therefore, even if a surge occurs in the power system power supply pattern 30 during the switching operation of the power switching elements Q1 to Q8, the decoupling capacitors 70, 71 formed by the power system power supply pattern 30 and the floating pattern 40 facing each other. Due to 72, it is possible to suppress the radiated electric field from being adversely affected by the reflection or the displacement current generated in the floating pattern 40 flowing to the signal electronic components 90 and 100.

(2) The conductor pattern has the signal system wiring pattern 50 between the floating pattern 40 and the signal system electronic component mounting pattern 60, and the signal system electronic component mounting pattern 60 and the signal system wiring pattern 50 are non-penetrating. It is connected using a via hole (IVH) 80. Therefore, by using the non-penetrating via hole (IVH) 80 for connecting the signal system electronic component mounting pattern 60 and the signal system wiring pattern 50, the formation of the floating pattern (solid pattern) 40 can be prevented.

(3) The conductor pattern further has the signal system floating pattern 45, and has the signal system decoupling capacitors 75 and 76 formed by the signal system wiring pattern 50 and the signal system floating pattern 45 facing each other. Therefore, the wiring of the drive circuit 110 is also for the upper arm and for the lower arm, and different potentials are provided on the secondary side of the drive circuit (the side connected to the power switching element), so that the upper and lower arm drive circuits are connected (see FIG. 4B). (Between the patterns 51 and 52) can be suppressed.

(4) Only the power system power supply pattern 30 is provided on one surface of the multilayer substrate 20, and only the signal system electronic component mounting pattern 60 is provided on the other surface of the multilayer substrate 20. Therefore, it is possible to prevent the wiring from being restricted.

The embodiment is not limited to the above, and may be embodied as follows, for example.
Although the half bridge circuit is shown in FIG. 1, it may be applied to a full bridge circuit or the like.
○ The power converter may be other than the inverter. For example, a DC/DC converter using a power switching element may be used. In FIG. 3, the conductor pattern has four layers, and in FIG. 4, the conductor pattern has five layers. However, a substrate having six or more conductor patterns may be used for reasons such as an increase in signal wiring. Further, when the signal system wiring is simplified and the signal system wiring pattern becomes unnecessary, it may be configured to have only three conductor patterns.

10... Inverter, 20... Multilayer substrate, 30... Power system power supply pattern, 40... Floating pattern, 45... Signal system floating pattern, 50... Signal system wiring pattern, 60... Signal system electronic component mounting pattern, 70, 71, 72... Decoupling capacitors, 75, 76... Signal system decoupling capacitors, 80... Non-penetrating via holes, 90, 100... Signal system electronic parts, Q1, Q2, Q3, Q4, Q5, Q6, Q7, Q8... Power switching elements.

Claims (4)

A multilayer substrate having a conductor pattern of three or more layers;
A power switching element and a signal electronic component mounted on the multilayer substrate,
Equipped with
The conductor pattern has a power system power supply pattern, a floating pattern, and a signal system electronic component mounting pattern,
The power switching device is mounted on the power system power supply pattern and the signal system electronic component is mounted on the signal system electronic component mounting pattern,
A power conversion device comprising a decoupling capacitor formed by the power system power supply pattern and the floating pattern facing each other. The conductor pattern has a signal system wiring pattern between the floating pattern and the signal system electronic component mounting pattern,
The power conversion device according to claim 1, wherein the signal system electronic component mounting pattern and the signal system wiring pattern are connected using a non-penetrating via hole. The conductor pattern further has a signal system floating pattern,
The power conversion device according to claim 2, further comprising a signal system decoupling capacitor formed by the signal system wiring pattern and the signal system floating pattern facing each other. Having only the power system power supply pattern on one surface of the multilayer substrate,
The power conversion device according to claim 1, wherein only the signal system electronic component mounting pattern is provided on the other surface of the multilayer substrate.