JP2020054061A - Power conversion device - Google Patents

Abstract

To provide a power conversion device in which ringing can be suppressed while an increase in loss is suppressed.SOLUTION: The power conversion device includes a high-side switch SWH formed of a wide band gap semiconductor, and a low-side switch SWL formed of a wide band gap semiconductor. The power conversion device includes a high-side diode element SDH which is formed of a narrow band gap semiconductor and which is connected in reversely parallel only with the high-side switch SWH between the high-side switch SWH and the low-side switch SWL. The high-side diode element SDH has a characteristic in which the frequency of current ringing generated due to the flow of a recovery current to the high-side diode element SDH is lower than the frequency of current ringing generated due to the flow of a recovery current to a body diode BDL of the low-side switch SWL.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a power conversion device including high-side and low-side switches made of a wide band gap semiconductor.

  It is known that a device made of a wide band gap semiconductor such as SiC has lower loss than a device made of a narrow band gap semiconductor such as Si. However, if all the switches constituting the power converter and the diodes connected in antiparallel to the switches are made of a wide band gap semiconductor, the cost may increase. In addition, when a switch made of a wide bandgap semiconductor is used, the ringing of a current generated when the switching state is switched may increase.

  Therefore, as disclosed in Patent Document 1, there is known a power conversion device including a high-side switch formed of a wide band gap semiconductor and a low-side switch formed of a narrow band gap semiconductor. The high-side switch is, for example, a MOSFET made of SiC, and the low-side switch is, for example, an IGBT made of Si.

  The power converter further includes a high-side diode element connected in anti-parallel to the high-side switch and configured with a narrow band gap semiconductor, and a low-side diode element connected in anti-parallel with the low-side switch and configured with a wide band gap semiconductor. It has. The high-side diode element is a fast recovery diode (FRD) made of, for example, Si. The low-side diode element is a Schottky barrier diode (SBD) made of, for example, SiC.

  According to the power converter described in Patent Literature 1, the number of devices composed of a wide band gap semiconductor can be reduced. As a result, ringing is suppressed while suppressing an increase in cost.

Japanese Patent No. 5822773

  Here, in the power conversion device described in Patent Document 1, the high-side diode element and the low-side switch are formed of a narrow band gap semiconductor. For this reason, although ringing can be suppressed, switching loss in the power converter may increase.

  The main object of the present invention is to provide a power converter that can suppress ringing while suppressing an increase in loss.

A first invention is a power converter including a high-side switch made of a wide band gap semiconductor and a low-side switch made of a wide band gap semiconductor.
An anti-parallel connection to only one of the high-side switch and the low-side switch, including a diode element formed of a narrow band gap semiconductor,
Of the high-side switch and the low-side switch, a switch in which the diode element is not connected in parallel has a body diode formed therein,
The diode element is characterized in that the frequency of the ringing of the current caused by the flow of the recovery current is lower than the frequency of the ringing of the current caused by the flow of the recovery current through the body diode. Having.

  In the first invention, both the high-side switch and the low-side switch are made of a wide band gap semiconductor. As a result, the switching loss can be reduced by increasing the switching speed, and the loss in the power converter can be reduced. In this configuration, in the first aspect, only one of the high-side switch and the low-side switch is connected in reverse parallel with a diode element formed of a narrow band gap semiconductor. For this reason, the number of devices formed of the narrow band gap semiconductor can be reduced, and an increase in loss in the power converter can be suppressed. Further, since the diode element has the above-described characteristics with respect to the ringing frequency, ringing can be suppressed.

  According to the first aspect described above, ringing can be suppressed while suppressing an increase in loss in the power conversion device.

In a second aspect based on the first aspect, the diode element is connected in anti-parallel to only the high-side switch of the high-side switch and the low-side switch,
A positive-side conductor connecting between the high-potential side terminal of the high-side switch and the positive side of the DC power supply,
A negative-side conductor that connects between a low-potential side terminal of the low-side switch and a negative side of the DC power supply;
Let Lp be the inductance of the positive conductor,
Let Ln be the inductance of the negative conductor,
A high-potential terminal of the high-side switch and a capacitance value of a high-potential capacitance component that is a capacitance component formed between a ground conductor and CH,
The capacitance value of an intermediate capacitance component, which is a capacitance component formed between the electric path from the low potential side terminal of the high side switch to the high potential side terminal of the low side switch and the ground conductor, is denoted by CM.
The low-potential-side terminal of the low-side switch and a capacitance value of a low-potential capacitance component that is a capacitance component formed between the ground conductor and CL,
(Lp / Ln) × {CH / (CM + CL)} is the first equilibrium degree,
When (Lp / Ln) × {(CM + CH) / CL} is the second balance, the second balance is closer to 1 than the first balance.

  Of the high-side switch and the low-side switch, the recovery current flows through the body diode of the switch whose diode element is not connected in anti-parallel, so that a noise current (common mode noise current) is emitted to the outside. Here, in the second invention, the first and second equilibrium degrees are determined as described above. The closer the equilibrium degree is to 1, the more the noise current can be reduced. In the second invention, the second balance is made closer to 1 than the first balance by adjusting the inductances Lp and Ln, the high potential capacity component, the intermediate capacity component, and the low potential capacity component. This makes it possible to reduce the noise current emitted to the outside without providing a new diode element in the low-side switch.

In a third aspect based on the first aspect, the diode element is connected in anti-parallel to only the low-side switch of the high-side switch and the low-side switch,
A positive-side conductor connecting between the high-potential side terminal of the high-side switch and the positive side of the DC power supply,
A negative-side conductor that connects between a low-potential side terminal of the low-side switch and a negative side of the DC power supply;
Let Lp be the inductance of the positive conductor,
Let Ln be the inductance of the negative conductor,
A high-potential terminal of the high-side switch and a capacitance value of a high-potential capacitance component that is a capacitance component formed between a ground conductor and CH,
The capacitance value of an intermediate capacitance component, which is a capacitance component formed between the electric path from the low potential side terminal of the high side switch to the high potential side terminal of the low side switch and the ground conductor, is denoted by CM.
The low-potential-side terminal of the low-side switch and a capacitance value of a low-potential capacitance component that is a capacitance component formed between the ground conductor and CL,
(Lp / Ln) × {CH / (CM + CL)} is the first equilibrium degree,
When (Lp / Ln) × {(CM + CH) / CL} is the second balance, the first balance is closer to 1 than the second balance.

  According to the third aspect, similarly to the second aspect, the noise current emitted to the outside can be reduced without newly providing a diode element in the high-side switch.

FIG. 1 is an overall configuration diagram of a power conversion device according to a first embodiment. FIG. 4 is a diagram illustrating an operation mode of a switch and a current flow path. 5 is a time chart showing the effect of suppressing ringing. FIG. 6 is an overall configuration diagram of a power conversion device according to a second embodiment. The front view of a semiconductor module. VI-VI sectional drawing of FIG. The figure which shows a cooler. FIG. 4 is a diagram illustrating an equivalent circuit of a path through which a noise current flows. FIG. 4 is a diagram illustrating an equivalent circuit of a path through which a noise current flows. The figure which shows the relationship between the balance degree and the reduction amount of noise current. FIG. 9 is an overall configuration diagram of a power conversion device according to a third embodiment. The whole block diagram of the power converter concerning a 4th embodiment. FIG. 4 is a diagram illustrating an equivalent circuit of a path through which a noise current flows. FIG. 4 is a diagram illustrating an equivalent circuit of a path through which a noise current flows. The whole block diagram of the power converter concerning a 5th embodiment. The whole block diagram of the electric power converter concerning a 6th embodiment. FIG. 13 is an overall configuration diagram of a power conversion device according to a seventh embodiment. FIG. 4 is a diagram illustrating an operation mode of a switch and a current flow path. FIG. 4 is a diagram illustrating an operation mode of a switch and a current flow path.

<First embodiment>
Hereinafter, a first embodiment of a power conversion device according to the present invention will be described with reference to the drawings. The power converter is mounted on an electric vehicle, for example.

  As shown in FIG. 1, the power conversion device includes a capacitor 10 as a DC power supply, a positive conductor 20H, an intermediate conductor 20M, a negative conductor 20L, a high-side switch SWH, and a low-side switch SWL. The high-side switch SWH and the low-side switch SWL are made of a wide band gap semiconductor, and are N-channel MOSFETs made of SiC in this embodiment. For this reason, the high potential side terminal of each switch SWH, SWL is a drain, and the low potential side terminal is a source. The reason why both the high-side switch SWH and the low-side switch SWL are made of a wide band gap semiconductor is to increase the switching speed and reduce the switching loss. Note that, for example, a storage battery is connected in parallel to the capacitor 10.

  The first end of the positive-side conductor 20H is connected to the positive side of the capacitor 10, and the drain of the high-side switch SWH is connected to the second end of the positive-side conductor 20H. The source of the high-side switch SWH is connected to the drain of the low-side switch SWL via the intermediate conductor 20M. The first end of the negative conductor 20L is connected to the negative electrode of the capacitor 10, and the source of the low-side switch SWL is connected to the second end of the negative conductor 20L. The positive conductor 20H and the negative conductor 20L are, for example, conductive members such as bus bars. The negative electrode-side conductor 20L is connected to a ground having a ground potential. The ground having the ground potential is, for example, a housing of the power conversion device.

  The load 30 is connected between the positive conductor 20H and the intermediate conductor 20M. In the present embodiment, the load 30 is a winding of an inductive load.

  The high-side switch SWH includes a high-side body diode BDH, and the low-side switch SWL includes a low-side body diode BDL.

  A high-side diode element SDH is connected in anti-parallel to the high-side switch SWH. The high-side diode element SDH is made of a narrow band gap semiconductor, and is a silicon diode in the present embodiment.

  The power conversion device includes a control unit 40. The control unit 40 operates the high-side switch SWH and the low-side switch SWL. In the present embodiment, the control unit 40 turns on and off the low side switch SWL while fixing the high side switch SWH to the off operation. More specifically, as shown in FIG. 2A, when the high side switch SWH is turned off and the low side switch is turned on, the capacitor 10, the positive conductor 20H, the load 30, the intermediate conductor 20M, the low side switch A current flows through a closed circuit including the SWL and the negative conductor 20L.

  On the other hand, as shown in FIG. 2B, when the high-side switch SWH and the low-side switch SWL are turned off, the circuit returns to the closed circuit including the positive conductor 20H, the load 30, the intermediate conductor 20M, and the high-side diode element SDH. Electric current flows.

  In the present embodiment, the return current flows through the high-side diode element SDH instead of the high-side body diode BDH. This is because the resistance of the high-side diode element SDH is smaller than the resistance of the high-side body diode BDH. The reason why the high-side diode element SDH is provided is to suppress ringing that occurs when the low-side switch SWL is turned on.

  That is, for example, when the return current flows through the high-side body diode BDH instead of the high-side diode element SDH, the recovery current flows through the high-side body diode BDH when the low-side switch SWL is subsequently switched on. Thereafter, as shown in FIG. 3B, when the flow of the recovery current is completed, a large ringing of the current Id occurs. As a result, large noise corresponding to the ringing cycle is generated. The current Id is a current flowing in the high-side body diode BDH, and the current Id flowing from the high-side switch SWH to the low-side switch SWL is defined as positive.

  On the other hand, when the return current flows through the high-side diode element SDH, the recovery current flows through the high-side diode element SDH when the low-side switch SWL is subsequently turned on. The high side diode element SDH made of a narrow band gap semiconductor suppresses ringing, unlike the high side body diode BDH made of a wide band gap semiconductor. That is, the high-side diode element SDH recovers itself from the ringing frequency of the current Id generated due to the flow of the recovery current through the high-side body diode BDH (see the transition of Id in FIG. 3B). The frequency of the ringing of the current Id generated due to the flow of the current (see the transition of Id in FIG. 3A) is low. For this reason, as shown in FIG. 3A, ringing of the current Id does not occur when the flow of the recovery current is completed. The current Id is a current flowing in the high-side diode element SDH, and the current Id flowing from the high-side switch SWH to the low-side switch SWL is defined as positive. 3A and 3B, a common horizontal axis scale is indicated by TS. In FIGS. 3A and 3B, a common vertical axis scale is indicated by VS. In FIGS. 3A and 3B, Vds indicates a voltage between the drain and the source of the high-side switch SWH.

  FIG. 3A shows an example in which ringing of the current Id does not occur. However, not limited to this example, even when ringing occurs, the frequency of the ringing of the current Id generated due to the recovery current flowing through the high-side body diode BDH is higher than the frequency of the ringing of the current Id. When the frequency of the ringing of the current Id generated due to the flow of the recovery current is lower, the effect of suppressing the ringing is obtained, and the noise can be reduced.

  In the present embodiment described above, of the high-side switch SWH and the low-side switch SWL, only the high-side switch SWH is connected in reverse parallel to the high-side diode element SDH, which is a silicon diode. For this reason, the number of devices formed of the narrow band gap semiconductor can be reduced, and an increase in loss in the power converter can be suppressed. The high-side diode element SDH has an effect of suppressing ringing when a recovery current flows. For this reason, according to the present embodiment, ringing can be suppressed while suppressing an increase in loss in the power conversion device.

<Second embodiment>
Hereinafter, the second embodiment will be described with reference to the drawings, focusing on differences from the first embodiment. In the present embodiment, a stray capacitance is formed in the power converter.

  FIG. 4 shows the overall configuration of the power converter of the present embodiment. In FIG. 4, the same components as those shown in FIG. 1 are denoted by the same reference numerals for convenience.

  In FIG. 4, Lp indicates the inductance (parasitic inductance) of the positive conductor 20H, and Ln indicates the inductance (parasitic inductance) of the negative conductor 20L. In the present embodiment, Lp is the inductance of the conductor from the connection point with the positive terminal of the capacitor 10 to the connection point with the drain of the high-side switch SWH in the positive conductor 20H. Ln is the inductance of the conductor on the negative electrode side conductor 20L from the connection point with the negative terminal of the capacitor 10 to the connection point with the source of the low side switch SWL. The power converter includes a cooler 100 as a ground conductor. The cooler 100 cools the high-side switch SWH, the low-side switch SWL, and the high-side diode element SDH.

  A high-side floating capacitance 50 (corresponding to a high-potential floating capacitance) is formed between the drain of the high-side switch SWH and the cooler 100 as a ground conductor. A first intermediate stray capacitance 51 (corresponding to an intermediate stray capacitance) is formed between the source of the high-side switch SWH and the cooler 100. A second intermediate stray capacitance 52 (corresponding to an intermediate stray capacitance) is formed between the drain of the low-side switch SWL and the cooler 100. A low-side stray capacitance 53 (corresponding to a low-potential stray capacitance) is formed between the source of the low-side switch SWL and the cooler 100. In FIG. 4, the capacitance value of the high-side stray capacitance 50 is indicated by Cp, the capacitance value of the first intermediate stray capacitance 51 is indicated by Coh, the capacitance value of the second intermediate stray capacitance 52 is indicated by Con, The capacitance value of the stray capacitance 53 is indicated by Cn.

  With reference to FIG. 5 to FIG.

  The semiconductor module 60 is configured by integrating the high-side switch SWH, the low-side switch SWL, and the high-side diode element SDH. The semiconductor module 60 has a flat shape and a rectangular shape when viewed from the front.

  The semiconductor module 60 includes a first terminal 61, a second terminal 62, and an output terminal 63. The drain electrode 71 of the high-side switch SWH is electrically connected to the first terminal 61. The first terminal 61 is connected to a second end of the positive conductor 20H. The source electrode 80 of the low-side switch SWL is electrically connected to the second terminal 62. The second terminal 62 is connected to a second end of the negative conductor 20L. The output terminal 63 is electrically connected to the source electrode 70 of the high-side switch SWH and the drain electrode 81 of the low-side switch SWL.

  The semiconductor module 60 has a plurality of high-side control terminals 64H. The gate electrode of the high-side switch SWH is electrically connected to one of the plurality of high-side control terminals 64H. The semiconductor module 60 has a plurality of low-side control terminals 64L. The gate electrode of the low-side switch SWL is electrically connected to one of the plurality of low-side control terminals 64L.

  The semiconductor module 60 includes first to fourth heat sinks 91 to 94 and first and second terminals 95a and 95b. First to fourth heat sinks 91 to 94, first and second terminals 95a and 95b, first terminal 61, second terminal 62, output terminal 63, control terminals 64H and 64L, high-side switch SWH, low-side switch SWL and The high-side diode element SDH is integrated by being sealed with a sealing resin body 96 made of a synthetic resin or the like.

  The high side switch SWH has a flat shape. Of the pair of flat surfaces of the high-side switch SWH, a flat source electrode 70 is provided on one surface, and a flat drain electrode 71 is provided on the other surface.

  A first terminal 95a is provided via a solder 97b on a side of the pair of flat surfaces of the source electrode 70 opposite to a side on which the high-side switch SWH is provided. The first terminal 95a is a flat conductive member. A second heat sink 92 is provided on a side of the pair of flat surfaces of the first terminal 95a opposite to a side on which the source electrode 70 is provided via a solder 97c. The second heat sink 92 has a flat shape. Of the pair of flat surfaces of the second heat sink 92, the side opposite to the side on which the first terminal 95a is provided is exposed to the first surface of the sealing resin body 96 and serves as a heat dissipation surface.

  A first heat sink 91 is provided on a side of the pair of flat surfaces of the drain electrode 71 opposite to a side on which the high-side switch SWH is provided via a solder 97a. The first heat sink 91 has a flat shape. The first terminal 61 is connected to the first heat sink 91. Of the pair of flat surfaces of the first heat sink 91, the side opposite to the side on which the drain electrode 71 is provided is exposed to the second surface, which is the back surface of the first surface of the sealing resin body 96, and Surface. The drain electrode 71, the high-side switch SWH, the source electrode 70, and the first terminal 95a are sandwiched between the first heat sink 91 and the second heat sink 92.

  The low side switch SWL has a flat shape. Of the pair of flat surfaces of the low-side switch SWL, a flat source electrode 80 is provided on one surface, and a flat drain electrode 81 is provided on the other surface.

  A second terminal 95b is provided on a side of the pair of flat surfaces of the source electrode 80 opposite to a side on which the low-side switch SWL is provided via a solder 97e. The second terminal 95b is a flat conductive member. A fourth heat sink 94 is provided on a side of the pair of flat surfaces of the second terminal 95b opposite to a side on which the source electrode 80 is provided via a solder 97f. The fourth heat sink 94 has a flat shape. Of the pair of flat surfaces of the fourth heat sink 94, the side opposite to the side on which the second terminal 95b is provided is exposed to the first surface of the sealing resin body 96 and serves as a heat dissipation surface.

  A third heat sink 93 is provided on a side of the pair of flat surfaces of the drain electrode 81 opposite to a side on which the low-side switch SWL is provided via a solder 97d. The third heat sink 93 has a flat shape. The output terminal 63 is connected to the third heat sink 93. Of the pair of flat surfaces of the third heat sink 93, the side opposite to the side on which the drain electrode 81 is provided is exposed to the second surface of the sealing resin body 96 and serves as a heat dissipation surface. The drain electrode 81, the low-side switch SWL, the source electrode 80, and the second terminal 95b are sandwiched between the third heat sink 93 and the fourth heat sink 94.

  The third heat sink 93 has an extension 93a extending from the end. The second heat sink 92 has an extension 92a extending from the end. The extending portions 93a, 92a are electrically connected via a solder 97g.

  As shown in FIG. 7, the cooler 100 is made of a material having high conductivity and high thermal conductivity (eg, aluminum), and has an introduction pipe 101a for introducing a cooling fluid, and an extraction pipe for leading the cooling fluid to the outside. 101b and a plurality of cooling plates. In the present embodiment, a first cooling plate 102a and a second cooling plate 102b are provided as a plurality of cooling plates. Each of the cooling plates 102a and 102b is a member that connects the inlet pipe 101a and the outlet pipe 101b. The cooling fluid flowing through the inlet pipe 101a flows out to the outlet pipe 101b via the respective cooling plates 102a and 102b. The first surface of the semiconductor module 60 (the first surface of the sealing resin body 96) is provided with a first cooling plate 102a (a first cooling surface) via a first insulating sheet 103a (corresponding to an insulating layer) having electrical insulation properties. ). The second surface of the semiconductor module 60 (the second surface of the sealing resin body 96) is connected to a second cooling plate 102b (a second cooling surface) via a second insulating sheet 103b (corresponding to an insulating layer) having electrical insulation properties. ). Thereby, the semiconductor module 60 is sandwiched between the first cooling plate 102a and the second cooling plate 102b. As a result, the semiconductor module 60 is cooled.

  The source electrode 70 of the high-side switch SWH is disposed to face the conductive first cooling plate 102a via the second heat sink 92 and the first insulating sheet 103a. Thereby, the first intermediate floating capacitance 51 is formed between the first cooling plate 102a and the second heat sink 92.

  The source electrode 80 of the low-side switch SWL is disposed to face the conductive second cooling plate 102b via the fourth heat sink 94 and the second insulating sheet 103b. Thus, a low-side floating capacitance 53 is formed between the second cooling plate 102b and the fourth heat sink 94.

  The drain electrode 71 of the high-side switch SWH is disposed to face the second cooling plate 102b via the first heat sink 91 and the second insulating sheet 103b. Thereby, the high-side floating capacitance 50 is formed between the second cooling plate 102b and the first heat sink 91.

  The drain electrode 81 of the low-side switch SWL is disposed to face the second cooling plate 102b via the third heat sink 93 and the second insulating sheet 103b. Thereby, the second intermediate stray capacitance 52 is formed between the second cooling plate 102b and the third heat sink 93.

  The present embodiment is characterized by a method of setting the inductances Lp and Ln and the stray capacitances Cp, Coh, Con and Cn. Hereinafter, the setting method will be described with reference to FIGS.

  FIG. 8 shows an equivalent circuit of the power conversion device when the high-side switch SWH is turned off and the low-side switch SWL is turned on so that a recovery current flows through the high-side diode element SDH. In this equivalent circuit, the high-side diode element SDH is described as a power supply for generating a recovery current. Since the low-side switch SWL functions as a conductor having low resistance to the recovery current, its description is omitted. Similarly, since the capacitor 10 also functions as a conductor for the recovery current, its description is omitted.

  The cooler 100 and the condenser 10 are connected via the impedance Zc and the ground. Therefore, when the potential generated in the capacitor 10 by the recovery current is different from the ground potential, a part of the generated recovery current flows through the impedance Zc. That is, a part of the recovery current leaks to the outside of the power conversion device and may become noise. The impedance Zc is an impedance between the ground and the capacitor 10.

  Adjust the balance to an appropriate value to suppress noise. In the present embodiment, the first equilibrium degree BH is defined as in the following equation (eq1).

図９に、ローサイドスイッチＳＷＬがオフ操作されている場合において、ハイサイドスイッチＳＷＨがオン操作に切り替えられてローサイドボディダイオードＢＤＬにリカバリ電流が流れるときの電力変換装置の等価回路を示す。この場合における第２平衡度ＢＬを下式（ｅｑ２）のように定義する。

FIG. 9 shows an equivalent circuit of the power conversion device when the high-side switch SWH is turned on and the recovery current flows through the low-side body diode BDL when the low-side switch SWL is turned off. The second balance BL in this case is defined as in the following equation (eq2).

リカバリ電流によりコンデンサ１０に発生する電位が接地電位となるように、各インダクタンスＬｐ，Ｌｎ及び各浮遊容量Ｃｐ，Ｃｏｈ，Ｃｏｎ，Ｃｎが調整されることにより、ノイズ電流を低減できる。具体的には、図１０に示すように、平衡度が１に近いほど、ノイズ電流の低減量は大きくなる。図１０には、ハイサイド，ローサイドスイッチＳＷＨ，ＳＷＬのスイッチング周波数が高い場合（ｆＨ）及び低い場合（ｆＬ）それぞれにおける低減量の計算結果を示す。

By adjusting each inductance Lp, Ln and each stray capacitance Cp, Coh, Con, Cn so that the potential generated in the capacitor 10 by the recovery current becomes the ground potential, the noise current can be reduced. Specifically, as shown in FIG. 10, the closer the equilibrium degree is to 1, the larger the reduction amount of the noise current is. FIG. 10 shows calculation results of the reduction amount when the switching frequency of the high-side and low-side switches SWH and SWL is high (fH) and when the switching frequency is low (fL).

  In the present embodiment, the high side diode element SDH is provided on the high side where the recovery current flows. Further, the first balance degree BH corresponding to the high side is set to 1 or a value close to 1. The value close to 1 is, for example, 0.8 to 1.2. Thereby, noise current (common mode current) can be suppressed.

  The reason why the noise current can be suppressed as the first degree of balance BH is closer to 1 is that the noise current is proportional to the absolute value of “Lp × Cp−Ln × (Coh + Con + Cn)”. The reason why the noise current can be suppressed as the second degree of balance BL is closer to 1 is that the noise current is proportional to the absolute value of “Lp × (Coh + Con + Cp) −Ln × Cn”.

<Third embodiment>
Hereinafter, the third embodiment will be described with reference to the drawings, focusing on differences from the second embodiment. In the present embodiment, as shown in FIG. 11, a load 30 is connected between the negative conductor 20L and the intermediate conductor 20M. In FIG. 11, the same components as those shown in FIG. 4 are denoted by the same reference numerals for convenience.

  In the present embodiment, instead of the high-side switch SWH, the low-side switch SWL is connected in reverse parallel to the low-side diode element SDL, which is a diode element made of Si. The low-side diode element SDL is a silicon diode.

  The control unit 40 constantly turns off the low-side switch SWL and turns on and off the high-side switch SWH. Therefore, when the low-side switch SWL is turned off, a recovery current flows through the low-side diode element SDL when the high-side switch SWH is switched on. The low-side diode element SDL has the same characteristics as the high-side diode element SDH described above. Therefore, even if a recovery current flows through the low-side diode element SDL, it is possible to suppress current ringing.

  In the present embodiment, the second balance BL corresponding to the low side is set to 1 or a value close to 1. The value close to 1 is, for example, 0.8 to 1.2. Thereby, the noise current can be suppressed.

<Fourth embodiment>
Hereinafter, the fourth embodiment will be described with reference to the drawings, focusing on differences from the third embodiment. In the present embodiment, of the first and second surfaces of the semiconductor module 60, only the second surface side is cooled by the cooler 100 to be one-side cooling. The one-side cooling is realized by, for example, not providing the first heat sink 91 and the third heat sink 93 in FIG. Because of single-sided cooling, the first intermediate stray capacitance 51 and the low-side stray capacitance 53 are not formed as shown in FIG. 12, the same components as those shown in FIG. 11 are denoted by the same reference numerals for convenience.

  FIG. 13 shows an equivalent circuit when the high-side switch SWH is turned off and the low-side switch SWL is turned on to allow a recovery current to flow through the high-side body diode BDH. In the present embodiment, the first equilibrium degree BH is represented by the following equation (eq3).

図１４に、ローサイドスイッチＳＷＬがオフ操作されている場合において、ハイサイドスイッチＳＷＨがオン操作に切り替えられてローサイドダイオード素子ＳＤＬにリカバリ電流が流れるときの等価回路を示す。本実施形態では、ローサイド浮遊容量５３が形成されていないため、ローサイドに対応する第２平衡度ＢＬを定義できない。このため、ローサイドダイオード素子ＳＤＬが設けられている。これにより、リンギングの発生を抑制することができる。

FIG. 14 shows an equivalent circuit when the high-side switch SWH is turned on and the recovery current flows through the low-side diode element SDL when the low-side switch SWL is turned off. In the present embodiment, since the low-side stray capacitance 53 is not formed, the second balance BL corresponding to the low side cannot be defined. Therefore, a low-side diode element SDL is provided. Thereby, occurrence of ringing can be suppressed.

<Fifth embodiment>
Hereinafter, the fifth embodiment will be described with reference to the drawings, focusing on differences from the fourth embodiment. In the present embodiment, as shown in FIG. 15, in the single-side cooling configuration in which only the second surface side of the first and second surfaces of the semiconductor module 60 is cooled by the cooler 100, the second intermediate floating capacitance 52 Instead, a low-side stray capacitance 53 is formed. This is because the positional relationship between the source electrode 80 and the drain electrode 81 with respect to the low-side switch SWL is opposite to that shown in FIG. In this case, the third heat sink 93 and the second heat sink 92 are not connected via the extension 93a or the like.

  According to the present embodiment described above, the same effects as in the fourth embodiment can be obtained.

<Sixth embodiment>
Hereinafter, the sixth embodiment will be described with reference to the drawings, focusing on differences from the third embodiment. In the present embodiment, as shown in FIG. 16, the power converter connects the first capacitor 54A that connects the drain of the high-side switch SWH to the cooler 100, and connects the source of the low-side switch SWL to the cooler 100. A second capacitor 54B. The first capacitor 54A and the second capacitor 54B are passive elements. 16, the same components as those shown in FIG. 12 are given the same reference numerals for convenience.

  In the present embodiment, the first degree of balance BH is represented by the following equation (eq4), and the second degree of balance BL is represented by the following equation (eq5).

受動素子のコンデンサが用いられる本実施形態によれば、例えば、インダクタンスＬｐ，Ｌｎや浮遊容量の容量値Ｃｐ，Ｃｏｈ，Ｃｏｎ，Ｃｎのみの調整によっては平衡度を所望にできない場合に、平衡度を１又は１に近い値に近づけることができる。

According to the present embodiment in which a passive element capacitor is used, for example, when the balance cannot be desired by adjusting only the inductances Lp and Ln and the capacitance values Cp, Coh, Con, and Cn of the stray capacitance, the balance is reduced. It can be close to 1 or a value close to 1.

  The capacitors of the passive elements are provided between the drain of the high-side switch SWH and the cooler 100, between the source of the high-side switch SWH and the cooler 100, between the drain of the low-side switch SWL and the cooler 100, and It may be provided in at least one of between the source of the low-side switch SWL and the cooler 100.

  Further, a passive element capacitor may be provided instead of the floating capacitance without forming the floating capacitance.

<Seventh embodiment>
Hereinafter, the seventh embodiment will be described with reference to the drawings, focusing on differences from the second embodiment. In the present embodiment, as shown in FIG. 17, a three-phase inverter is used as a power converter. Note that, in FIG. 17, the same or corresponding components as those illustrated in FIG. 4 and the like are denoted by the same reference numerals for convenience.

  The control system includes an inverter and a rotating electric machine 31. The windings 32 of each phase of the rotating electric machine 31 are electrically connected to the capacitor 10 via an inverter. In the present embodiment, a three-phase rotating electric machine 31 is used. The rotating electric machine 31 includes windings 32 for three phases. The rotating electric machine 31 is, for example, a permanent magnet synchronous machine.

  The positive side of the capacitor 10 is connected to the drain of the high side switch SWH of each phase of the inverter via the positive side conductor 21H. The negative side of the capacitor 10 is connected to the source of the low-side switch SWL of each phase of the inverter via the negative-side conductor 20L. The source of the high-side switch SWH and the drain of the low-side switch SWL are connected via an intermediate conductor 21M. One end of a winding 32 is connected to the intermediate conductor 21M.

  The control unit 40 operates the switches SWH and SWL of each phase to control the control amount of the rotating electric machine 31 to the command value. The control amount is, for example, torque. In each phase of the inverter, the high-side switch SWH and the low-side switch SWL are alternately turned on with a dead time therebetween.

  In the present embodiment, the low-side diode element SDL is connected in anti-parallel to the low-side switch SWL.

  Subsequently, the effect of the low-side diode element SDL of the present embodiment will be described.

  FIG. 18 shows a case where a current flows through winding 32 in a direction from the inverter to winding 32.

  As shown in FIG. 18A, the high-side switch SWH is turned on and the low-side switch SWL is turned off. Therefore, current flows from the positive electrode side of the capacitor 10 to the winding 32 via the high-side switch SWH.

  As shown in FIG. 18B, the high-side switch SWH is thereafter switched to the off operation. In this case, a forward current flows through the low-side diode element SDL.

  Then, as shown in FIG. 18C, the high-side switch SWH is switched to the ON operation. As a result, a reverse voltage is applied to the low-side diode element SDL, and a recovery current flows through the low-side diode element SDL. Although the recovery current flows, ringing can be suppressed by the characteristics of the low-side diode element SDL.

  In the present embodiment, as shown in FIG. 18C, the control unit 40 performs a prohibition process of prohibiting the ON operation of the low-side switch SWL during a period when the recovery current is flowing through the low-side diode element SDL. If the low-side switch SWL is turned on while the recovery current is flowing, the recovery current flows to the low-side switch SWL instead of the low-side diode element SDL, and the effect of suppressing ringing cannot be obtained. For this reason, according to the prohibition processing, ringing can be accurately suppressed.

  FIG. 19 shows a case where current flows through winding 32 in a direction from winding 32 to the inverter.

  As shown in FIG. 19A, the high-side switch SWH is turned off and the low-side switch SWL is turned on. Therefore, a current flows from the winding 32 to the low-side switch SWL.

  As shown in FIG. 19B, the low-side switch SWL is then switched to the off operation. In this case, a forward current flows through the high-side body diode BDH.

  As shown in FIG. 19C, the low-side switch SWL is thereafter switched to the ON operation. As a result, a reverse voltage is applied to the high-side body diode BDH, and a recovery current flows through the high-side body diode BDH.

  Here, in the present embodiment, as in the second embodiment, a high-side stray capacitance 50 is formed between the drain of the high-side switch SWH and the cooler 100, and the source of the high-side switch SWH and the cooler 100 A first intermediate stray capacitance 51 is formed between them. Further, a second intermediate stray capacitance 52 is formed between the drain of the low-side switch SWL and the cooler 100, and a low-side stray capacitance 53 is formed between the source of the low-side switch SWL and the cooler 100. Then, in each phase, the inductances Lp and Ln are set such that the first degree of balance BH represented by the above equation (eq1) is closer to 1 than the second degree of balance BL represented by the above equation (eq2). And respective capacitance values Cp, Coh, Con, and Cn. In each phase, Lp is the inductance of the conductor from the connection point with the positive terminal of the capacitor 10 to the connection point with the drain of the high-side switch SWH in the positive conductor 21H. For this reason, the inductance Lp corresponding to each phase may be different. In each phase, Ln is the inductance of the conductor on the negative electrode side conductor 21L from the connection point with the negative terminal of the capacitor 10 to the connection point with the source of the low side switch SWL. Therefore, the inductance Ln corresponding to each phase may be different. This makes it possible to reduce the noise current emitted to the outside without newly providing a diode element in the high-side switch SWH.

  Incidentally, a configuration in which the high-side diode element SDH is connected in anti-parallel to the high-side switch SWH instead of the low-side switch SWL can be adopted. In this case, the control unit 40 performs a prohibition process of prohibiting the ON operation of the high-side switch SWH while the recovery current is flowing through the high-side diode element SDH. Further, in each phase, the inductances Lp and Ln are set such that the second balance BL represented by the above equation (eq2) is closer to 1 than the first balance BH represented by the above equation (eq1). And respective capacitance values Cp, Coh, Con, and Cn.

  This makes it possible to reduce the noise current emitted to the outside without providing a new diode element in the low-side switch SWL.

<Other embodiments>
The above embodiments may be modified and implemented as follows.

  In the second to seventh embodiments, a plurality of diode elements may be connected in anti-parallel to the switch.

  The semiconductor module is not limited to the one in which both the high-side switch SWH and the low-side switch SWL are incorporated, but may be one in which only one of the switches is incorporated.

  ・ As a diode element, the frequency of the ringing of the current caused by the flow of the recovery current is lower than the frequency of the ringing of the current caused by the flow of the recovery current through the body diode. A diode element other than a silicon diode may be used as long as it is formed of a narrow band gap semiconductor having the following.

  -Each of the high side and the low side switch which comprise a power converter is not limited to one switch, but may be a plurality of switches connected in parallel with each other. Further, the switches constituting the power converter are not limited to MOSFETs composed of SiC, but may be other switches as long as they are composed of wide band gap semiconductors.

  The switch in which the diode element is connected in anti-parallel between the high-side switch and the low-side switch may not have a body diode if it is structurally possible.

  The power converter is not limited to the three-phase inverter shown in FIG. 17, but may be a two-phase inverter having a series connection of high-side and low-side switches for the number of phases, or a four-phase inverter or more. Good. For example, in the case of two phases, the connection point of the first pair of high-side and low-side switches connected in series to each other and the connection point of the second pair of high-side and low-side switches connected in series to each other are inductive loads ( (For example, a winding).

  Further, the power converter is not limited to the configuration of FIG. 1 or the DC-AC converter shown in FIG. 17, but may be, for example, a DCDC converter having at least one of a step-up function and a step-down function (transformation function). You may.

  SWH: High side switch, SWL: Low side switch, BDH: High side body diode, BDL: Low side body diode, SDH: High side diode element.

Claims (13)

In a power converter including a high-side switch (SWH) made of a wide band gap semiconductor and a low-side switch (SWL) made of a wide band gap semiconductor,
A diode element (SDH, SDL) that is connected in anti-parallel to only one of the high-side switch and the low-side switch and is made of a narrow band gap semiconductor;
Of the high-side switch and the low-side switch, the switch to which the diode element is not connected in parallel has a body diode (BDH, BDL) formed therein.
The diode element is characterized in that the frequency of the ringing of the current caused by the flow of the recovery current is lower than the frequency of the ringing of the current caused by the flow of the recovery current through the body diode. A power converter having: The diode element (SDH) is connected in anti-parallel to only the high-side switch of the high-side switch and the low-side switch;
A positive-electrode-side conductor (20H) connecting between a high-potential-side terminal of the high-side switch and a positive-electrode side of the DC power supply (10);
A negative-side conductor (20L) connecting between a low-potential side terminal of the low-side switch and a negative side of the DC power supply;
Let Lp be the inductance of the positive conductor,
Let Ln be the inductance of the negative conductor,
The capacitance value of the high-potential capacitance component (50, 54A), which is a capacitance component formed between the high-potential-side terminal of the high-side switch and the ground conductor (100), is CH;
The capacitance value of an intermediate capacitance component (51, 52), which is a capacitance component formed between an electric path from the low potential side terminal of the high side switch to the high potential side terminal of the low side switch and the ground conductor, CM
CL is a capacitance value of a low-potential capacitance component (53, 54B) which is a capacitance component formed between the low-potential-side terminal of the low-side switch and the ground conductor;
(Lp / Ln) × {CH / (CM + CL)} is the first equilibrium degree (BH),
2. The power converter according to claim 1, wherein when (Lp / Ln) × {(CM + CH) / CL} is the second balance (BL), the second balance is closer to 1 than the first balance. 3. . The diode element (SDL) is connected in anti-parallel to only the low-side switch of the high-side switch and the low-side switch;
A positive-electrode-side conductor (20H) connecting between a high-potential-side terminal of the high-side switch and a positive-electrode side of the DC power supply (10);
A negative-side conductor (20L) connecting between a low-potential side terminal of the low-side switch and a negative side of the DC power supply;
Let Lp be the inductance of the positive conductor,
Let Ln be the inductance of the negative conductor,
The capacitance value of the high-potential capacitance component (50, 54A), which is a capacitance component formed between the high-potential-side terminal of the high-side switch and the ground conductor (100), is CH;
The capacitance value of an intermediate capacitance component (51, 52), which is a capacitance component formed between an electric path from the low potential side terminal of the high side switch to the high potential side terminal of the low side switch and the ground conductor, CM
CL is a capacitance value of a low-potential capacitance component (53, 54B) which is a capacitance component formed between the low-potential-side terminal of the low-side switch and the ground conductor;
(Lp / Ln) × {CH / (CM + CL)} is the first equilibrium degree (BH),
The power converter according to claim 1, wherein when (Lp / Ln) × {(CM + CH) / CL} is the second balance (BL), the first balance is closer to 1 than the second balance. . The ground conductor is a cooler (100) having a pair of a first cooling surface (102a) and a second cooling surface (102b) provided at opposing positions,
Each of the high side switch and the low side switch has a pair of opposed flat surfaces,
Of the pair of flat surfaces of the high side switch, one surface is provided with an electrode (71) of a high potential side terminal of the high side switch, and the other surface is provided with a low potential side terminal of the high side switch. An electrode (70) is provided;
Of the pair of flat surfaces of the low side switch, one surface is provided with an electrode (81) of a high potential side terminal of the low side switch, and the other surface is provided with an electrode (80) of a low potential side terminal of the low side switch. ) Is provided,
The electrode of the low-potential side terminal of each of the high-side switch and the low-side switch is disposed to face the first cooling surface via an insulating layer (103a).
The electrode of the high-potential-side terminal of each of the high-side switch and the low-side switch is disposed to face the second cooling surface via an insulating layer (103b).
The high-potential capacitance component includes a stray capacitance (50) formed between an electrode of a high-potential-side terminal of the high-side switch and the second cooling surface,
The intermediate capacitance component is between an electrode of a low potential side terminal of the high side switch and the first cooling surface, and between an electrode of a high potential side terminal of the low side switch and the second cooling surface. It is composed of stray capacitance formed on at least one side,
4. The power converter according to claim 2, wherein the low-potential capacitance component is configured by a stray capacitance (53) formed between an electrode of a low-potential side terminal of the low-side switch and the first cooling surface. 5. apparatus.   The power converter according to any one of claims 2 to 4, wherein at least one of the high potential capacitance component, the intermediate capacitance component, and the low potential capacitance component is configured by a capacitor element as a passive element. . The diode element (SDL) is connected in anti-parallel to only the low-side switch of the high-side switch and the low-side switch;
A positive-electrode-side conductor (20H) connecting between a high-potential-side terminal of the high-side switch and a positive-electrode side of the DC power supply (10);
A negative-side conductor (20L) connecting between a low-potential side terminal of the low-side switch and a negative side of the DC power supply;
Let Lp be the inductance of the positive conductor,
Let Ln be the inductance of the negative conductor,
The capacitance value of the high-potential capacitance component (50), which is a capacitance component formed between the high-potential-side terminal of the high-side switch and the ground conductor (100), is CH;
The capacitance value of an intermediate capacitance component (52), which is a capacitance component formed between the electric path from the low potential side terminal of the high side switch to the high potential side terminal of the low side switch and the ground conductor, is denoted by CM. ,
2. The power converter according to claim 1, wherein when (Lp / Ln) × (CH / CM) is the balance, the balance is 1 or a value close to 1. 3. The ground conductor is a cooler (100) having a cooling surface for cooling the high-side switch and the low-side switch;
Each of the high side switch and the low side switch has a pair of opposed flat surfaces,
Of the pair of flat surfaces of the high side switch, one surface is provided with an electrode (71) of a high potential side terminal of the high side switch, and the other surface is provided with a low potential side terminal of the high side switch. An electrode (70) is provided;
Of the pair of flat surfaces of the low side switch, one surface is provided with an electrode (81) of a high potential side terminal of the low side switch, and the other surface is provided with an electrode (80) of a low potential side terminal of the low side switch. ) Is provided,
The electrode of the high potential side terminal of each of the high side switch and the low side switch is disposed to face the cooling surface via an insulating layer (103b),
The high-potential capacitance component is constituted by a stray capacitance (50) formed between an electrode of a high-potential-side terminal of the high-side switch and the cooling surface,
The power converter according to claim 6, wherein the intermediate capacitance component is configured by a stray capacitance (52) formed between an electrode of a high-potential terminal of the low-side switch and the cooling surface.   The power converter according to claim 6, wherein at least one of the high-potential capacitance component and the intermediate capacitance component includes a capacitor element as a passive element. The diode element (SDL) is connected in anti-parallel to only one of the high-side switch and the low-side switch,
A positive-electrode-side conductor (20H) connecting between a high-potential-side terminal of the high-side switch and a positive-electrode side of the DC power supply (10);
A negative-side conductor (20L) connecting between a low-potential side terminal of the low-side switch and a negative side of the DC power supply;
Let Lp be the inductance of the positive conductor,
Let Ln be the inductance of the negative conductor,
The capacitance value of the high-potential capacitance component (50), which is a capacitance component formed between the high-potential-side terminal of the high-side switch and the ground conductor (100), is CH;
A capacitance value of a low-potential capacitance component (52), which is a capacitance component formed between the low-potential-side terminal of the low-side switch and the ground conductor, is denoted by CL;
2. The power converter according to claim 1, wherein when (Lp / Ln) × (CH / CL) is the balance, the balance is 1 or a value close to 1. 3. The ground conductor is a cooler (100) having a cooling surface for cooling the high-side switch and the low-side switch;
Each of the high side switch and the low side switch has a pair of opposed flat surfaces,
Of the pair of flat surfaces of the high side switch, one surface is provided with an electrode (71) of a high potential side terminal of the high side switch, and the other surface is provided with a low potential side terminal of the high side switch. An electrode (70) is provided;
Of the pair of flat surfaces of the low side switch, one surface is provided with an electrode (81) of a high potential side terminal of the low side switch, and the other surface is provided with an electrode (80) of a low potential side terminal of the low side switch. ) Is provided,
The electrodes of the high-side switch and the high-potential-side terminal of each of the low-side switches are arranged to face the cooling surface via an insulating layer,
The high-potential capacitance component is constituted by a stray capacitance (50) formed between an electrode of a high-potential-side terminal of the high-side switch and the cooling surface,
The power converter according to claim 9, wherein the low-potential capacitance component is configured by a stray capacitance (53) formed between an electrode of a low-potential-side terminal of the low-side switch and the cooling surface.   The power converter according to claim 9, wherein at least one of the high-potential capacitance component and the low-potential capacitance component is configured by a capacitor element as a passive element.   12. A prohibition unit for prohibiting an on operation of a switch of the high-side switch and the low-side switch to which the diode element is connected in anti-parallel during a period in which a recovery current is flowing through the diode element. The power converter according to claim 1.   The power converter according to any one of claims 1 to 12, wherein the diode element is a silicon diode.

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