JP2020043591A - Composite wafer manufacturing method - Google Patents
Composite wafer manufacturing method Download PDFInfo
- Publication number
- JP2020043591A JP2020043591A JP2019210240A JP2019210240A JP2020043591A JP 2020043591 A JP2020043591 A JP 2020043591A JP 2019210240 A JP2019210240 A JP 2019210240A JP 2019210240 A JP2019210240 A JP 2019210240A JP 2020043591 A JP2020043591 A JP 2020043591A
- Authority
- JP
- Japan
- Prior art keywords
- wafer
- ions
- bonding
- atoms
- composite
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 239000002131 composite material Substances 0.000 title claims abstract description 27
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 19
- WSMQKESQZFQMFW-UHFFFAOYSA-N 5-methyl-pyrazole-3-carboxylic acid Chemical compound CC1=CC(C(O)=O)=NN1 WSMQKESQZFQMFW-UHFFFAOYSA-N 0.000 claims abstract description 50
- 150000002500 ions Chemical class 0.000 claims abstract description 33
- 238000000034 method Methods 0.000 claims abstract description 20
- 229910052710 silicon Inorganic materials 0.000 claims description 28
- 239000010703 silicon Substances 0.000 claims description 28
- 125000004429 atom Chemical group 0.000 claims description 26
- -1 hydrogen ions Chemical class 0.000 claims description 20
- 239000000463 material Substances 0.000 claims description 19
- 238000005468 ion implantation Methods 0.000 claims description 17
- 239000001257 hydrogen Substances 0.000 claims description 13
- 229910052739 hydrogen Inorganic materials 0.000 claims description 13
- GQYHUHYESMUTHG-UHFFFAOYSA-N lithium niobate Chemical compound [Li+].[O-][Nb](=O)=O GQYHUHYESMUTHG-UHFFFAOYSA-N 0.000 claims description 12
- 230000004913 activation Effects 0.000 claims description 11
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 claims description 8
- 229910052594 sapphire Inorganic materials 0.000 claims description 7
- 239000010980 sapphire Substances 0.000 claims description 7
- 239000001307 helium Substances 0.000 claims description 6
- 229910052734 helium Inorganic materials 0.000 claims description 6
- 229910004298 SiO 2 Inorganic materials 0.000 claims description 4
- 238000010884 ion-beam technique Methods 0.000 claims description 4
- 229910052744 lithium Inorganic materials 0.000 claims description 4
- 229910052814 silicon oxide Inorganic materials 0.000 claims description 4
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 4
- WHXSMMKQMYFTQS-UHFFFAOYSA-N Lithium Chemical compound [Li] WHXSMMKQMYFTQS-UHFFFAOYSA-N 0.000 claims description 3
- 229910004541 SiN Inorganic materials 0.000 claims description 3
- 238000009832 plasma treatment Methods 0.000 claims description 3
- 235000012431 wafers Nutrition 0.000 abstract description 136
- 239000000758 substrate Substances 0.000 abstract description 17
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 27
- 230000000694 effects Effects 0.000 description 14
- 238000001994 activation Methods 0.000 description 9
- 238000012360 testing method Methods 0.000 description 8
- 238000009826 distribution Methods 0.000 description 7
- 238000010586 diagram Methods 0.000 description 6
- 238000010438 heat treatment Methods 0.000 description 6
- 239000000843 powder Substances 0.000 description 6
- 230000008569 process Effects 0.000 description 6
- 238000010897 surface acoustic wave method Methods 0.000 description 6
- 238000000227 grinding Methods 0.000 description 5
- 238000005498 polishing Methods 0.000 description 5
- KRHYYFGTRYWZRS-UHFFFAOYSA-N Fluorane Chemical compound F KRHYYFGTRYWZRS-UHFFFAOYSA-N 0.000 description 4
- 239000013078 crystal Substances 0.000 description 4
- 125000004435 hydrogen atom Chemical group [H]* 0.000 description 4
- 238000010030 laminating Methods 0.000 description 4
- UFHFLCQGNIYNRP-UHFFFAOYSA-N Hydrogen Chemical compound [H][H] UFHFLCQGNIYNRP-UHFFFAOYSA-N 0.000 description 3
- 230000001133 acceleration Effects 0.000 description 3
- 239000000853 adhesive Substances 0.000 description 3
- 230000001070 adhesive effect Effects 0.000 description 3
- 238000002513 implantation Methods 0.000 description 3
- 230000003746 surface roughness Effects 0.000 description 3
- 230000008859 change Effects 0.000 description 2
- 230000005465 channeling Effects 0.000 description 2
- 150000001875 compounds Chemical class 0.000 description 2
- 230000007423 decrease Effects 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 230000013011 mating Effects 0.000 description 2
- 238000000678 plasma activation Methods 0.000 description 2
- 230000009467 reduction Effects 0.000 description 2
- 230000004044 response Effects 0.000 description 2
- 239000000126 substance Substances 0.000 description 2
- 229910013641 LiNbO 3 Inorganic materials 0.000 description 1
- 238000000137 annealing Methods 0.000 description 1
- 239000012298 atmosphere Substances 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000012790 confirmation Methods 0.000 description 1
- 230000008878 coupling Effects 0.000 description 1
- 238000010168 coupling process Methods 0.000 description 1
- 238000005859 coupling reaction Methods 0.000 description 1
- 230000007547 defect Effects 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000006073 displacement reaction Methods 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 230000006872 improvement Effects 0.000 description 1
- 229910010272 inorganic material Inorganic materials 0.000 description 1
- 239000011147 inorganic material Substances 0.000 description 1
- 238000004518 low pressure chemical vapour deposition Methods 0.000 description 1
- 239000000203 mixture Substances 0.000 description 1
- 238000010295 mobile communication Methods 0.000 description 1
- 239000012299 nitrogen atmosphere Substances 0.000 description 1
- 238000000623 plasma-assisted chemical vapour deposition Methods 0.000 description 1
- 238000003672 processing method Methods 0.000 description 1
- 238000005488 sandblasting Methods 0.000 description 1
- 239000004575 stone Substances 0.000 description 1
Landscapes
- Crystals, And After-Treatments Of Crystals (AREA)
- Surface Acoustic Wave Elements And Circuit Networks Thereof (AREA)
Abstract
Description
本発明は、弾性表面波デバイスの材料等として用いる複合ウェーハの製造方法に関する。 The present invention relates to a method for manufacturing a composite wafer used as a material for a surface acoustic wave device.
近年、スマートフォンに代表される移動体通信の市場において、通信量が急激に増大している。この問題に対応するために必要なバンド数を増やす中、必然的に各種部品の小型化、高性能化が必須となってきている。一般的な圧電材料であるタンタル酸リチウム(Lithium Tantalate:LT)やニオブ酸リチウム(LithiumNiobate:LN)は、表面弾性波(SAW)デバイスの材料として広く用いられている。しかし、これらの材料は大きな電気機械結合係数を有し広帯域化が可能である反面、温度安定性が低く温度変化により対応できる周波数がシフトしてしまうという問題点を有する。これは、タンタル酸リチウムやニオブ酸リチウムが非常に高い熱膨張係数を有する事に起因する。 2. Description of the Related Art In recent years, in a mobile communication market represented by a smartphone, a communication amount is rapidly increasing. As the number of bands required to cope with this problem increases, it is inevitably necessary to reduce the size and performance of various components. Common piezoelectric materials such as lithium tantalate (LT) and lithium niobate (LN) are widely used as materials for surface acoustic wave (SAW) devices. However, these materials have a large electromechanical coupling coefficient and can broaden the band, but have a problem that the temperature stability is low and the corresponding frequency shifts due to a temperature change. This is because lithium tantalate and lithium niobate have very high thermal expansion coefficients.
この問題を低減するために、圧電材料であるタンタル酸リチウム(LiTaO3:LT)やニオブ酸リチウム(LiNbO3:LN)に熱膨張係数の低い材料を貼り合わせ、圧電材料の低熱膨張係数材料を貼り合わせない方の面を研削等で数μm〜数十μmに薄化する方法が提案されている(非特許文献1)。この方法では、低熱膨張係数材料(サファイア、シリコン等)を貼り合わせることでLTやLNの熱膨張を抑え、温度特性を改善する。各種材料の熱膨張係数をグラフ化したものを図12に示す。 In order to reduce this problem, a material having a low thermal expansion coefficient is attached to lithium tantalate (LiTaO 3 : LT) or lithium niobate (LiNbO 3 : LN) which is a piezoelectric material, and a low thermal expansion coefficient material of the piezoelectric material is used. A method has been proposed in which the surface to be not bonded is thinned to several μm to several tens μm by grinding or the like (Non-Patent Document 1). In this method, the thermal expansion of LT or LN is suppressed by bonding a low thermal expansion coefficient material (sapphire, silicon, or the like), and the temperature characteristics are improved. FIG. 12 shows a graph of the thermal expansion coefficients of various materials.
しかし、この方法による場合、薄いLT膜やLN膜を支持基板に積層することにより、反共振周波数帯にスプリアスもしくはリップルと呼ばれるノイズが発生するという別の問題が生じる。このノイズはLT膜やLN膜と支持基板との界面からの反射で発生する。シリコン基板上に積層したLT膜に作成した共振器の反射減衰量(S11)を図13に示す。図13から、周波数の変化に従いスプリアスの波形が山となる部分と谷となる部分を繰り返していることがわかる。スプリアス波形の山と谷の差をスプリアスの強度(amplitude)と呼ぶ。 However, according to this method, another problem that noise called spurious or ripple is generated in the anti-resonance frequency band by laminating a thin LT film or LN film on the support substrate. This noise is generated by reflection from the interface between the LT film or LN film and the support substrate. FIG. 13 shows the return loss (S11) of the resonator formed on the LT film laminated on the silicon substrate. FIG. 13 shows that the spurious waveform repeats peaks and valleys in accordance with the change in frequency. The difference between the peaks and valleys of the spurious waveform is called spurious intensity (amplitude).
この問題を解決するために幾つかの方法が参考文献2で提案されている。例えば、LTの貼り合わせ面を1000番の研削石で荒らしてRa値で300nmの粗さを得てから接着剤を介して支持基板と貼り合せる方法が提案されている。しかし、実際のデバイスでは信頼性の観点から接着剤を用いることは難しいため、接着剤の代わりに無機材料、例えばSi02などを堆積して研磨する方法が更に提案されている。しかし、凹凸を貼り合わせに耐えうる原子レベルの平滑度(Ra値で1nm以下)に加工することは困難であり、かつ、コスト面にも問題がある。 Several methods are proposed in reference 2 to solve this problem. For example, a method has been proposed in which the bonding surface of the LT is roughened with a No. 1000 grinding stone to obtain a roughness of 300 nm in Ra value, and then bonded to a support substrate via an adhesive. However, since it is difficult to use an adhesive from the viewpoint of reliability in an actual device, a method of depositing and polishing an inorganic material, for example, SiO 2 instead of the adhesive has been further proposed. However, it is difficult to process unevenness to an atomic level smoothness ( Ra value of 1 nm or less) that can withstand bonding, and there is a problem in cost.
本発明の目的は、熱膨張係数が高いLT膜やLN膜が、熱膨張係数の低い支持基板に積層された複合ウェーハにおいて、入射した信号がLT膜等と支持基板との接合界面で反射することにより生じるスプリアスを低減することが可能な複合ウェーハの製造方法を提供することにある。 An object of the present invention is to provide a composite wafer in which an LT film or an LN film having a high coefficient of thermal expansion is laminated on a supporting substrate having a low coefficient of thermal expansion, and an incident signal is reflected at a bonding interface between the LT film or the like and the supporting substrate. It is an object of the present invention to provide a method of manufacturing a composite wafer capable of reducing spurious generated by the above.
(1)本発明の複合ウェーハの製造方法は、タンタル酸リチウムウェーハ又はニオブ酸リチウムウェーハ(以下「積層ウェーハ」という。)を、これよりも熱膨張係数が小さい支持ウェーハと貼り合わせることにより複合ウェーハを製造する複合ウェーハの製造方法であって、貼り合わせに先立ち、積層ウェーハ及び/又は支持ウェーハの貼り合わせ面からイオンを注入して、それぞれの貼り合わせ面近傍の結晶性を乱すイオン注入ステップを実行することを特徴とする。これにより、積層ウェーハと支持ウェーハとを貼り合わせた界面において、圧電体である積層ウェーハから入射された信号が界面近傍において吸収・散乱され反射が抑制されるため、スプリアスを低減することができる。 (1) The method of manufacturing a composite wafer according to the present invention comprises bonding a lithium tantalate wafer or a lithium niobate wafer (hereinafter, referred to as a “laminated wafer”) to a supporting wafer having a smaller coefficient of thermal expansion than the composite wafer. Prior to bonding, implanting ions from the bonded surfaces of the laminated wafer and / or the supporting wafer, and disturbing the crystallinity in the vicinity of each bonded surface. It is characterized by executing. Thus, at the interface where the laminated wafer and the supporting wafer are bonded, the signal incident from the laminated wafer, which is a piezoelectric material, is absorbed and scattered in the vicinity of the interface and the reflection is suppressed, so that spurious can be reduced.
(2)各ウェーハに注入するイオンを、水素イオン(H+)、水素分子イオン(H2 +)、又はヘリウムイオン(He+)とし、それぞれの場合のドーズ量を、1.0×1016atoms/cm2以上1.0×1017atoms/cm2以下、5.0×1015atoms/cm2以上5.0×1016atoms/cm2以下、1.0×1016atoms/cm2以上1.0×1017atoms/cm2以下としてもよい。これらの軽元素イオンはウェーハに少ない加速電圧で深く注入することができるため、注入装置の制約を受けにくい。また、ドーズ量をこのように制御することで、反射抑制効果が高めることができるとともに、貼り合わせ後に熱処理を行った場合の基板破損を防ぐことができる。 (2) The ions to be implanted into each wafer are hydrogen ions (H + ), hydrogen molecule ions (H 2 + ), or helium ions (He + ), and the dose in each case is 1.0 × 10 16 atoms / cm 2 or more and 1.0 × 10 17 atoms / cm 2 or less, 5.0 × 10 15 atoms / cm 2 or more and 5.0 × 10 16 atoms / cm 2 or less, 1.0 × 10 16 atoms / cm 2 or more and 1.0 × 10 17 atoms / cm 2 or less It may be. Since these light element ions can be deeply implanted into the wafer with a small acceleration voltage, they are not easily restricted by the implantation apparatus. In addition, by controlling the dose in this manner, the reflection suppressing effect can be enhanced, and the substrate can be prevented from being damaged when heat treatment is performed after bonding.
(3)イオン注入ステップの実行後、貼り合わせに先立ち、積層ウェーハ及び/又は支持ウェーハの貼り合わせ面にオゾン水処理、UVオゾン処理、イオンビーム処理、又はプラズマ処理による表面活性化処理を行う表面活性化ステップを実行してもよい。これにより、各ウェーハの貼り合わせ面の原子を、化学結合を形成しやすい活性な状態とし、より強固な接合を得ることができる。 (3) After the execution of the ion implantation step, prior to the bonding, the surface on which the surface to be bonded of the laminated wafer and / or the supporting wafer is subjected to the surface activation treatment by ozone water treatment, UV ozone treatment, ion beam treatment, or plasma treatment. An activation step may be performed. As a result, the atoms on the bonding surface of each wafer are brought into an active state in which a chemical bond is easily formed, and a stronger bond can be obtained.
(4)支持ウェーハの素材としてシリコン又はサファイアを適用してもよい。これらの素材は熱膨張係数が小さいため、熱膨張係数が大きい積層ウェーハの熱膨張を効果的に抑えることができ、デバイスの温度特性を改善することができる。 (4) Silicon or sapphire may be applied as the material of the supporting wafer. Since these materials have a small coefficient of thermal expansion, the thermal expansion of a laminated wafer having a large coefficient of thermal expansion can be effectively suppressed, and the temperature characteristics of the device can be improved.
(5)イオン注入ステップに先立ち、積層ウェーハ及び/又は支持ウェーハの貼り合わせ面にSiO2、SiON、又はSiNによる絶縁膜を形成する絶縁膜形成ステップを実行してもよい。絶縁膜を形成し、それを通してイオンを注入することで、注入イオンのチャネリングを抑制することができる。 (5) Prior to the ion implantation step, an insulating film forming step of forming an insulating film of SiO 2 , SiON, or SiN on the bonding surface of the laminated wafer and / or the supporting wafer may be performed. By forming an insulating film and implanting ions therethrough, channeling of implanted ions can be suppressed.
(6)積層ウェーハは、厚さ方向に貼り合わせ面に近づくにつれリチウム濃度が高くなっているものを適用してもよい。このような濃度分布の積層ウェーハを適用することで、例えば、ウェーハ上に共振子を作成した場合に、入力インピーダンス波形に現れるDipを小さくすることができる。 (6) As the laminated wafer, a wafer having a higher lithium concentration as approaching the bonding surface in the thickness direction may be used. By using a laminated wafer having such a concentration distribution, for example, when a resonator is formed on the wafer, Dip appearing in the input impedance waveform can be reduced.
本発明では、タンタル酸リチウムウェーハ又はニオブ酸リチウムウェーハ(積層ウェーハ)を、これよりも熱膨張係数が小さい支持ウェーハと貼り合わせることにより複合ウェーハを製造するに際し、積層ウェーハ及び/又は支持ウェーハの貼り合わせ面からイオンを注入して、それぞれの貼り合わせ面近傍の結晶性を乱す。すなわち、図1(a)に示すような積層ウェーハ10と支持ウェーハ20とを、図1(c)に示すように貼り合わせ面11、21で貼り合わせるのに先立ち、いずれか一方又は双方の貼り合わせ面(図1(b)では貼り合わせ面21)からイオンを注入し、イオン注入領域22を形成しておく。 In the present invention, when a composite wafer is manufactured by bonding a lithium tantalate wafer or a lithium niobate wafer (laminated wafer) to a supporting wafer having a smaller coefficient of thermal expansion, the bonding of the laminated wafer and / or the supporting wafer is performed. Ions are implanted from the mating surfaces to disturb the crystallinity near the respective bonding surfaces. That is, prior to laminating the laminated wafer 10 and the supporting wafer 20 as shown in FIG. 1A on the laminating surfaces 11 and 21 as shown in FIG. Ions are implanted from the mating surface (the bonding surface 21 in FIG. 1B) to form an ion-implanted region 22.
これにより、積層ウェーハ10と支持ウェーハ20とを貼り合わせた界面31において、圧電体である積層ウェーハ10から入射された信号が界面31近傍において吸収・散乱され反射が抑制されるため、スプリアスを低減することができる。 As a result, at the interface 31 where the laminated wafer 10 and the supporting wafer 20 are bonded together, a signal incident from the laminated wafer 10 that is a piezoelectric material is absorbed and scattered in the vicinity of the interface 31 to suppress reflection, thereby reducing spurious. can do.
支持ウェーハ20に採用する素材は、熱膨張係数が大きい積層ウェーハ10の熱膨張を効果的に抑え、積層ウェーハ10に形成するSAWデバイスの温度特性の改善に資する、熱膨張係数が小さい素材、例えば、シリコンやサファイアが好適である。また、積層ウェーハ10は、厚さ方向に貼り合わせ面に近づくにつれリチウム濃度が高くなっているものを適用するとよい。このような濃度分布の積層ウェーハを適用することで、例えば、ウェーハ上に共振子を作成した場合に、入力インピーダンス波形に現れるDipを小さくすることができる。 The material used for the support wafer 20 is a material having a small thermal expansion coefficient, which effectively suppresses the thermal expansion of the laminated wafer 10 having a large thermal expansion coefficient and contributes to the improvement of the temperature characteristics of the SAW device formed on the laminated wafer 10. , Silicon and sapphire are preferred. Further, as the laminated wafer 10, it is preferable to use a laminated wafer having a lithium concentration that increases as approaching the bonding surface in the thickness direction. By using a laminated wafer having such a concentration distribution, for example, when a resonator is formed on the wafer, Dip appearing in the input impedance waveform can be reduced.
本発明の複合ウェーハの製造方法の具体的な製造フローの一例を図2に示す。 FIG. 2 shows an example of a specific manufacturing flow of the method for manufacturing a composite wafer of the present invention.
まず、イオンを注入するウェーハの貼り合わせ面に絶縁膜を形成する(S1)。絶縁膜を形成し、それを通してイオンを注入することで、注入イオンのチャネリングを抑制することができる。絶縁膜の材質としては、例えば、SiO2、SiON、又はSiNが好適である。 First, an insulating film is formed on a bonding surface of a wafer into which ions are implanted (S1). By forming an insulating film and implanting ions therethrough, channeling of implanted ions can be suppressed. As a material of the insulating film, for example, SiO 2 , SiON, or SiN is preferable.
続いて、絶縁膜を形成したウェーハの貼り合わせ面からイオンを注入する(S2)。注入するイオンは、結晶性を乱すものであれば特に限定はされないが、少ない加速電圧で深く注入でき注入装置の制約を受けにくい軽元素イオン、例えば、水素イオン(H+)、水素分子イオン(H2 +)、及びヘリウムイオン(He+)が好適である。反射抑制効果は、イオンのドーズ量が一定量以上になると顕著に現れるが、反面、量が多すぎると過剰に存在する元素が貼り合わせ界面において接合を不安定化させ、貼り合わせ後の熱処理の段階で基板が破損するなどの問題が生じる。この観点からドーズ量は、水素イオンの場合は1.0×1016atoms/cm2以上1.0×1017atoms/cm2以下、水素分子イオンの場合は5.0×1015atoms/cm2以上5.0×1016atoms/cm2以下、ヘリウムイオンの場合は1.0×1016atoms/cm2以上1.0×1017atoms/cm2以下とするのが望ましい。 Subsequently, ions are implanted from the bonding surface of the wafer on which the insulating film has been formed (S2). The ions to be implanted are not particularly limited as long as they disturb the crystallinity, but light element ions that can be implanted deeply with a low acceleration voltage and are not easily restricted by the implantation apparatus, for example, hydrogen ions (H + ), hydrogen molecule ions ( H 2 + ) and helium ions (He + ) are preferred. The antireflection effect is remarkable when the dose of ions is a certain amount or more, but, on the other hand, when the amount is too large, the excessively present element destabilizes the bonding at the bonding interface, and the heat treatment after bonding is performed. Problems such as breakage of the substrate occur at the stage. From this viewpoint, the dose amount is 1.0 × 10 16 atoms / cm 2 or more and 1.0 × 10 17 atoms / cm 2 or less for hydrogen ions, and 5.0 × 10 15 atoms / cm 2 or more and 5.0 × 10 16 for hydrogen molecule ions. atoms / cm 2 or less, and in the case of helium ions, it is desirable to be 1.0 × 10 16 atoms / cm 2 or more and 1.0 × 10 17 atoms / cm 2 or less.
続いて、絶縁膜を除去し(S3)、イオンを注入したウェーハの貼り合わせ面に表面活性化処理を行う(S4)。表面活性化処理を行うことで、貼り合わせ面の原子を、化学結合を形成しやすい活性な状態とし、より強固な接合を得ることができる。表面活性化処理は、例えば、オゾン水処理、UVオゾン処理、イオンビーム処理、又はプラズマ処理により行うとよい。 Subsequently, the insulating film is removed (S3), and a surface activation treatment is performed on the bonding surface of the wafer into which the ions have been implanted (S4). By performing the surface activation treatment, atoms on the bonding surface are brought into an active state in which a chemical bond is easily formed, so that a stronger bond can be obtained. The surface activation treatment may be performed by, for example, ozone water treatment, UV ozone treatment, ion beam treatment, or plasma treatment.
続いて、各ウェーハを貼り合わせ面で貼り合わせ(S5)、貼り合わせ界面のずれによる結晶欠陥導入を防ぐため熱処理を行う(S6)。そして、積層ウェーハを研削と研磨により必要な程度に薄化した上で(S7)、共振子などのSAWデバイスを形成する(S8)。 Subsequently, the respective wafers are bonded on a bonding surface (S5), and a heat treatment is performed to prevent the introduction of crystal defects due to the displacement of the bonding interface (S6). Then, after laminating the laminated wafer to a necessary degree by grinding and polishing (S7), a SAW device such as a resonator is formed (S8).
なお、本発明は、上記実施形態に限定されるものではない。上記実施形態は例示であり、本発明の特許請求の範囲に記載された技術的思想と実質的に同一な構成を有し、同様な作用効果を奏するものは、いかなるものであっても本発明の技術的範囲に包含される。 Note that the present invention is not limited to the above embodiment. The above embodiment is an exemplification, and the present invention has substantially the same configuration as the technical idea described in the claims of the present invention, and has the same effect. Within the technical scope of
<実施例1>
直径100mm、厚さ0.55mmのシリコンウェーハを用意し、温度1000℃で熱酸化膜を480nm程度成長させた。積層ウェーハであるタンタル酸リチウムウェーハ(LTウェーハ)と支持ウェーハであるシリコンウェーハ双方のウェーハの表面粗さがRMSで1.0nm以下であることを確認した。シリコンウェーハの貼り合わせ面に、水素分子イオンを92keVのエネルギーで、ドーズ量が2.0×1016atms/cm2となるように注入した。イオン注入後、10%フッ化水素酸溶液で熱酸化膜を除去した。この時のシリコンウェーハ内の水素原子の貼り合わせ面から深さ方向への濃度分布を図3に示す。図3より、貼り合わせ面近傍の水素濃度が高くなっていることがわかる。
<Example 1>
A silicon wafer having a diameter of 100 mm and a thickness of 0.55 mm was prepared, and a thermal oxide film was grown at a temperature of 1000 ° C. to about 480 nm. It was confirmed that the surface roughness of both the lithium tantalate wafer (LT wafer) as the laminated wafer and the silicon wafer as the support wafer was 1.0 nm or less by RMS. Hydrogen molecular ions were implanted into the bonding surface of the silicon wafer at an energy of 92 keV so that the dose became 2.0 × 10 16 atms / cm 2 . After the ion implantation, the thermal oxide film was removed with a 10% hydrofluoric acid solution. FIG. 3 shows the concentration distribution of hydrogen atoms in the silicon wafer in the depth direction from the bonding surface at this time. FIG. 3 shows that the hydrogen concentration near the bonding surface is high.
これらのウェーハにプラズマ活性化処理を施して表面活性化を行った上で両者を貼り合わせた。貼り合わせ後に120℃で6時間の熱処理を行った後、LTウェーハを研削と研磨により20μmまで薄化した。このウェーハ上に1個の並列共振子と1個の直列共振子とを組み合わせてなる1段ラダーフィルタを作成した。1段ラダーフィルタの波長は5μmとした。 These wafers were subjected to a plasma activation treatment to activate the surface, and then bonded together. After heat treatment at 120 ° C. for 6 hours after bonding, the LT wafer was thinned to 20 μm by grinding and polishing. On this wafer, a one-stage ladder filter was formed by combining one parallel resonator and one series resonator. The wavelength of the one-stage ladder filter was 5 μm.
また比較用に、シリコンウェーハにイオンを注入していない以外は上記と同様に作成した1段ラダーフィルタを用意した。 For comparison, a one-stage ladder filter prepared in the same manner as described above except that ions were not implanted into the silicon wafer was prepared.
比較結果を図4に示す。縦軸は1段ラダーフィルタのS11特性におけるスプリアスの強度(dB)、横軸は1段ラダーフィルタの特性評価に一般に用いられる規格化したLT膜厚(LT膜厚/波長)である。図4より、イオン注入したシリコンウェーハを支持ウェーハとして用いた場合、イオン注入していない場合よりもスプリアスの強度が大幅に低減していることがわかる。 FIG. 4 shows the comparison results. The vertical axis represents the spurious intensity (dB) in the S11 characteristic of the one-stage ladder filter, and the horizontal axis represents the normalized LT film thickness (LT film thickness / wavelength) generally used for evaluating the characteristics of the one-stage ladder filter. From FIG. 4, it can be seen that the spurious intensity is significantly reduced when the ion-implanted silicon wafer is used as the supporting wafer as compared with the case where no ion is implanted.
<実施例2>
実施例1における表面活性化処理方法を、真空イオンビーム活性化、オゾン水処理による活性化、UVオゾン処理による活性化のそれぞれに変更して同様の試験を行った。実施例1との結果の相違は誤差の範囲であり、いずれの処理方法でも同様な効果が得られることが確認された。
<Example 2>
The same test was performed by changing the surface activation treatment method in Example 1 to vacuum ion beam activation, activation by ozone water treatment, and activation by UV ozone treatment. The difference between the results of Example 1 and Example 1 was within the range of the error, and it was confirmed that the same effect was obtained by any of the processing methods.
<実施例3>
実施例1において、注入するイオン種を水素原子とし、打ち込みエネルギーを46KeV(実施例1の半分)とし、ドーズ量を4×1016atoms/cm2としてイオン注入を行い試験を行った。実施例1との結果の相違は誤差の範囲であり、水素イオンを注入しても同様な効果が得られることが確認された。
<Example 3>
In Example 1, a test was performed by performing ion implantation with hydrogen ions as the ion species to be implanted, implantation energy of 46 KeV (half of Example 1), and dose of 4 × 10 16 atoms / cm 2 . The difference between the result of Example 1 and that of Example 1 was within the range of error, and it was confirmed that the same effect can be obtained even if hydrogen ions were implanted.
<実施例4>
実施例1において、注入するイオン種を水素原子とし、イオンのドーズ量を0.8×1016atoms/cm2から1.0×1017atoms/cm2の範囲で変化させた場合のスプリアス強度の確認試験を行った。結果を図5に示す。Referenceはイオン注入を行っていない場合の結果である。図5から、イオン注入の効果はドーズ量が1.0×1016atoms/cm2から顕著になることが確認された。なお、ドーズ量が1.0×1017atoms/cm2より多い場合も実施したが、貼り合わせ後の熱処理の段階で、貼り合わせ基板が割れてしまった。これは、過剰に存在する水素が貼り合わせ界面において接合を不安定にしたためであると推定される。
<Example 4>
In the first embodiment, the spurious intensity when the ion species to be implanted is hydrogen atoms and the dose of ions is changed in the range of 0.8 × 10 16 atoms / cm 2 to 1.0 × 10 17 atoms / cm 2 A confirmation test was performed. FIG. 5 shows the results. Reference is a result when no ion implantation is performed. From FIG. 5, it has been confirmed that the effect of the ion implantation becomes remarkable when the dose is 1.0 × 10 16 atoms / cm 2 . In addition, although the case where the dose amount was more than 1.0 × 10 17 atoms / cm 2 was carried out, the bonded substrate was broken at the stage of heat treatment after bonding. This is presumed to be because excess hydrogen made the bonding unstable at the bonding interface.
<実施例5>
実施例1においてイオン注入後にシリコン上の酸化膜を除去しなかった場合について試験を行った。実施例1との結果の相違は誤差の範囲であり、酸化膜の有無にかかわらず同様な効果が得られることが確認された。
<Example 5>
A test was performed in Example 1 in which the oxide film on silicon was not removed after ion implantation. The difference from the result of Example 1 was within the range of the error, and it was confirmed that the same effect was obtained regardless of the presence or absence of the oxide film.
<実施例6>
実施例1において熱酸化膜の代わりにLPCVD法で成膜したSiN膜やPECVD法で成膜したSiON膜を形成し、イオン注入後もそのまま残して貼り合せを行った場合について試験を行った。実施例1との結果の相違は誤差の範囲であり、酸化膜の有無にかかわらず同様な効果が得られることが確認された。
<Example 6>
In Example 1, a test was performed in which a SiN film formed by an LPCVD method or a SiON film formed by a PECVD method was formed in place of the thermal oxide film, and bonding was performed with the ion implantation left as it was. The difference from the result of Example 1 was within the range of the error, and it was confirmed that the same effect was obtained regardless of the presence or absence of the oxide film.
<実施例7>
実施例1においてシリコンウェーハの代わりに酸化膜等が無いサファイアウェーハを用いて同様の試験を行った。結果を図6に示す。図6から、サファイアウェーハの場合は、シリコンウェーハの場合よりもスプリアス低減効果は減少するものの、効果が得られることがわかった。
<Example 7>
In Example 1, the same test was performed using a sapphire wafer having no oxide film or the like instead of the silicon wafer. FIG. 6 shows the results. From FIG. 6, it is found that the spurious reduction effect is obtained in the case of the sapphire wafer as compared with the case of the silicon wafer, but the effect is obtained.
<実施例8>
実施例1においてイオン注入をシリコンウェーハでなくLTウェーハに行って貼り合わせを行った(その他の条件は同一)。実施例1との結果の相違は誤差の範囲であり、イオン注入は、シリコンウェーハに対して行ってもLTウェーハに対して行っても同様な効果が得られることが確認された。
<Example 8>
In Example 1, the bonding was performed by performing ion implantation on the LT wafer instead of the silicon wafer (other conditions were the same). The difference between the result of Example 1 and that of Example 1 lies in the range of the error, and it was confirmed that the same effect can be obtained whether the ion implantation is performed on the silicon wafer or the LT wafer.
<実施例9>
実施例1においてイオンをシリコンウェーハとLTウェーハの双方に注入して試験を行った(その他の条件は同一)。結果を図7に示す。図7から、スプリアス低減効果は一方にイオン注入した際よりも若干大きいことがわかる。つまり、イオン注入をシリコンウェーハとLTウェーハの双方に行うことで、一方に対して行うより同等以上の効果が得られることが確認された。
<Example 9>
In Example 1, a test was performed by implanting ions into both the silicon wafer and the LT wafer (other conditions were the same). FIG. 7 shows the results. From FIG. 7, it can be seen that the spurious reduction effect is slightly larger than when one is ion-implanted. That is, it was confirmed that performing the ion implantation on both the silicon wafer and the LT wafer can obtain an effect equal to or greater than performing the ion implantation on one of the silicon wafer and the LT wafer.
<実施例10>
実施例1において水素イオンの代わりにヘリウムイオンを注入して試験を行った。ドーズ量は4×1016atoms/cm2とし、加速電圧は140KeVとした。実施例1との結果の相違は誤差の範囲であり、ヘリウムイオンを注入しても同様な効果が得られることが確認された。
<Example 10>
In Example 1, a test was performed by implanting helium ions instead of hydrogen ions. The dose was 4 × 10 16 atoms / cm 2 and the acceleration voltage was 140 KeV. The difference from the result of Example 1 was within the range of the error, and it was confirmed that the same effect could be obtained even if helium ions were implanted.
<実施例11>
直径100mm、厚さ0.55mmのシリコンウェーハを用意し、温度1000℃で熱酸化膜を480nm程度成長させた。積層ウェーハであるタンタル酸リチウムウェーハ(LTウェーハ)と支持ウェーハであるシリコンウェーハ双方のウェーハの表面粗さがRMSで1.0nm以下であることを確認した。シリコンウェーハの貼り合わせ面に、水素分子イオンを92KeVのエネルギーで、ドーズ量が2.0×1016atms/cm2となるように注入した。イオン注入後は10%フッ化水素酸溶液で酸化膜を除去した。この時のシリコン内の水素原子の貼り合わせ面から深さ方向への濃度分布を図3に示す。図3より、貼り合わせ面近傍には水素濃度が高くなっていることがわかる。
<Example 11>
A silicon wafer having a diameter of 100 mm and a thickness of 0.55 mm was prepared, and a thermal oxide film was grown at a temperature of 1000 ° C. to about 480 nm. It was confirmed that the surface roughness of both the lithium tantalate wafer (LT wafer) as the laminated wafer and the silicon wafer as the support wafer was 1.0 nm or less by RMS. Hydrogen molecular ions were implanted into the bonding surface of the silicon wafer at an energy of 92 KeV so that the dose became 2.0 × 10 16 atms / cm 2 . After the ion implantation, the oxide film was removed with a 10% hydrofluoric acid solution. FIG. 3 shows the concentration distribution of hydrogen atoms in silicon in the depth direction from the bonding surface at this time. FIG. 3 shows that the hydrogen concentration is high near the bonding surface.
これらのウェーハにプラズマ活性化処理を施して表面活性化を行った上で両者を貼り合わせた。貼り合せ後に120℃で6時間の熱処理を行った後、LTウェーハを研削と研磨により45μmまで薄化した。 These wafers were subjected to a plasma activation treatment to activate the surface, and then bonded together. After heat treatment at 120 ° C. for 6 hours after bonding, the LT wafer was thinned to 45 μm by grinding and polishing.
上記LTウェーハは次のように作成したものを用いた。まず、Li:Ta=48.3:51.7である概略コングルーエント組成の4インチ径LiTaO3単結晶インゴットをスライスして、46.3°回転YカットのLiTaO3基板を370μm厚に切り出した。その後、必要に応じて、各スライスウェーハの面粗さをラップ工程により算術平均粗さRa値で0.15μmに調整し、その仕上がり厚みを350μmとした。 The LT wafer used was prepared as follows. First, a 4-inch diameter LiTaO 3 single crystal ingot having an approximate congruent composition of Li: Ta = 48.3: 51.7 is sliced, and a 46.3 ° rotation Y-cut LiTaO 3 substrate is cut into a thickness of 370 μm. Was. Thereafter, if necessary, the surface roughness of each slice wafer was adjusted to an arithmetic average roughness Ra value of 0.15 μm by a lapping process, and the finished thickness was 350 μm.
次に、表裏面を平面研磨によりRa値で0.01μmの準鏡面に仕上げた基板を、Li3TaO4を主成分とするLi、Ta、Oからなる粉体の中に埋め込んだ。このとき、Li3TaO4を主成分とする粉体として、Li3TaO4:Ta2O5粉をモル比で7:3の割合に混合し、1300℃で12時間焼成したものを用いた。そして、このようなLi3TaO4を主成分とする粉体を小容器に敷き詰め、Li3TaO4粉中にスライスウェーハを複数枚埋め込んだ。 Next, the substrate whose front and back surfaces were finished to a quasi-mirror surface with a Ra value of 0.01 μm by plane polishing was embedded in a powder composed of Li, Ta, and O mainly containing Li 3 TaO 4 . At this time, as a powder mainly composed of Li 3 TaO 4 , a powder of Li 3 TaO 4 : Ta 2 O 5 mixed at a molar ratio of 7: 3 and fired at 1300 ° C. for 12 hours was used. . Then, such a powder mainly composed of Li 3 TaO 4 was spread in a small container, and a plurality of slice wafers were embedded in the Li 3 TaO 4 powder.
そして、この小容器を電気炉にセットし、その炉内をN2雰囲気として、900℃で24時間加熱して、スライスウェーハの表面から中心部へLiを拡散させた。その後、この処理の降温過程において、雰囲気を大気とし800℃で12時間アニール処理を施すとともに、ウェーハをさらに降温する過程の770℃〜500℃の間に、概略+Z軸方向に4000V/mの電界を印可した後、温度を室温まで下げる処理を行った。 Then, the small container was set in an electric furnace, and the furnace was heated to 900 ° C. for 24 hours in an N 2 atmosphere to diffuse Li from the surface of the sliced wafer to the center. Thereafter, in the temperature lowering process of this process, annealing is performed at 800 ° C. for 12 hours in the atmosphere, and an electric field of 4,000 V / m approximately in the + Z-axis direction during 770 ° C. to 500 ° C. in the process of further lowering the temperature of the wafer. After applying, a process of lowering the temperature to room temperature was performed.
この処理の後に、その粗面側をサンドブラストによりRa値で約0.15μmに仕上げ加工を行うとともに、その概略鏡面側を3μmの研磨加工を行って、複数枚のLiTaO3単結晶基板としたものを作成した。 After this treatment, the rough side is finished by sandblasting to an Ra value of about 0.15 μm, and the rough mirror side is polished to 3 μm to obtain a plurality of LiTaO 3 single crystal substrates. It was created.
上記のように作成したLTウェーハのLi濃度の厚み方向プロファイルを図8に示す。厚みは貼り合わせ面を0μmとし、そこからの深さを示す。図8からわかるように、LTウェーハのLi濃度は貼り合わせ面で最も高く、深くなるにつれ濃度が低くなる。 FIG. 8 shows the profile in the thickness direction of the Li concentration of the LT wafer prepared as described above. The thickness indicates the depth from the bonding surface of 0 μm. As can be seen from FIG. 8, the Li concentration of the LT wafer is the highest on the bonding surface, and decreases with increasing depth.
比較のため、前記のLi3TaO4粉中での処理をせずに、厚み方向にLi濃度の濃淡が形成されていないLiTaO3単結晶基板についても同様に複合ウェーハを作成した。 For comparison, a composite wafer was similarly prepared for a LiTaO 3 single crystal substrate having no Li concentration shading in the thickness direction without performing the treatment in the Li 3 TaO 4 powder described above.
厚み方向に上記のようなLi濃度の濃淡があるLTウェーハを用いて作成した複合ウェーハと厚み方向にLi濃度の濃淡がないLTウェーハを用いて作成した複合ウェーハのそれぞれについて、ウェーハ上に波長が5μmの共振子を作成した。図9にそれぞれの共振子の入力インピーダンス波形(主共振拡大波形)を示す。厚み方向に上記のようなLi濃度の濃淡がある場合は、厚み方向にLi濃度の分布が無い場合に比べ、主共振波形上にあるDipが小さく好ましいことがわかる。 For each of the composite wafer prepared using the LT wafer having the above-described Li concentration in the thickness direction and the LT wafer having no Li concentration in the thickness direction, the wavelength on the wafer is different. A 5 μm resonator was made. FIG. 9 shows an input impedance waveform (main resonance expanded waveform) of each resonator. It can be seen that Dip on the main resonance waveform is smaller and preferable when there is such a concentration of Li concentration in the thickness direction as compared to when there is no distribution of Li concentration in the thickness direction.
図10は図9に示す周波数−入力インピーダンス特性について周波数範囲を広げたものである。図10から、主共振周波数より高い900〜1200MHzでのスプリアス応答は、LTウェーハの厚み方向に上記のようなLi濃度の濃淡がある場合と厚み方向にLi濃度の濃淡が無い場合とでさほど振幅に違いはないことがわかる。 FIG. 10 shows an expanded frequency range of the frequency-input impedance characteristics shown in FIG. From FIG. 10, the spurious response at 900 to 1200 MHz higher than the main resonance frequency shows a large amplitude when the density of the Li concentration is in the thickness direction of the LT wafer and when the density of the Li concentration is not in the thickness direction. It turns out that there is no difference.
図11は上記共振子のQ値を示したものである。図11から、LTウェーハの厚み方向に上記のようなLi濃度の濃淡がある場合は、厚み方向にLi濃度の分布が無い場合に比べ、Q値が大きくなっていることがわかる。したがって、LTウェーハの厚み方向にLi濃度の濃淡がある場合、主共振のスプリアスが少なくなるとともにQ値が上がる。一方、主共振より高い周波数のスプリアス応答は、LTウェーハの厚み方向にLi濃度の濃淡がある場合とない場合とで、ほぼ同様な結果が得られた。 FIG. 11 shows the Q value of the resonator. From FIG. 11, it can be seen that the Q value is larger in the case where the density of the Li concentration is as described above in the thickness direction of the LT wafer than in the case where there is no distribution of the Li concentration in the thickness direction. Therefore, when the density of the Li concentration varies in the thickness direction of the LT wafer, the spurious of the main resonance decreases and the Q value increases. On the other hand, the spurious response at a frequency higher than the main resonance showed almost the same results with and without the Li concentration in the thickness direction of the LT wafer.
10 積層ウェーハ
11、21 貼り合わせ面
20 支持ウェーハ
22 イオン注入領域
31 界面
DESCRIPTION OF SYMBOLS 10 Laminated wafer 11, 21 Bonding surface 20 Support wafer 22 Ion implantation area 31 Interface
Claims (8)
貼り合わせに先立ち、前記積層ウェーハ及び/又は前記支持ウェーハの貼り合わせ面からイオンを注入して、それぞれの貼り合わせ面近傍の結晶性を乱すイオン注入ステップを実行することを特徴とする複合ウェーハの製造方法。 In a composite wafer manufacturing method for manufacturing a composite wafer by bonding a lithium tantalate wafer or a lithium niobate wafer (hereinafter, referred to as a “laminated wafer”) to a supporting wafer having a smaller coefficient of thermal expansion,
Prior to the bonding, an ion implantation step of implanting ions from a bonding surface of the laminated wafer and / or the supporting wafer and disturbing crystallinity near each bonding surface is performed. Production method.
The method of manufacturing a composite wafer according to any one of claims 1 to 7, wherein the laminated wafer has a higher lithium concentration as approaching a bonding surface in a thickness direction.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2019210240A JP6771635B2 (en) | 2019-11-21 | 2019-11-21 | Manufacturing method of composite wafer |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2019210240A JP6771635B2 (en) | 2019-11-21 | 2019-11-21 | Manufacturing method of composite wafer |
Related Parent Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2016090755A Division JP6632462B2 (en) | 2016-04-28 | 2016-04-28 | Manufacturing method of composite wafer |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2020043591A true JP2020043591A (en) | 2020-03-19 |
JP6771635B2 JP6771635B2 (en) | 2020-10-21 |
Family
ID=69798832
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2019210240A Active JP6771635B2 (en) | 2019-11-21 | 2019-11-21 | Manufacturing method of composite wafer |
Country Status (1)
Country | Link |
---|---|
JP (1) | JP6771635B2 (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2023008382A1 (en) | 2021-07-28 | 2023-02-02 | 信越化学工業株式会社 | Method for manufacturing spin wave excitation/detection structure |
Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2003017967A (en) * | 2001-06-29 | 2003-01-17 | Toshiba Corp | Surface acoustic wave element and its manufacturing method |
US20050057324A1 (en) * | 2003-09-12 | 2005-03-17 | Keiji Onishi | Thin film bulk acoustic resonator, method for producing the same, filter, composite electronic component device, and communication device |
WO2009081651A1 (en) * | 2007-12-25 | 2009-07-02 | Murata Manufacturing Co., Ltd. | Composite piezoelectric substrate manufacturing method |
JP2012005106A (en) * | 2010-05-17 | 2012-01-05 | Murata Mfg Co Ltd | Manufacturing method of piezoelectric composite substrate and piezoelectric device |
-
2019
- 2019-11-21 JP JP2019210240A patent/JP6771635B2/en active Active
Patent Citations (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP2003017967A (en) * | 2001-06-29 | 2003-01-17 | Toshiba Corp | Surface acoustic wave element and its manufacturing method |
US20050057324A1 (en) * | 2003-09-12 | 2005-03-17 | Keiji Onishi | Thin film bulk acoustic resonator, method for producing the same, filter, composite electronic component device, and communication device |
WO2009081651A1 (en) * | 2007-12-25 | 2009-07-02 | Murata Manufacturing Co., Ltd. | Composite piezoelectric substrate manufacturing method |
JP2012005106A (en) * | 2010-05-17 | 2012-01-05 | Murata Mfg Co Ltd | Manufacturing method of piezoelectric composite substrate and piezoelectric device |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO2023008382A1 (en) | 2021-07-28 | 2023-02-02 | 信越化学工業株式会社 | Method for manufacturing spin wave excitation/detection structure |
Also Published As
Publication number | Publication date |
---|---|
JP6771635B2 (en) | 2020-10-21 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
JP6632462B2 (en) | Manufacturing method of composite wafer | |
JP6335831B2 (en) | Manufacturing method of bonded substrate | |
JP4657002B2 (en) | Composite piezoelectric substrate | |
JP6756843B2 (en) | Manufacturing method of composite substrate | |
CN203851109U (en) | Composite substrate | |
KR20190031229A (en) | Composite Substrate for Surface Acoustic Wave Device, Method of Manufacturing the Same, and Surface Acoustic Wave Device Using the Composite Substrate | |
JP2018014606A (en) | Method for manufacturing composite substrate for surface acoustic wave device | |
KR102410318B1 (en) | Hybrid structure for surface acoustic wave device | |
JP2019077607A (en) | Lithium tantalate single crystal substrate, substrate bonded therewith, method for manufacturing bonded substrate, and surface acoustic wave device using bonded substrate | |
JP2007134889A (en) | Composite piezoelectric substrate | |
WO2017051747A1 (en) | Bonded substrate, method for producing same and surface acoustic wave device using said bonded substrate | |
JP6406670B2 (en) | Lithium tantalate single crystal substrate for surface acoustic wave device, device using the same, manufacturing method and inspection method thereof | |
JP6771635B2 (en) | Manufacturing method of composite wafer | |
KR20230007355A (en) | Piezoelectric composite substrate and its manufacturing method | |
CN111883648B (en) | Preparation method of piezoelectric film, piezoelectric film and band-pass filter | |
CN117460388A (en) | Composite substrate and preparation method thereof | |
JP2021125496A (en) | Composite substrate and manufacturing method thereof |
Legal Events
Date | Code | Title | Description |
---|---|---|---|
A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20191121 |
|
A621 | Written request for application examination |
Free format text: JAPANESE INTERMEDIATE CODE: A621 Effective date: 20191121 |
|
A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20200828 |
|
TRDD | Decision of grant or rejection written | ||
A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20200915 |
|
A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20200929 |
|
R150 | Certificate of patent or registration of utility model |
Ref document number: 6771635 Country of ref document: JP Free format text: JAPANESE INTERMEDIATE CODE: R150 |