JP2019533334A5 - - Google Patents

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JP2019533334A5
JP2019533334A5 JP2019508257A JP2019508257A JP2019533334A5 JP 2019533334 A5 JP2019533334 A5 JP 2019533334A5 JP 2019508257 A JP2019508257 A JP 2019508257A JP 2019508257 A JP2019508257 A JP 2019508257A JP 2019533334 A5 JP2019533334 A5 JP 2019533334A5
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JP7069121B2 (ja
JP2019533334A (ja
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JP2019508257A 2016-08-24 2017-08-15 デバイス間通信における復調基準信号シーケンス選択 Active JP7069121B2 (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201662379218P 2016-08-24 2016-08-24
US62/379,218 2016-08-24
US15/676,762 2017-08-14
US15/676,762 US10389502B2 (en) 2016-08-24 2017-08-14 Demodulation reference signal sequence selection in device-to-device communication
PCT/US2017/046988 WO2018038978A1 (en) 2016-08-24 2017-08-15 Demodulation reference signal sequence selection in device-to-device communication

Publications (3)

Publication Number Publication Date
JP2019533334A JP2019533334A (ja) 2019-11-14
JP2019533334A5 true JP2019533334A5 (enExample) 2020-09-10
JP7069121B2 JP7069121B2 (ja) 2022-05-17

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JP2019508257A Active JP7069121B2 (ja) 2016-08-24 2017-08-15 デバイス間通信における復調基準信号シーケンス選択

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US (2) US10389502B2 (enExample)
EP (1) EP3504815B1 (enExample)
JP (1) JP7069121B2 (enExample)
CN (2) CN113364720B (enExample)
AU (1) AU2017316384B2 (enExample)
CA (1) CA3031690C (enExample)
ES (1) ES2910061T3 (enExample)
WO (1) WO2018038978A1 (enExample)

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US11700095B2 (en) * 2019-10-04 2023-07-11 Qualcomm Incorporated Channel estimation for two-stage sidelink control using sidelink data channel DMRS
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