JP2014527750A5 - - Google Patents

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JP2014527750A5
JP2014527750A5 JP2014524921A JP2014524921A JP2014527750A5 JP 2014527750 A5 JP2014527750 A5 JP 2014527750A5 JP 2014524921 A JP2014524921 A JP 2014524921A JP 2014524921 A JP2014524921 A JP 2014524921A JP 2014527750 A5 JP2014527750 A5 JP 2014527750A5
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JP2014524921A 2011-08-05 2012-08-06 Ue−特定復調基準信号スクランブリングのための装置及び方法 Active JP6105582B2 (ja)

Applications Claiming Priority (13)

Application Number Priority Date Filing Date Title
US201161515730P 2011-08-05 2011-08-05
US61/515,730 2011-08-05
US201161525605P 2011-08-19 2011-08-19
US61/525,605 2011-08-19
US201161554891P 2011-11-02 2011-11-02
US61/554,891 2011-11-02
US201161565885P 2011-12-01 2011-12-01
US61/565,885 2011-12-01
US201261651885P 2012-05-25 2012-05-25
US61/651,885 2012-05-25
US13/564,469 2012-08-01
US13/564,469 US8995385B2 (en) 2011-08-05 2012-08-01 Apparatus and method for UE-specific demodulation reference signal scrambling
PCT/KR2012/006235 WO2013022244A2 (en) 2011-08-05 2012-08-06 Apparatus and method for ue-specific demodulation reference signal scrambling

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JP2014527750A JP2014527750A (ja) 2014-10-16
JP2014527750A5 true JP2014527750A5 (enExample) 2015-09-24
JP6105582B2 JP6105582B2 (ja) 2017-03-29

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US (1) US8995385B2 (enExample)
EP (1) EP2740248B1 (enExample)
JP (1) JP6105582B2 (enExample)
KR (1) KR101979810B1 (enExample)
CN (1) CN103891232B (enExample)
WO (1) WO2013022244A2 (enExample)

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