JP2019201032A - Manufacturing method for semiconductor device - Google Patents

Abstract

To improve reliability of a semiconductor device.SOLUTION: First, an n-type semiconductor substrate 1 that is made from silicon carbide and has an n-type semiconductor layer 2 formed on a surface thereof is prepared. Next, an n-type semiconductor region 4 having a relatively high impurity concentration is formed in the semiconductor layer 2. Next, first heat treatment using a laser is performed on the semiconductor region 4 to form an activation region 9 at a surface of the semiconductor region 4. In the activation region 9, the semiconductor region 4 is crystallized and impurities contained in the semiconductor region 4 are activated. Next, second heat treatment using high temperature is performed on the semiconductor region 4, the semiconductor layer 2, and the semiconductor substrate 1 in a state in which the semiconductor region 4 is covered with a protection film 10.SELECTED DRAWING: Figure 4

Description

  The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing a semiconductor device using silicon carbide.

  Since silicon carbide (hereinafter referred to as SiC) has a wide band gap and a maximum insulating electric field that is about an order of magnitude larger than that of silicon, SiC has attracted attention as a material for power devices.

  As a method for introducing impurities into a semiconductor, a diffusion method and an ion implantation method are known. However, since SiC has a small impurity diffusion coefficient, it is difficult to introduce impurities by the diffusion method. Therefore, in SiC, an ion implantation method is used to obtain a predetermined impurity concentration and depth distribution. In general, when impurities are introduced by an ion implantation method, interstitial atoms and lattice defects are generated in a semiconductor substrate. Therefore, it is necessary to perform heat treatment for the purpose of restoring crystallinity and activating impurities.

  In Patent Document 1 and Patent Document 2, an impurity region is formed in a semiconductor layer made of SiC by an ion implantation method, and then heat treatment is performed at a temperature of 1400 ° C. or higher with the surface of the semiconductor layer covered with an insulating film. A technique for activating the impurity region by performing the technique is disclosed.

  Patent Documents 3 and 4 disclose a technique for forming a carbon layer on the surface of a semiconductor layer by forming an impurity region in a semiconductor layer made of SiC by an ion implantation method and then performing a heat treatment in a reduced-pressure atmosphere. It is disclosed. And the technique which activates an impurity area | region by performing further heat processing in the pressure higher than the process of forming a carbon layer and high temperature is disclosed.

  Patent Document 5 discloses a technique in which an impurity region is formed in a semiconductor layer made of SiC, and then a first heat treatment is performed at a temperature of 1000 ° C. or more and 1600 ° C. or less using heat treatment at high speed. . Next, a technique for activating the impurity region by performing a second heat treatment at a temperature lower than the first heat treatment is disclosed. Here, the surface of SiC is not covered with a protective film such as carbon.

  Patent Document 6 discloses laser annealing having an irradiation power that does not evaporate an element on the surface of SiC as a heat treatment performed on the SiC substrate, and discloses KrF and XeCl excimer lasers.

  Patent Document 7 discloses a technique of irradiating a laser beam having energy equal to or higher than the band gap energy of SiC and a method of irradiating with changing the power density of the laser while the SiC substrate is heated.

  Patent Documents 8 and 9 disclose heat treatment using a heater for assisting laser annealing in order to reduce damage to the surface of the SiC substrate due to laser annealing.

JP 2014-229708 A US Patent Application Publication No. 2014/0346529 International Publication No. 2005/076327 US Patent Application Publication No. 2006/0220027 JP 2016-213420 A JP 2000-277448 A JP 2002-289550 A JP 2012-124263 A US Patent Application Publication No. 2013/0040445

  Since SiC has a large band gap, activation annealing at a high temperature exceeding 1500 ° C. is required. However, when such high-temperature annealing is performed for a long time, unevenness is generated on the surface of the SiC substrate due to a problem that atoms are detached from the surface of the SiC substrate and a problem that migration occurs on the surface of the SiC substrate. . When irregularities occur on the surface of the SiC substrate, the electric field concentrates on the irregularities, which causes an increase in leakage current in a device formed on the SiC substrate. That is, the reliability of the semiconductor device may be reduced due to the unevenness of the surface of the SiC substrate.

  Further, in order to suppress the occurrence of unevenness on the surface of the SiC substrate, a method of performing high-temperature annealing on the SiC substrate after the surface of the SiC substrate is protected by a protective film such as carbon is used. In order to solve this problem, a protective film alone is not sufficient.

  On the other hand, the activation method using laser annealing is formed in a deep position of the SiC substrate because the light absorption coefficient of the SiC substrate is low with respect to light having a frequency for activating impurities introduced into the SiC substrate. In order to activate the impurity region, high energy laser irradiation is required. However, high-energy laser irradiation has a problem that SiC sublimation occurs on the surface of the SiC substrate. Further, instead of high-energy laser irradiation, a method of performing low-energy laser irradiation divided into a plurality of times, and a method of using a heater as an auxiliary to laser annealing, increase the running cost, improve the annealing apparatus, or There is a problem that requires a large amount of investment, such as the introduction of a new annealing device.

  Other problems and novel features will become apparent from the description of the specification and the accompanying drawings.

  Of the embodiments disclosed in the present application, the outline of typical ones will be briefly described as follows.

  A method for manufacturing a semiconductor device according to an embodiment includes a step of preparing a semiconductor substrate made of silicon carbide and having a semiconductor layer formed on a surface thereof, and forming a first semiconductor region in the semiconductor layer. And a step of performing a first heat treatment using a laser on the first semiconductor region. The method for manufacturing a semiconductor device further includes a step of forming a protective film on the first semiconductor region, and the first semiconductor region, the semiconductor layer, and the semiconductor substrate in a state where the first semiconductor region is covered with the protective film. On the other hand, a step of performing a second heat treatment.

  According to one embodiment disclosed in the present application, the reliability of a semiconductor device can be improved.

2 is a cross-sectional view of the semiconductor device of First Embodiment. FIG. 7 is a cross-sectional view showing a manufacturing step of the semiconductor device of First Embodiment; FIG. FIG. 3 is a cross-sectional view showing a manufacturing step of the semiconductor device following that of FIG. 2; FIG. 4 is a cross-sectional view showing a manufacturing step of the semiconductor device following that of FIG. 3; 11 is a cross-sectional view showing a manufacturing step of the semiconductor device of Second Embodiment; FIG. 10 is a cross-sectional view showing a manufacturing process of a semiconductor device of Modification 1; FIG. FIG. 10 is a plan view showing a manufacturing process for the semiconductor device of the third embodiment. 10 is a plan view showing a manufacturing process of a semiconductor device of Modification 2; FIG.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. Note that components having the same function are denoted by the same reference symbols throughout the drawings for describing the embodiments, and the repetitive description thereof will be omitted. Also, in the following embodiments, the description of the same or similar parts will not be repeated in principle unless particularly necessary.

(Embodiment 1)
<Structure of semiconductor device>
Hereinafter, the structure of the semiconductor device of the present embodiment will be described with reference to FIG. FIG. 1 shows a cross-sectional view of two JBS (Junction Barrier Schottky) diodes DI as an example of a SiC power device which is a semiconductor device. In the present embodiment, only the main part of the JBS diode DI will be described, and description of the electric field relaxation region that is the peripheral part of the JBS diode DI will be omitted.

  The semiconductor substrate 1 used in the present embodiment is a substrate containing carbon and silicon, specifically, a silicon carbide (SiC) substrate into which an n-type impurity is introduced. An n-type semiconductor layer 2 having a relatively low impurity concentration is formed on the surface of the semiconductor substrate 1. Similar to the semiconductor substrate 1, the semiconductor layer 2 also contains carbon and silicon.

In the semiconductor layer 2, an n-type semiconductor region 4 having an impurity concentration higher than that of the semiconductor layer 2 is formed. A plurality of p-type semiconductor regions 3 are formed in the semiconductor region 4 so as to be separated from each other. The n-type semiconductor region 4 has an impurity concentration of 2 × 10 ¹⁸ / cm ³ , for example, and the p-type semiconductor region 3 has an impurity concentration of 1 × 10 ¹⁸ / cm ³ to 1 × 10 ²⁰ / cm ³ , for example. Have

  An electrode 5 is formed on the semiconductor region 3 and the semiconductor region 4 so as to be in direct contact with the semiconductor region 3 and the semiconductor region 4. The electrode 5 is, for example, a laminated metal film of a titanium film and an aluminum film formed on the titanium film, and is Schottky connected to the semiconductor region 3 and the semiconductor region 4.

  An electrode 6 is formed on the back surface of the semiconductor substrate 1. The electrode 6 is a silicide film made of nickel silicide, for example, and is ohmically connected to the semiconductor substrate 1.

  The JBS diode DI of the present embodiment is a kind of Schottky barrier diode, and the current path between the electrode 5 and the electrode 6 is mainly the n-type semiconductor region 4. In the JBS diode DI of the present embodiment, a plurality of p-type semiconductor regions 3 are formed in the n-type semiconductor region 4. When a reverse bias is applied to the JBS diode DI, a leakage current may flow from the interface between the electrode 5 and the semiconductor region 4 toward the semiconductor substrate 1. At this time, the leakage current can be suppressed by narrowing the path of the leakage current by the depletion layers generated from the plurality of semiconductor regions 3.

  However, as described above, when heat treatment at a high temperature of 1500 ° C. or higher is performed for a long time in order to activate impurities contained in the semiconductor layer 2, the semiconductor region 3, and the semiconductor region 4, the semiconductor region 3 and the semiconductor Concavities and convexities are generated on the surface of the region 4, and the electric field is concentrated on the concavities and convexities, which causes the leakage current to increase. Therefore, the reliability of the JBS diode DI that is the semiconductor device of the present embodiment may be reduced.

  In order to eliminate such fear, in this embodiment, as shown in FIG. 1, an activation region 9 is provided in the vicinity of the surface of the semiconductor region 3 and the semiconductor region 4. The activated region 9 is a region located, for example, at a depth of 100 nm from the surface of the semiconductor region 3 and the semiconductor region 4, and is a region crystallized by a first heat treatment using a laser described later. 3 and the impurity contained in the semiconductor region 4 are activated regions.

  Hereinafter, the characteristics of the activation region 9 will be described in detail while explaining the method for manufacturing the semiconductor device of the present embodiment.

<Method for Manufacturing Semiconductor Device>
2 to 4 are cross-sectional views showing a method of manufacturing the semiconductor device shown in FIG.

  As shown in FIG. 2, first, a semiconductor substrate 1 having an n-type semiconductor layer 2 formed on its surface is prepared. The semiconductor substrate 1 is a substrate containing carbon and silicon, and is a silicon carbide (SiC) substrate into which an n-type impurity is introduced. The semiconductor layer 2 is a layer formed on the semiconductor substrate 1 by an epitaxial growth method and containing carbon and silicon.

Next, an n-type semiconductor region 4 having an impurity concentration higher than that of the semiconductor layer 2 is formed in the semiconductor layer 2 by ion implantation. The semiconductor region 4 is formed, for example, by ion implantation of nitrogen, and the dose amount of nitrogen is, for example, 1.6 × 10 ¹² / cm ² . Here, the semiconductor region 4 is formed from the surface of the semiconductor layer 2 to a depth of 800 nm to 850 nm. In addition, this ion implantation may be performed not only once but divided into a plurality of times by changing the implantation energy.

  FIG. 3 shows a process for forming the semiconductor region 3.

  First, an insulating film made of, for example, silicon oxide is formed on the semiconductor region 4. Next, the mask pattern 7 is formed by patterning this insulating film using a photolithography method and an etching process. Next, ions 8 are introduced into the semiconductor region 4 in a state where a part of the semiconductor region 4 is selectively covered with the mask pattern 7.

In FIG. 3, the ions 8 are indicated by arrows, and ionized aluminum or boron is used for the ions 8. The dose amount of the ions 8 is, for example, 1.8 × 10 ¹⁴ / cm ² . As a result, a plurality of p-type semiconductor regions 3 are formed in the semiconductor region 4 exposed from the mask pattern 7. Here, the semiconductor region 3 is formed from the surface of the semiconductor layer 2 to a depth of 600 nm to 800 nm. In addition, this ion implantation may be performed not only once but divided into a plurality of times by changing the implantation energy.

  The planar shape of the mask pattern 7 can be a stripe shape, an island shape, a polygonal shape, or a lattice shape. Thereafter, the mask pattern 7 is removed by wet etching or the like.

  FIG. 4 shows a first heat treatment step using a laser and a high temperature second heat treatment step using a diffusion furnace.

  First, a first heat treatment using a laser is performed on the vicinity of the surfaces of the semiconductor region 3 and the semiconductor region 4. Here, a KrF excimer laser having energy equal to or higher than the band gap energy of SiC and having a wavelength of 248 nm is used. Thereby, impurities near the surfaces of the semiconductor region 3 and the semiconductor region 4 are activated, and an activated region 9 is formed. Specifically, the activated region 9 is a region in which impurities contained in the semiconductor region 3 and the semiconductor region 4 are activated from the surface of the semiconductor region 3 and the semiconductor region 4 to a depth of 100 nm. Further, the crystallinity of the activated region 9 is also improved by the first heat treatment using this laser.

  Next, a protective film 10 made of, for example, a carbon film or an organic film is formed on the semiconductor region 3 and the semiconductor region 4. Next, in a state where the semiconductor region 3 and the semiconductor region 4 are covered with the protective film 10, the semiconductor region 4, the semiconductor region 3, the semiconductor layer 2, and the semiconductor substrate 1 are subjected to a second heat treatment using a diffusion furnace. . This 2nd heat processing is performed at the temperature of 1500 degreeC or more, for example, is performed at the temperature of the range of 1500 to 2000 degreeC. In addition, the protective film 10 is provided mainly to suppress as much as possible the problem of atomic detachment from the surface of the semiconductor substrate 1 and the problem of migration on the surface of the semiconductor substrate 1 due to the second heat treatment. Yes. By such second heat treatment, the impurities contained in the semiconductor region 4, the semiconductor region 3, the semiconductor layer 2, and the semiconductor substrate 1 are activated. Thereafter, the protective film 10 is removed by wet etching or the like.

  In the present embodiment, the protective film 10 is formed after the first heat treatment using the laser. However, the protective film 10 is formed first, and the semiconductor region 3 and the semiconductor region 4 are protected. The first heat treatment using a laser may be performed in the state covered with the film 10, and then the second heat treatment using a diffusion furnace may be performed. However, in this case, if the protective film 10 is a carbon film, the KrF excimer laser may be absorbed by the protective film 10. Therefore, the protective film 10 has an organic film as a film having a low absorption rate of the laser wavelength. Is preferably used.

  Thereafter, the JBS diode DI which is the semiconductor device shown in FIG. 1 is manufactured through the following manufacturing process.

  First, for example, a titanium film and an aluminum film are sequentially formed on the semiconductor region 3 and the semiconductor region 4 by using, for example, a sputtering method. Next, although not shown in the drawing, the electrode 5 is formed by patterning a laminated metal film of a titanium film and an aluminum film using a photolithography method and an etching process. The electrode 5 is formed so as to be in direct contact with the semiconductor region 3 and the semiconductor region 4 and is Schottky connected to the semiconductor region 3 and the semiconductor region 4.

  Next, a metal film made of, for example, nickel is formed on the back surface of the semiconductor substrate 1 by using, for example, a sputtering method. Next, heat treatment is performed on the metal film to react the material included in the semiconductor substrate 1 with the material included in the metal film, thereby forming a silicide film made of nickel silicide. This silicide film is ohmically connected to the semiconductor substrate 1 to form an electrode 6.

<Main features of this embodiment>
As described in FIG. 4, the main feature of the present embodiment is that first, heat treatment using a laser is performed on the semiconductor region 3 and the vicinity of the surface of the semiconductor region 4, and then the semiconductor region 4, The second heat treatment at 1500 ° C. or higher using a diffusion furnace is performed on the semiconductor region 3, the semiconductor layer 2, and the semiconductor substrate 1.

  As described above, when the impurity in each region is activated by heat treatment at a high temperature of 1500 ° C. or higher, irregularities are generated on the surfaces of the semiconductor region 3 and the semiconductor region 4. On the other hand, since heat treatment using a laser has a low laser absorption coefficient of SiC, high-energy laser irradiation is required to activate an impurity region formed at a deep position. However, high-energy laser irradiation has a problem that SiC sublimation occurs.

  In the present embodiment, first, an activation region 9 is formed by performing a first heat treatment using a laser on the vicinity of the surface of the semiconductor region 3 and the semiconductor region 4. In the activation region 9, impurities contained in the semiconductor region 3 and the semiconductor region 4 are activated, and the crystallinity of the surfaces of the semiconductor region 3 and the semiconductor region 4 is improved. If the crystallinity of the activated region 9 is good, element detachment due to subsequent second heat treatment at a high temperature of 1500 ° C. or higher is unlikely to occur, so that unevenness is hardly generated on the surfaces of the semiconductor region 3 and the semiconductor region 4.

  In particular, in the JBS diode DI as in the present embodiment, it is important that the surface state of the semiconductor region 3 to which Schottky connection is made is good. If the surface of the semiconductor region 3 is uneven, the electric field concentrates on the unevenness, and thus there is a problem that the unevenness causes an increase in leakage current. Further, the contact area between the semiconductor region 3 and the electrode 5 is reduced by the unevenness. Because there is a problem.

  As described above, in order to suppress an increase in leakage current, it is efficient to selectively improve the unevenness of the surface of the semiconductor region 3. Therefore, in the present embodiment, the first heat treatment using a laser is performed to efficiently crystallize only the activation region 9 having a relatively shallow depth. Specifically, a region having a depth of 100 nm from the surface of the semiconductor region 3 and the semiconductor region 4 is formed as the activation region 9. For this reason, it is not necessary to crystallize and activate the entire regions (semiconductor layer 2, semiconductor region 3, and semiconductor region 4) on the semiconductor substrate 1 using high-energy laser irradiation. Problems that occur can be suppressed.

  Further, following the first heat treatment, a second heat treatment at a high temperature of 1500 ° C. or higher is performed. At this time, the crystallinity has already been improved on the surfaces of the semiconductor region 3 and the semiconductor region 4 (activation region 9). Therefore, the surface of the semiconductor region 3 and the semiconductor region 4 is in a state where unevenness is hardly formed. That is, since the first heat treatment using the laser is performed first, the surface of the semiconductor region 3 and the semiconductor region 4 is less likely to be uneven even if the second high-temperature heat treatment is performed next. For this reason, in this Embodiment, the reliability of a semiconductor device can be improved.

(Embodiment 2)
Hereinafter, the semiconductor device of the second embodiment will be described with reference to FIG. FIG. 5 shows a cross-sectional view of the manufacturing process corresponding to FIG. 4 of the first embodiment. In the following description, differences from the first embodiment will be mainly described.

  In the first embodiment, as shown in FIG. 4, the first heat treatment using a laser is performed on the p-type semiconductor region 3 and the n-type semiconductor region 4.

  In the second embodiment, as shown in FIG. 5, the n-type semiconductor region 4 is subjected to a first heat treatment using a laser, but the p-type semiconductor region 3 is subjected to a first heat treatment using a laser. 1 Heat treatment is not performed. That is, the activation region 19 is formed on the surface of the semiconductor region 3, but the activation region 19 is not formed on the surface of the semiconductor region 4.

  As described above, the current path of the JBS diode DI is mainly the n-type semiconductor region 4. For this reason, it is more important to suppress the occurrence of unevenness on the surface of the n-type semiconductor region 4 than to suppress the occurrence of unevenness on the surface of the p-type semiconductor region 3.

  Therefore, in the second embodiment, the first heat treatment using a laser is selectively performed on the semiconductor region 4. Since the laser irradiation can freely scan above the semiconductor substrate 1, only the semiconductor region 4 can be selectively irradiated with the laser. As described above, in the second embodiment, compared with the first embodiment, the area to be scanned with the laser can be reduced, so that the manufacturing time can be shortened.

(Modification 1)
Hereinafter, the semiconductor device of Modification 1 will be described with reference to FIG. 6 shows sectional views of manufacturing steps corresponding to FIG. 4 of the first embodiment and FIG. 5 of the second embodiment. In the following description, differences from the first embodiment and the second embodiment will be mainly described.

  In the first modification, first, the first heat treatment using a laser is performed on the p-type semiconductor region 3 and the n-type semiconductor region 4 in the same manner as in the first embodiment, so that the semiconductor regions 3 and 4 An activation region 9 is formed on the surface of the substrate. Next, similarly to the second embodiment, the n-type semiconductor region 4 is selectively subjected to a third heat treatment using a laser to selectively form an activation region 19 on the surface of the semiconductor region 4. To do. Note that the name of the third heat treatment described here is the same as that of the first heat treatment of the second embodiment although the name is changed for convenience.

  In Modification 1, the third heat treatment may be performed first, and then the first heat treatment may be performed. That is, in Modification 1, the semiconductor region 4 is heat-treated using a laser twice, and the semiconductor region 3 is heat-treated using a laser once.

  Thus, in the first modification, the crystallinity can be improved on the surfaces of the semiconductor region 3 and the semiconductor region 4, and the crystallinity on the surface of the semiconductor region 4 can be further improved. Therefore, in the first modification, the reliability of the semiconductor device can be further improved as compared with the first and second embodiments.

  In the first modification, the semiconductor region 4 is heat-treated twice using a laser. However, if necessary, the semiconductor region 4 is heat-treated using a laser three times or more. Also good.

(Embodiment 3)
The semiconductor device according to the third embodiment will be described below with reference to FIG. FIG. 7 is a plan view of the manufacturing process corresponding to FIG. 4 of the first embodiment, and shows an overall view of the wafer WF that is the semiconductor substrate 1. Further, FIG. 7 is a plan view, but the activated region 29 is hatched for easy viewing of the drawing. In the following description, differences from the first embodiment will be mainly described.

  As shown in FIG. 7, a wafer WF that is a semiconductor substrate 1 includes an outer peripheral region WPR having a width W1 from the outer periphery of the wafer WF toward the center of the wafer WF, and a central region surrounded by the outer peripheral region WPR in plan view. And CR. The outer peripheral region WPR includes a region where an orientation flat is formed.

  In the third embodiment, the first heat treatment using a laser is selectively performed on the outer peripheral region WPR as in the first embodiment, and the first heat treatment is not performed on the central region CR. That is, an activation region 29 similar to the activation region 9 of the first embodiment is formed in the outer peripheral region WPR.

  Wafer WF has an outer peripheral region WPR, or a semiconductor chip region CHP1 formed over outer peripheral region WPR and central region CR, and a semiconductor chip region CHP2 formed in central region CR.

  In the second heat treatment at 1500 ° C. or higher using the diffusion furnace, variation occurs in the wafer WF plane. That is, the inventors of the present application have found that the surface of the semiconductor region 3 and the semiconductor region 4 is more likely to be uneven in the outer peripheral region WPR than in the central region CR. In other words, the JBS diode DI formed in the semiconductor chip region CH1 tends to have a higher leakage current than the JBS diode DI formed in the semiconductor chip region CH2, and the JBS diode DI manufactured from the same wafer WF. Variations in performance occur.

  Therefore, in the third embodiment, the surface of the semiconductor region 3 and the semiconductor region 4 in the semiconductor chip region CHP1 including the outer peripheral region WPR is obtained by selectively performing the first heat treatment using a laser on the outer peripheral region WPR. And the variation in performance of the JBS diode DI manufactured from the same wafer WF is reduced. That is, the deterioration of the performance of the JBS diode DI in the outer peripheral region WPR is suppressed. Therefore, in the third embodiment, the reliability of the semiconductor device in the outer peripheral region WPR can be improved and the yield can be improved.

(Modification 2)
Hereinafter, a semiconductor device of Modification 2 will be described with reference to FIG. FIG. 8 is a plan view of the manufacturing process corresponding to FIG. 4 of the first embodiment and FIG. 7 of the third embodiment, and shows an overall view of the wafer WF which is the semiconductor substrate 1. Further, although FIG. 8 is a plan view, the activated region 29 is hatched for easy viewing of the drawing. In the following description, differences from the first embodiment and the third embodiment will be mainly described.

  In the second modification, first, the activation region 9 is formed by performing a first heat treatment using a laser on the outer peripheral region WPR and the central region CR, as in the first embodiment. Next, similarly to the third embodiment, the fourth heat treatment using a laser is selectively performed on the outer peripheral region WPR to form the activation region 29. Note that the name of the fourth heat treatment described here is the same as that of the first heat treatment of the third embodiment, although the name is changed for convenience.

  In Modification 2, the fourth heat treatment may be performed first, and then the first heat treatment may be performed. That is, in Modification 2, heat treatment using a laser is performed twice for the outer peripheral region WPR, and heat treatment using a laser is performed once for the central region CR.

  As described above, in the second modification, the crystallinity of the surface of the semiconductor region 3 and the semiconductor region 4 is improved in the outer peripheral region WPR and the central region CR, and the surface of the semiconductor region 3 and the semiconductor region 4 in the outer peripheral region WPR is improved. Crystallinity can be further improved. Therefore, in the second modification, the reliability of the semiconductor device can be further improved as compared with the first and third embodiments.

  In the second modification, the case where the heat treatment using the laser is performed twice on the outer peripheral region WPR is illustrated, but the heat treatment using the laser is performed three times or more on the outer peripheral region WPR as necessary. Also good.

  As mentioned above, although the invention made by the inventor of the present application has been specifically described based on the embodiments, the present invention is not limited to the above-described embodiments, and various modifications can be made without departing from the scope of the invention.

  For example, in the above-described embodiment, the case where the semiconductor substrate 1 is an n-type SiC substrate is illustrated, but the conductivity type may be reversed. That is, the semiconductor substrate 1, the semiconductor layer 2, and the semiconductor region 4 may be p-type, and the semiconductor region 3 may be n-type.

DESCRIPTION OF SYMBOLS 1 Semiconductor substrate 2 Semiconductor layer 3 Semiconductor region 4 Semiconductor region 5 Electrode 6 Electrode 7 Mask pattern 8 Ion 9 Activation region 10 Protective film 19 Activation region 29 Activation region CHP1, CHP2 Semiconductor chip region CR Central region W1 Width WF Wafer WPR Perimeter area

Claims (14)

(A) preparing a first conductivity type semiconductor substrate made of silicon carbide and having a first conductivity type semiconductor layer formed on the surface thereof;
(B) forming a first semiconductor region of the first conductivity type having an impurity concentration higher than the impurity concentration of the semiconductor layer in the semiconductor layer;
(C) a step of performing a first heat treatment using a laser on the first semiconductor region after the step (b);
(D) after the step (b), a step of forming a protective film on the first semiconductor region;
(E) After the step (c) and after the step (d), with the first semiconductor region covered with the protective film, the first semiconductor region, the semiconductor layer, and the semiconductor substrate, Performing a second heat treatment;
A method for manufacturing a semiconductor device, comprising: In the manufacturing method of the semiconductor device according to claim 1,
A semiconductor further comprising a step of forming a second semiconductor region of a second conductivity type opposite to the first conductivity type in the first semiconductor region between the step (b) and the step (c). Device manufacturing method. In the manufacturing method of the semiconductor device according to claim 2,
The method for manufacturing a semiconductor device, wherein the first heat treatment in the step (c) is performed on the first semiconductor region and is not performed on the second semiconductor region. In the manufacturing method of the semiconductor device according to claim 2,
The method for manufacturing a semiconductor device, wherein the first heat treatment in the step (c) is performed on the first semiconductor region and the second semiconductor region. In the manufacturing method of the semiconductor device according to claim 4,
A step of selectively performing a third heat treatment using a laser on the first semiconductor region between the step (b) and the step (e);
The method of manufacturing a semiconductor device, wherein the third heat treatment is not performed on the second semiconductor region. In the manufacturing method of the semiconductor device according to claim 2,
After the step (e), a step of forming a first electrode so as to be in direct contact with the first semiconductor region and the second semiconductor region, and a step of forming a second electrode on the back surface of the semiconductor substrate A method for manufacturing a semiconductor device. In the manufacturing method of the semiconductor device according to claim 1,
The semiconductor substrate has a first region having a first width from the outer periphery of the semiconductor substrate toward the center of the semiconductor substrate, and a second region surrounded by the first region in plan view,
The method of manufacturing a semiconductor device, wherein the first heat treatment in the step (c) is performed on the first region and is not performed on the second region. In the manufacturing method of the semiconductor device according to claim 1,
The semiconductor substrate has a first region having a first width from the outer periphery of the semiconductor substrate toward the center of the semiconductor substrate, and a second region surrounded by the first region in plan view,
A step of selectively performing a fourth heat treatment using a laser on the first region between the step (b) and the step (e);
The fourth heat treatment is not performed on the second region,
The method for manufacturing a semiconductor device, wherein the first heat treatment in the step (c) is performed on the first region and the second region. In the manufacturing method of the semiconductor device according to claim 1,
By the first heat treatment in the step (c), the first semiconductor region is crystallized from the surface of the first semiconductor region to a depth of 100 nm, and the impurities contained in the first semiconductor region are activated. A method for manufacturing a semiconductor device. In the manufacturing method of the semiconductor device according to claim 9,
A method of manufacturing a semiconductor device, wherein a KrF excimer laser is used for the first heat treatment in the step (c). In the manufacturing method of the semiconductor device according to claim 10,
A method for manufacturing a semiconductor device, wherein a diffusion furnace is used for the second heat treatment in the step (e). In the manufacturing method of the semiconductor device according to claim 11,
The step (e) is a method for manufacturing a semiconductor device, which is performed at a temperature of 1500 ° C. or higher. In the manufacturing method of the semiconductor device according to claim 12,
The step (d) is performed after the step (c),
The method for manufacturing a semiconductor device, wherein the protective film is a carbon film or an organic film. In the manufacturing method of the semiconductor device according to claim 12,
The step (d) is performed before the step (c),
The step (c) and the step (e) are performed in a state where the first semiconductor region is covered with the protective film,
The method for manufacturing a semiconductor device, wherein the protective film is an organic film.

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