JP2019192851A - Semiconductor device - Google Patents

Abstract

To provide a semiconductor device capable of improving reliability.SOLUTION: A semiconductor device comprises: a gate electrode; a semiconductor film that has a pair of first channel regions that contain an oxide semiconductor material and are opposed to the gate electrode and provided at a pair of end parts in a channel width direction, and a second channel region arranged between the pair of first channel regions; and an electrode opposed to the gate electrode while interposing the semiconductor film therebetween, and selectively arranged in a region at least partially overlapped with the pair of first channel regions, of the pair of first channel regions and the second channel region.SELECTED DRAWING: Figure 1A

Description

  The present technology relates to a semiconductor device having a semiconductor film.

  A semiconductor device including a thin film transistor (TFT) is applied to, for example, a display device (see, for example, Patent Document 1).

JP 2012-84572 A

  In a semiconductor device having such a thin film transistor or the like, it is desired to improve reliability.

  It is desirable to provide a semiconductor device capable of improving reliability.

  A semiconductor device according to an embodiment of the present technology includes a pair of first channel regions that include a gate electrode and an oxide semiconductor material, and that are opposed to the gate electrode and that are provided at a pair of ends in the channel width direction. And a second channel region disposed between the pair of first channel regions, and the gate electrode with the semiconductor film interposed therebetween, and the first channel region and the second channel region. And an electrode selectively disposed in a region overlapping at least part of the pair of first channel regions.

  In the semiconductor device according to the embodiment of the present technology, the electrode is selectively disposed in a region that overlaps at least part of the pair of first channel regions, so that the influence of the electrode on the second channel region is suppressed. The electrode acts on the first channel region. Thereby, generation | occurrence | production of a hump is suppressed.

  According to the semiconductor device according to the embodiment of the present technology, since the electrodes are selectively disposed in the region overlapping at least part of the pair of first channel regions, generation of humps can be suppressed. Therefore, reliability can be improved. Note that the effects described here are not necessarily limited, and may be any effects described in the present disclosure.

It is a mimetic diagram showing composition of an important section of a semiconductor device concerning one embodiment of this art. It is a schematic diagram showing the cross-sectional structure along the B-B 'line shown to FIG. 1A. It is a plane schematic diagram showing the other example (1) of the structure of the semiconductor device shown to FIG. 1A. FIG. 3A is a schematic plan view illustrating another example (2) of the configuration of the semiconductor device illustrated in FIG. 1A. FIG. 2 is a schematic cross-sectional view illustrating an example of a configuration of a first insulating film illustrated in FIG. 1 together with a UC film and a semiconductor film. It is a plane schematic diagram showing the structure of the principal part of the semiconductor device which concerns on a comparative example. FIG. 5B is a schematic diagram illustrating a cross-sectional configuration along the line B-B ′ illustrated in FIG. 5A. It is a figure showing the TFT characteristic of the initial state of the semiconductor device shown to FIG. 5A. FIG. 5B is a diagram illustrating TFT characteristics after a certain period of time has elapsed in the semiconductor device illustrated in FIG. 5A. It is a figure showing the TFT characteristic of the initial state of the semiconductor device shown to FIG. 1A. FIG. 1B is a diagram illustrating TFT characteristics after a certain period of time has elapsed in the semiconductor device illustrated in FIG. 1A. It is a figure showing the electric current degradation of the semiconductor device shown to FIG. 1A and FIG. 5A. FIG. 9 is a schematic plan view illustrating a configuration of a main part of the semiconductor device (1) illustrated in FIG. 8. FIG. 9 is a schematic plan view illustrating a configuration of a main part of the semiconductor device (2) illustrated in FIG. 1B is a block diagram illustrating a functional configuration of a display device to which the semiconductor device illustrated in FIG. 1A or the like is applied. FIG. FIG. 1B is a block diagram illustrating a configuration of an imaging device to which the semiconductor device illustrated in FIG. 1A and the like is applied. It is a block diagram showing the structure of an electronic device.

Hereinafter, embodiments of the present technology will be described in detail with reference to the drawings. The description will be given in the following order.
1. Embodiment (an example of a semiconductor device in which an electrode is selectively provided at a position overlapping a semiconductor film of a pair of first channel regions)
2. Application example 1 (example of display device and imaging device)
3. Application Example 2 (Example of electronic equipment)

<Embodiment>
[Constitution]
1A and 1B schematically show the configuration of the main part of a semiconductor device (semiconductor device 1) according to an embodiment of the present technology. FIG. 1A shows a planar configuration of the semiconductor device 1, and FIG. 1B shows a cross-sectional configuration along the line BB ′ shown in FIG. 1A. The semiconductor device 1 is used for a drive element such as a display device and an imaging device (a display device 2A in FIG. 11 and an imaging device 2B in FIG. 12 described later). The semiconductor device 1 includes a top gate type thin film transistor, and has a UC film 12, an electrode 13, a first insulating film 14, a semiconductor film 15, a second insulating film 16, and a gate electrode 17 in this order on a substrate 11. is doing. On the gate electrode 17, for example, source / drain electrodes are provided via an interlayer insulating film (not shown).

  The substrate 11 is made of, for example, glass, quartz, silicon, or the like. Or the board | substrate 11 may be comprised from resin materials, such as PET (polyethylene terephthalate), PI (polyimide), PC (polycarbonate), or PEN (polyethylene naphthalate), for example. In addition to this, a substrate 11 made of a metal plate such as stainless steel (SUS) with an insulating material can be used.

  The UC film 12 is for preventing substances such as sodium ions from moving from the substrate 11 to the upper layer, and is made of an insulating material such as a silicon nitride (SiN) film and a silicon oxide (SiO) film. Yes. For example, in the UC film 12, a UC film 121 and a UC film 122 may be stacked in this order from a position close to the substrate 11. For example, the UC film 121 is composed of a silicon nitride (SiN) film, and the UC film 122 is composed of a silicon oxide (SiO) film. The UC film 12 is provided over the entire surface of the substrate 11.

  The semiconductor film 15 is provided in a selective region on the UC film 12 so as to extend in a predetermined direction (for example, the X direction in FIGS. 1A and 1B). The extending direction is the channel length direction, and the direction perpendicular to the channel length direction (for example, the Y direction in FIGS. 1A and 1B) is the channel width direction. The semiconductor film 15 is mainly composed of an oxide of at least one element selected from, for example, indium (In), gallium (Ga), zinc (Zn), tin (Sn), titanium (Ti), and niobium (Nb). As an oxide semiconductor. Specifically, the semiconductor film 15 is formed of indium tin zinc oxide (ITZO), indium gallium zinc oxide (IGZO: InGaZnO), zinc oxide (ZnO), indium zinc oxide (IZO), indium gallium oxide (IGO), indium tin oxide. (ITO), indium oxide (InO), or the like can be used.

  The semiconductor film 15 is provided with a channel region (first channel region 15A and second channel region 15B described later) facing the gate electrode 17 and a low resistance region having a lower electrical resistance than the channel region. For example, a region of the semiconductor film 15 that does not face the gate electrode 17 is a low resistance region.

  The channel region of the semiconductor film 15 includes a first channel region 15A provided at a pair of ends in the channel width direction, and a second channel region 15B provided between the pair of first channel regions 15A. . For example, the size (area) of the pair of first channel regions 15A and the size of the second channel region 15B are substantially the same. The second channel region 15 </ b> B provided in the central portion of the channel region is a region that bears the main TFT characteristics of the semiconductor device 1. In the first channel region 15A provided at the end of the channel region, TFT characteristics different from those of the second channel region 15B appear. That is, a parasitic TFT is formed in the first channel region 15A. In the parasitic TFT, for example, the first channel region 15A is in contact with a material other than the constituent material of the second insulating film 16 (for example, an interlayer insulating film), or during wet etching and dry etching. This is due to the influence from the end face.

  Between the semiconductor film 15 and the UC film 12, the first insulating film 14 and the electrode 13 are provided in this order from the semiconductor film 15 side.

  A predetermined potential is applied to the electrode 13 facing the semiconductor film 15 with the first insulating film 14 therebetween. The predetermined potential is, for example, a source potential, a gate potential, or an external potential of 0 V or less. By providing such an electrode 13 at a position facing the gate electrode 17 with the semiconductor film 15 therebetween, for example, the threshold voltage Vth moves in the positive direction. In the present embodiment, the electrode 13 is disposed at a position that overlaps at least part of the pair of first channel regions 15A among the pair of first channel regions 15A and second channel regions 15B. That is, the electrode 13 is not provided at a position overlapping the second channel region 15B in plan view. Therefore, the influence of the electrode 13 on the second channel region 15B of the semiconductor film 15 is suppressed, and the electrode 13 acts on the first channel region 15A. Although details will be described later, it is possible to suppress the occurrence of humps.

  The electrode 13 is provided at a position overlapping both the pair of first channel regions 15A in plan view (XY plane in FIGS. 1A and 1B). For example, the electrode 13 is provided at a position that overlaps one of the pair of first channel regions 15A in a plan view and the first portion 13-1 that overlaps the other of the pair of first channel regions 15A in a plan view. Second portion 13-2. For example, each of the first portion 13-1 and the second portion 13-2 has a rectangular planar shape. Each of the first portion 13-1 and the second portion 13-2 extends in a direction parallel to the extending direction of the semiconductor film 15 (the X direction in FIGS. 1A and 1B). The length of the first portion 13-1 and the second portion 13-2 (size in the X direction in FIG. 1A) is larger than the width of the gate electrode 17 (size in the X direction in FIG. 1A). Each of the first portion 13-1 and the second portion 13-2 protrudes on both sides of the gate electrode 17 in plan view. That is, each of the first portion 13-1 and the second portion 13-2 is provided over the entire channel length direction of the pair of first channel regions 15A. The first portion 13-1 and the second portion 13-2 each protrude outward from the end portion of the semiconductor film 15 in the channel width direction. That is, each of the first portion 13-1 and the second portion 13-2 is provided so as to overlap the entire channel width direction of the pair of first channel regions 15A. For example, the first portion 13-1 and the second portion 13-2 are provided separately from each other.

  2 and 3 illustrate another example of the planar configuration of the electrode 13 together with the semiconductor film 15 and the gate electrode 17. In addition to the first portion 13-1 and the second portion 13-2, the electrode 13 has a third portion 13-3 that connects one end of the first portion 13-1 and one end of the second portion 13-2. It may be (FIG. 2). The third portion 13-3 extends in a direction perpendicular to the extending direction of the first portion 13-1 and the second portion 13-2 (Y direction in FIG. 2). Alternatively, the electrode 13 may have a frame-like planar shape (FIG. 3). In addition to the first portion 13-1, the second portion 13-2, and the third portion 13-3, the electrode 13 having the frame shape of the planar shape includes the other end of the first portion 13-1 and the second portion 13. -4 has a fourth portion 13-4 that connects the other end of the second portion. The fourth portion 13-4 extends in a direction parallel to the extending direction of the third portion 13-3.

  Examples of the constituent material of the electrode 13 include titanium (Ti), tungsten (W), tantalum (Ta), aluminum (Al), molybdenum (Mo), silver (Ag), neodymium (Nd), and copper (Cu). The simple substance and alloy containing 1 type of them are mentioned. Alternatively, it may be a compound film containing at least one of them and a laminated film containing two or more kinds. For example, a transparent conductive film such as ITO may be used. By configuring the electrode 13 with a light shielding material, deterioration of the semiconductor film 15 due to light incident on the semiconductor film 15 can be suppressed. As a light-shielding material constituting the electrode 13, for example, molybdenum or the like can be given.

  For example, the first insulating film 14 between the electrode 13 and the semiconductor film 15 is provided on the entire surface of the substrate 11 so as to cover the electrode 13. The first insulating film 14 may be an insulating film between a pair of electrodes constituting a storage capacitor. The first insulating film 14 is made of, for example, a silicon oxide film (SiO) or a silicon nitride film (SiN).

  As shown in FIG. 4, the first insulating film 14 may be composed of a stacked film of a plurality of insulating films (insulating films 141 and 142). The first insulating film 14 is constituted by, for example, a laminated film in which the insulating film 141 and the insulating film 142 are laminated in this order from the UC film 12 side. The insulating film 141 is preferably made of a material that is less likely to be oxidized than the constituent material of the insulating film 142. With the first insulating film 14 having such a configuration, oxygen extraction from the semiconductor film 15 is suppressed, and oxygen in the semiconductor film 15 can be maintained. For example, the insulating film 141 is composed of a silicon nitride film, and the insulating film 142 is composed of a silicon oxide film. Alternatively, the insulating films 141 and 142 may be composed of silicon oxide films having different film qualities. The first insulating film 14 may be composed of a laminated film of three or more insulating films.

  The second insulating film 16 provided between the semiconductor film 15 and the gate electrode 17 functions as a gate insulating film of the transistor. For example, the second insulating film 16 has the same planar shape as the planar shape of the gate electrode 17, and the end surface of the second insulating film 16 is provided at the same position as the end surface of the gate electrode 17 in plan view. Yes. Thus, the transistor of the semiconductor device 1 may have a self-aligned structure. The second insulating film 16 is, for example, a single layer film made of one of a silicon oxide film (SiO), a silicon nitride film (SiN), a silicon nitride oxide film (SiON), and an aluminum oxide film (AlO), or these It is comprised by the laminated film which consists of 2 or more types of these.

  The gate electrode 17 is provided to face the semiconductor film 15 (first channel region 15A, second channel region 15B) with the second insulating film 16 therebetween, and is perpendicular to the extending direction of the semiconductor film 15 (FIG. 1A). In the Y direction). The gate electrode 17 functions as a wiring for supplying a potential as well as controlling the carrier density in the first channel region 15A and the second channel region 15B by the applied gate voltage (Vg). The constituent material of the gate electrode 17 is, for example, titanium (Ti), tungsten (W), tantalum (Ta), aluminum (Al), molybdenum (Mo), silver (Ag), neodymium (Nd), and copper (Cu). The simple substance and alloy containing 1 type of these are mentioned. Alternatively, it may be a compound film containing at least one of them and a laminated film containing two or more kinds. For example, a transparent conductive film such as ITO may be used.

[Operation]
In the semiconductor device 1, the first channel region 15 </ b> A and the second channel region 15 </ b> B of the semiconductor film 15 are activated when an ON voltage higher than the threshold voltage is applied to the gate electrode 17. Thereby, a current flows between the source and drain electrodes (in the channel length direction of the semiconductor film 15).

[Action, effect]
In the semiconductor device 1 of the present embodiment, since the electrode 13 is selectively disposed in a region overlapping at least part of the pair of first channel regions 15A, the influence of the electrode 13 on the second channel region 15B is suppressed. At the same time, the electrode 13 acts on the first channel region 15A. Thereby, generation | occurrence | production of a hump is suppressed. Hereinafter, this effect is demonstrated using a comparative example.

  5A and 5B show a schematic configuration of a main part of a semiconductor device (semiconductor device 100) according to a comparative example. 5A shows a planar configuration of the semiconductor device 100, and FIG. 5B shows a cross-sectional configuration along the line B-B 'shown in FIG. 5A. The semiconductor device 100 has an electrode (electrode 113) facing the gate electrode 17 with the semiconductor film 15 in between. For example, a source potential is applied to the electrode 113. The electrode 113 has a larger area than the channel region of the semiconductor film 15 in a plan view, and is disposed at a position overlapping both the first channel region 15A and the second channel region 15B.

  FIG. 6A shows the TFT characteristics in the initial state of the semiconductor device 100. The sum of the characteristic component (component B) of the TFT formed by the second channel region 15B and the characteristic component (component A) of the parasitic TFT formed by the first channel region 15A is the TFT characteristic of the entire semiconductor device 100. Become. Since the semiconductor device 100 is provided with the electrode 113, the threshold voltage Vth moves in the positive direction as compared with the threshold voltage Vth (R in FIG. 6A) of the semiconductor device not provided with the electrode.

  FIG. 6B shows the TFT characteristics of the semiconductor device 100 after a lapse of a certain period from the measurement in the initial state shown in FIG. 6A. By continuing to apply the positive gate voltage Vg, the threshold voltage Vth of the semiconductor device 100 moves in the positive direction. At this time, the shift amount of the threshold voltage Vth of the component A is smaller than the shift amount of the threshold voltage Vth of the component B. This is due to the high carrier density of the first channel region 15A. Due to the difference in the shift amount of the threshold voltage Vth, the component A does not fit within the range of the component B, and a hump occurs. That is, the influence of the parasitic TFT on the TFT characteristics of the entire semiconductor device 100 is increased.

  On the other hand, in the semiconductor device 1, since the electrode 13 is not provided at a position overlapping the second channel region 15B in plan view, only the first channel region 15A is out of the first channel region 15A and the second channel region 15B. The electrode 13 acts on.

  FIG. 7A shows the TFT characteristics in the initial state of the semiconductor device 1. In the semiconductor device 1, since the influence of the electrode 13 on the second channel region 15B is reduced, the threshold voltage Vth of the characteristic component (component B) of the TFT formed by the second channel region 15B is R (see FIG. 6A). Is almost the same. On the other hand, the threshold voltage Vth of the characteristic component (component A) of the parasitic TFT formed by the first channel region 15A moves in the positive direction.

  FIG. 7B shows the TFT characteristics of the semiconductor device 1 after a lapse of a certain period from the measurement in the initial state shown in FIG. 7A. Similar to the semiconductor device 100, the threshold voltage Vth of the semiconductor device 1 also moves in the positive direction. However, since the initial state of the TFT characteristics of the semiconductor device 100 is different from that of the semiconductor device 100, the state in which the component A is within the range of the component B is maintained even if the threshold voltage of the component B moves in the positive direction. Thereby, generation | occurrence | production of a hump can be suppressed and the influence of a parasitic TFT can be made small.

  Further, in the semiconductor device 1, current deterioration can be suppressed as compared with the semiconductor device 100.

  FIG. 8 shows the relationship between the stress time (seconds) and current degradation (%) of the semiconductor devices 1, 100, 101, 102. FIGS. 9 and 10 show schematic plan configurations of main parts of the semiconductor devices 101 and 102. FIG. In the semiconductor devices 101 and 102, electrodes (electrodes 113A and 113B) are arranged at positions that do not overlap the first channel region 15A and the second channel region 15B in plan view. The semiconductor device 1 can suppress current degradation more than any of the semiconductor devices 100, 101, and 102.

  As described above, in the present embodiment, since the electrode 13 is selectively disposed in a region overlapping at least part of the pair of first channel regions 15A, generation of hump and current deterioration can be suppressed. . Therefore, reliability can be improved.

  Further, the semiconductor device 1 can be manufactured without increasing the number of steps as compared with the semiconductor device 100.

<Application example 1>
The semiconductor device 1 described in the above embodiment can be used for driving circuits such as a display device (a display device 2A in FIG. 11 described later) and an imaging device (an imaging device 2B in FIG. 12 described later).

  FIG. 11 shows a functional block configuration of the display device 2A. The display device 2A displays a video signal input from the outside or a video signal generated inside as a video, and is applied to an organic EL display or a liquid crystal display. The display device 2 </ b> A includes, for example, a timing control unit 31, a signal processing unit 32, a driving unit 33, and a display pixel unit 34.

  The timing control unit 31 includes a timing generator that generates various timing signals (control signals), and performs drive control of the signal processing unit 32 and the like based on these various timing signals. For example, the signal processing unit 32 performs predetermined correction on a digital video signal input from the outside, and outputs the video signal obtained thereby to the driving unit 33. The drive unit 33 includes, for example, a scanning line drive circuit and a signal line drive circuit, and drives each pixel of the display pixel unit 34 via various control lines. The display pixel unit 34 includes a display element such as an organic electroluminescent element or a liquid crystal display element, and a pixel circuit for driving the display element for each pixel. Among these, for example, the above-described semiconductor device 1 is used in various circuits constituting part of the drive unit 33 or the display pixel unit 34. In particular, it is preferable that the transistor having the electrode 13 constitutes a driving transistor.

  FIG. 12 shows a functional block configuration of the imaging apparatus 2B. The imaging device 2B is, for example, a solid-state imaging device that acquires an image as an electrical signal, and includes, for example, a CCD (Charge Coupled Device) or a CMOS (Complementary Metal Oxide Semiconductor) image sensor. The imaging device 2B includes, for example, a timing control unit 35, a driving unit 36, an imaging pixel unit 37, and a signal processing unit 38.

  The timing control unit 35 includes a timing generator that generates various timing signals (control signals), and performs drive control of the driving unit 36 based on these various timing signals. The drive unit 36 includes, for example, a row selection circuit, an AD conversion circuit, a horizontal transfer scanning circuit, and the like, and performs driving for reading signals from each pixel of the imaging pixel unit 37 via various control lines. The imaging pixel unit 37 includes an imaging element (photoelectric conversion element) such as a photodiode, and a pixel circuit for signal readout. The signal processing unit 38 performs various signal processing on the signal obtained from the imaging pixel unit 37. Among these, for example, the above-described semiconductor device is used for various circuits constituting part of the drive unit 36 or the imaging pixel unit 37.

<Examples of electronic devices>
The display device 2A, the imaging device 2B, and the like can be used for various types of electronic devices. FIG. 13 shows a functional block configuration of the electronic device 3. Examples of the electronic device 3 include a television device, a personal computer (PC), a smartphone, a tablet PC, a mobile phone, a digital still camera, and a digital video camera.

  The electronic device 3 includes, for example, the above-described display device 2A (or imaging device 2B) and an interface unit 40. The interface unit 40 is an input unit to which various signals, a power source, and the like are input from the outside. The interface unit 40 may also include a user interface such as a touch panel, a keyboard, or operation buttons.

  Although the embodiments have been described above, the present technology is not limited to the above embodiments, and various modifications can be made. For example, the material and thickness of each layer described in the above embodiment are not limited to those listed, and other materials and thicknesses may be used.

  Moreover, although the said embodiment demonstrated the case where the electrode 13 (1st part 13-1 and 2nd part 13-2) was provided in the position which overlaps with a planar view all over a pair of 1st channel area | region 15A, 13 may be provided at a position overlapping at least part of the pair of first channel regions 15A. For example, the electrode 13 may be configured by only one of the first portion 13-1 and the second portion 13-2.

  In the above embodiment, the case where the semiconductor device 1 includes a top-gate transistor has been described. However, the semiconductor device 1 may include a bottom-gate transistor.

  The effects described in the above-described embodiments and the like are examples, and the effects of the present disclosure may be other effects or may include other effects.

In addition, this technique can also take the following structures.
(1)
A gate electrode;
A first channel region that includes an oxide semiconductor material and that faces the gate electrode and is provided at a pair of ends in a channel width direction; and a first channel region disposed between the pair of first channel regions A semiconductor film having a two-channel region;
The gate electrode is opposed to the semiconductor film, and is selectively disposed in a region of the pair of the first channel region and the second channel region that overlaps at least a part of the pair of the first channel regions. And a semiconductor device.
(2)
The semiconductor device according to (1), wherein the electrode includes a first portion that overlaps one of the pair of first channel regions and a second portion that overlaps the other of the pair of first channel regions.
(3)
The semiconductor device according to (2), wherein the first portion and the second portion are provided over the entire channel length direction of the pair of first channel regions.
(4)
The semiconductor device according to (2) or (3), wherein the first portion and the second portion are provided separately.
(5)
The semiconductor device according to (2) or (3), wherein the first portion and the second portion are connected to each other.
(6)
The semiconductor device according to any one of (1) to (5), wherein the electrode has a frame-like planar shape.
(7)
The semiconductor device according to any one of (1) to (6), wherein a predetermined potential can be applied to the electrode.
(8)
The semiconductor device according to (7), wherein the potential is a source potential, a gate potential, or an external potential of 0 V or less.
(9)
A first insulating film provided between the semiconductor film and the electrode;
The semiconductor device according to any one of (1) to (8), further including a second insulating film provided between the gate electrode and the semiconductor film.
(10)
The semiconductor device according to (9), wherein the first insulating film is formed of a stacked film.

  DESCRIPTION OF SYMBOLS 1 ... Semiconductor device, 11 ... Board | substrate, 12, 121, 122 ... UC film | membrane, 13 ... Electrode, 13-1 ... 1st part, 13-2 ... 2nd part, 13-3 ... 3rd part, 13-4 ... 4th part, 14 ... 1st insulating film, 141, 142 ... Insulating film, 15 ... Semiconductor film, 15A ... 1st channel region, 15B ... 2nd channel region, 16 ... 2nd insulating film, 17 ... Gate electrode, 2A ... display device, 2B ... imaging device, 3 ... electronic device, 31, 35 ... timing control unit, 32,38 ... signal processing unit, 33,36 ... drive unit, 34 ... display pixel unit, 37 ... imaging pixel unit, 40 ... interface part.

Claims (10)

A gate electrode;
A first channel region that includes an oxide semiconductor material and that faces the gate electrode and is provided at a pair of ends in a channel width direction; and a first channel region disposed between the pair of first channel regions A semiconductor film having a two-channel region;
The gate electrode is opposed to the semiconductor film, and is selectively disposed in a region of the pair of the first channel region and the second channel region that overlaps at least a part of the pair of the first channel regions. And a semiconductor device. The semiconductor device according to claim 1, wherein the electrode includes a first portion that overlaps one of the pair of first channel regions and a second portion that overlaps the other of the pair of first channel regions. The semiconductor device according to claim 2, wherein the first portion and the second portion are provided over the entire channel length direction of the pair of first channel regions. The semiconductor device according to claim 2, wherein the first portion and the second portion are provided separately. The semiconductor device according to claim 2, wherein the first portion and the second portion are connected to each other. The semiconductor device according to claim 1, wherein the electrode has a frame-like planar shape. The semiconductor device according to claim 1, wherein a predetermined potential can be applied to the electrode. The semiconductor device according to claim 7, wherein the potential is a source potential, a gate potential, or an external potential of 0 V or less. A first insulating film provided between the semiconductor film and the electrode;
The semiconductor device according to claim 1, further comprising: a second insulating film provided between the gate electrode and the semiconductor film. The semiconductor device according to claim 9, wherein the first insulating film is configured by a laminated film.

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