JP2019168759A - Semiconductor device, and circuit control method - Google Patents

Abstract

To provide a semiconductor device, and a circuit control method which can reduce current consumption regardless of the order of power source on, in a semiconductor device in which a circuit having a single power supply operation function which is driven by a power source of a system different from a main power source is built in.SOLUTION: A semiconductor device includes: a first circuit which comprises a first power supply, a processing circuit which is connected to the first power supply and executes predetermined processing, and a first generation circuit which generates a closing signal indicating that the first power supply has been turned on; and one or more second circuits which comprises a second power supply, a single operation circuit which is connected to the second power supply and operates on the basis of operation conditions sent from the processing circuit, a storage circuit which stores the operation conditions sent from the processing circuit, a second generation circuit which generates a state signal indicating the operational conditions of the second power supply, and a control circuit which has a holding circuit which holds the closing signal on the basis of the state signal and controls so that the operation conditions are sent to the single operation circuit when the closing signal is held in the holding circuit.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a semiconductor device and a circuit control method, and more particularly to a semiconductor device incorporating a timer circuit having a function of operating a single power supply and a circuit control method for controlling the semiconductor device.

  For example, Patent Document 1 is known as a document relating to a semiconductor device having a built-in timer circuit. In the semiconductor device according to Patent Document 1, one of two types of power supply terminals, a main power supply terminal connected to the main power supply and a backup power supply terminal connected to the backup power supply, is switched and connected to the internal power supply node by a switching circuit. The switching circuit has a predetermined internal circuit that operates, and the switching circuit switches the switching transition time when switching the connection destination of the internal power supply node from the backup power supply terminal to the main power supply terminal, when switching from the main power supply terminal to the backup power supply terminal. It is longer than the transition time.

  The semiconductor device disclosed in Patent Document 1 has two power sources, a main power source and a backup power source, and suppresses wasteful consumption of the backup power source, and by undesired power source switching due to noise during operation with the backup power source. The purpose is to prevent malfunction of the internal circuit.

  On the other hand, for example, there is a real time clock (hereinafter referred to as “RTC”) circuit as an example of a timing circuit having a single power supply operation function. As a semiconductor device incorporating an RTC circuit, for example, an MCU (Micro Controller Unit, so-called microcomputer) is known.

  An MCU equipped with an RTC circuit may have a mode (hereinafter referred to as “single operation mode”) in which a decrease in power supply voltage is detected to operate the RTC circuit independently in order to suppress current consumption. FIG. 3 shows an MCU 100 according to a comparative example having a built-in RTC circuit. The MCU 100 has a single operation mode of the RTC circuit. As shown in FIG. 3, the MCU 100 includes a first power supply PWR1 for operating a CPU (Central Processing Unit), a first regulator circuit 12, a second power supply PWR2 for operating the RTC circuit 42, and a second power supply PWR2. 2 regulator circuits 40.

  The first regulator circuit 12 mainly drives the CPU 16, the first oscillation circuit 18, the FLASH RAM (FLASH Random Access Memory) 20, and the first power-on reset circuit 22 for the first regulator circuit 12 system circuit. On the other hand, the second regulator circuit 40 mainly drives the RTC circuit 42, the second oscillation circuit 44, the register 46, and the second power-on reset circuit 48 for the second regulator circuit 40 system circuit.

  Here, the first power supply PWR1 is connected to a voltage level detection circuit 14 for powering down the first regulator circuit 12 according to the voltage level of the first power supply PWR1 for the independent operation of the RTC circuit 42. . Control data such as frequency information (frequency setting data) of the RTC circuit 42 and enable signals of the RTC circuit 42 and the second oscillation circuit 44 are supplied from the CPU 16 to the register 46, and even if the first power supply PWR1 is powered down. It is held in the register 46 on the second regulator circuit 40 side.

JP 2006-053789 A

By the way, in particular, the second power source PWR2 that operates the RTC circuit 42 generally uses a large-capacity capacitor or a small-capacity battery. In this regard, the MCU 100 according to the comparative example is a circuit on the premise that the first power supply PWR1 is turned on first. When the second power supply PWR2 is turned on first, the RTC circuit 42 has a normal frequency. Start operation with no configuration data provided. For this reason, there is a problem in that the current of the power supply continues to be consumed in a state where the RTC circuit 42 does not cut a desired frequency until the first power supply PWR1 is turned on thereafter.

  On the other hand, in the semiconductor device according to Patent Document 1, the power-on timings of the main power source and the backup power source are the same, and there are malfunctions and wasteful current consumption that occur when the backup power source is first turned on. Not considered.

  The present invention has been made in view of the above points, and in a semiconductor device including a circuit having a single power supply operation function driven by a power supply different from the main power supply, the current consumption is independent of the power-on sequence. An object of the present invention is to provide a semiconductor device and a circuit control method capable of reducing the above.

  The semiconductor device according to the present invention includes a first power source, a processing circuit connected to the first power source and executing a predetermined process, and the first power source connected to the first power source and turned on. A first circuit including a first generation circuit that generates a turn-on signal, a second power source, and a single operation circuit that is connected to the second power source and operates based on operating conditions sent from the processing circuit A storage circuit connected to the second power supply for storing the operating condition sent from the processing circuit; a second circuit connected to the second power supply for generating a status signal indicating an operating state of the second power supply; And a holding circuit that is connected to the second power source and holds the closing signal based on the status signal, and the operating condition is the single operation when the closing signal is held in the holding circuit Control to be sent to the circuit One or a plurality of second circuit having a control circuit, is intended to include.

  The circuit control method according to the present invention includes a first power supply, a processing circuit connected to the first power supply for executing a predetermined process, and the first power supply connected to the first power supply. A first circuit that includes a first generation circuit that generates an input signal indicating the operation, a second power source, and a single operation that is connected to the second power source and that operates based on operating conditions sent from the processing circuit A circuit that is connected to the second power source and stores the operating condition sent from the processing circuit; and a state signal that is connected to the second power source and that indicates an operating state of the second power source. A circuit control method for controlling a semiconductor device including one or a plurality of second circuits including two generation circuits, based on the state signal by a holding circuit connected to the second power supply Holds the input signal and sends it to the holding circuit. The operating condition when the insertion signal is held so as to control to be sent to said single operation circuit.

  According to the present invention, in a semiconductor device having a circuit having a function of operating a single power source driven by a power source different from the main power source, a semiconductor device capable of reducing current consumption regardless of the order of power-on And a circuit control method can be provided.

1 is a block diagram illustrating an example of a configuration of a semiconductor device according to a first embodiment. It is a block diagram which shows an example of a structure of the semiconductor device which concerns on 2nd Embodiment. It is a block diagram which shows an example of a structure of the semiconductor device which concerns on a comparative example.

  DESCRIPTION OF EMBODIMENTS Hereinafter, embodiments for carrying out the present invention will be described in detail with reference to the drawings. In the following description, the embodiment applied to the MCU as an example of the semiconductor device according to the present invention, and the circuit having the single power supply operation function according to the present invention (hereinafter sometimes referred to as “single operation circuit”) is applied to the RTC circuit. A form is illustrated and demonstrated. In the present embodiment, the current consumption in the single operation mode of the single operation circuit is reduced in the MCU incorporating the single operation circuit.

[First Embodiment]
A semiconductor device and a circuit control method according to the present embodiment will be described with reference to FIG. As shown in FIG. 1, the MCU 10 according to the present embodiment includes a first power supply PWR1 and a first regulator circuit 12 that adjusts the voltage of the first power supply PWR1 (“REG1” in FIG. 1). Notation), a second power supply PWR2 of the RTC circuit system, and a second regulator circuit 40 (indicated as “REG2” in FIG. 1) for adjusting the voltage of the second power supply PWR2. Although the circuits of the first power supply PWR1 and the second power supply PWR2 are omitted, they are connected to the terminals T1 and T2, respectively. The second power source PWR2 may be a small capacity battery.

  As shown in FIG. 1, the output of the first regulator circuit 12 includes a CPU 16, a first oscillation circuit 18 (indicated as “oscillation circuit 1” in FIG. 1), a FLASH RAM 20, and a first power-on reset. A circuit 22 (indicated as “POR1” in FIG. 1) is connected. Moreover, the voltage level detection circuit 14 connected to the 1st power supply PWR1 is provided. The voltage level detection circuit 14 powers down the first regulator circuit 12 when the voltage level of the first power supply PWR1 decreases. The first circuit 60 including each of the CPU 16, the first oscillation circuit 18, the FLASH RAM 20, and the first power-on reset circuit 22 corresponds to a “first circuit” according to the present invention.

  The CPU 16 is a “processing circuit” according to the present invention that executes various processes in the MCU 10. The first oscillation circuit 18 generates a clock signal that serves as a reference when the CPU 16 operates. The FLASH RAM 20 expands a program executed by the CPU 16 and stores a processing result. The first power-on reset circuit 22 performs a power-on reset process when the first power supply PWR1 rises.

  On the other hand, the output of the second regulator circuit 40 includes an RTC circuit 42 (indicated as “RTC” in FIG. 1), a second oscillation circuit 44 (indicated as “oscillation circuit 2” in FIG. 1), and a register 46. A second power-on reset circuit 48 (denoted as “POR2” in FIG. 1) and a latch circuit 50 are connected. In addition, an OR (logical sum) circuit 52 is provided, which receives the signal from the register 46 and the signal from the latch circuit 50 as input and is connected to the RTC circuit 42 and the second oscillation circuit 44. The second circuit 62 including each of the RTC circuit 42, the second oscillation circuit 44, the register 46, the second power-on reset circuit 48, the latch circuit 50, and the OR circuit 52 is a “second circuit according to the present invention. Is equivalent to.

  The RTC circuit 42 is a single operation circuit according to the present embodiment, and operates based on control data such as frequency information and enable signals output from the CPU 16 and held in the register 46. The second oscillation circuit 44 generates a clock signal that serves as a reference when the RTC circuit 42 operates. The register 46 stores control data (enable signal, frequency information) from the CPU 16. The second power-on reset circuit 48 performs a power-on reset process when the second power supply PWR2 rises. The latch circuit 50 is a D latch type latch circuit, and the output of the first power-on reset circuit 22 is connected to the data input, the output of the second power-on reset circuit 48 is connected to the clock input, and the Q output. Is connected to the input of the OR circuit 52. The output of the OR circuit 52 is an enable signal for the RTC circuit 42 and the second oscillation circuit 44. The frequency information for the RTC circuit 42 stored in the register 46 is directly supplied to the RTC circuit 52.

  That is, the MCU 10 according to the present embodiment adds a latch circuit 50 that latches the state of the first power-on reset circuit 22 below the second regulator circuit 40 with respect to the MCU 100 according to the comparative example. . The frequency information of the RTC circuit 42 is sent from the register 46 to the RTC circuit 42 as in the MCU 100. On the other hand, enable signals for the RTC circuit 42 and the second oscillation circuit 44 are sent via the OR circuit 52. The OR circuit 52 takes an OR of the enable signal from the register 46 and the latch signal that is the output of the latch circuit 50 to obtain an enable signal.

  Next, the operation of the MCU 10 will be described. Here, the first power-on reset circuit 22 and the second power-on reset circuit 48 generate a high level (hereinafter referred to as “H”) reset signal when the power is turned on, and the power supply exceeds a specified voltage. In this case, it becomes L and the reset is released. The enable signal is enabled at H and disabled at a low level (hereinafter “L”).

  First, when the first power supply PWR1 is turned on first and then the second power supply PWR2 is turned on, control data such as an enable signal and frequency information is sent from the CPU 16 to the register 46. Hold. At this time, since L is input from the first power-on reset circuit 22 to the data input of the latch circuit 50, the signal at which the second power-on reset circuit 48 transitions from L to H is the clock of the latch circuit 50. By being input to the input, the latch circuit 50 latches L. Therefore, the enable signal becomes H by the data held in the register 46, and the second oscillation circuit 44 and the RTC circuit 42 start to operate. Thereafter, when the voltage level of the first power supply PWR1 decreases, the voltage level detection circuit 14 detects this, and the first regulator circuit 12 is powered down, only the second regulator circuit 40 operates, and the register 46 The RTC circuit 42 can operate independently on the basis of the control data held in (1).

  Next, when the second power supply PWR2 is turned on first, since the first power-on reset circuit 22 outputs L, this L is latched by the latch circuit 50 and input to the OR circuit 52. . At this time, since control data is not sent to the register 46 because the first power supply PWR1 is not turned on, L is output from the register 46, and an enable signal output from the OR circuit 52 is set to L (invalid). Become. For this reason, the RTC circuit 42 and the second oscillation circuit 44 stop operating. As a result, current consumption can be suppressed.

Thereafter, when the first power supply PWR1 is turned on, the control data (frequency information, enable signal, etc.) is sent from the CPU 16 as described above, and held in the register 46 that has received it.
Since the output of the latch circuit 50 remains L, the enable signal becomes H (valid), and the second oscillation circuit 44 and the RTC circuit 42 can start operation. That is, the RTC circuit 42 can operate the timing circuit based on the correct frequency information immediately after the first power supply PWR1 is turned on.

  As described in detail above, in the present embodiment, the latch circuit 50 that holds the state of the first power-on reset circuit 22 is added below the second regulator circuit 40, and the output signal and the enable signal from the CPU 16 are added. A signal obtained by ORing the signals (the enable signal of the second oscillation circuit 44 and the enable signal of the RTC circuit 42) is used as a new enable signal of the second oscillation circuit 44 and the RTC circuit 42. As a result, even when the second power supply PWR2 is turned on first, the second oscillation circuit 44 and the RTC circuit 42 can be stopped to suppress current consumption.

[Second Embodiment]
The MCU 10A according to the present embodiment will be described with reference to FIG. In the present embodiment, the number of power supplies included in the MCU is three or more. In the above-described embodiment, two power supply configurations have been described as examples. However, the present embodiment can be applied to a plurality of power supplies by duplicating the configuration of the second power supply PWR2. In FIG. 2, the first power supply PWR1 and the first circuit 60, and the second power supply and the second circuit 62 are the same as the MCU 10 shown in FIG. As shown in FIG. 2, the MCU 10A further includes (N−2) power supplies up to the Nth power supply included in the Nth circuit 62N, and is configured to include N power supplies as a whole. Since the configuration from the third circuit to the Nth circuit is the same as that of the second circuit 62, detailed description thereof is omitted.

  While the first power supply PWR1 for operating the CPU 16 that is the main power supply is not turned on, the power may be turned on from the second power supply PWR2 to the Nth power supply PWRN (one or more may be used), Since the operations of the RTC circuit 42 to the RTC circuit 42N and the second oscillation circuit 44 to the second oscillation circuit 44N are stopped, current consumption can be suppressed.

  That is, when the first power supply PWR1 is not turned on and the second power supply PWR2 is turned on to the Nth power supply PWRN, the first power-on reset circuit 22 outputs L. Yes. Therefore, L is latched by a signal from the second power-on reset circuit 48 to the N-th power-on reset circuit 48N, and the RTC circuit 42 to the RTC circuit 42N and the second oscillation circuit 44 to the second oscillation circuit 44N are Stop operation. Thereafter, when the first power supply PWR1 is turned on, each of the second circuit 60 to the Nth circuit 62N receives the control data from the CPU 16 as described above, and is held in the register 46N from each register 46. Since the output from the latch circuit 50 to the latch circuit 50N is ORed, the circuit connected from the second power supply PWR2 to the Nth power supply PWRN operates even when the output from the latch circuit 50 to the latch circuit 50N is L. Can start.

  In each of the above-described embodiments, the RTC circuit is exemplified as the single operation circuit. However, the present invention is not limited to this and can be applied to any functional circuit intended for single operation. In each of the above-described embodiments, the MCU is described as an example of the semiconductor device. However, the present invention is not limited to this, and a semiconductor device according to a single operation circuit or the like to be applied can be used.

10, 10A, 100 MCU
12 First regulator circuit 14 Voltage level detection circuit 16 CPU
18 First oscillation circuit 20 Flash RAM
22 First power-on reset circuit 40 Second regulator circuit 42 RTC circuit 44 Second oscillation circuit 46 Register 48 Second power-on reset circuit 50 Latch circuit 52 OR circuit 60 First circuit 62 Second circuit 100 MCU
PWR1 first power supply PWR2 second power supply T1, T2 terminals

Claims (3)

A first power source, a processing circuit connected to the first power source and executing a predetermined process, and a first signal that is connected to the first power source and that indicates that the first power source has been turned on is generated. A first circuit comprising the generator circuit;
A second power source, a single operating circuit connected to the second power source and operating based on operating conditions sent from the processing circuit, and an operating condition sent from the processing circuit connected to the second power source. A storage circuit for storing, a second generation circuit connected to the second power supply for generating a state signal indicating an operating state of the second power supply, and connected to the second power supply based on the state signal One or a plurality of second circuits each having a holding circuit that holds a closing signal, and a control circuit that controls the operation condition to be sent to the single operation circuit when the closing signal is held in the holding circuit. And a semiconductor device. The processing circuit is a central processing unit;
The first generation circuit is a first power-on reset circuit;
The single operation circuit is an oscillation circuit and a real-time clock circuit operated by the oscillation circuit,
The memory circuit is a register;
The second generation circuit is a second power-on reset circuit;
The operating condition includes an enable signal for the oscillation circuit and the real-time clock circuit and frequency information of the real-time clock circuit,
The holding circuit is a D-type latch circuit in which an output of the first power-on reset circuit is connected to a data input, and an output of the second power-on reset circuit is connected to a clock input. 2. The semiconductor device according to claim 1, wherein the D-type latch circuit and the enable signal and an output of the D-type latch circuit are inputs and an output is an OR circuit that is an enable signal for the oscillation circuit and the real-time clock circuit. . A first power source, a processing circuit connected to the first power source and executing a predetermined process, and a first signal that is connected to the first power source and that indicates that the first power source has been turned on is generated. A first circuit comprising the generator circuit;
A second power source, a single operating circuit connected to the second power source and operating based on operating conditions sent from the processing circuit, and an operating condition sent from the processing circuit connected to the second power source. A semiconductor circuit including a storage circuit for storing, and one or a plurality of second circuits including a second generation circuit that is connected to the second power source and generates a state signal indicating an operation state of the second power source A circuit control method for controlling an apparatus,
Holding the input signal based on the status signal by a holding circuit connected to the second power supply;
A circuit control method for controlling the operation condition to be sent to the single operation circuit when the input signal is held in the holding circuit.