JP2019149914A - Power-supply device and image formation apparatus - Google Patents

Abstract

To shorten a time required for starting up a switching power-supply device and to reduce power consumption at the time of startup.SOLUTION: A power-supply device has a transformer 13, a first switching element 11 connected to primary winding Np in series, a current resonance capacitor 14 connected to the primary winding Np in series, a second switching element 12 connected in parallel to the primary winding Np and the current resonance capacitor 14 connected in series, and a gate control circuit 15 controlling a switching operation of the first switching element 11 and the second switching element 12, and performs the switching operation with a predetermined frequency Fsn so that output voltage Vo outputted from secondary winding Ns1 and Ns2 may become a predetermined voltage. When starting the switching operation in a state where the switching operation is stopped, the gate control circuit 15 starts the switching operation with a frequency Fss lower than the predetermined frequency Fsn.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a power supply device including a current resonance power supply and an image forming apparatus.

  2. Description of the Related Art Conventionally, a switching power supply device is used in which power is supplied from a commercial AC power supply and a DC voltage of a predetermined rated level is supplied to a load. In these switching power supply devices, in order to prevent an overvoltage and an overcurrent in an initial transient state when the power is turned on, a soft start that gradually raises the output voltage is generally performed. The conventional soft start method utilizes the fact that the output voltage is low when the switching frequency Fs is high and the output voltage is high when the switching frequency Fs is low (see, for example, Patent Document 1). As a switching power supply device, a wide range compatible device in which electric power is supplied from a commercial AC power source such as a commercial AC power source having a voltage level of 100 V or 200 V is targeted. In this case, the switching frequency Fs at the time of soft start is gradually lowered from a predetermined frequency at a change rate corresponding to the voltage level of the commercial AC power supply so that the soft start time is constant regardless of the voltage level. .

  In recent years, as power saving progresses, a burst operation using soft start is generally performed in a current resonance converter. For example, based on the FB terminal voltage, a soft start is started when the output voltage drops, and a burst operation that stops the oscillation operation of the switching pulse when the output voltage is restored (for example, Patent Document 2). For example, FIG. 12 is a circuit diagram showing a configuration of a current resonance type switching power supply device according to the prior art. Details of the names and operations of each part in FIG. 12 will be described later. In the switching power supply device as shown in FIG. 12, when the switching frequency Fs shifts from the resonance frequency Fo corresponding to the transformer 13 and the current resonance capacitor 14 to the high frequency side, the output power becomes small. Further, when the switching frequency Fs is lower than the resonance frequency Fo, a resonance detachment phenomenon occurs, and a through current flows through the switching elements 11 and 12. Therefore, in the conventional switching power supply device, soft start is performed in order to prevent a through current at startup. FIG. 13A shows a time change during the conventional soft start operation. During the soft start operation, a constant current is supplied from the gate control circuit 15 to the soft start capacitor 27 to gradually increase the voltage VCss applied to the capacitor 27 to a predetermined voltage (time t120 to time t121). The gate control circuit 15 changes the switching frequency Fs according to the voltage VCss of the capacitor 27, and starts to start at a frequency higher than the switching frequency Fsn during normal operation. Thereafter, the switching frequency Fs is gradually lowered to the switching frequency Fsn during normal operation.

JP 2006-050688 A JP 2009-189108 A

  However, in the conventional soft start operation, the start-up is started at a frequency higher than the switching frequency Fsn in the normal operation, and the frequency is gradually lowered to the switching frequency Fsn in the normal operation. In recent years, devices such as laser printers that are starting up at a high speed have a problem that it takes a long time to start up. Further, in the burst operation using the conventional soft start operation, as shown in FIG. 13A, the number of times of switching is large until the output voltage Vo reaches a desired output voltage (time t120 to time t121). Cross loss increases. Further, since control is performed only with the switching frequency, the switching element 11 is turned off at a phase where a large drain current IQ1 of the switching element 11 flows as shown in FIG. For this reason, the cross loss per one time of a switching element (FIG.13 (b) shaded part) becomes large. These losses are a problem in promoting power saving.

  The present invention has been made under such circumstances, and an object of the present invention is to shorten the time required to start up the switching power supply device and reduce the power consumption at the time of startup.

  In order to solve the above-described problems, the present invention has the following configuration.

  (1) a transformer having a primary winding and a secondary winding; a first switching element connected in series to the primary winding; a capacitor connected in series to the primary winding; A first switching element connected in series and a second switching element connected in parallel to the capacitor; and a control means for controlling a switching operation of the first switching element and the second switching element. A power supply device that performs the switching operation at a predetermined frequency so that an output voltage output from the secondary winding becomes a predetermined voltage, wherein the control means is in a state in which the switching operation is stopped When the switching operation is started from the above, the switching operation is started at a frequency lower than the predetermined frequency.

  (2) An image forming apparatus comprising: an image forming unit that forms an image on a recording material; and the power supply device according to (1).

  ADVANTAGE OF THE INVENTION According to this invention, the time which a switching power supply device starts can be shortened, and the power consumption at the time of starting can be reduced.

Circuit diagram of switching power supply apparatus of embodiment 1 Circuit diagram of gate control circuit of embodiment 1 The figure which shows each waveform of Example 1 The figure which shows each waveform of Example 1 The figure which shows each waveform of Example 1 Circuit diagram of switching power supply device of embodiment 2 Circuit diagram of gate control circuit of embodiment 2 Circuit diagram of resonance deviation detection circuit of embodiment 2 The figure which shows each waveform of Example 2. The figure which shows each waveform of Example 2. FIG. 5 is a diagram illustrating a configuration of an image forming apparatus according to a third embodiment. Circuit diagram of a conventional current resonance type switching power supply device The figure which shows the time change at the time of the soft start operation of the conventional example, the figure which shows the switching loss

[General current resonance type switching power supply]
FIG. 12 is a circuit diagram showing a configuration of a general current resonance type switching power supply device. A high-side first switching element (hereinafter referred to as a switching element) 11 and a low-side second switching element (hereinafter referred to as a switching element) 12 are connected in series to the DC voltage Vin smoothed by the electrolytic capacitor 10. ing. The body diode 31 is connected to the high-side switching element 11 in parallel in the reverse direction. The body diode 32 is connected to the low-side switching element 12 in parallel in the reverse direction. A voltage resonant capacitor 19 is connected in parallel to the low-side switching element 12. Further, the low-side switching element 12 is connected in parallel with a series resonance circuit in which a primary winding Np of a transformer 13 and a current resonance capacitor 14 (capacitor) are connected in series. A diode 20 is connected in series to the secondary winding Ns1 of the transformer 13, and a diode 21 is connected in series to the secondary winding Ns2. Further, a smoothing capacitor 23 is connected in series to the secondary winding Ns1, and a DC voltage smoothed by the smoothing capacitor 23 is supplied to the load 24. The diode 20 and the smoothing capacitor 23 connected to the secondary winding Ns1 and the diode 21 and the smoothing capacitor 23 connected to the secondary winding Ns2 constitute a half-wave rectifier circuit. Note that the high-side and low-side switching elements 11 and 12 are, for example, MOSFETs (Metal Oxide Semiconductor Field Effect Transistors). Also. An IGBT (Insulated Gate Bipolar Transistor) or the like may be used for the switching elements 11 and 12.

  The gate terminal of the high-side switching element 11 is connected to the gate control circuit 15 via the resistor 17, and the switching element 11 performs a switching operation by being controlled by the gate control circuit 15. The gate terminal of the low-side switching element 12 is connected to the gate control circuit 15 via the resistor 18, and the switching element 12 performs a switching operation by being controlled by the gate control circuit 15. The capacitor 27 is a capacitor for performing a soft start.

  Next, the operation of the current resonance type switching power supply device shown in FIG. 12 will be described. In the current resonance type switching power supply device, the gate control circuit 15 inputs a control signal (also referred to as a gate signal) to each gate terminal of the switching elements 11 and 12, and the switching elements 11 and 12 are alternately turned on and off according to the control signal. Operate. The DC voltage Vin is applied to the primary winding Np of the transformer 13, and an AC current flows through the primary winding Np. Below, the flow of this alternating current is shown in order according to the ON / OFF state of the switching elements 11 and 12.

Sequence 1: The switching element 11 is in the on state and the switching element 12 is in the off state. A current flows through the path of the DC voltage Vin → the switching element 11 → the primary winding Np of the transformer 13 → the current resonance capacitor 14 → the DC voltage Vin.

Order 2: switching element 11 is in an off state, switching element 12 is in an off state Even when the switching element 11 is switched from an on state to an off state, the current flowing through the primary winding Np of the transformer 13 works to be maintained. A current flows through a path of the body diode 32 built in the next winding Np → the current resonance capacitor 14 → the switching element 12.

Sequence 3: switching element 11 is off and switching element 12 is on Even if switching element 12 is on with order 2 being on, primary winding Np of transformer 13 → current resonant capacitor 14 → switching element 12 Current flows through the path. However, due to the resonance action of the leakage inductance Lr of the transformer 13 and the current resonance capacitor 14, the current flow gradually changes from the current resonance capacitor 14 → the primary winding Np of the transformer 13 → the path of the switching element 12.

Order 4: switching element 11 is in an off state, switching element 12 is in an off state Even if the switching element 12 is in an off state in the state of order 3, the current that flows through the primary winding Np of the transformer 13 works to maintain. A current flows through a path of the primary winding Np of the transformer 13 → the body diode 31 built in the switching element 11 → the DC voltage Vin.

Sequence 5: switching element 11 is in the on state, switching element 12 is in the off state Even if the switching element 11 is in the on state in the state of sequence 4, the path of the primary winding Np of the transformer 13 → the switching element 11 → the DC voltage Vin Current flows. However, due to the resonance action of the leakage inductance of the transformer 13 and the current resonance capacitor 14, the current flow gradually changes from the DC voltage Vin → the switching element 11 → the primary winding Np of the transformer 13 → the current resonance capacitor 14 → the DC voltage Vin. Change to the path.

  In this way, an alternating current flows through the primary winding Np of the transformer 13 in a predetermined direction (forward direction) and in a direction opposite to the predetermined direction. As a result, an alternating current is induced in the secondary windings Ns 1 and Ns 2 of the transformer 13, and the induced voltage is rectified and smoothed by a rectifying and smoothing circuit including two diodes 20 and 21 and a smoothing capacitor 23 to output a DC voltage. . This DC voltage is called output voltage, and its power is called output power. The output power depends on the switching frequency Fs that is the frequency of the switching operation of the switching elements 11 and 12.

Expression (1) is an expression representing the resonance frequency Fo of the series resonance circuit including the transformer 13 and the current resonance capacitor 14. Here, Lr is the leakage inductance of the transformer 13 and Cr is the capacitance of the current resonance capacitor 14.
Fo = 1 / (2π√ (LrCr)) Formula (1)
When the resonance frequency Fo and the switching frequency Fs of the transformer 13 and the current resonance capacitor 14 shown in Expression (1) are equal to each other, the switching power supply device has the largest power both in the current flowing in the primary side and the current flowing in the secondary side. (Hereinafter referred to as maximum power) can be output. Further, as the switching frequency Fs moves away from the resonance frequency Fo toward the high frequency side (the frequency is higher) (Fo <Fs), the current flowing in the primary side and the current flowing in the secondary side become the smallest and the output power decreases. Further, when the switching frequency Fs is lower than the resonance frequency Fo (Fs <Fo), a resonance shift phenomenon occurs, and a through current flows through the switching elements 11 and 12. Therefore, in a general switching power supply device, soft start is performed in order to prevent a through current at startup.

[Soft start operation]
FIG. 13A shows a time change during a soft start operation in a general switching power supply device. 13A shows a waveform of the gate-source voltage VQ1gs of the switching element 11, and FIG. 13I shows a waveform of the gate-source voltage VQ2gs of the switching element 12. In FIG. (Iii) is a diagram showing a voltage VCss applied to the soft-start capacitor 27, and (iv) is a diagram showing an output voltage Vo of the switching power supply device. The horizontal axis is time t.

  In the soft start operation period from time t120 to time t121, the voltage VCss applied to the capacitor 27 gradually rises to a predetermined voltage by causing a constant current to flow from the gate control circuit 15 to the soft start capacitor 27. The gate control circuit 15 changes the switching frequency Fs according to the voltage VCss of the soft start capacitor 27 as shown in (i) and (ii). Thereby, the start-up is started at a frequency higher than the switching frequency Fsn in the normal operation period after time t121, and the frequency is gradually lowered to the switching frequency Fsn in the normal operation period.

  FIG. 13B is a diagram illustrating switching loss in a general switching power supply device. In FIG. 13B, (i) is a diagram showing the gate-source voltage VQ1gs of the switching element 11, (ii) is a diagram showing the drain-source voltage VQ1ds of the switching element 12, and (iii) is the switching element 11. It is a figure which shows the drain current IQ1. The horizontal axis represents time t. As described in FIG. 13A, the control is performed at the switching frequency Fs during the soft start operation period. Therefore, as shown in FIG. 13B and (iii), the switching element 11 is turned off at a phase where the drain current IQ1 of the switching element 11 is largely flowing (time t130). For this reason, the cross loss (shaded part) per switching element 11 increases. These losses are a problem in promoting power saving.

[Switching power supply]
1 is a circuit diagram of a current resonance type switching power supply device according to a first embodiment. In FIG. 1, the same reference numerals as those of the current resonance type switching power supply device shown in FIG. 12 denote components having the same functions. Compared with the general switching power supply device shown in FIG. 12, FIG. 1 has the soft start capacitor 27 removed and a starter frequency setting Zener diode 16 added. The zener diode 16 for setting the starting frequency shown in the first embodiment does not limit the scope of the claims. For example, instead of the Zener diode 16, any configuration may be used as long as the frequency at startup can be determined, such as a resistance voltage dividing circuit, an external analog signal input, a digital signal input by a microcomputer, or the like. In addition, as in the first embodiment, the frequency at the time of activation is determined by a predetermined voltage, which does not limit the scope of claims, and may be determined according to current, frequency, and the like. FIG. 2 is a circuit diagram showing details of the gate control circuit 15 of FIG. Hereinafter, the configuration of the current resonance type switching power supply device according to the first embodiment will be described in detail with reference to FIGS. 1 and 2.

  In FIG. 1, a gate control circuit 15 as control means generates and outputs a gate signal to the high-side switching element 11 and the low-side switching element 12. Note that the high-side and low-side switching elements 11 and 12 are alternately turned on / off by providing a dead time to turn off both of them so as not to turn on. This dead time is generated by the gate control circuit 15. Therefore, the gate control circuit 15 shown in FIG. 2 has a dead time generation circuit. However, a dead time can be generated separately from the gate control circuit 15.

  A voltage obtained by full-wave rectification of a commercial AC power supply is applied to the electrolytic capacitor 10, and the DC voltage Vin is obtained by smoothing by the electrolytic capacitor 10. A high-side switching element 11 and a low-side switching element 12 made of N-channel MOSFETs connected in series are connected to both ends of the electrolytic capacitor 10. A voltage resonant capacitor 19 is connected in parallel to the low-side switching element 12, and a primary winding Np of the transformer 13 and the current resonant capacitor 14 connected in series are connected in parallel to the low-side switching element 12. Yes. For the transformer 13, the leakage inductance is Lr and the excitation inductance is Lp. The capacity of the current resonant capacitor 14 is Cr.

  The diode 20 and the smoothing capacitor 23, and the diode 21 and the smoothing capacitor 23 connected in series are connected in parallel to the secondary windings Ns1 and Ns2 of the transformer 13, respectively. The primary winding Np and the secondary windings Ns1 and Ns2 of the transformer 13 are wound so as to have the voltage polarity indicated by the polarity mark shown in the figure, and constitute a rectifying and smoothing circuit. The DC voltage obtained by the rectifying / smoothing circuit including the diodes 20 and 21 and the smoothing capacitor 23 becomes the output voltage Vo of the current resonance type switching power supply device, and the DC voltage is applied to the load 24 connected in parallel to the smoothing capacitor 23. Supply power. The voltage feedback circuit (feedback circuit) 25 detects the voltage of the smoothing capacitor 23, that is, the output voltage Vo, and feeds it back to the gate control circuit 15. The voltage feedback circuit 25 may be constituted by, for example, a known feedback circuit. The gate control circuit 15 adjusts the gate signal based on the voltage detected by the voltage feedback circuit 25 (hereinafter referred to as a detection voltage), and holds the output voltage Vo at a predetermined voltage. The detection voltage (feedback voltage) output from the voltage feedback circuit 25 to the gate control circuit 15 is hereinafter referred to as a feedback (hereinafter referred to as FB) circuit voltage Vfb.

  Next, a startup sequence and a start operation at the startup of the switching power supply device when the DC voltage Vin is input from the electrolytic capacitor 10 will be described. The start operation in the switching power supply device according to the first embodiment is performed at a switching frequency Fs slightly higher than the resonance frequency Fo determined from the leakage inductance Lr and the capacitance Cr of the current resonance capacitor 14 at the time of start-up and restart at the time of intermittent operation. Done. The switching frequency Fs at the time of starting the switching power supply device according to the first embodiment (hereinafter referred to as the starting frequency) Fss can be changed according to the voltage set in the gate control circuit 15. As the voltage set in the gate control circuit 15 increases, the switching frequency Fs decreases. Therefore, the switching frequency Fss at the time of activation is determined according to the voltage (zener voltage) determined by the zener diode 16 for setting the activation frequency. The Zener voltage of the Zener diode 16 for setting the starting frequency is set as the starting setting circuit voltage Vz. The resonance frequency Fo of the current resonance type switching power supply device is a value unique to the device due to the transformer 13 and the current resonance capacitor 14 used in the device (see Expression (1)). Therefore, the Zener diode 16 for setting the starting frequency is selected in accordance with the resonance frequency Fo determined from the leakage inductance Lr of the transformer 13 and the capacitance Cr of the resonance capacitor 14.

  Further, there is a delay from when the gate signal (control signal) output from the gate control circuit 15 is turned off to when the switching elements 11 and 12 are actually turned off. If the switching frequency Fss at the time of start-up becomes lower than the resonance frequency Fo determined from the leakage inductance Lr of the transformer 13 and the capacitance Cr of the current resonance capacitor 14, a resonance detachment phenomenon occurs. A through current flows through the switching element 11 and the switching element 12. Therefore, in view of the response between the resonance frequency Fo of the switching power supply device and the switching elements 11 and 12, adjustment is performed so that the start-up operation is performed at a switching frequency Fss slightly higher than the resonance frequency Fo.

[Gate control circuit]
Next, details of the gate control circuit 15 will be described. FIG. 2 is a diagram showing the configuration of the gate control circuit 15. The gate control circuit 15 includes a comparator 101, a control switching circuit 102, an error amplifier 103, an oscillator (OSC) 104, and a sawtooth wave signal generation circuit 105. The gate control circuit 15 includes a reference voltage Vref3, a comparator 106, a driver (Driver 1) 108, a driver (Driver 2) 109, and an inverter (inverting circuit) 107. Further, the gate control circuit 15 includes a dead time generator (DT_Hi) 110 for the high-side switching element 11 and a dead time generator (DT_Lo) 111 for the low-side switching element 12. The driver 109 and the dead time generator 111 function as a generation unit that generates a control signal for controlling the switching element 12. The inverter 107, the driver 108, and the dead time generator 110 function as a generation unit that generates a control signal for controlling the switching element 11.

  In the comparator 101, the FB circuit voltage Vfb obtained by making the output voltage Vo in inverse proportion by the voltage feedback circuit 25 is input to the (−) input terminal. In the comparator 101, the reference voltage Vref1 is connected to the (+) input terminal. The output of the comparator 101 is output to the control switching circuit 102.

  The control switching circuit 102 is connected to the contact 102b to which the FB circuit voltage Vfb is connected and the Zener diode 16 for setting the starting frequency, and receives the starting setting circuit voltage Vz (Zener voltage) determined by the Zener diode 16. And a contact 102c. The control switching circuit 102 has a contact 102 a connected to the (+) input terminal of the error amplifier 103. When the FB circuit voltage Vfb is higher than the reference voltage Vref1 based on the output of the comparator 101, the control switching circuit 102 connects the contact 102c and the contact 102a and outputs the start setting circuit voltage Vz to the error amplifier 103. The control switching circuit 102 connects the contact 102b and the contact 102a and connects the error amplifier 103 to the FB circuit voltage when the FB circuit voltage Vfb is less than or equal to the reference voltage Vref1 (below a predetermined voltage) based on the output of the comparator 101. Vfb is output. The reference voltage Vref1 is set according to, for example, the FB circuit voltage Vfb. FIG. 2 shows a state in which the contact 102c and the contact 102a are connected.

  The error amplifier 103 error-amplifies the difference between the voltage (starting setting circuit voltage Vz or FB circuit voltage Vfb) input to the (+) input terminal and the reference voltage Vref2 input to the (−) input terminal. The error amplifier 103 outputs the voltage Vi to the oscillator 104. The reference voltage Vref2 is set according to, for example, the start setting circuit voltage Vz and the FB circuit voltage Vfb. The oscillator 104 generates a pulse signal having a frequency corresponding to the voltage Vi input from the error amplifier 103, and outputs the pulse signal to the sawtooth wave signal generation circuit 105. Specifically, the pulse signal generated by the oscillator 104 is output to the gate terminal of the switch element Q1 in the sawtooth wave signal generation circuit 105.

  The sawtooth signal generation circuit 105 includes a constant current source Ic, a switch element Q1, a capacitor C1, and the like. A capacitor C1 is connected in parallel between the drain and source of the switch element Q1. The connection point between the drain of the switch element Q1 and one end of the capacitor C1 is connected to one end of the constant current source Ic, and the other end of the constant current source Ic is connected to the DC power supply voltage Vcc. The other end of the constant current source Ic is also connected to the activation setting circuit voltage Vz via a resistor, and the resistor is provided to limit the current flowing through the Zener diode 16. Further, the connection point between the drain of the switch element Q1 and one end of the capacitor C1 is connected to the (−) input terminal of the comparator 106. The connection point between the source of the switch element Q1 and the other end of the capacitor C1 is grounded. In the sawtooth signal generation circuit 105 configured as described above, the capacitor C1 is charged with a predetermined slope by the constant current source Ic when the switch element Q1 is turned off, and discharged when the switch element Q1 is turned on. To do. That is, when a pulse signal is generated from the oscillator 104 and the switch element Q1 is turned on, the electric charge of the capacitor C1 is discharged. In addition, the switch element Q1 is turned off during a period when the pulse signal is not generated from the oscillator 104, Charged by source Ic. The sawtooth signal generation circuit 105 repeats the above operation. As a result, the sawtooth wave signal generation circuit 105 outputs the sawtooth wave signal VC1 to the comparator 106. The sawtooth signal VC <b> 1 is input to the (−) input terminal of the comparator 106. Note that overcharging of the capacitor C1 by the constant current source Ic may be protected by a Zener diode or the like.

  The reference voltage Vref3 is input to the (+) input terminal of the comparator 106. In the comparator 106, the sawtooth wave signal VC1 output from the sawtooth wave signal generation circuit 105 is input to the (−) input terminal, and the reference voltage Vref3 is input to the (+) input terminal, and these voltages are compared. The comparator 106 outputs a high level voltage during a period in which the reference voltage Vref3 is higher than the sawtooth signal VC1. As a result, a pulse signal for a certain period is output to the low-side switching element 12 via the driver 109 and the dead time generator 111. For the high-side switching element 11, the output of the comparator 106 is inverted by the inverter 107, and the inverted signal is output via the driver 108 and the dead time generator 110. As a result, the high-side switching element 11 is turned on while the low-side switching element 12 is off.

  The energy sent to the secondary side of the transformer 13 in one switching operation is determined by the charge amount of the current resonance capacitor 14. Therefore, when the switching power supply device is started, the output voltage Vo can be increased to a predetermined voltage with a small number of switching operations by maximizing the charge amount of the current resonance capacitor 14 within a range where resonance does not shift.

[Operation sequence]
3 to 5 illustrate the operation sequence of each part with the horizontal axis as time t. In FIG. 3, “OSC” in (i) indicates an output waveform of the oscillator 104, and a pulse signal is output at a frequency corresponding to the voltage Vi output from the error amplifier 103. “VC1” in (ii) indicates the waveform of the voltage VC1 output from the sawtooth signal generation circuit 105. In (ii), the reference voltage Vref3 is indicated by a broken line. In (ii), when the output (OSC) of the oscillator 104 changes from the low level to the high level at time t31 (hereinafter referred to as a pulse signal output), the voltage VC1 becomes 0 V, while the pulse signal is being output. Maintains 0V until time t32. On the other hand, when the output (OSC) of the oscillator 104 changes from the high level to the low level at time t32 (hereinafter referred to as no pulse signal output), the voltage VC1 begins to rise, and the voltage VC1 gradually increases from time t32 to time t33. It is a sawtooth wave signal that rises.

  “QL” in (iii) of FIG. 3 indicates the output waveform from the driver 109 of the gate control circuit 15 by a solid line, and the gate signal output toward the low-side switching element 12 via the dead time generator 111 is a broken line. Is shown. “QH” in (iv) indicates an output waveform from the driver 108 of the gate control circuit 15 by a solid line, and indicates a gate signal output toward the high-side switching element 11 via the dead time generator 110 by a broken line. ing.

  The voltage VC1 and the reference voltage Vref3 in (ii) are compared by the comparator 106. The QL in (iii) is turned off at time t34 when the voltage VC1 becomes equal to or higher than the reference voltage Vref3, and is turned on at time t33 when the voltage VC1 becomes smaller than the reference voltage Vref3. The QH in (iv) is a signal obtained by inverting the waveform of the QL in (iii). Here, the period from the fall of the voltage (waveform QH (or waveform QL)) output from the driver 108 (or driver 109) to the next fall (or from the rise to the next rise) is the switching period Ts (= 1). / Fs). In addition, the dead time generators 110 and 111 provide a dead time so that the waveform indicated by the broken line QL in (iii) and the waveform indicated by the broken line QH in (iv) are not both turned on. It has become.

  FIG. 4 shows how the switching frequency Fs of the waveform QL and the waveform QH (in other words, the switching cycle Ts) changes with the change of the FB circuit voltage Vfb at the start of the switching power supply device. Is. In FIG. 4, the voltage Vi in (i) indicates the waveform of the error amplifier 103 at the start, (ii) indicates the FB circuit voltage Vfb, and (iii) indicates the output voltage Vo that is the voltage of the smoothing capacitor 23. In (ii), the reference voltage Vref1 to be compared by the comparator 101 is also indicated by a broken line. The waveform QL of (iv) and the waveform QH of (v) are the same as the waveforms (iii) and (iv) of FIG. The horizontal axis represents time t.

  At time t40 corresponding to the start-up when the power is turned on or the restart during the intermittent operation, the output voltage Vo is low, and the FB circuit voltage Vfb inversely proportional to the output voltage Vo is higher than the reference voltage Vref1 (Vfb > Vref1). Therefore, the control switching circuit 102 operates so that the Zener voltage of the Zener diode 16 for setting the starting frequency, that is, the starting setting circuit voltage Vz is input to the (+) input terminal of the error amplifier 103. As a result, the voltage Vi output from the error amplifier 103 to the oscillator 104 becomes a value obtained by amplifying the difference between the start setting circuit voltage Vz (zener voltage) and the reference voltage Vref2. As described above, the voltage Vi output from the error amplifier 103 is input to the oscillator 104, passes through the oscillator 104, the sawtooth signal generation circuit 105, and the comparator 106, passes through the driver 109, the waveform QL, and the driver 108 through the waveform QH. It becomes. Detailed waveforms of the switching elements 11 and 12 at this time are shown in FIG.

  In FIG. 5, the waveform QL in (i) and the waveform QH in (ii) are the same signals as the waveform QL in (iv) and the waveform QH in (v) in FIG. IQL of (iii) shows the waveform of the drain current of the low-side switching element 12, and IQH of (iv) shows the waveform of the drain current of the high-side switching element 11. The horizontal axis represents time t. The frequencies of the waveforms QL and QH (switching frequency Fs (= 1 / Ts)) are set as follows by the start setting circuit voltage Vz which is the Zener voltage of the starter setting Zener diode 16. That is, in view of the responsiveness of the switching elements 11 and 12, it is set to be slightly higher than the resonance frequency Fo (= 1 / (2π√LrCr)).

  For example, when the waveform QH from time t52 to time t53 is viewed during a high level, the waveform QH switches to a low level at a timing before the drain current IQH of the switching element 11 reaches a phase of 180 degrees. Thereby, the switching element 11 is turned off without a negative current flowing. If the OFF timing is delayed and the drain current IQH of the switching element 11 exceeds the phase of 180 degrees, a negative current flows through the switching element 11. Thereafter, a through current flows through the switching elements 11 and 12 at the timing when the switching element 12 is turned on. This state is out of resonance. In the first embodiment, the Zener voltage (Vz) of the Zener diode 16 for setting the start-up frequency is adjusted so that this resonance does not shift, and the switching frequency Fss at start-up is made as low as possible. As a result, the output voltage Vo of the switching power supply device is raised at high speed. In the first embodiment, since the switching elements 12 and 11 are turned off at a phase close to 180 degrees with respect to the drain currents IQL and IQH, the cross loss is small as compared with FIG.

Note that in the first switching operation at the start of the switching power supply device, the waveform QL is set to the high level and the waveform QH is set to the low level at time t51 so that the switching element 12 is turned on. This is because the following phenomenon may occur even when the switching frequency Fss at which no resonance deviation occurs is set by the Zener diode 16 for setting the starting frequency. In other words, in the case of intermittent operation or the like, if the switching element 11 is restarted while the electric charge remains in the current resonance capacitor 14, the peak value Ipk of the drain current increases. This is because the electric charge remaining in the current resonance capacitor 14 is added to the DC voltage Vin of the electrolytic capacitor 10. As a result, the drain current IQH may be larger than the rating of the switching element 11. The drain current peak value Ipk is obtained by the following equation (2).
Ipk = Vin / (jωLr + (1 / jωCr)) (2)

  In order to avoid such a state, in the first switching operation at the time t51 at the time t51, the waveform QL is set to the high level and the waveform QH is set to the low level so that the switching element 12 is turned on. By doing so, the switching operation can be started in a state in which the electric charge remaining in the current resonance capacitor 14 is not added to the DC voltage Vin of the electrolytic capacitor 10, so that the rating of the switching element is not exceeded.

  In FIG. 4, after starting the switching power supply device at time t40, the FB circuit voltage Vfb decreases as the output voltage Vo increases, and when the output voltage Vo increases to near the predetermined voltage at time t41, the FB circuit voltage Vfb. Becomes the reference voltage Vref1 or less. As a result, the output of the comparator 101 becomes high level, and the control switching circuit 102 operates to output the FB circuit voltage Vfb to the (+) input terminal of the error amplifier 103. As a result, the DC voltage Vi becomes a value obtained by amplifying the difference between the FB circuit voltage Vfb and the reference voltage Vref2 by the error amplifier 103, and the switching frequency Fs of the switching elements 12 and 11 is increased accordingly. Since the FB circuit voltage Vfb is inversely proportional to the output voltage Vo, the FB circuit voltage Vfb varies when the output voltage Vo varies due to a change in power supplied to the load 24 or the like. The gate control circuit 15 adjusts as follows while the control switching circuit 102 is controlling to determine the switching frequency Fs according to the FB circuit voltage Vfb (after t41). That is, the switching frequency Fs is adjusted according to the fluctuation of the FB circuit voltage Vfb so that the output voltage Vo is constant.

  Note that the control switching circuit 102 selects the activation setting circuit voltage Vz from time t40 to time t41 when the FB circuit voltage Vfb becomes equal to or lower than the reference voltage Vref1 and the output of the comparator 101 becomes high level. For this reason, the switching power supply device operates at a constant switching frequency Fs that is slightly higher than the resonance frequency Fo. The period from time t40 to time t41 is the soft start period of the first embodiment. In order to keep the voltage Vi constant during the period from time t40 to time t41, the start setting circuit voltage Vz is input to the (+) input terminal of the error amplifier 103 during this period. The switching frequency Fs in the period from time t40 to time t41 is constant at the switching frequency Fss at the time of activation.

Here, the relationship between the switching frequency Fsn during normal operation of the switching power supply apparatus, the switching frequency Fss during startup, and the resonance frequency Fo is expressed by the following equation (3). The switching frequency Fsn during normal operation is a predetermined frequency that is controlled so that the output voltage Vo output from the secondary side of the transformer 13 becomes a predetermined voltage.
Fo <Fss <Fsn (3)
As described above, the switching frequency Fss at the time of startup is slightly higher than the resonance frequency Fo determined from the leakage inductance Lr and the capacitance Cr of the resonance capacitor 14. Moreover, the switching frequency Fss at the time of starting is lower than the switching frequency Fsn at the time of normal operation. By operating at such a switching frequency Fss, the start-up time until the output voltage Vo becomes a predetermined voltage is shortened and the number of times of switching at the start-up is reduced as compared with the conventional case. As a result, it is possible to start up earlier than before and to suppress power consumption by the switching element. Here, the activation includes starting the switching operation from a state in which the switching operation is stopped, and includes activation by turning on the power supply and restarting in the intermittent operation.

  In addition, the first switching operation at the start of startup is performed so that the switching element 12 is turned on, thereby preventing the drain current IQH of the switching element 11 from becoming larger than the rating of the switching element. Thereby, even if starting is started in the vicinity of the resonance frequency Fo, the switching element is not destroyed and the starting can be performed quickly and safely.

  As described above, according to the first embodiment, the time required for starting the switching power supply device can be shortened, and the power consumption at the time of starting can be reduced.

  FIG. 6 shows a circuit configuration of the current resonance type switching power supply device according to the second embodiment. In FIG. 6, the same reference numerals as those assigned to the respective parts of the circuit configuration shown in FIG. 1 indicate components having the same functions. Compared to FIG. 1, FIG. 6 shows that the zener diode 16 for setting the start-up frequency is eliminated, and the resonance of the current flowing in the primary side (hereinafter referred to as the primary current) is deviated. A resonance deviation detection circuit 26 is added. The resonance deviation detection circuit 26 detects the primary current and outputs a resonance deviation detection signal, which is a detection signal, to the gate control circuit 15. The other configuration is the same as that of the first embodiment. 7 shows details of the gate control circuit 15 in FIG. 6, and FIG. 8 shows details of the resonance deviation detection circuit 26 in FIG. Hereinafter, the configuration of the current resonance type switching power supply device according to the second embodiment will be described in detail with reference to FIGS. 6, 7, and 8.

[Switching power supply]
In FIG. 6, the resonance losing detection circuit 26 monitors the primary current flowing through the current resonance capacitor 14 (flowing through the primary winding Np), and uses a voltage as information on whether or not resonance detachment occurs as a gate control circuit. 15 is output. The output of the resonance loss detection circuit 26 is input to the gate control circuit 15 and is used to determine the switching frequency Fss when the switching power supply device is started up and when it is restarted during intermittent operation. Since other configurations are the same as those of the first embodiment, the description thereof is omitted.

[Gate control circuit]
FIG. 7 illustrates a specific configuration of the gate control circuit 15 according to the second embodiment. Compared with the first embodiment shown in FIG. 2 in FIG. 7, the control switching circuit 102 is deleted, and the start setting circuit voltage Vz is not input. Instead, a resonance deviation detection signal is added to the control switching circuit 112. The output terminal of the comparator 101 is connected to the control switching circuit 112. The FB circuit voltage Vfb is always input to the (+) input terminal of the error amplifier 103. For this reason, the signal output from the sawtooth signal generation circuit 105 of the second embodiment is a signal based on the FB circuit voltage Vfb. Although not shown in FIG. 7, the output terminal of the comparator 106 is connected to a resonance deviation detection circuit 26 described later.

  The control switching circuit 112 receives the sawtooth wave signal generation circuit 105 and the resonance deviation detection signal. The control switching circuit 112 has a contact 112b to which the output of the sawtooth wave signal generation circuit 105 is connected, and a contact 112c to which a resonance deviation detection signal is connected. Further, the control switching circuit 112 has a contact 112 a connected to the (−) input terminal of the comparator 106. When the FB circuit voltage Vfb is higher than the reference voltage Vref1 based on the output of the comparator 101, the control switching circuit 112 connects the contact 112c and the contact 112a, thereby causing a resonance deviation detection signal and the (−) input terminal of the comparator 106. And connect. When the FB circuit voltage Vfb is equal to or lower than the reference voltage Vref1 based on the output of the comparator 101, the following is performed. That is, the control switching circuit 112 connects the output of the sawtooth signal generation circuit 105 to the (−) input terminal of the comparator 106 by connecting the contact 112b and the contact 112a.

  The resonance deviation detection signal is a pulse-like signal based on the phase of the primary current flowing through the current resonance capacitor 14, and is output from the resonance deviation detection circuit 26. When the resonance shift detection signal is connected by the control switching circuit 112, the comparator 106 compares the pulsed resonance shift detection signal with the reference voltage Vref3. The comparator 106 outputs the gate signals DH and DL via the driver 108, the driver 109, and the dead time generators 110 and 111. Similarly, when the voltage from the sawtooth wave signal generation circuit 105 is connected by the control switching circuit 112, the comparator 106 compares the voltage from the sawtooth wave signal generation circuit 105 with the reference voltage Vref3. The comparator 106 outputs the gate signals DH and DL.

[Resonance loss detection circuit]
Here, the operation of the resonance deviation detection circuit 26 will be described with reference to FIG. The resonance deviation detection circuit 26 shown in the second embodiment is merely an example, and the present invention is not limited to this. Any configuration that can detect the phase of the primary current flowing through the current resonance capacitor 14 may be used. In FIG. 8, the input signals are “voltage output from the comparator 106 (comparator 106 voltage)” and “primary current” in the gate control circuit 15 of FIG. The resonance deviation detection circuit 26 diverts the primary current ("primary current" of the input signal) flowing through the resonance capacitor 14 by the shunt capacitor Crs. The current value shunted by the shunt capacitor Crs is a value proportional to the capacitance ratio between the current resonant capacitor 14 and the shunt capacitor Crs with respect to the primary current. The current flowing through the shunt capacitor Crs is converted into a voltage by the resistor R21 and becomes the primary current detection voltage Vrs, which is input to the (−) input terminal of the comparator 203 and the (+) input terminal of the comparator 204.

  The “comparator 106 voltage” of the input signal is a signal (hereinafter referred to as a delay signal) VDL that is delayed for a certain time with respect to the timing at which driving of the switching elements 11 and 12 is switched by the delay circuit DL. The delay signal VDL is input to the gate terminals of N-channel field effect transistors (Nch_FETs) 201 and 202. The Nch_FET 201 functions as a switch that connects the reference voltage Vref21 and the (+) input terminal of the comparator 203 by performing an on / off operation. Similarly, the Nch_FET 202 also functions as a switch that connects the reference voltage Vref22 and the (−) input terminal of the comparator 204 by performing an on / off operation.

  The comparator 203 functions as a first detection unit for detecting a resonance deviation during a period in which the switching element 11 is turned on. The voltage VtH input to the (+) input terminal of the comparator 203 changes depending on whether the Nch_FET 201 is on or off. In the comparator 203, during the period when the Nch_FET 201 is off, the voltage obtained by dividing the DC power supply voltage Vcc by the resistor R22 and the resistor R23 is input to the (+) input terminal. The comparator 203 compares the voltage obtained by dividing the DC power supply voltage Vcc with the primary current detection voltage Vrs, and determines whether or not resonance is lost. The comparator 203 outputs a high-level signal to the flip-flop circuit 205 when a resonance deviation occurs.

  Further, the reference voltage Vref21 is input to the (+) input terminal while the Nch_FET 201 is on. The comparator 203 compares the reference voltage Vref21 with the primary current detection voltage Vrs. This period is a period in which the switching element 12 is turned on, and the current resonance capacitor 14 flows a current in the negative direction. Therefore, the primary current detection voltage Vrs is a negative voltage. Further, the reference voltage Vref21 is set to a voltage equal to or lower than the minimum value of the primary current detection voltage Vrs. Accordingly, no resonance deviation is detected, and the comparator 203 always outputs a low level signal to the flip-flop circuit 205.

  The comparator 204 functions as a second detection unit for detecting a resonance deviation during a period in which the switching element 12 is turned on. The voltage VtL input to the (−) input terminal of the comparator 204 varies depending on whether the Nch_FET 202 is on or off. In the comparator 204, the reference voltage Vref22 is input to the (−) input terminal while the Nch_FET 202 is on. The comparator 204 compares the reference voltage Vref22 with the primary current detection voltage Vrs and determines whether or not a resonance deviation occurs. The comparator 204 outputs a high-level signal to the flip-flop circuit 205 when a resonance deviation occurs. Here, in the comparator 204, the reference voltage Vref22 is set to a negative voltage in order to determine whether or not a resonance shift occurs while the Nch_FET 202 is on.

  Further, during a period in which the Nch_FET 202 is off, the DC power supply voltage Vcc pulled up by the resistor R24 is input to the (−) input terminal, and the pulled up voltage is compared with the primary current detection voltage Vrs. This period is a period in which the switching element 11 is turned on, and the current resonance capacitor 14 passes a positive current, so the primary current detection voltage Vrs is a positive voltage. Further, the DC power supply voltage Vcc pulled up by the resistor R24 is a voltage equal to or higher than the maximum value of the primary current detection voltage Vrs. Accordingly, no resonance deviation is detected, and the comparator 203 always outputs a low level signal to the flip-flop circuit 205.

  The output of the comparator 203 is connected to the reset terminal R of the flip-flop circuit 205, and the output of the comparator 204 is connected to the set terminal S of the flip-flop circuit 205. The flip-flop circuit 205 outputs a resonance deviation detection signal based on the detection result of resonance deviation from the comparators 203 and 204. This resonance deviation detection signal is input to the gate control circuit 15.

[Operation sequence]
FIG. 9 and FIG. 10 explain the operation sequence of each part with the horizontal axis as time. “VC1” in FIG. 9I indicates the voltage VC1 output from the control switching circuit 112 to the (−) input terminal of the comparator 106 by a solid line, and indicates the reference voltage Vref3 of the (+) input terminal by a broken line. . Waveforms (ii) to (v) are the same signal waveforms as (ii) to (v) in FIG. When the power is turned on at time t90 or when the intermittent operation is restarted, the output voltage Vo is low and the FB circuit voltage Vfb is higher than the reference voltage Vref1. For this reason, the control switching circuit 112 operates so that the resonance loss detection signal is input to the (−) input terminal of the comparator 106. Therefore, the voltage VC1 during the period from time t90 to time t91 is a pulse-like resonance deviation detection signal. The output of the comparator 106 becomes a waveform QL through the driver 109 and QH through the driver 108. The reason why Vref3 is higher than a predetermined value at t90 will be described later.

  Thereafter, as the output voltage Vo increases, the FB circuit voltage Vfb also decreases. When the output voltage Vo increases to near a predetermined voltage at time t91, the FB circuit voltage Vfb becomes equal to or lower than the reference voltage Vref1. As a result, the output of the comparator 101 becomes high level, and the control switching circuit 112 operates so that the voltage output from the sawtooth signal generation circuit 105 is input to the (−) input terminal of the comparator 106. As a result, the voltage VC1 output from the control switching circuit 112 becomes the voltage of the sawtooth wave signal generation circuit 105, and the switching frequency Fs of the switching elements 11 and 12 also increases accordingly. Thereafter, the switching frequency Fsn during normal operation is adjusted according to the fluctuation of the FB circuit voltage Vfb so that the output voltage Vo becomes constant.

At time t91, the control switching circuit 112 selects the resonance deviation detection signal until the FB circuit voltage Vfb becomes equal to or lower than the reference voltage Vref1 and the output of the comparator 101 becomes high level. For this reason, the switching power supply device operates at a constant switching frequency Fss that is slightly higher than the resonance frequency Fo. That is, in Example 2, as in Example 1, the relationship between the switching frequency Fsn during normal operation, the switching frequency Fss during startup, and the resonance frequency Fo is
Fo <Fss <Fsn
It becomes.

  Thus, when the switching power supply device is activated, the switching power supply device operates at a switching frequency Fss that is slightly higher than the resonance frequency Fo between the leakage inductance Lr and the capacitance Cr of the resonance capacitor 14. This shortens the start-up time until the output voltage Vo reaches a predetermined voltage as compared with the prior art, and reduces the number of switching operations at start-up.

[Operation of resonance slip detection circuit]
Next, details of the operation of the resonance deviation detection circuit 26 will be described. In FIG. 10, the waveform “Comp106” in (i) indicates the output of the comparator 106. The waveform “Vrs” in (ii) indicates the primary current detection voltage Vrs input to the (−) input terminal of the comparator 203 and the (+) input terminal of the comparator 204. The waveform “Comp204 (−)” in (iii) indicates the voltage at the (−) input terminal of the comparator 204 with a solid line, and the primary current detection voltage Vrs (ii) at the (+) input terminal with a dotted line. The DC power supply voltage Vcc and the reference voltage Vref22 input to the (−) input terminal of the comparator 204 are indicated by broken lines. The waveform “Comp203 (+)” in (v) indicates the voltage at the (+) input terminal of the comparator 203 with a solid line, and the primary current detection voltage Vrs (ii) at the (−) input terminal with a dotted line. Further, a voltage obtained by dividing the DC power supply voltage Vcc by the resistors R22 and R23 and the reference voltage Vref21, which are input to the (+) input terminal of the comparator 203, are indicated by broken lines. The waveform “F / F_S” in (iv) indicates the set terminal voltage of the flip-flop circuit 205, that is, the voltage output from the comparator 204. The waveform “F / F_R” in (vi) indicates the reset terminal voltage of the flip-flop circuit 205, that is, the voltage output from the comparator 203. The waveform “F / F_Q” of (vii) indicates the Q terminal voltage that is the output of the flip-flop circuit 205, that is, the resonance deviation detection signal output from the resonance deviation detection circuit 26. In (vii), the reference voltage Vref3 of the (+) input terminal of the comparator 106 is indicated by a broken line.

  At the time of start-up when the power is turned on at time t100 or at the time of restart in intermittent operation, the voltage output from Comp 106 in (i) is at a high level. This is because the switching element 12 is turned on in the first switching operation at the start of startup, as described in the first embodiment. As shown in (vii), the reference voltage Vref3 input to the (+) input terminal of the comparator 106 is set to a voltage higher than normal for a certain period of time from time t100 to time t101. As a result, the voltage of Comp 106 in (i) becomes high level. At this time, since the primary current detection voltage Vrs is 0 V and the voltage VtH at the (+) input terminal of the comparator 203 becomes the reference voltage Vref21, “F / F_R” of (vi) which is the output of the comparator 203 becomes a low level. . Further, the voltage VtL at the (−) input terminal of the comparator 204 becomes the reference voltage Vref22, and “F / F_S” of (iv) which is the output of the comparator 204 becomes high level.

  As a result, the flip-flop circuit 205 is set, and the resonance deviation detection signal (F / F_Q) of (vii) becomes high level. Then, when a certain time has elapsed from the start of the start and the reference voltage Vref3 is set to the normal voltage at time t101 (vii), the resonance is the output of the resonance deviation detection circuit 26, and then the resonance is detected based on the deviation detection signal. A switching frequency Fss is determined. When the reference voltage Vref3 is set to a normal voltage at time t101, the resonance loss detection signal (F / F_Q) of (vii) is at a high level, so that the Comp106 voltage becomes a low level output. As a result, the switching element 11 is turned on, and a positive current flows through the resonant capacitor 14, so that the primary current detection voltage Vrs in (ii) also becomes a positive voltage (sine wave).

  At time t102, the delay signal VDL delayed for a certain time by the delay circuit DL receives the low level output of the comparator 106 and outputs a low level. Thereby, the Nch-FETs 201 and 202 are turned off. The voltage VtL input to the (−) input terminal of the comparator 204 becomes the DC power supply voltage Vcc. As a result, the input of the comparator 204 has a relationship of VtL ((−) input terminal)> Vrs ((+) input terminal), and “F / F_S” of (iv) which is the output of the comparator 204 is at a low level. .

  At time t102, the voltage VtH inputted to the (+) input terminal of the comparator 203 is inputted as a divided value obtained by dividing the DC power supply voltage Vcc by the resistor R22 and the resistor R23. When the switching element 11 continues to be turned on and the phase of the current approaches 180 degrees, the following relationship is established by the comparator 203 at time t103 before the resonance shift occurs. That is, at time t103, the comparator 203 has a relationship of VtH ((+) input terminal)> Vrs ((−) input terminal). “F / F_R” of (vi), which is the output of the comparator 203, becomes a high level. As a result, the resonance deviation detection signal (F / F_Q) of (vii) via the flip-flop circuit 205 becomes low level, and the voltage output from the comparator 106 of (i) becomes high level.

  When the voltage output from the comparator 106 becomes high level, the switching element 11 is turned off via the driver 108 and the dead time generator 110. On the other hand, the switching element 12 is turned on via the driver 109 and the dead time generator 111. Thereafter, the above-described operation is repeated.

  As described above, in the second embodiment, since the resonance deviation detection circuit 26 is provided, the switching elements 11 and 12 are switched on / off at the phase of the current immediately before the resonance deviation occurs. For this reason, it is possible to start without causing resonance deviation at a switching frequency Fss slightly higher than the resonance frequency Fo determined by the leakage inductance Lr and the capacitance Cr of the resonance capacitor 14. Further, even if individual differences in the resonance frequency Fo occur due to variations in the leakage inductance Lr and the capacitance Cr of the resonance capacitor 14, the resonance loss detection circuit 26 prevents resonance loss just before the phase where the primary current is reversed. can do. For this reason, the switching loss at the time of turn-off of the switching element demonstrated in FIG.13 (b) can be suppressed to the minimum. As a result, it is possible to start up with lower power consumption than when the switching frequency Fss at startup of the switching power supply device is set to a fixed value.

  As described above, according to the second embodiment, the time required for starting the switching power supply device can be shortened, and the power consumption at the time of starting can be reduced.

  The power supply apparatus described in the first and second embodiments can be applied as, for example, a low-voltage power supply for an image forming apparatus, that is, a power supply that supplies power to a drive unit such as a controller (control unit) or a motor. The configuration of the image forming apparatus to which the power supply apparatus according to the first and second embodiments is applied will be described below.

[Configuration of Image Forming Apparatus]
A laser beam printer will be described as an example of the image forming apparatus. FIG. 11 shows a schematic configuration of a laser beam printer which is an example of an electrophotographic printer. The laser beam printer 300 includes a photosensitive drum 311 as an image carrier on which an electrostatic latent image is formed, a charging unit 317 (charging unit) that uniformly charges the photosensitive drum 311, and an electrostatic latent image formed on the photosensitive drum 311. A developing unit 312 (developing unit) that develops an image with toner is provided. The toner image developed on the photosensitive drum 311 is transferred to a sheet (not shown) as a recording material supplied from the cassette 316 by a transfer unit 318 (transfer means), and the toner image transferred to the sheet is fixed to the fixing device 314. Then, the toner is fixed and discharged onto the tray 315. The photosensitive drum 311, the charging unit 317, the developing unit 312, and the transfer unit 318 are image forming units. The laser beam printer 300 includes the power supply device 400 described in the first and second embodiments. The image forming apparatus to which the power supply apparatus 400 according to the first and second embodiments can be applied is not limited to the one illustrated in FIG. 11, and may be an image forming apparatus including a plurality of image forming units, for example. Further, the image forming apparatus may include a primary transfer unit that transfers a toner image on the photosensitive drum 311 to an intermediate transfer belt and a secondary transfer unit that transfers the toner image on the intermediate transfer belt to a sheet.

  The laser beam printer 300 includes a controller 320 that controls an image forming operation by the image forming unit and a sheet conveying operation. The power supply device 400 described in the first and second embodiments supplies power to a driving unit such as a motor for rotating the photosensitive drum 311 or driving various rollers for conveying the sheet. That is, the load 24 of the first and second embodiments corresponds to, for example, a drive unit. The image forming apparatus according to the third exemplary embodiment can reduce power consumption by reducing the load when the image forming apparatus is in a standby state (for example, a power saving mode or a standby mode) that realizes power saving. That is, in the image forming apparatus according to the third exemplary embodiment, the power supply apparatus 400 performs an intermittent operation at a light load in the power saving mode. For this reason, when the power supply of the image forming apparatus is turned on or when the power supply apparatus 400 is restarted from the intermittent operation in the standby state, soft start with reduced power consumption can be executed in a short time.

  As described above, according to the third embodiment, the time required for starting the switching power supply device can be shortened, and the power consumption at the time of starting can be reduced.

11 First switching element 12 Second switching element 13 Transformer 14 Current resonance capacitor 15 Gate control circuit

Claims (12)

A transformer having a primary winding and a secondary winding;
A first switching element connected in series to the primary winding;
A capacitor connected in series with the primary winding;
A second switching element connected in parallel to the primary winding and the capacitor connected in series;
Control means for controlling a switching operation of the first switching element and the second switching element;
A power supply device that performs the switching operation at a predetermined frequency so that an output voltage output from the secondary winding becomes a predetermined voltage,
The control means starts the switching operation at a frequency lower than the predetermined frequency when starting the switching operation from a state where the switching operation is stopped.   2. The control unit according to claim 1, wherein the control unit sets a frequency lower than the predetermined frequency to a frequency higher than a resonance frequency determined from a leakage inductance of the transformer and a capacitance of the capacitor. Power supply. A feedback circuit that outputs a feedback voltage corresponding to the output voltage to the control means;
A Zener diode connected to the control means;
With
The control means includes
Generating means for generating a control signal for controlling the first switching element and the second switching element;
Switching means for switching the voltage output to the generating means to either the Zener voltage of the Zener diode or the feedback voltage;
Have
The switching means switches to output the Zener voltage when the feedback voltage is higher than a predetermined voltage, and switches to output the feedback voltage when the feedback voltage is equal to or lower than the predetermined voltage. The power supply device according to claim 2.   4. The power supply according to claim 3, wherein when the switching unit is switched to output the Zener voltage, the control unit starts the switching operation at a frequency lower than the predetermined frequency. apparatus.   The power supply device according to claim 3 or 4, wherein the Zener voltage is determined according to the leakage inductance and the capacitance of the capacitor. Phase detection means for detecting the phase of the current flowing through the capacitor and outputting a detection signal to the control means;
A feedback circuit that outputs a feedback voltage corresponding to the output voltage to the control means;
With
The control means includes
Generating means for generating a control signal for controlling the first switching element and the second switching element;
Switching means for switching the voltage output to the generating means to either the detection signal or a signal based on the feedback voltage;
Have
The switching means switches so as to output the detection signal when the feedback voltage is higher than a predetermined voltage, and outputs a signal based on the feedback voltage when the feedback voltage is lower than the predetermined voltage. The power supply device according to claim 1, wherein the power supply device is switched.   The power supply according to claim 6, wherein when the switching unit is switched to output the detection signal, the control unit starts the switching operation at a frequency lower than the predetermined frequency. apparatus. The phase detection means includes
First detection means for detecting a phase of the current when the first switching element is on;
Second detection means for detecting a phase of the current when the second switching element is on;
The power supply device according to claim 6, further comprising:   The power supply apparatus according to claim 8, wherein the control unit determines a frequency at which the switching operation is started based on a detection signal input from the phase detection unit.   The power supply apparatus according to any one of claims 1 to 9, wherein the control unit performs control so that the second switching element is turned on when the switching operation is started.   11. The control means controls the switching operation by providing a dead time that prevents both the first switching element and the second switching element from being turned on. The power supply device according to any one of the above. Image forming means for forming an image on a recording material;
The power supply device according to any one of claims 1 to 11,
An image forming apparatus comprising:

Images