JP2019120761A - Liquid crystal display device - Google Patents

Abstract

To provide a liquid crystal display device having a small deviation of a counter substrate with respect to an array substrate when external force is exerted on the device.SOLUTION: The liquid crystal display device includes an array substrate where a contact hole is formed in a contact part between a pixel electrode and a semiconductor layer, and a counter substrate opposing to the array substrate interposing a liquid crystal layer therebetween, in which a first spacer for holding a gap between the array substrate and the counter substrate in an area outside the contact hole, and a second spacer and a third spacer having a height from the counter substrate lower than the height of the first spacer are disposed in an image display region where a plurality of the pixel electrodes is disposed. The third spacer protrudes from the counter substrate toward the contact hole, and the height of the second spacer from the counter substrate is lower than the height of the third spacer.SELECTED DRAWING: Figure 3

Description

  Embodiments of the present invention relate to a liquid crystal display device.

  It is known that in a liquid crystal display device including an array substrate sandwiching a liquid crystal layer and an opposing substrate, in order to keep a constant distance between the array substrate and the opposing substrate, providing a spacer projecting from the opposing substrate toward the array substrate and touching the array substrate ing. Further, it is known to provide a spacer which protrudes from the opposing substrate toward the array substrate and does not hit the array substrate (see, for example, Patent Document 1). Such a spacer is provided under the black matrix of the opposing substrate. The black matrix covers the vicinity of the signal lines and the gate lines of the array substrate from above.

JP 2013-25088 A

  When an external force acts on such a liquid crystal display device in such a direction as to shift the counter substrate with respect to the array substrate, the spacer may be shifted with respect to the array substrate to damage the alignment film of the array substrate. When the alignment film is damaged, the alignment of the liquid crystal in that place is disturbed and light leakage occurs at the time of black display. In particular, when the opposing substrate is largely deviated with respect to the array substrate, there is a possibility that the spacer may damage a portion of the alignment film of the array substrate which is not covered by the black matrix. When the alignment film in a place not covered with the black matrix is damaged, light leakage is visually recognized in black display.

  Therefore, as a measure to prevent the light leakage from being visually recognized, a black matrix is widely provided in the vicinity of the spacer. However, by providing the black matrix over a wide range, the aperture ratio of the pixel is reduced. Therefore, another measure to prevent light leakage has been desired.

  The embodiment of the present invention has been made in view of the above-described circumstances, and an object thereof is to provide a liquid crystal display device in which a shift of an opposing substrate to an array substrate when an external force acts is small.

  The liquid crystal display device according to the embodiment is a liquid crystal display device provided with an array substrate in which a contact hole is formed in a connection portion between a pixel electrode and a semiconductor layer, and a counter substrate facing the array substrate with the liquid crystal layer interposed therebetween. A first spacer for keeping a space between the array substrate and the counter substrate outside the contact hole in an image display area in which a plurality of the pixel electrodes are arranged, and a height of the first spacer from the counter substrate A second spacer and a third spacer having a lower height are provided, and the third spacer protrudes from the counter substrate toward the contact hole, and the height of the second spacer from the counter substrate is increased. Is characterized in that it is lower than the height of the third spacer.

FIG. 2 is a schematic plan view of the array substrate 2 as viewed from the display surface side. The top view of pixel 10 seen from the display side. Sectional drawing in the AA in FIG. (A) The figure in case the projection height L3 of the dummy spacer 55 is higher than the projection height L2 of the sub spacer 53. FIG. (B) The figure in case the projection height L3 of the dummy spacer 55 and the projection height L2 of the sub spacer 53 are the same. FIG. 4 is an enlarged view of a portion of the dummy spacer 55 and the contact hole 30 in FIG. 3; The figure which drew the black matrix 40 and the spacer on the pixel 10. FIG. The figure which shows the influence on the sub spacer trace generation | occurrence | production of the ratio of the protrusion height of the sub spacer with respect to the protrusion height of a dummy spacer (or the difference of the protrusion height of a dummy spacer and a sub spacer). The figure which shows the influence of the arrangement | positioning ratio of a dummy spacer (or the density of a dummy spacer) on sub spacer mark generation | occurrence | production. FIG. 7 is a view showing the influence of the ratio of the outer diameter of the dummy spacer to the diameter of the open end of the contact hole (or the outer diameter of the dummy spacer) on the occurrence of sub spacer marks. The figure which shows the influence on the pressure | voltage resistant effect of the ratio of the outer diameter of a dummy spacer with respect to the diameter of the opening end of a contact hole (or the outer diameter of a dummy spacer). FIG. 3 is a cross-sectional view at a position corresponding to the line A-A in FIG. 2 when the sub spacer 53 is provided above the contact hole 30. The figure which drew the black matrix 40 and the spacer on the pixel 10 of the example of a change. FIG. 12 is a cross-sectional view taken along the line C-C in FIG.

  The liquid crystal display device of the embodiment will be described based on the drawings. In addition, this embodiment is only an example, and what was suitably changed in the range which does not deviate from the meaning of this invention shall be included in the scope of the present invention. The drawings may be drawn with exaggeration in length, shape, etc., or drawn schematically for the sake of explanation. However, such drawings are merely examples and do not limit the interpretation of the present invention.

(1) Overall Structure of Display Panel 1 The liquid crystal display device of the present embodiment is of a horizontal electric field system called IPS (In-Plane Switching) system or the like, and in particular, uses a fringe electric field as an example of the IPS system. It is of the FFS (Fringe Field Switching) system.

  As shown in FIG. 3, the display panel 1 of the liquid crystal display device includes an array substrate 2, an opposing substrate 3, and a liquid crystal layer 4 held in the gap between them. Further, as shown in FIG. 1, the array substrate 2 and the counter substrate 3 are pasted together by the seal member 5 at their peripheral portions. The display panel 1 includes an image display area 8 for displaying an image and a peripheral area 9 surrounding the image display area 8.

(2) Structure of Array Substrate 2 As shown in FIG. 1, in the image display area 8 of the array substrate 2, a plurality of signal lines 6 extending in the vertical direction and a plurality of gate lines 7 extending in the horizontal direction are arranged in a grid. It is done. The pixel 10 is formed at each intersection of the signal line 6 and the gate line 7. Each pixel 10 includes a pixel opening 19 surrounded by a black matrix 40 of the opposite substrate 3 described later (see FIG. 5). At one end side of the pixel 10, a TFT (thin film transistor) 11 of n-type channel or p-type channel as a switching element is provided. Further, as shown in FIG. 2, a pixel electrode 16 in which a slit 15 is formed is provided so as to surround substantially the entire pixel opening 19. As shown in FIG. 1, the gate electrode 12 of the TFT 11 is connected to the gate line 7, the source electrode 13 of the TFT 11 is connected to the signal line 6, and the drain electrode 14 of the TFT 11 is connected to the pixel electrode 16.

  As shown in FIG. 3, the semiconductor constituting the TFT 11 is formed on the glass substrate 20 of the array substrate 2 (a flexible transparent resin substrate may be used instead of the glass substrate 20, for example) (on the liquid crystal layer 4 side). The layer 21 is formed, and the gate insulating film 22 is formed thereon. Although not shown in FIG. 3, the gate line 7 is formed on the gate insulating film 22. A first interlayer insulating film 23 is formed on the gate insulating film 22 and the gate line 7, and a signal line 6 is formed on the first interlayer insulating film 23. An organic insulating film 24 made of resin is formed on the first interlayer insulating film 23 and the signal line 6. On the organic insulating film 24, a common electrode 17 (see FIG. 2) made of a transparent conductive material such as ITO or IZO and a metal wiring 18 connected to the common electrode 17 are formed. An opening is formed in the common electrode 17, and a contact hole 30 described below is disposed in the opening. The open end 17a of the opening of the common electrode 17 is shown in FIG. 2 and FIG. A second interlayer insulating film 25 is formed on the common electrode 17 and the metal wiring 18. A pixel electrode 16 is formed on the second interlayer insulating film 25, and an alignment film 26 is formed on the pixel electrode 16. The alignment film 26 is in contact with the liquid crystal layer 4.

  As shown in FIG. 3, where the semiconductor layer 21 and the pixel electrode 16 are electrically connected, a contact hole 30 is formed as a recess with respect to the periphery thereof. A hole 31 is formed in the gate insulating film 22, the first interlayer insulating film 23, the organic insulating film 24 and the second interlayer insulating film 25 at the location of the contact hole 30, and the semiconductor layer 21 is formed through the sidewall 34 of the hole 31. And the pixel electrode 16 are in contact with each other. One contact hole 30 is formed for one pixel 10. As shown in FIG. 4, the diameter T of the open end 32 of the contact hole 30 is larger than the diameter S of the bottom of the contact hole 30, and the side wall 33 from the open end 32 to the bottom of the contact hole 30 is inclined with respect to the vertical direction. Is preferred. In other words, it is preferable that the contact hole 30 be tapered toward its bottom and the side wall 33 be inclined.

(3) Structure of Counter Substrate 3 As shown in FIG. 3, the glass substrate 48 of the counter substrate 3 (a flexible transparent resin substrate may be used instead of the glass substrate 48, for example) (liquid crystal layer 4 side) Is provided with a black matrix 40 made of a black resin. As shown in FIG. 5, when viewed from the display surface side, the black matrix 40 covers the signal line 6 and extends in the longitudinal direction 41 extending along the signal line 6, and extends horizontally along the gate line 7 while covering the TFT 11. It consists of a directional part 42 and is in the form of a lattice. Each opening of the grid-like black matrix 40 corresponds to the pixel opening 19.

  As shown in FIG. 3, a color filter layer 44 is formed under the black matrix 40 (under the glass substrate 48 in the place where the black matrix 40 is not present). The color of the color filter layer 44 is determined for each of the pixel openings 19 and is R (red), G (green), and B (blue) in order in the lateral direction. Under the color filter layer 44, an overcoat layer 47 made of resin is formed. An alignment film 49 is formed under the overcoat layer 47. The alignment film 49 is in contact with the liquid crystal layer 4.

  Below the lateral portion 42 of the black matrix 40 in the counter substrate 3, a main spacer 51 as a first spacer, a sub spacer 53 as a second spacer, and a third spacer as a first spacer protruding toward the array substrate 2, respectively. Three types of spacers, dummy spacers 55 as spacers, are provided. These spacers may be formed by forming the photoresists 50, 52, 54 under the overcoat layer 47 as shown in FIG. 3, or may have the same shape as the photoresists 50, 52, 54. The protrusions may be formed by being integrally formed with the overcoat layer 47. As shown in FIG. 3, the alignment film 49 may cover the photoresists 50, 52, 54 from the bottom, or holes may be opened in the alignment film 49 at the positions of the photoresists 50, 52, 54.

(4) Structure Related to Spacer The main spacer 51, the sub spacer 53, and the dummy spacer 55 are circular when viewed from the display surface side, and have a shape protruding from the counter substrate 3 toward the array substrate 2 side. The protrusion height L1 of the main spacer 51 is higher than the protrusion height L2 of the sub spacer 53 and the protrusion height L3 of the dummy spacer 55. The projection height of the spacer is the length in the vertical direction from the base (upper end) of the spacer to the top (lower end) of the spacer.

  The main spacer 51 protrudes from the counter substrate 3 toward a position outside the contact hole 30 of the array substrate 2. Therefore, the main spacer 51 does not overlap with the contact hole 30 in the vertical direction. The main spacer 51 is in contact with the array substrate 2 in a state where no load is applied to the display panel 1 from the outside (no load state). Thus, the distance between the array substrate 2 and the counter substrate 3 is kept constant by the main spacer 51.

  In addition, the sub spacer 53 protrudes from the counter substrate 3 toward a location outside the contact hole 30 of the array substrate 2. Therefore, the sub spacer 53 does not overlap with the contact hole 30 in the vertical direction. Since the protrusion height L2 of the sub spacer 53 is shorter than the distance between the array substrate 2 and the counter substrate 3, a gap is opened between the sub spacer 53 and the array substrate 2 in a no-load state. However, when the array substrate 2 and the opposite substrate 3 approach each other by bending or the like of the array substrate 2 or the opposite substrate 3, the sub spacer 53 hits the array substrate 2. Thus, the distance between the array substrate 2 and the counter substrate 3 is maintained. Further, even if a force is applied in the direction in which the array substrate 2 and the counter substrate 3 approach each other, the sub spacer 53 strikes the array substrate 2, so that a pressure proof effect is exhibited.

  Further, unlike the main spacer 51 and the sub spacer 53, the dummy spacer 55 protrudes from the counter substrate 3 toward the contact hole 30 of the array substrate 2 above the contact hole 30. Therefore, the dummy spacer 55 overlaps the contact hole 30 in the vertical direction. Since the projection height L3 of the dummy spacer 55 is shorter than the distance between the array substrate 2 and the counter substrate 3, the dummy spacer 55 does not enter the contact hole 30 in a no-load state. However, when the array substrate 2 and the counter substrate 3 approach each other, the dummy spacer 55 enters the contact hole 30. Here, when the side wall 33 of the contact hole 30 is inclined as shown in FIG. 3 and FIG. 4, the dummy spacer 55 enters the back of the contact hole 30 while being guided by the side wall 33.

  The sub spacer 53 and the dummy spacer 55 differ in at least one of the protrusion height and the outer diameter. Here, the outer diameter of the spacer is the diameter at the position of 0.2 μm on the base side (upper side) from the top (lower end) of the spacer. Taking the dummy spacer 55 of FIG. 4 as an example, the outer diameter means the diameter U at a position on the base 57 side (upper side) by 0.2 μm from the top 56 of the spacer. The shape of the spacer is a tapered shape that narrows toward the array substrate 2 as shown in FIGS. 3 and 4 (in other words, a shape provided with an inclined portion such that the diameter of the base portion is larger than the top portion). Although it is preferable, the diameter may be constant from the top to the bottom.

(5) Evaluation The present invention provides an appropriate dummy spacer 55 for preventing the misalignment between the array substrate 2 and the counter substrate 3. The following evaluation was performed on this dummy spacer 55. The conditions of the evaluation are described below and summarized in Table 1.

(5-1) Evaluation 1: Influence of Ratio of Protruding Height of Sub-Spacer to Protruding Height of Dummy Spacer on Occurrence of Sub-Spacer Mark As shown in the above embodiment, the main spacer, sub-spacer and dummy spacer are provided. In the display panel, the protrusion height of the main spacer is fixed to 3.0 μm, and the protrusion height of the dummy spacer is fixed to 2.8 μm, and the protrusion height of the sub spacer is changed to form sub spacer marks (array substrate orientation The tendency of subspacer marks attached to the membrane was examined. Specifically, a part near the side of the display panel was supported from below, a load was applied from above to the central part of the display panel, the load was gradually increased, and a load at which sub spacer marks were generated was examined. . The arrangement ratio of the dummy spacer was 10 per 10 RGB. Further, the diameter of the open end of the contact hole was 12.7 μm.

  The results are shown in FIG. In FIG. 6, a value (difference in protrusion height) obtained by subtracting the protrusion height of the sub spacer from the protrusion height of the dummy spacer is taken as the horizontal axis, and the load at which the sub spacer mark is generated is taken as the vertical axis. As the load value on the vertical axis increases, the display panel is curved and the upper and lower substrates shift, but even in that case, it can be said from the whole of FIG.

  Further, in FIG. 6, the ratio of the projection height of the sub spacer to the projection height of the dummy spacer is entered at the position of each plot. Moreover, the outer diameter of the dummy spacer was measured by three types, 4.5 micrometers, 6.0 micrometers, and 9.0 micrometers. In the horizontal axis, when the difference in protrusion height is -0.2 μm, the results for the dummy spacer outer diameter 4.5 μm and 6.0 μm are obtained, and for the position 0 μm, the result for the dummy spacer outer diameter 6.0 μm is Although not plotted, the description is omitted because the result is almost the same as the load when the dummy spacer is not installed.

  In addition, when a dummy spacer is not installed, the load which a sub spacer mark generate | occur | produces is 42 N-48 N on average.

  As can be seen from FIG. 6, when the difference in protrusion height is -0.2 μm and 0.0 μm, the load at which the sub spacer marks are generated is almost the same as that in the case where the dummy spacer is not disposed. At a position where the difference in protrusion height is 0.0 μm, only the measurement results of the outer diameter of the dummy spacer of 9.0 μm were larger than those of the case where there was no dummy spacer. On the other hand, at a position where the difference in projection height is +0.2 μm or more (the height of the sub spacer is 93% or less, substantially 90% or less of the height of the dummy spacer), the dummy spacer It was found that, regardless of the outer diameter, the magnitude of the load at which the sub-spacer mark is generated is increased.

(5-2) Evaluation 2: Influence of arrangement ratio of dummy spacers on generation of sub spacer marks In the display panel having main spacers, sub spacers and dummy spacers as in the above embodiment, the arrangement ratio of dummy spacers is changed. The influence of the sub-spacer mark on the occurrence was investigated. The portion in the vicinity of the side of the display panel was supported from below, a load was applied from above to the central portion of the display panel, the load was gradually increased, and the load at which sub spacer marks were generated was examined. The projection height of the main spacer is 3.0 μm, the projection height of the sub spacer is 2.6 μm, the projection height of the dummy spacer is 2.8 μm, and the projection height of the sub spacer is the projection height of the dummy spacer. It is 93%. Further, the diameter of the open end of the contact hole was 12.7 μm.

  The results are shown in FIG. In FIG. 7, the density of dummy spacers (density of dummy spacers = area of top of dummy spacers × placement ratio of dummy spacers (number / 10 RGB) × area of 1 Pixel (RGB)) is taken along the horizontal axis, and Similar to the example, the load at which the sub spacer marks are generated is taken as the vertical axis. In addition, the arrangement ratio of dummy spacers (arrangement number per 10 RGB) was entered at the position of each plot. Moreover, in this evaluation, the outer diameter of the dummy spacer was evaluated by two types of 6.0 micrometers and 9.0 micrometers.

  As can be seen from FIG. 7, in any dummy spacer outer diameter, it is understood that the sub spacer trace is less likely to occur as the arrangement ratio of the dummy spacer is larger. In particular, it was confirmed that if the dummy spacers are provided at an arrangement ratio of 7 or more per 10 RGB, it is clear that the sub spacer marks are less likely to occur than in the case where the dummy spacers are not arranged.

(5-3) Evaluation 3: Influence of the ratio of the outer diameter of the dummy spacer to the diameter of the opening end of the contact hole on the occurrence of sub spacer marks: a display panel having main spacers, sub spacers and dummy spacers as in the above embodiment In the above, the diameter of the open end of the contact hole was fixed at 12.7 μm, and the outer diameter of the dummy spacer was changed to examine the influence on the likelihood of occurrence of sub-spacer marks. The portion in the vicinity of the side of the display panel was supported from below, a load was applied from above to the central portion of the display panel, the load was gradually increased, and the load at which sub spacer marks were generated was examined. The projection height of the main spacer is 3.0 μm, the projection height of the sub spacer is 2.6 μm, the projection height of the dummy spacer is 2.8 μm, and the projection height of the sub spacer is the projection height of the dummy spacer. It is 93%.

  The results are shown in FIG. In FIG. 8, the outer diameter of the dummy spacer is taken as the horizontal axis, and the load at which the sub spacer marks are generated is taken as the vertical axis, as in the example of FIGS. 6 and 7. In addition, the ratio of the outer diameter of the dummy spacer to the diameter of the open end of the contact hole was entered at the position of each plot. Further, in this evaluation, the arrangement density of the dummy spacer is evaluated in two ways, in the case of 7 pieces / 10 RGB and in the case of 10 pieces / 10 RGB.

  As can be seen from FIG. 8, if the outer diameter of the dummy spacer is 6.0 μm or more, sub-spacer marks are less likely to occur at any arrangement density than in the case where the dummy spacer is not provided, in particular, 9.0 μm The result is that the sub-spacer scar is the least likely to occur in the vicinity.

  In addition, when the ratio of the outer diameter of the dummy spacer to the diameter of the open end of the contact hole is a ratio of 47% (substantially 50%) or more, the characteristics become better than when the dummy spacer is not provided. It was confirmed that if it is around 70 to 85%, it is more difficult for the sub spacer mark to be generated more stably.

(5-4) Evaluation 4: Influence of the ratio of the outer diameter of the dummy spacer to the diameter of the opening end of the contact hole on the pressure resistance effect As in the above embodiment, in the display panel having the main spacer, the sub spacer and the dummy spacer The diameter of the open end of the contact hole was fixed to 12.7 μm, and the outer diameter of the dummy spacer was changed to investigate the influence on the pressure resistance effect of the display panel. A portion near the side of the display panel is supported from below, a load is applied from above to the center of the display panel, and the load is gradually increased, and the surface pressure resistance load (maximum load in the range where unevenness does not occur on the screen) Examined). The projection height of the main spacer is 3.0 μm, the projection height of the sub spacer is 2.6 μm, the projection height of the dummy spacer is 2.8 μm, and the projection height of the sub spacer is the projection height of the dummy spacer. It is 93%. Further, the arrangement ratio of the dummy spacers was 10 per 10 RGB.

  The results are shown in FIG. In FIG. 9, the outer diameter of the dummy spacer is taken as the horizontal axis, and the surface pushing pressure load is taken as the vertical axis. In addition, the ratio of the outer diameter of the dummy spacer to the diameter of the open end of the contact hole was entered at the position of each plot.

  As can be seen from FIG. 9, it was confirmed that the larger the outer diameter of the dummy spacer, the greater the pressure resistance effect. In the ratio of the outer diameter of the dummy spacer to the diameter of the open end of the contact hole, the rise of the surface pressure withstanding load tends to be blunted at around 70%. Therefore, it is assumed that a high pressure resistance can be stably used if the outer diameter of the dummy spacer is 70% or more of the diameter of the open end of the contact hole.

(6) Preferred embodiment

  As illustrated in FIG. 3A, the projection height L3 of the dummy spacer 55 is higher than the projection height L2 of the sub spacer 53. In this case, the protrusion height L2 of the sub spacer 53 is preferably 90% or less of the protrusion height L3 of the dummy spacer 55.

  If the relationship between the protrusion height L3 of the dummy spacer 55 and the protrusion height L2 of the sub spacer 53 is satisfied, the outer diameter of the dummy spacer 55 is greater than the outer diameter of the sub spacer 53 as illustrated in FIG. The outer diameter of the dummy spacer 55 may be larger than the outer diameter of the sub spacer 53, or the outer diameter of the dummy spacer 55 may be the same as the outer diameter of the sub spacer 53.

  Further, as illustrated in FIG. 3B, the projection height L3 of the dummy spacer 55 may be the same as the projection height L2 of the sub spacer 53. In this case, the outer diameter of the dummy spacer 55 needs to be as large as possible, and is preferably 9.0 μm or more.

  Further, as shown in FIG. 4, the ratio of the outer diameter U of the dummy spacer 55 to the diameter T of the opening end 32 of the contact hole 30 is preferably 50% or more, and is 70 to 85%. Is preferred. When the outer diameter U and the diameter T satisfy this preferable relationship, the magnitude relationship between the outer diameter of the dummy spacer 55 and the outer diameter of the sub spacer 53 is not limited, but the projection height L3 of the dummy spacer 55 is the sub spacer 53 It is preferable to be higher than the protrusion height L2 of Preferably, the dummy spacer 55 is located at the center of the contact hole 30 in plan view (as viewed from the display surface).

  The main spacer 51 and the sub spacer 53 are provided above the place outside the contact hole 30, for example, at the intersection of the signal line 6 and the gate line 7 or in the vicinity thereof as shown in FIG. When the main spacer 51 and the sub spacer 53 are provided above the intersection of the signal line 6 and the gate line 7 or in the vicinity thereof, these spacers 51 and 53 are the vertical direction portion 41 and the horizontal direction portion of the black matrix 40 It will be provided under the intersection with 42. On the other hand, the dummy spacer 55 is provided above the contact hole 30. Therefore, the dummy spacer 55 is provided at a position out of the intersection of the vertical direction portion 41 and the horizontal direction portion 42 of the black matrix 40.

  If the main spacer 51 and the sub spacer 53 are provided above the intersection of the signal line 6 and the gate line 7 or in the vicinity thereof, as shown in FIG. 3 and FIG. It is desirable to sandwich at least two other signal lines 6 with the sub spacer 53. When the other two signal lines 6 are interposed between the main spacer 51 and the sub spacer 53, and in the case where the dummy spacer 55 is provided between the main spacer 51 and the sub spacer 53, FIGS. It is desirable to provide a dummy spacer 55 above the contact hole 30 between the two signal lines 6 as shown in FIG.

  In the specific example shown in FIGS. 3 and 5, the main spacer 51 and the sub spacer 53 are in the vicinity of the intersection of the signal line 6 and the gate line 7 between the blue color filter layer B and the red color filter layer R. A dummy spacer 55 is provided above the contact hole 30 at the location of the green color filter layer G between the main spacer 51 and the sub spacer 53.

  The dummy spacers 55 are preferably provided at a rate of 7 or more per 10 RGB, and most preferably 10 per 10 RGB. Here, 10 RGB is an area where 30 pixel openings 19 are gathered, and is an area including 10 R (red), G (green) and B (blue) pixel openings 19 respectively. When the dummy spacers 55 are provided at a rate of 10 per 10 RGB, it is preferable that the dummy spacers 55 be provided at the location of the color filter layer 44 of the same color (green in the above specific example).

  Further, the number of main spacers 51 may be smaller than the number of dummy spacers 55, and may be 10 or less for 300 contact holes 30, for example. The main spacers 51 are distributed substantially equally throughout the image display area 8.

(7) Operation and Effect In the present embodiment, as described above, the dummy spacer 55 protrudes from the counter substrate 3 toward the contact hole 30. Therefore, even if external force is applied to shift the opposing substrate 3 to the array substrate 2 while causing the opposing substrate 3 and the array substrate 2 to approach each other due to bending of the display panel 1 or the like, the dummy spacer 55 acts on the contact hole 30. Since the contact with the side wall 33 of the falling contact hole 30 occurs, the deviation between the counter substrate 3 and the array substrate 2 can be suppressed to a small value.

  As described above, since the deviation between the opposing substrate 3 and the array substrate 2 is suppressed to a small degree, the possibility of the sub spacer 53 damaging the alignment film 26 of the array substrate 2 is low, and the dummy spacer 55 is in the contact hole 30. Also, the possibility of damaging the alignment film 26 of the array substrate 2 is low. Therefore, the possibility that these spacers damage the portion of the alignment film 26 of the array substrate 2 not covered with the black matrix 40 is low, and the possibility of light leakage being visible is low.

  Further, since these spacers are unlikely to damage the alignment film 26, there is no need to provide the black matrix 40 in the vicinity of the spacers over a wide range. Therefore, the aperture ratio of the pixel 10 can be increased.

  In particular, in the case where the projection height L2 of the sub spacer 53 is smaller than the projection height L3 of the dummy spacer 55, the dummy spacer 55 is likely to fall into the contact hole 30, and the above effects become remarkable.

(8) Modifications Those skilled in the art can make various modifications to the above embodiment, including addition and deletion of configurations, within the scope of the present invention. Those modified forms are also within the scope of the present invention.

  For example, in the case where the sub spacer 53 and the dummy spacer 55 have different projecting heights or outer diameters, at least a portion of the plurality of sub spacers 53 is located above the contact hole 30 like the dummy spacer 55 as shown in FIG. It may be provided.

  Further, the vertical relationship between the pixel electrode 16 and the common electrode 17 may be opposite to that in the above embodiment. That is, the pixel electrode 16 may be formed on the organic insulating film 24, the second interlayer insulating film 25 may be formed thereon, and the common electrode 17 and the metal wiring 18 may be further formed thereon.

  In the above embodiment, the liquid crystal display device has been described as the IPS type, but in the liquid crystal display device of the VA system, TN system or the like, the main spacer, sub spacer and dummy spacer similar to those of the above embodiment are provided Also good.

  Further, another modified example is shown in FIG. 11 and FIG. In this modification, opposing protrusions 150 and array protrusions 151 are provided as main spacers. The opposing projection 150 projects downward from the opposing substrate 3. The array protrusion 151 protrudes upward from the array substrate 2. The opposing protrusion 150 is formed by inserting the photoresist 152 under the overcoat layer 47 below the black matrix 40 of the opposing substrate 3 as the main spacer 51 in the above embodiment. The opposing protrusion 150 is rectangular when viewed from the display surface side, and extends long in a first direction (lateral direction in the drawing). On the other hand, the array projection 151 is formed, for example, by inserting a photoresist 153 between the gate insulating film 22 and the first interlayer insulating film 23. The array protrusion 151 is rectangular when viewed from the display surface side, and extends long in a second direction (vertical direction in the figure) orthogonal to the first direction. The array protrusion 151 is provided below the opposing protrusion 150. Then, the opposing protrusion 150 and the array protrusion 151 cross each other from above and below, so that the distance between the array substrate 2 and the opposing substrate 3 is kept constant.

  Based on the present embodiment, all other embodiments that can be appropriately designed and implemented by those skilled in the art also fall within the scope of the present invention as long as they include the subject matter of the present invention. In addition, the effects that are apparent from the present specification or the effects that can be conceived by those skilled in the art are naturally provided by the present invention.

Reference Signs List 1 display panel 2 array substrate 3 opposing substrate 4 liquid crystal layer 5 seal member 6 signal line 7 gate line 8 image display area 9 peripheral area 10 pixel 10 DESCRIPTION OF SYMBOLS 11 ... TFT, 12 ... Gate electrode, 13 ... Source electrode, 14 ... Drain electrode, 15 ... Slit, 16 ... Pixel electrode, 17 ... Common electrode, 17a ... Opening end, 18 ... Metal wiring, 19 ... Pixel opening part, 20 ... Glass substrate, 21 ... Semiconductor layer, 22 ... Gate insulating film, 23 ... First interlayer insulating film, 24 ... Organic insulating film, 25 ... Second interlayer insulating film, 26 ... Alignment film, 30 ... Contact hole, 31 ... Hole 32: open end, 33: sidewall, 34: sidewall, 40: black matrix, 41: longitudinal portion, 42: lateral portion, 44: color filter layer, 47: overcoat layer, 48: glass substrate, 49 ... Alignment film, 50 ... 51: main spacer, 52: photoresist, 53: sub spacer, 54: photoresist, 55: dummy spacer, 56: top, 57: base, 150: facing projection, 151: array projection, 152 ... Photoresist, 153: Photoresist

Claims (7)

In a liquid crystal display device provided with an array substrate in which a contact hole is formed in a connection portion between a pixel electrode and a semiconductor layer, and a counter substrate facing the array substrate with a liquid crystal layer interposed therebetween.
In an image display area in which a plurality of pixel electrodes are arranged, a first spacer for keeping a space between the array substrate and the counter substrate outside the contact hole, and a height of the first spacer from the counter substrate A second spacer and a third spacer having a low height are provided;
The third spacer protrudes from the opposing substrate toward the contact hole.
The liquid crystal display device, wherein the height of the second spacer from the counter substrate is lower than the height of the third spacer from the counter substrate.   The liquid crystal display device according to claim 1, wherein a height of the second spacer from the counter substrate is 90% or less with respect to a height of the third spacer.   The liquid crystal display device according to claim 1, wherein the third spacer has an outer diameter smaller than that of the second spacer.   The liquid crystal display device according to any one of claims 1 to 3, wherein the second spacer protrudes from the opposing substrate toward a place outside the contact hole.   The liquid crystal display device according to any one of claims 1 to 3, wherein the second spacer protrudes from the counter substrate toward the contact hole. A plurality of signal lines and a plurality of gate lines are provided in a grid on the array substrate,
A light-shielding black matrix is provided on the counter substrate along the signal line and the gate line.
The first spacer and the second spacer are provided under an intersection of a portion along the signal line of the black matrix and a portion along the gate line.
5. The liquid crystal display device according to claim 1, wherein the third spacer is provided outside the intersection. The first spacer is provided on each of the counter substrate and the array substrate, and the first spacer on the counter substrate side is provided extending in a first direction, and the first spacer on the array substrate side is provided. The first spacer is provided extending in a second direction orthogonal to the extending direction of the first spacer on the counter substrate side,
2. The liquid crystal display device according to claim 1, wherein the first spacer on the counter substrate side and the first spacer on the array substrate side are arranged to overlap in a plan view.