JP2019103100A - Signal generation device and signal generation method - Google Patents

Abstract

To provide a signal generation device and signal generation method for generating a signal of a high SN ratio while reducing a switching frequency.SOLUTION: A signal generation device includes: delay means for delaying an output signal; difference means for obtaining a difference between an input signal and a signal from the delay means; addition means; integration means for integrating an output from the addition means; comparison means for discretizing an output from the integration means and generating an output signal; and feedback means for supplying a signal indicating a change state of an output signal from the comparison means to the addition means, and allowing the addition means to add the signal to a signal from the difference means.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a signal generation device and a signal generation method, and more particularly to a signal generation device including an amplifier and a signal generation method.

  It is desirable for the transmitter of the wireless system to operate with low power consumption. In particular, the signal amplifier at the final stage of the transmitter consumes 50% or more of the power of the entire transmitter. Therefore, it is required to increase the power efficiency of the final stage signal amplifier. As a signal amplifier that can be used for the final stage, one using a switching amplifier is known.

  The power loss of the switching amplifier is largely due to the switching loss. Therefore, a modulation method that reduces the number of switchings without affecting the output signal is important.

  With regard to a delta sigma modulation circuit that limits the minimum pulse width and enables reduction of switching times, and performing signal amplification using the switching amplifier as the control signal, for example, proposed as a background art of Patent Document 1 It is done.

  An envelope tracking type amplifier using a switching amplifier as a power supply modulator is proposed in, for example, Patent Document 2.

Patent No. 4115959 gazette Patent No. 5725026 gazette JP 2008-99362A JP 2008-193159 A Unexamined-Japanese-Patent No. 2006-262686

  Although it is known that the amplifiers of Patent Documents 1 and 2 described above have high power efficiency, it is still difficult to achieve the power efficiency required for a wireless transmitter. In addition, there is an improvement even if the combination of them, that is, an amplifier that uses delta sigma modulation by limiting the minimum pulse width of the envelope component of the input signal and that is further amplified by a switching amplifier as a power supply modulation signal It is similar to that.

  In an amplifier using a switching element, one of the major causes of the reduction in power efficiency is the power loss that occurs during switching. In order to improve power efficiency, it is necessary to suppress this switching loss. That is, it is necessary to suppress the number of switchings per unit time.

  However, on the other hand, reducing the number of times of switching limits the degree of freedom of the signal and leads to deterioration of the signal-to-noise ratio in analog-to-digital conversion.

  When an analog signal is digitally modulated and amplified by a switching amplifier, a modulation scheme for further reducing the number of times of switching compared to the existing scheme while suppressing quantization noise in the vicinity of a desired signal has become an issue.

  Patent documents 3 and 5 propose switching power supplies including a delta sigma modulation circuit, and patent literature 4 proposes a switching circuit including a delta sigma modulation circuit.

  An object of the present invention is to provide a signal generation device and a signal generation method that generate a signal with a high signal-to-noise ratio while reducing the number of switching times.

  In order to achieve the above object, a signal generation apparatus according to the present invention comprises: delay means for delaying an output signal; difference means for taking a difference between an input signal and a signal from the delay means; addition means; Integrating means for integrating the output from the above, comparing means for discretizing the output from the integrating means to generate the output signal, and supplying the signal indicating the change state of the output signal from the comparing means to the adding means And feedback means for causing the addition means to add the signal from the difference means in the addition means.

A signal generation method according to the invention is a signal generation method of a signal generation device including delay means, difference means, addition means, integration means, comparison means, and feedback means,
The delay means delays the output signal,
The difference means takes the difference between the input signal and the signal from the delay means;
The integrating means integrates the output from the adding means;
The comparing means discretizing the output from the integrating means to generate the output signal;
The feedback means supplies a signal indicating the change state of the output signal from the comparison means to the addition means, and causes the addition means to add the signal from the difference means.

  According to the present invention, it is possible to provide a signal generation device and a signal generation method that generate a signal with a high signal-to-noise ratio while reducing the number of switching times.

It is a block diagram for demonstrating the signal generation apparatus of embodiment by a high-level concept. It is a block diagram for demonstrating the signal generation apparatus of 1st Embodiment. It is a wave form diagram which shows the signal of the signal generation apparatus of FIG. It is a block diagram for demonstrating the signal generation apparatus of 2nd Embodiment. It is a block diagram for demonstrating the signal generation apparatus of 3rd Embodiment. It is a block diagram for demonstrating the signal generation apparatus of 4th Embodiment. It is a block diagram for demonstrating the signal generation apparatus of 5th Embodiment. It is a wave form diagram which shows the signal of the signal generation apparatus of FIG. It is a graph which shows the calculation result of the signal to noise ratio numerical value of the signal generation apparatus of 1st Embodiment. It is a graph which shows the calculation result of the pulse width distribution numerical value of 1st Embodiment. FIG. 7 is a schematic view showing a wireless transmitter of another embodiment.

  Preferred embodiments of the present invention will be described in detail with reference to the drawings. Before describing a specific embodiment, a signal generation apparatus according to a high-level embodiment of the present invention will be described.

  FIG. 1 is a block diagram for explaining a signal generating apparatus according to a high-level concept embodiment. The signal generation apparatus of FIG. 1 includes difference means 101, addition means 102, integration means 103, comparison means 104, delay means 105, and feedback means 106.

  In the signal generation apparatus of FIG. 1, the difference means 101 outputs the difference between the input signal and the output signal of the delay means 105. The addition means 102 outputs the sum of the output of the difference means 101 and the output signal of the feedback means 106. The integrating means 103 integrates the output signal of the adding means 102. The comparison means 104 digitizes the signal by comparing the signal output from the integration means 103 with a reference value. The digitized signal becomes an output signal of the signal generator and is input to the delay means 105. Further, a signal indicating the change state of the output signal of the comparison means 104 is inputted to the feedback means 106.

  In the signal generation apparatus of FIG. 1, the comparison means 104 which compares the signal output from the integration means 103 with the reference value outputs a signal indicating the change state of the output signal of the comparison means 104. The signal indicating the change state of the output signal of the comparison means 104 is added to the output of the difference means 101 by the addition means 102 via the feedback means 106. The output from the terminal of the comparing means 104 is the integral value of the integrating means 103 and the absolute value of the internal reference value of the comparing means 104 that triggered the change when the output of the comparing means 104 changes to the integrating means 103. Act to grow. This widens the pulse width and reduces the number of switchings. As a result, the number of switchings per unit time of the output signal is reduced.

  By reducing the number of times of switching, the power efficiency of the signal generator can be improved. Hereinafter, more specific embodiments will be described with reference to the drawings.

First Embodiment
The signal generation device of the first embodiment will be described.

  FIG. 2 is a block diagram for explaining the signal generation device of the first embodiment. The signal generation device shown in FIG. 2 includes a difference unit 1, an adder 2, an integrator 3, a comparator 4, a delay circuit 5, an amplifier 6, and a delay circuit 7.

  In the signal generation device of FIG. 2, the difference unit 1 takes the difference between the analog input signal and the output signal of the delay circuit 5, and outputs this difference. The adder 2 outputs the sum of the output of the difference unit 1 and the output signal of the delay circuit 7. The integrator 3 integrates the output signal of the adder 2. The comparator 4 discretizes the output from the integrator 3. In other words, the comparator 4 digitizes the signal by comparing the signal output from the integrator 3 with the reference value. The digitized signal becomes an output signal of the signal generator and is input to the delay circuit 5. The delay circuit 5 delays the input signal and supplies it to the difference unit 1.

  The comparator 4 has, in addition to the output terminal for outputting the output signal of the signal generation device, a terminal for outputting a signal indicating the change state of the output signal to the outside. Below, the terminal which outputs the signal which shows the change state of the output signal of the comparator 4 outside may be called the change output terminal of the comparator 4. FIG. For example, when the output signal of the comparator 4 changes in a smaller direction, the terminal that outputs the signal indicating this change state to the outside, or when the output signal of the comparator 4 changes in a larger direction. Will output 1 and 0 otherwise. A signal indicating the change state of the output signal of the comparator 4 is input to the amplifier 6 and amplified by the amplifier 6 by R times. Here, R is a positive real number. The output of the amplifier 6 is input to the delay circuit 7. The delay circuit 7 delays the input signal and supplies it to the adder 2.

  FIG. 3 is a waveform diagram showing signals of the signal generator of FIG. FIG. 3 shows that the output A of the integrator 3 and the change output terminal of the comparator 4 when the output level of the comparator 4 is binary, with a constant input as an analog input signal to the signal generator. And the output C of the comparator 4.

  The output from the change output terminal of the comparator 4 is the absolute value of the integral value of the integrator 3 and the internal reference value of the comparator 4 that triggered the change when the output of the comparator 4 changes with respect to the integrator 3 Act to increase the value. For example, specifically, when the internal reference value of the comparator 4 is 0, R changes when the output of the comparator 4 changes from negative to positive, and -R changes when the output changes from positive to negative. 2 are added to the input of the integrator 3.

  The extent of this effect depends on the amplification factor R of the amplifier 6. Specifically, the larger the amplification factor R, the longer it takes for the output of the integrator 3 to reach the comparison reference value that has triggered the change again. That is, the pulse width becomes wider. Further, when the amplification factor R is 0, it is the same as the existing delta sigma modulation which is not pulse width limited, and the minimum pulse width is 1. In the case of FIG. 3, the minimum pulse width is 5 due to the effect of the amplification factor R. By increasing the pulse width, the number of switchings decreases. As a result, the number of switchings per unit time of the output signal of the signal generator is reduced. By reducing the number of times of switching, the signal generation device of FIG. 3 can realize improvement in power efficiency.

  In the signal generating device of FIG. 3, the output of the comparator 4 is always fed back to the integrator 3. As a result, since the feedback of delta sigma modulation works more appropriately in the signal generation device of FIG. 3, it is possible to reduce the number of switchings more.

[Description of effect]
By using the signal generation device according to the first embodiment, it is possible to obtain a digital signal that has been subjected to delta sigma modulation from an analog signal while suppressing the number of times of switching.

Second Embodiment
Next, the signal generation device of the second embodiment will be described. The signal generation apparatus of the present invention is not limited to the configuration of the first embodiment described above, and various modifications, additions, and the like are possible. The signal generation device of the second embodiment is a modification of the signal generation device of the second embodiment.

  FIG. 4 is a block diagram for explaining a signal generation device of the second embodiment. The same components as those of the signal generating apparatus according to the first embodiment are designated by the same reference numerals, and the detailed description thereof will be omitted.

  The signal generation device of FIG. 4 includes a difference unit 1, an adder 2, an integrator 3, a comparator 4, a delay circuit 5, and an amplifier 6 as in the signal generation device of FIG. Furthermore, the signal generation device of FIG. 4 includes a digital filter 8. The digital filter 8 of FIG. 4 receives the output signal of the comparator 4, that is, the output signal of the signal generation device, and outputs the input signal to the amplifier 6. Then, the amplifier 6 of FIG. 4 amplifies the signal by R and supplies it to the adder 2.

  Here, the transfer function of the digital filter 8 is, for example,

I assume. As a result, the adder 2 of FIG. 4 is configured to be supplied with the same signal as the signal generation device of the first embodiment shown in FIG. Here, n is the number of levels output from the comparator 4, and x _k is the kth output level counted from the bottom of the comparator 4. With such a transfer function, the digital filter 8 of FIG. 4 changes the output signal of the comparator 4 to −1 when the output signal of the comparator 4 changes in the smaller direction, and when the output signal of the comparator 4 changes in the larger direction. Will output 1 and 0 otherwise.

  In the signal generation device of FIG. 4, the output signal of the comparator 4 is input to the digital filter 8 to output the change of the output signal of the comparator 4 of the first embodiment to the outside (change output terminal). The same signal as the delayed output can be obtained. Thus, the output signal of the signal generating device of FIG. 4 is the same as that of the first embodiment.

[Description of effect]
Thereby, the same effect as that of the signal generation device of the first embodiment can be obtained while adopting a configuration that is partially different from the signal generation device of the first embodiment.

  That is, as in the signal generation device of the first embodiment, as the amplification factor R of the amplifier 6 is larger, the time taken for the output of the integrator 3 to reach the comparison reference value that triggered the change again becomes longer. The pulse width becomes wider. Further, when the amplification factor R of the amplifier 6 is zero, the pulse width is the same as in the existing delta sigma modulation which is not limited, and the minimum pulse width is one. The effect of the amplification factor R of the amplifier 6 lengthens the minimum pulse width and reduces the number of switchings. As a result, the number of switchings per unit time of the output signal of the signal generator is reduced. By reducing the number of times of switching, improvement in power efficiency can be realized also in the signal generation device of FIG.

Third Embodiment
Next, a signal generation device according to a third embodiment will be described. In the present embodiment, the signal generation device is configured to include the signal generation device of the first embodiment. FIG. 5 is a block diagram for explaining a signal generation device of the third embodiment. The same components as those of the signal generating apparatus according to the first embodiment are designated by the same reference numerals, and the detailed description thereof will be omitted.

  The signal generation device of FIG. 5 includes a delta sigma modulation unit 10, a switching amplifier 11, and a frequency filter 12. The delta sigma modulation unit 10 of the signal generation device of FIG. 5 adopts the same configuration as the signal generation device of FIG. 2 described in the first embodiment. As described above, since the signal generation device of FIG. 4 described in the second embodiment can obtain an output signal equivalent to the signal generation device of the first embodiment, the delta sigma modulation unit 10 of the signal generation device of FIG. The signal generator of FIG. 4 may be used as

An analog input signal as an input signal of the signal generation apparatus of FIG. 5 is converted into a digital signal by the delta sigma modulation unit 10. The obtained digital signal is input to the switching amplifier 11 and amplified. The output from the switching amplifier 11 is input to the frequency filter 12. Only the desired frequency band is cut out by the frequency filter 12 and output as an output signal.
[Description of effect]
Most of the power loss of the switching amplifier is caused by the switching loss that occurs when the output value changes. The switching loss is proportional to the number of switchings per unit time of the switching amplifier.

  In the signal generation device of the present embodiment, the input signal is subjected to delta sigma conversion using the signal generation device of the first embodiment to obtain a digital signal in which the number of times of switching is reduced while maintaining the signal to noise ratio. Can. By using this digital signal as the input of the switching amplifier, the switching loss of the switching amplifier can be reduced and the power efficiency can be improved.

Fourth Embodiment
Next, a signal generation device of a fourth embodiment will be described. The present embodiment is a modification of the signal generation device of the third embodiment, and the signal generation device is configured to include the signal generation device of the first embodiment as in the signal generation device of the third embodiment. is there. FIG. 6 is a block diagram for explaining a signal generation device of the fourth embodiment. The same components as those of the signal generation device of the first embodiment and the signal generation device of the third embodiment are denoted by the same reference numerals, and the detailed description thereof is omitted.

  The signal generation apparatus of FIG. 6 includes a delta sigma modulation unit 10, a switching amplifier 11, and a frequency filter 12, as in the signal generation apparatus of the third embodiment. Furthermore, the signal generator of FIG. 6 includes an amplifier 13 for amplifying and outputting an input signal.

  In the signal generator of FIG. 6, the input signal is amplified by the amplifier 13 and output as an output signal. The input to the delta sigma modulator 10 is an envelope signal of the input signal. The output from the frequency filter is input to the amplifier 13 as a modulation power supply. In the signal generation apparatus of FIG. 6, the envelope signal is input to the delta sigma modulation unit 10 and converted into a digital signal by the delta sigma modulation unit 10. Furthermore, as in the third embodiment, the obtained digital signal is input to the switching amplifier 11 and amplified. The output from the switching amplifier 11 is input to the frequency filter 12. Only the desired frequency band is cut out by the frequency filter 12 and output as an output signal. In the present embodiment, the output of the frequency filter 12 is used as a power supply of the amplifier 13.

[Description of effect]
Similar to the signal generation device of the third embodiment, the signal generation device of the present embodiment delta sigma converts the input signal using the signal generation device of the first embodiment while maintaining the signal to noise ratio. Digital signals with reduced number of switching can be obtained. By using this digital signal as the input of the switching amplifier, the switching loss of the switching amplifier can be reduced and the power efficiency can be improved.

  Furthermore, in the signal generation device of the present embodiment, by using the signal generation device of the third embodiment as a power supply modulator of the amplifier 13, an amplifier with high power efficiency can be provided.

Fifth Embodiment
The signal generation apparatus of the fifth embodiment will be described as a further modification of the first embodiment, the second embodiment, and the like described above. FIG. 7 is a block diagram for explaining a signal generation device of the fifth embodiment. The same components as those of the signal generating apparatus according to the first embodiment are designated by the same reference numerals, and the detailed description thereof will be omitted.

  The signal generation device of FIG. 7 includes a differentiator 1, an integrator 3 and a delay circuit 5, as in the signal generation device of the first embodiment. In the signal generation device of FIG. 7, the amplifier 6 and the delay circuit 7 are eliminated as compared with the signal generation device of the first embodiment. Further, the comparator 4 is replaced by a comparator 9 having a hysteresis of width R.

  FIG. 8 is a waveform diagram showing signals of the signal generation device of FIG. FIG. 8 shows the output A of the integrator 3 and the comparator when the output level of the comparator 9 is a binary value of −1 and 1 while inputting a constant as an analog input signal to the signal generation device. The output of 9 and the reference value of the comparator 9 are shown.

  When the output from the integrator 3 crosses the reference value of the comparator 9, the reference value of the comparator 9 changes in the direction away from the input value of the comparator 9 by the width R due to the hysteresis effect of the comparator 9. This means that the output value of the integrator 3 changes by a width R away from the reference value of the comparator 9 when the reference value of the comparator 9 is considered fixed. Therefore, the output from the comparator 9 is the same as the output from the comparator 4 of the first embodiment.

  Further, by setting the width R of the hysteresis larger than the difference between the output levels of the comparator 9, the minimum value of the output pulse width of the comparator can be made larger than in the case where there is no hysteresis.

[Description of effect]
The signal generation device of the present embodiment is expected to have the same effect of improving the power efficiency as the signal generation device of the first embodiment while having a simpler configuration than the signal generation device of the first embodiment.

Other Embodiments
A wireless transmitter can be configured including the signal generation devices of the first to fifth embodiments described above. FIG. 11 is a schematic view showing a wireless transmitter of another embodiment. The wireless transmitter 20 of FIG. 11 includes a signal generation device 21 that generates a wireless signal, and an antenna 22 that transmits the wireless signal generated by the signal generation device 21.

  The signal generation apparatus of the first to fifth embodiments can be used as a final stage amplifier of such a wireless transmitter to configure a wireless transmitter. This wireless transmitter can improve power efficiency by using the signal generation devices of the first to fifth embodiments.

  FIG. 9 is a signal pair with respect to the number of switching times per unit time when an envelope signal of a band 20 MHz LTE signal of 245.76 Mbps sampling is input for the signal generating apparatus of the first embodiment and the delta sigma modulation system of the background art. It is a graph which shows the result of having numerically calculated noise ratio (except for a direct current component).

  In FIG. 9, the output signal according to the first embodiment (delta sigma modulation of the embodiment), the output signal according to the circuit system as shown in FIG. 5 of Patent Document 1 (minimum pulse width limited delta sigma modulation), and general delta sigma The case where the minimum pulse width is 1, 2, 4 and 8 is plotted for modulation (delta sigma modulation). The oversampling rate is eight. If the minimum pulse width is one, then any scheme produces the same signal.

  As a result of the calculation, it was found that in the method of the first embodiment, when the obtained signal-to-noise ratio is fixed, it is possible to generate a signal with a smaller number of switching times. It was also found that even when the minimum pulse width was fixed, it was possible to obtain a signal with a higher signal-to-noise ratio with a smaller number of switchings.

  FIG. 10 shows pulse widths of the output signal according to the first embodiment (delta sigma modulation of the embodiment) and the output signal according to the circuit system as shown in FIG. 5 of patent document 1 (minimum pulse width limited delta sigma modulation). It shows the results of numerical calculation of the distribution of the number of occurrences. The minimum value of the pulse width was 8 in both cases.

  As a result of calculation, in the method of the first embodiment, a wider number of wider pulses are distributed as compared with the output signal (minimum pulse width limited delta sigma modulation) according to the circuit method as shown in FIG. all right. As more signals with wider pulse widths are output as compared with the method of the background art, it has been found that performance degradation is less likely to occur even when using devices with poor time response.

  Although the preferred embodiments and examples of the present invention have been described above, the present invention is not limited thereto. It is needless to say that various modifications are possible within the scope of the invention described in the claims, and they are also included in the scope of the present invention.

Some or all of the above embodiments may be described as in the following appendices, but is not limited to the following.
(Supplementary Note 1) Delay means for delaying the output signal, difference means for taking a difference between the input signal and the signal from the delay means, addition means, integration means for integrating the output from the addition means, and integration A comparison means for discretizing an output from the means to generate the output signal; and a signal indicating a change state of the output signal from the comparison means to the addition means, and the addition means outputs the signal from the difference means A signal generating device including a signal and feedback means for adding by the adding means.
(Supplementary Note 2) The integrated value of the integrating means or the comparing means such that the difference between the integrated value of the integrating means and the comparison reference value of the comparing means increases by a fixed value when the output value of the comparing means changes. The signal generator according to appendix 1, wherein the value of the comparison reference value of is changed.
(Supplementary Note 3) A value is added such that the difference between the integral value of the integrating means and the comparison reference value of the comparing means increases by a fixed value when the output value of the comparing means changes. Signal generator.
(Supplementary note 4) The signal generation device according to any one of supplementary notes 1 to 3, wherein the feedback means includes an amplifier for amplifying a signal indicating a change state of the output signal from the comparison means.
(Supplementary Note 5) The feedback means generates a signal indicating a change state of the output signal from the comparing means based on the output signal of the comparing means, and an output of the filter is amplified to perform the addition. A signal generator as claimed in any one of the preceding claims, including an amplifier for supplying the means.
(Supplementary note 6) The signal generating device according to any one of supplementary notes 1 to 5, further including a switching amplifier that amplifies the output signal of the comparison means.
(Supplementary note 7) The signal generating device according to supplementary note 6, further including a frequency filter that receives the output of the switching amplifier and outputs a specific frequency signal.
(Supplementary Note 8) The signal generating device according to Supplementary note 6, further including a frequency filter that receives the output of the switching amplifier and outputs a specific frequency signal.
(Supplementary note 9) The signal generating device according to Supplementary note 8, further including another amplifier whose output from the frequency filter is supplied to a power supply.
(Supplementary note 10) The signal generation device according to any one of supplementary notes 1 to 9, which generates a wireless signal,
And an antenna configured to transmit the wireless signal generated by the signal generation device.
(Supplementary note 11) A signal generation method of a signal generation device including delay means, difference means, addition means, integration means, comparison means, and feedback means,
The delay means delays the output signal,
The difference means takes the difference between the input signal and the signal from the delay means;
The integrating means integrates the output from the adding means;
The comparison means discretizes the output from the integration means to generate the output signal;
The signal generation method, wherein the feedback means supplies a signal indicating the change state of the output signal from the comparison means to the addition means, and the signal is added to the signal from the difference means by the addition means.

  The present invention can be applied to applications such as radio base stations and final stage amplifiers of terminals.

Reference Signs List 1 difference unit 2 adder 3 integrator 4 comparator 5 delay circuit 6 amplifier 7 delay circuit 8 digital filter 9 comparator 10 delta sigma modulation unit 11 switching amplifier 12 frequency filter 13 amplifier

Claims (10)

  A delay means for delaying the output signal, a difference means for taking the difference between the input signal and the signal from the delay means, an addition means, an integration means for integrating the output from the addition means, and an output from the integration means A discriminator to generate the output signal, and a signal indicating a change state of the output signal from the comparator to the adding means, and the adding means adds the signal from the difference means to the addition And feedback means for adding by means.   The integrated value of the integration means or the comparison reference value of the comparison means so that the difference between the integrated value of the integration means and the comparison reference value of the comparison means increases by a fixed value when the output value of the comparison means changes. The signal generation device according to claim 1, wherein the value of is changed.   The signal generation apparatus according to claim 1, wherein when the output value of the comparison means changes, a value is added such that the difference between the integral value of the integration means and the comparison reference value of the comparison means is increased by a fixed value. .   The signal generation apparatus according to any one of claims 1 to 3, wherein the feedback means includes an amplifier for amplifying a signal indicating a change state of the output signal from the comparison means.   The feedback means, based on the output signal of the comparison means, generates a signal indicating a change state of the output signal from the comparison means, and amplifies the output of the filter and supplies it to the addition means The signal generator according to any one of claims 1 to 3, comprising an amplifier.   The signal generator according to any one of claims 1 to 5, further comprising a switching amplifier for amplifying an output signal of the comparison means.   The signal generation apparatus according to claim 6, further comprising: a frequency filter that receives the output of the switching amplifier and outputs a specific frequency signal.   The signal generation apparatus according to claim 6, further comprising: a frequency filter that receives the output of the switching amplifier and outputs a specific frequency signal. 9. A signal generator according to any one of the preceding claims, which generates a radio signal.
And an antenna configured to transmit the wireless signal generated by the signal generation device. What is claimed is: 1. A signal generation method of a signal generation device, comprising: delay means, difference means, addition means, integration means, comparison means, and feedback means,
The delay means delays the output signal,
The difference means takes the difference between the input signal and the signal from the delay means;
The integrating means integrates the output from the adding means;
The comparison means discretizes the output from the integration means to generate the output signal;
The signal generation method, wherein the feedback means supplies a signal indicating the change state of the output signal from the comparison means to the addition means, and the signal is added to the signal from the difference means by the addition means.

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