JP2019096914A - Solid state imaging device - Google Patents

Abstract

To provide a solid state imaging device capable of improving image quality characteristics of a captured image.SOLUTION: According to one embodiment, a solid state imaging device is provided. The solid-state imaging device according to the embodiment includes an optical black area, a contact plug and a voltage applying unit. The optical black area is provided in a semiconductor layer, and light from an object is shielded. The contact plug is electrically connected to the semiconductor layer in the optical black area. The voltage applying unit applies a predetermined voltage to the contact plug.SELECTED DRAWING: Figure 2

Description

  Embodiments of the present invention relate to a solid-state imaging device.

  Conventionally, a solid-state imaging device includes pixels arranged in an effective pixel area for receiving light from an object and pixels arranged in an optical black area from which light from the object is blocked. Also, in the optical black (OB) region, two types of pixels of photodiode (PD) present OB and PD no OB are provided.

  In such a solid-state imaging device, the dark current of the photodiode is calculated based on the difference between the signal read from the OB with PD arranged in the optical black area and the signal read from the OB without PD, and accordingly The dark current correction of the image signal of the pixel in the effective pixel area is performed. For this reason, it is desirable to make the dark current of OB without PD zero.

  However, in such a solid-state imaging device, it is difficult to completely eliminate the dark current generated near the photodiode in the pixel without PD, and the dark current component of the photodiode can not be accurately obtained. Image quality characteristics were insufficient. For example, in the back-illuminated solid-state imaging device, it is difficult to make the dark current on the light incident surface side zero in the case of OB without PD. Further, even in the surface-illuminated solid-state imaging device, it is difficult to eliminate the dark current generated deep in the silicon substrate.

JP 2012-120076 A

  One embodiment aims to provide a solid-state imaging device capable of improving the image quality characteristics of a captured image.

  According to one embodiment, a solid state imaging device is provided. The solid-state imaging device according to the embodiment includes an optical black area, a contact plug, and a voltage application unit. The optical black area is provided in the semiconductor layer, and the light from the subject is blocked. The contact plug is electrically connected to the semiconductor layer in the optical black area. The voltage application unit applies a predetermined voltage to the contact plug.

FIG. 1 is a block diagram showing a schematic configuration of a solid-state imaging device according to the embodiment. FIG. 2 is a schematic cross-sectional view of a pixel arranged in a contact plug-added PD OB region in the pixel array according to the embodiment. FIG. 3 is a schematic view showing an example of a circuit configuration of a pixel arranged in the contact plug-added PD OB region provided in the solid-state imaging device according to the embodiment. FIG. 4 is a flowchart illustrating a processing procedure performed by the solid-state imaging device according to the embodiment. FIG. 5 is a schematic cross-sectional view of a pixel arranged in a contact plug-less PD without OB region in a pixel array according to another modification of the embodiment. FIG. 6 is a flowchart showing a processing procedure executed by a solid-state imaging device according to another modification of the embodiment.

  Hereinafter, a solid-state imaging device according to an embodiment will be described in detail with reference to the attached drawings. The present invention is not limited by this embodiment.

  FIG. 1 is a block diagram showing a schematic configuration of a solid-state imaging device 10 according to the embodiment. As shown in FIG. 1, the solid-state imaging device 10 includes a pixel array 2, a vertical scanning circuit 11, a load circuit 12, a column ADC (Analog Digital Converter) circuit 13, a horizontal scanning circuit 14, a reference voltage generation circuit 15, and a timing control circuit. And a post-processing unit 17.

  In the pixel array 2, the pixels 20 are arranged in a two-dimensional array (matrix) in the horizontal direction (row direction) RD and the vertical direction (column direction) CD. The pixel 20 corresponds to one pixel of the captured image in the pixel array 2.

  Further, the pixel array 2 includes an effective pixel area 3 in which incident light is photoelectrically converted to generate an image signal, and an optical black area in which a dark current component as a reference signal of black level is generated by shielding the incident light. Hereinafter, it is referred to as “OB area” 4).

  In this embodiment, the pixels 20 in the first to second rows of the pixel array 2 are the pixels 20 in the OB area 4, and the pixels 20 in the third to n-th rows of the pixel array 2 are effective pixel areas 3. Pixel 20 of FIG. That is, the OB region 4 is disposed at one side edge of the pixel array 2. As another arrangement of the OB area 4 in the pixel array 2, for example, the OB area 4 may be arranged to surround the outer edge of the effective pixel area 3.

  Further, the OB region 4 has a photodiode (hereinafter referred to as “PD”) presence OB region 41 and a contact plug-added PD presence OB region 42. The PD presence OB region 41 is a region in which a dark current component which is a black level reference signal generated in the pixel 20 of the OB region 41 and a noise component generated by the charge readout operation are generated. The contact plug attached PD-added OB region 42 is a region in which a noise component generated by the charge read operation after discharging the dark charge generated in the pixel 20 of the region 42 from the contact plug is generated. The structure of the pixel 20 disposed in the contact plug-added PD-added OB region 42 will be described later with reference to FIG.

  In addition, the pixel array 2 is provided with a horizontal control line Hlin for performing readout control of the pixels 20 in the horizontal direction RD, and a vertical signal line Vlin for transmitting a voltage signal read from the pixels 20 in the vertical direction CD. .

  The vertical scanning circuit 11 sequentially selects the pixels 20 to be read out in units of rows. The load circuit 12 reads voltage signals from the pixels 20 to the vertical signal line Vlin for each column. The column ADC circuit 13 samples the voltage signal of each pixel 20 for each column by CDS (Correlated Double Sampling).

  The horizontal scanning circuit 14 sequentially selects the pixels 20 to be read out in units of columns. The reference voltage generation circuit 15 outputs the reference voltage VREF to the column ADC circuit 13. The reference voltage VREF is used to compare with the voltage signal input to the column ADC circuit 13 via the vertical signal line Vlin.

  The timing control circuit 16 controls the timing of reading the voltage signal of each pixel 20 with respect to the vertical scanning circuit 11. The post-processing unit 17 performs dark current correction on the basis of the sampled various voltage signals to calculate a pixel signal. Further, the post-processing unit 17 outputs (Vout) the calculated pixel signal.

  In the solid-state imaging device 10, the pixels 20 are selected for each row in the vertical direction CD by the vertical scanning circuit 11, and the pixels 20 are selected for each column in the horizontal direction RD by the horizontal scanning circuit 14. Then, the source follower operation is performed with the selected pixel 20 in the load circuit 12, whereby the voltage signal read from the pixel 20 is sent to the column ADC circuit 13 via the vertical signal line Vlin.

  Here, the conventional solid-state imaging device includes pixels arranged in an effective pixel area for receiving light from an object and pixels arranged in an optical black area from which light from the object is blocked. Also, in the optical black (OB) region, two types of pixels of photodiode (PD) present OB and PD no OB are provided.

  Therefore, in such a solid-state imaging device, based on the difference between the signal read from the PD with OB disposed in the optical black area and the signal read from the PD without OB in which the dark current actually remains. The dark current of the photodiode is calculated, and accordingly, the dark current correction of the image signal of the pixel in the effective pixel area is performed, and the image quality characteristic of the captured image is insufficient.

  Therefore, in the solid-state imaging device 10 according to the present embodiment, the OB region 4 is provided with the PD region with PD with contact plug in place of the OB without PD, and the charge readout operation is performed using the pixel 20 in the region 42. The generated noise component was generated separately.

  Then, in the solid-state imaging device 10, the voltage signal corresponding to the noise component is subtracted from the voltage signal of the pixel 20 in the PD presence OB region 41 to calculate the accurate dark current component, thereby the image quality characteristic of the captured image is obtained. Improved.

  Next, with reference to FIG. 2, the structure of the pixel 20 disposed in the contact plug-added PD with OB region 42 will be described. The structure of the pixel 20 is a two-pixel one-cell structure in which one photodiode is shared by one floating diffusion.

  FIG. 2 is a schematic cross-sectional view of the pixel 20 disposed in the contact plug attached PD presence OB region 42 in the pixel array 2 according to the embodiment. Here, for convenience, the side on which the light 9 of the pixel 20 is incident is referred to as the upper side, and the side opposite to the side on which the light 9 of the pixel 20 is incident is referred to as the lower side.

  As shown in FIG. 2, the pixel 20 includes the photoelectric conversion element 40 and the element isolation region 64 in the semiconductor layer 6. In addition, the pixel 20 includes the anti-reflection layer 8 in which the light shielding film 81 embedded in the light receiving surface of the semiconductor layer 6 is embedded, the color filter 82, and the microlens 83.

  The photoelectric conversion element 40 includes, for example, a P-type Si layer 60 doped with a P-type low concentration impurity such as boron and an N-type high concentration such as phosphorus in the P-type Si layer 60. The photodiode is formed by a PN junction with the N-type Si region 61 doped with the impurity of

  In this embodiment, the photoelectric conversion element 40 is formed at the interface of the semiconductor layer 6 opposite to the light receiving surface side. That is, the photoelectric conversion element 40 is formed by forming an N-type Si region 61 serving as a charge storage region in a deep portion (lower layer portion) of the P-type Si layer 60.

  The element isolation region 64 is a DTI (Deep Trench Isolation), and a P-type impurity-doped region 62 embedded in a trench formed in the depth direction of the semiconductor layer 6 from the upper surface of the semiconductor layer 6 And an insulating member 63 provided on the side surface and the upper surface of the region 62.

  In addition, the element isolation region 64 includes a floating diffusion 66 (hereinafter referred to as “FD”) in the wide portion 65 on the opposite side to the light receiving surface side in the region 62 doped with the P-type impurity.

  The antireflection layer 8 is made of, for example, a Si nitride film, and prevents reflection of incident light transmitted through the color filter 82. In addition, a light shielding film 81 is embedded in the antireflection layer 8 provided in the OB region 4. The light shielding film 81 prevents the light 9 from entering the photoelectric conversion element 40.

  That is, in the OB region 4, the light receiving surface side of the semiconductor layer 6 is covered with the light shielding film 81, and the light 9 does not enter the photoelectric conversion element 40. On the other hand, in the effective pixel region 3, the light receiving surface side of the semiconductor layer 6 is not covered with the light shielding film 81, and the light 9 enters the photoelectric conversion element 40.

  The color filter 82 transmits incident light of any one of the three primary colors of red, green, and blue, for example. The micro lens 83 is a plano-convex lens, and condenses the light 9 incident on the pixel array 2 on the photoelectric conversion element 40.

  In addition, the pixel 20 includes the multilayer wiring layer 7 on the side opposite to the light receiving surface side of the semiconductor layer 6. Multilayer wiring layer 7 is provided on support substrate 75. The multilayer interconnection layer 7 further includes an interlayer insulating film 70, a multilayer interconnection 72 provided inside the interlayer insulating film 70, a contact plug 50, and a transfer gate 74.

  In this example, the multilayer interconnection 72 comprises interconnections of three layers: a first interconnection 72a, a second interconnection 72b, and a third interconnection 72c. The three layers of wirings 72 a, 72 b and 72 c are stacked in this order on the surface opposite to the light receiving surface side of the semiconductor layer 6.

  The contact plug 50 electrically connects the first wiring 72 a and the N-type Si region 61 to be the charge storage region of the photoelectric conversion element 40. The contact plug 50 forms the insulating film 52 on the inner surface of the contact hole 51 formed from the upper surface of the multilayer wiring layer 7 to the upper surface of the first wiring 72 a, and tungsten or the like in the contact hole 51. It is formed by embedding the conductive member 53.

  Transfer gate 74 is provided via gate insulating film 73 at a position close to element isolation region 64 provided with FD 66 on the surface opposite to the light receiving surface side of semiconductor layer 6. In this example, the photoelectric conversion element 40, the FD 66, the gate insulating film 73, and the transfer gate 74 constitute a transfer transistor TRS1.

  In addition, the pixel 20 includes the voltage application unit 5 at an arbitrary position in the solid-state imaging device 10. The voltage application unit 5 is connected to the contact plug 50 via the first wiring 72 a of the multilayer wiring layer 7, and is a charge storage region of the photoelectric conversion element 40 by applying a predetermined positive voltage to the contact plug 50. The dark charge 90 accumulated in the N-type Si region 61 is discharged.

  Here, the dark charge 90 generated in the pixel 20 of the OB region 4 will be described. In the OB region 4, although the light receiving surface side of the semiconductor layer 6 is covered with the light shielding film 81 and the light 9 is not incident on the photoelectric conversion element 40, charges other than charges generated by photoelectric conversion of incident light on the semiconductor layer 6 Charge may occur.

  The charge is caused by damage to the semiconductor layer 6 due to polishing of the light receiving surface side of the semiconductor layer 6 by CMP (Chemical Mechanical Polishing), formation of a trench for the isolation region 64 by RIE (Reactive Ion Etching), or the like. It is a charge generated due to a defect and is generally called dark charge 90.

  Also, the dark charge 90 generated in the semiconductor layer 6 is attracted to the N-type Si region 61 which is the charge storage region of the photoelectric conversion element 40 formed in the lower layer portion of the semiconductor layer 6. Accumulated in

  In the pixel 20 disposed in the contact plug-added PD-added OB region 42, the dark charge 90 accumulated in the N-type Si region 61 is obtained by the voltage application unit 5 applying a predetermined positive voltage to the contact plug 50. It is discharged to the outside through the multilayer wiring layer 7.

  That is, the pixel 20 disposed in the OB region 42 is used as a reference or comparison pixel which does not contain the dark charge 90 generated by the semiconductor layer 6 being damaged.

  The solid-state imaging device 10 according to the above-described embodiment is provided with a contact plug attached PD provided OB region 42 in the OB region 4 of the pixel array 2. The pixel 20 disposed in the region 42 is used as a reference or comparison pixel which does not contain any dark charge 90 generated by the semiconductor layer 6 being damaged.

  Thus, the solid-state imaging device 10 can separately generate the noise component generated by the charge readout operation using the pixels 20 in the area 42.

  Therefore, such a solid-state imaging device 10 is accurate by subtracting the voltage signal corresponding to the noise component generated by the pixel 20 of the contact OB with PD with contact plug from the voltage signal of the pixel 20 of the contact with OB region 41. The dark current component can be calculated.

  Therefore, the solid-state imaging device 10 can perform dark current correction based on the calculated accurate dark current component, and can improve the image quality characteristics of the captured image.

  Next, the circuit configuration of the pixel 20 disposed in the contact plug-added PD-added OB region 42 will be described. FIG. 3 is a schematic view showing an example of the circuit configuration of the pixel 20 disposed in the contact plug-added PD presence OB region 42 included in the solid-state imaging device 10 according to the embodiment.

  As shown in FIG. 3, the pixel 20 includes two photodiodes PD1 and PD2, and two transfer transistors TRS1 and TRS2. Furthermore, the pixel 20 includes a floating diffusion FD, an amplification transistor AMP, a reset transistor RST, and an address transistor ADR. Note that FIG. 2 described above shows the physical arrangement of the photodiode PD1, the transfer transistor TRS1, and the floating diffusion FD in a 2-pixel 1-cell structure.

  The anodes of the photodiodes PD1 and PD2 are connected to the ground, and the cathodes are connected to the sources of the transfer transistors TRS1 and TRS2. Moreover, the wiring extended from the voltage application part 5 is connected to the cathode of each photodiode PD1, PD2. The drains of the two transfer transistors TRS1 and TRS2 are connected to one floating diffusion FD.

  In each of the transfer transistors TRS1 and TRS2, when a transfer signal is input to the transfer gate, the charge readout operation from the photodiodes PD1 and PD2 is performed. The source of the reset transistor RST is connected to the floating diffusion FD.

  The drain of the reset transistor RST is connected to the power supply voltage line VDD. The reset transistor RST resets the potential of the floating diffusion FD to the potential of the power supply voltage when a reset signal is input to the gate.

  Further, the gate of the amplification transistor AMP is connected to the floating diffusion FD. The source of the amplification transistor AMP is connected to the vertical signal line Vlin, and the drain is connected to the source of the address transistor ADR. The vertical signal line Vlin is connected to the current source T. The drain of the address transistor ADR is connected to the power supply voltage line VDD.

  Next, the dark current correction using the pixel 20 disposed in the contact plug-added OB region 42 with contact plug described above will be described. FIG. 4 is a flowchart showing a processing procedure performed by the solid-state imaging device 10 according to the embodiment. The flowchart shown in FIG. 4 is an example.

  As shown in FIG. 4, first, the solid-state imaging device 10 performs exposure on all the pixels 20 in the pixel array 2 at the same timing (step S101). Next, the solid-state imaging device 10 discharges the dark charge 90 (see FIG. 2) generated in the pixel 20 in the contact plug-added PD region with PD 42 (step S102).

  Specifically, as shown in FIG. 2 described above, the photoelectric conversion element 40 is applied by applying a predetermined positive voltage to the contact plug 5 from the voltage application unit 5 via the first wiring 72 a of the multilayer wiring layer 7. The dark charge 90 accumulated in the N-type Si region 61, which is the charge accumulation region of FIG. The discharge of the dark charge 90 (step S102) can be substituted by discharging at all timings during the global shutter (step S101) by always applying a constant voltage to the contact plug 5.

  More specifically, as shown in FIG. 3 described above, first, the potentials of the transfer transistors TRS1 and TRS2, the reset transistor RST, the address transistor ADR, and the amplification transistor AMP are set to the same potential. Then, a predetermined voltage is applied to the transfer gates of the transfer transistors TRS1 and TRS2 to fix the voltage levels of the transfer transistors TRS1 and TRS2, and the electrical connection between the photodiodes PD1 and PD2 and the transfer transistors TRS1 and TRS2 is cut off. Do. Thereafter, the dark charge 90 is discharged from the photodiodes PD1 and PD2 by applying a predetermined positive voltage by the voltage application unit 5.

  Thus, the solid-state imaging device 10 can reliably discharge the dark charge 90 in the photodiodes PD1 and PD2 by interrupting the electrical connection between the photodiodes PD1 and PD2 and the transfer transistors TRS1 and TRS2. .

  Subsequently, the solid-state imaging device 10 reads the signal charges of all the pixels 20 in the pixel array 2 (step S103). As a result, in the pixel 20 in the PD presence OB region 41, the dark current component, which is a black level reference signal, and the noise component generated by the charge readout operation flow into the floating diffusion 66 (FD). In addition, in the pixel 20 in the contact plug-added PD presence OB region 42, the noise component generated by the charge readout operation flows into the floating diffusion 66 (FD).

  Then, the solid-state imaging device 10 calculates a voltage signal S1 corresponding to the noise component generated by the charge read operation from the pixel 20 in the contact plug-added PD region with PD 42 (step S104).

  The solid-state imaging device 10 also calculates a voltage signal S2 corresponding to a mixed component of the dark current component and the noise component in the pixel 20 of the PD presence OB region 41.

  Next, the solid-state imaging device 10 subtracts the voltage signal S1 corresponding to the noise component of the pixel 20 in the PD area with PD with the contact plug from the voltage signal S2 of the pixel 20 in the PD area with OB 41 with a dark current component. ΔT is calculated (step S105).

  Thereafter, the solid-state imaging device 10 subtracts the dark current component ΔT from the voltage signal S3 of the pixel 20 of the effective pixel area 3 to perform dark current correction to calculate the pixel signal P of the pixel 20 of the effective pixel area 3 Step S106). The dark current correction is performed by the post-processing unit 17 in this embodiment (see FIG. 1).

  As described above, the solid-state imaging device 10 subtracts the voltage signal S1 corresponding to the noise component of the pixel 20 in the PD area with contact plug OB area 42 with the contact plug from the voltage signal S2 of the pixel 20 in the PD area OB area 41 The component ΔT is calculated. Therefore, the solid-state imaging device 10 can calculate an accurate dark current component ΔT.

  Therefore, the solid-state imaging device 10 can perform dark current correction based on the calculated accurate dark current component ΔT, and can improve the image quality characteristics of the captured image.

  Next, a pixel array 2 according to another modification of the embodiment will be described. The pixel array 2 differs in that the photodiode 20 is not provided in the pixel 20 disposed in the contact-plug-with-PD OB region 42 with contact plug described above. Hereinafter, the optical black area in which such a pixel is arranged is referred to as a contact plugless PD without OB area.

  FIG. 5 is a schematic cross-sectional view of a pixel 20a disposed in a contact plug-less PD without OB region in a pixel array 2 according to another modification of the embodiment. In addition, about the component similar to the component shown in FIG. 2 among the components shown in FIG. 5, the description is abbreviate | omitted by attaching the code | symbol same as the code | symbol shown in FIG.

  As shown in FIG. 5, the contact plug 50 in the pixel 20 a electrically connects the first wiring 72 a and the P-type Si layer 60. The pixel 20 a is not provided with an N-type Si region to be a charge storage region of a photodiode inside the P-type Si layer 60.

  Since the pixel 20 a is not doped with a high concentration N-type impurity for forming an N-type Si region inside the P-type Si layer 60, a dark charge is caused due to a crystal defect by ion implantation. 90 does not occur.

  That is, in the pixel 20a, the amount of dark charge 90 is reduced by further suppressing damage to the semiconductor layer 6, and therefore, when a predetermined positive voltage is applied from the voltage application unit 5 to the contact plug 50. The discharge time of the dark charge 90 from the pixel 20a is shortened.

  The solid-state imaging device 10 according to the above-described embodiment is provided with a contact plug-less OB region with contact plug in the OB region 4 of the pixel array 2. The pixel 20a disposed in such a region is used as a reference or comparison pixel which does not contain any dark charge 90 generated when the semiconductor layer 6 is damaged.

  Thus, the solid-state imaging device 10 can separately generate the noise component generated by the charge readout operation using the pixel 20 a in the contactless PD without OB region.

  Therefore, such a solid-state imaging device 10 accurately subtracts the voltage signal corresponding to the noise component generated by the pixel 20 a in the OB area without the contact plug with the contact plug from the voltage signal of the pixel 20 in the PD area 41 with the PD. The current component can be calculated.

  Therefore, the solid-state imaging device 10 can perform dark current correction based on the calculated accurate dark current component, and can improve the image quality characteristics of the captured image.

  Next, dark current correction using the pixel 20a disposed in the above-described contactless plug attached non-PD OB region will be described. FIG. 6 is a flowchart showing a processing procedure executed by the solid-state imaging device 10 according to the embodiment. The flowchart shown in FIG. 6 is an example.

  As shown in FIG. 6, first, the solid-state imaging device 10 performs exposure on all the pixels 20 and 20a in the pixel array 2 at the same timing (step S201). Next, the solid-state imaging device 10 discharges the dark charge 90 (see FIG. 5) generated in the pixel 20a in the contactless plugless PD area without PD (step S202).

  Specifically, as shown in FIG. 5 described above, P-type Si is applied by applying a predetermined positive voltage from the voltage application unit 5 to the contact plug 50 via the first wiring 72 a of the multilayer wiring layer 7. The dark charge 90 present in layer 60 is drained.

  Subsequently, the solid-state imaging device 10 reads out the signal charges of all the pixels 20 and 20a in the pixel array 2 (step S203). As a result, in the pixel 20 in the PD presence OB region 41, the dark current component, which is a black level reference signal, and the noise component generated by the charge readout operation flow into the floating diffusion 66 (FD). In addition, in the pixel 20a in the contactless PD without PD region, the noise component generated by the charge readout operation flows into the floating diffusion 66 (FD).

  Then, the solid-state imaging device 10 calculates a voltage signal S1 corresponding to the noise component generated by the charge readout operation from the pixel 20a in the contactless plugless OB area without PD (step S204).

  The solid-state imaging device 10 also calculates a voltage signal S2 corresponding to a mixed component of the dark current component and the noise component in the pixel 20 of the PD presence OB region 41.

  Next, the solid-state imaging device 10 subtracts the voltage signal S1 corresponding to the noise component of the pixel 20a in the OB area without contact plug with the contact plug from the voltage signal S2 of the pixel 20 in the PD area OB area 41 with a dark current component ΔT. Is calculated (step S205).

  Thereafter, the solid-state imaging device 10 subtracts the dark current component ΔT from the voltage signal S3 of the pixel 20 of the effective pixel area 3 to perform dark current correction to calculate the pixel signal P of the pixel 20 of the effective pixel area 3 Step S206). The dark current correction is performed by the post-processing unit 17 in this embodiment (see FIG. 1).

  As described above, the solid-state imaging device 10 subtracts the voltage signal S1 corresponding to the noise component of the pixel 20a in the OB area without contact plug with the contact plug from the voltage signal S2 of the pixel 20 in the PD area OB area 41 with a dark current component. Calculate ΔT. Therefore, the solid-state imaging device 10 can calculate an accurate dark current component ΔT.

  Therefore, the solid-state imaging device 10 can perform dark current correction based on the calculated accurate dark current component ΔT, and can improve the image quality characteristics of the captured image.

  Further, the dark current correction performed by the solid-state imaging device 10 according to the above-described embodiment subtracts the dark current component ΔT from the voltage signal S3 of the pixel 20 of the effective pixel region 3 to obtain the pixel signal of the pixel 20 of the effective pixel region 3 Although P is calculated, it is not limited to this form.

  As another mode, first, the solid-state imaging device 10 first uses the voltage signal S3 of the pixel 20 in the effective pixel area 3 to convert the voltage signal S1 corresponding to the noise component of the pixel 20, 20a in the OB area with / without PD with contact plug. Subtract. Then, the solid-state imaging device 10 subtracts the dark current component ΔT from the subtracted voltage signal (S3-S1) to calculate the pixel signal P of the pixel 20 of the effective pixel area 3.

  In such an embodiment, for example, when the voltage signal S3 of the pixel 20 in the effective pixel area 3 includes a voltage signal corresponding to the noise component generated by the charge readout operation from the pixel 20, the voltage signal S3 is previously generated. It is possible to remove the noise components inside.

  Therefore, the solid-state imaging device 10 can remove the noise component in the voltage signal S3 of the pixel 20 of the effective pixel area 3 by using the pixel 20, 20a in the OB area with (without) PD with a contact plug. The image quality characteristics of the captured image can be further improved.

  In addition, although the case where the solid-state imaging device 10 according to the embodiment described above is a back-illuminated solid-state imaging device has been described, the configurations of the contact plug 50 and the voltage application unit 5 described above It can be adopted.

  Even in such a case, the surface-illuminated solid-state imaging device can separately generate the noise component generated by the charge readout operation using the pixel in the contactless plugless OB area without PD.

  Therefore, such a solid-state imaging device calculates an accurate dark current component by subtracting the voltage signal corresponding to the noise component generated by the pixel in the OB region without contact plug from the voltage signal of the pixel in the PD region with OB region. can do.

  Therefore, such a solid-state imaging device can perform dark current correction based on the calculated accurate dark current component, and can improve the image quality characteristics of a captured image.

  In the pixels 20 and 20a according to the above-described embodiment, the Si layer 60 is P-type and the Si region 61 is N-type. However, the present invention is not limited thereto. The Si layer 60 is N-type and the Si region 61 is P-type. As a type, the pixels 20 and 20a may be configured.

  In the above embodiment, the pixels 20 and 20a having a two-pixel one-cell structure have been described as an example, but the same applies to pixels having other structures such as a one-pixel one-cell structure or a four-pixel one-cell structure. .

  While certain embodiments of the present invention have been described, these embodiments have been presented by way of example only, and are not intended to limit the scope of the invention. These novel embodiments can be implemented in various other forms, and various omissions, substitutions, and modifications can be made without departing from the scope of the invention. These embodiments and modifications thereof are included in the scope and the gist of the invention, and are included in the invention described in the claims and the equivalent scope thereof.

  Reference Signs List 10 solid-state imaging device 11 vertical scanning circuit 12 load circuit 13 column ADC circuit 14 horizontal scanning circuit 15 reference voltage generation circuit 16 timing control circuit 17 post-processing unit 2 pixel array 20 pixel 3 effective pixel Region, 4 Optical black region, 40 photoelectric conversion elements, 41 PD region with PD, 42 PD region with contact plug, 5 Voltage application unit, 50 contact plug, 51 contact hole, 52 insulating film, 53 conductive member, 6 Semiconductor layer, 60 P type Si layer, 61 N type Si region, 62 P type impurity doped region, 63 insulating member, 64 element isolation region, 65 wide portion, 66 floating diffusion, 7 multilayer wiring layer, 70 interlayer insulation film, 7 Multilayer wiring, 73 gate insulating film, 74 transfer gate, 75 support substrate, 8 antireflective layer, 81 light shielding film, 82 color filter, 83 microlens, 9 light, 90 dark charge, CD vertical direction, RD horizontal direction, Hlin horizontal Control line, Vlin vertical signal line, PD1, PD2 photodiode, TRS1, TRS2 transfer transistor, RST reset transistor, AMP amplification transistor, T current source

According to one embodiment, a solid state imaging device is provided. The solid-state imaging device according to the embodiment includes an effective pixel area that photoelectrically converts incident light, an optical black area where incident light is blocked , a contact plug, and a voltage application unit. The effective pixel region includes a first element isolation region, and a photoelectric conversion element in which a charge storage region of a second conductivity type is formed in a semiconductor layer of a first conductivity type separated by the first element isolation region. The pixel of The optical black area includes a second pixel having a second element isolation area and a semiconductor layer of the first conductivity type separated by the second element isolation area. Contact plugs, Ru is electrically connected to the first conductive type semiconductor layer of the second pixel in the optical black region. The voltage application unit applies a predetermined voltage to the contact plug.

Claims (6)

An optical black area provided on the semiconductor layer and blocking light from the subject;
A contact plug electrically connected to the semiconductor layer in the optical black region;
A voltage application unit for applying a predetermined voltage to the contact plug. The contact plug is
The solid-state imaging device according to claim 1, wherein the charge generated in the semiconductor layer in the optical black area is discharged. The semiconductor layer is
A plurality of photoelectric conversion elements having a charge storage region,
The contact plug is
It electrically connects to the said charge storage area | region of these photoelectric conversion elements. The solid-state imaging device of Claim 1 or 2 characterized by the above-mentioned. A wiring layer is provided on the side opposite to the light receiving side of the semiconductor layer,
The contact plug is
The solid-state imaging device according to any one of claims 1 to 3, wherein the wiring of the wiring layer and the semiconductor layer are electrically connected. The optical black area is
It is provided in the outer edge of the effective pixel area | region which light-receives the light from a to-be-photographed object. The solid-state imaging device as described in any one of the Claims 1-4 characterized by the above-mentioned. A readout transistor for reading out the charge from the semiconductor layer in the optical black region;
The read transistor is
The solid-state imaging device according to any one of claims 1 to 5, wherein a voltage level is fixed by applying a predetermined voltage to the gate.

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