JP2019096692A - Protection circuit - Google Patents

Abstract

To provide a protection circuit capable of suppressing breakdown of a low-withstanding voltage circuit caused by short circuit between adjacent terminals, and of miniaturizing a semiconductor integrated circuit device.SOLUTION: A protection circuit comprises: a first switch that switches conduction/cutoff of a path between a low-withstanding voltage circuit and a low-withstanding voltage terminal; and a switching controller for on/off-switching the first switch depending on a voltage applied to the low-withstanding voltage terminal.SELECTED DRAWING: Figure 1

Description

  The present invention relates to a protection circuit.

  Conventionally, many semiconductor integrated circuit devices include a high breakdown voltage circuit and a low breakdown voltage circuit, both of which are internal circuits. The high breakdown voltage circuit is, for example, a circuit operated by a battery power supply voltage, and the low breakdown voltage circuit is, for example, a circuit operated by an internal power supply voltage.

  In the semiconductor integrated circuit device as described above, the high withstand voltage terminal connected to the high withstand voltage circuit may be adjacent to the low withstand voltage terminal connected to the low withstand voltage circuit. In that case, there is a possibility that the high withstand voltage terminal and the low withstand voltage terminal may short circuit, and if short circuited, an overvoltage is applied to the low withstand voltage circuit. At this time, there is a possibility that the low withstand voltage circuit may be broken.

JP 2004-311536 A

  Therefore, for example, in order to suppress short circuit between the high withstand voltage terminal and the low withstand voltage terminal using the invention disclosed in Patent Document 1, the non-connected terminal (NC) is sandwiched between the high withstand voltage terminal and the low withstand voltage terminal. It is conceivable to configure.

  Alternatively, in some cases, a circuit that can be configured by a low breakdown voltage element is changed to be configured by a high breakdown voltage element.

  However, in the above method, there is a problem that the number of terminals of the package increases and the chip size increases, which hinders the miniaturization of the semiconductor integrated circuit device.

  In view of the above situation, the present invention has an object to provide a protection circuit capable of suppressing the breakdown of a low breakdown voltage circuit due to a short circuit between adjacent terminals and miniaturizing a semiconductor integrated circuit device.

A protection circuit according to an aspect of the present invention is
A first switch for switching on / off of a path between the low breakdown voltage circuit and the low breakdown voltage terminal;
A switching control unit that switches on and off of the first switch according to a voltage applied to the low withstand voltage terminal;
(The first configuration).

Further, in the first configuration, the switching control unit
A pull-up resistor connected to the gate of the first switch, which is an N-channel MOSFET;
A second switch may be provided to switch conduction / cutoff of a path between the gate and the ground (second configuration).

  In the second configuration, the pull-up resistor may be a depletion type N-type MOSFET (third configuration).

In the second or third configuration, the switching control unit further includes a first Zener diode and a first resistor,
The gate of the second switch, which is an N-channel MOSFET, is connected to a first connection point where the anode of the first Zener diode and one end of the first resistor are connected.
The source of the second switch is connected to the other end of the first resistor together with the application end of the ground potential,
The drain of the second switch is connected to the gate of the first switch,
The cathode of the first Zener diode may be connected to the low withstand voltage terminal (fourth configuration).

In the fourth configuration, the switching control unit further includes a second Zener diode and a second resistor,
The anode of the second zener diode is connected to the source of the second switch,
The cathode of the second Zener diode is connected to a second connection point where the gate of the second switch and one end of the second resistor are connected,
The other end of the second resistor may be connected to the first connection point (fifth configuration).

In the first configuration, the switching control unit may be a pull-down resistor connected to the gate of the first switch, which is a P-channel MOSFET.
A third switch may be provided to switch on / off of the path between the gate and the power supply terminal (sixth configuration).

  In the sixth configuration, the pull-down resistor may be a depletion type N-type MOSFET (seventh configuration).

In the sixth or seventh configuration, the switching control unit further includes a third Zener diode and a third resistor,
The gate of the third switch, which is a P-channel MOSFET, is connected to a third connection point where the cathode of the third Zener diode and one end of the third resistor are connected,
The source of the third switch is connected to the other end of the third resistor together with the power supply terminal.
The drain of the third switch is connected to the gate of the first switch,
The anode of the third Zener diode may be connected to the low withstand voltage terminal (eighth configuration).

In the eighth configuration, the switching control unit further includes a fourth Zener diode and a fourth resistor,
The cathode of the fourth Zener diode is connected to the source of the third switch,
The anode of the fourth Zener diode is connected to a fourth connection point to which the gate of the third switch and one end of the fourth resistor are connected,
The other end of the fourth resistor may be connected to the third connection point (ninth configuration).

  Further, a semiconductor integrated circuit device according to an aspect of the present invention includes the protection circuit having any one of the above-described configurations, a low withstand voltage terminal, and a high withstand voltage terminal adjacent to the low withstand voltage terminal. 10 configurations).

  Further, in the tenth configuration, the low breakdown voltage terminal may be a terminal to which a resistor for setting an overcurrent setting value of the overcurrent protection circuit can be connected (an eleventh configuration).

  A vehicle-mounted electronic device according to an aspect of the present invention includes the semiconductor integrated circuit device having any one of the above-described configurations, and a load connected to the semiconductor integrated circuit device.

  According to the present invention, it is possible to suppress the breakdown of the low breakdown voltage circuit due to the short circuit between the adjacent terminals and to miniaturize the semiconductor integrated circuit device.

It is a circuit diagram showing composition of a protection circuit concerning a 1st embodiment of the present invention (normal state). It is a circuit diagram showing composition of a protection circuit concerning a 1st embodiment of the present invention (a terminal short circuit state). It is a circuit diagram showing composition of a protection circuit concerning a 2nd embodiment of the present invention (normal state). It is a circuit diagram showing composition of a protection circuit concerning a 2nd embodiment of the present invention (a terminal short circuit state). It is a block diagram showing an example of 1 composition of a semiconductor integrated circuit device. It is a figure which shows an example of the pin arrangement | positioning of a semiconductor integrated circuit device. It is an external view which shows one structural example of a vehicle.

  An embodiment of the present invention will be described below with reference to the drawings.

First Embodiment
FIG. 1 is a circuit diagram showing a configuration of a protection circuit according to a first embodiment of the present invention. The protection circuit 10 shown in FIG. 1 is included in a semiconductor integrated circuit device (package product), and can be used as a low breakdown voltage circuit even when an overvoltage is applied to the low breakdown voltage terminal TL connected to the low breakdown voltage circuit (internal circuit). Intended to protect. In the present embodiment, the low withstand voltage and the high withstand voltage are the withstand voltages with respect to the ground. Further, although FIG. 2 described later shows the configuration of the protection circuit 10 as in FIG. 1, the on / off state of the switch is different from that of FIG.

  The protection circuit 10 includes transistors NM1 to NM3, zener diodes ZD1 and ZD2, and resistors R1 and R2. The switching control unit 101 is configured of the transistors NM2 and NM3, the zener diodes ZD1 and ZD2, and the resistors R1 and R2. The switching control unit 101 has a function of switching on / off of the transistor NM1 in accordance with the voltage applied to the low withstand voltage terminal TL.

  The transistor NM1 is formed of an N-channel MOSFET. The drain of the transistor NM1 is connected to a low breakdown voltage circuit (not shown) via the terminal Tc. The low withstand voltage circuit is, for example, 7 V withstand voltage with reference to ground. The source of the transistor NM1 is connected to the low breakdown voltage terminal TL which is an external terminal. The transistor NM1 is a switch that conducts / blocks the path between the terminal TL and the terminal Tc.

  The gate of the transistor NM1 is connected to the terminal Tvr via the transistor NM2. Internal power supply voltage Vreg is applied to terminal Tvr. The internal power supply voltage Vreg is, for example, 5 V referenced to ground. The transistor NM2 is a depletion type N-type MOSFET. The transistor NM2 is a low breakdown voltage transistor. The gate of the transistor NM2 and the source of the transistor NM2 are shorted. The source of the transistor NM2 is connected to the gate of the transistor NM1. The drain of the transistor NM2 is connected to the terminal Tvr. The transistor NM2 functions as a pull-up resistor. It is also possible to use a general resistor as the pull-up resistor.

  The transistor NM3 is an N-channel MOSFET, and functions as a switch for switching on / off of the path between the ground terminal Tgd and the gate of the transistor NM1. The transistor NM3 is a low withstand voltage transistor.

  The drain of the transistor NM3 is connected to the gate of the transistor NM1. The gate of the transistor NM3 is connected to a connection point P2 at which one end of the resistor R2 and the cathode of the Zener diode ZD2 are connected. The other end of the resistor R2 is connected to a connection point P1 to which the anode of the Zener diode ZD1 and one end of the resistor R1 are connected. The cathode of the Zener diode ZD1 is connected to the low breakdown voltage terminal TL.

  The other end of the resistor R1, the anode of the Zener diode ZD2, the source of the transistor NM3, and the back gate of the transistor NM1 are connected to the ground terminal Tgd to which the ground potential is applied.

  The operation of the protection circuit 10 having such a configuration will be described. Here, the semiconductor integrated circuit device (not shown) including the protective circuit 10 includes a high voltage terminal (not shown) adjacent to the low voltage terminal TL. The high withstand voltage terminal is connected to a high withstand voltage circuit (internal circuit) (not shown), to which a high voltage such as a battery voltage is applied. The low withstand voltage terminal TL and the high withstand voltage terminal are adjacent to each other, so there is a possibility of short circuit.

  In a normal state in which the low withstand voltage terminal TL and the high withstand voltage terminal are not short-circuited, a voltage lower than the sum of the threshold voltage Vth of the transistor NM3 and the zener voltage Vz of the zener diode ZD1 is applied to the terminal TL. It turns off (Figure 1).

  In this case, the ground terminal Tgd and the gate of the transistor NM1 are disconnected, and the internal power supply voltage Vreg is applied to the gate of the transistor NM1 via the transistor NM2 as a pull-up resistor. Thereby, the transistor NM1 is turned on, and the path between the low withstand voltage terminal TL and the terminal Tc is conducted by the transistor NM1 (FIG. 1). That is, in the normal state, the low breakdown voltage terminal TL and the low breakdown voltage circuit are connected.

  On the other hand, when an abnormal state occurs in which the low withstand voltage terminal TL and the high withstand voltage terminal are short-circuited, the voltage applied to the low withstand voltage terminal TL is equal to or more than the sum of the threshold voltage Vth and the zener voltage Vz. Therefore, the transistor NM3 is turned on (FIG. 2), and the ground terminal Tgd and the gate of the transistor NM1 are conducted.

  More specifically, when a voltage higher than the threshold voltage Vth and lower than the Zener voltage of the Zener diode ZD2 is applied across the resistor R1, the Zener diode ZD2 is turned off, and a current flows through the resistor R1. Turns on.

  Further, when the voltage applied to the low withstand voltage terminal TL becomes higher and a voltage higher than the Zener voltage of the Zener diode ZD2 is applied across the resistor R1, the Zener diode ZD2 turns on and a current flows in the resistor R2 The transistor NM3 is turned on (FIG. 2). That is, the voltage between the gate and source of the transistor NM3 is clamped to the Zener voltage of the Zener diode ZD2. This can suppress the application of an overvoltage between the gate and the source of the transistor NM3.

  When the ground terminal Tgd and the gate of the transistor NM1 are conducted, the ground potential is applied to the gate of the transistor NM1, and the high breakdown voltage transistor NM1 is turned off (FIG. 2). Thus, the path between the low withstand voltage terminal TL and the terminal Tc is cut off. Therefore, when an overvoltage is applied to the low withstand voltage terminal due to a short circuit with an adjacent high withstand voltage terminal, an overvoltage is not applied to the low withstand voltage circuit connected to the terminal Tc. it can.

  According to such a protection circuit 10, it is not necessary to arrange a non-connecting terminal (NC) for preventing a short circuit between the low breakdown voltage terminal TL and the high breakdown voltage terminal in the semiconductor integrated circuit device. In addition, it is not necessary to form the low withstand voltage circuit (circuit connected to the terminal Tc) with a high withstand voltage element. Therefore, the increase in the number of terminals of the package is prevented, and the increase in the chip size is suppressed, so that the semiconductor integrated circuit device can be miniaturized.

Second Embodiment
FIG. 3 is a circuit diagram showing a configuration of a protection circuit according to a second embodiment of the present invention. The protection circuit 20 shown in FIG. 3 is included in a semiconductor integrated circuit device (package product), and is a low breakdown voltage circuit even when an overvoltage is applied to the low breakdown voltage terminal TL connected to the low breakdown voltage circuit (internal circuit). Intended to protect. In the present embodiment, the low breakdown voltage and high breakdown voltage are breakdown voltages based on the power supply voltage. Moreover, although FIG. 4 mentioned later shows the structure of the protective circuit 20 similarly to FIG. 3, the on / off state of a switch differs from FIG.

  The protection circuit 20 includes transistors PM1 and PM2, a transistor NM4, zener diodes ZD3 and ZD4, and resistors R3 and R4. The switching control unit 201 is configured of the transistor PM2, the transistor NM4, the zener diodes ZD3 and ZD4, and the resistors R3 and R4. The switching control unit 201 has a function of switching on and off of the transistor PM1 in accordance with the voltage applied to the low withstand voltage terminal TL.

  The transistor PM1 is configured of a P-channel MOSFET. The drain of the transistor PM1 is connected to a low breakdown voltage circuit (not shown) via a terminal Tc. The low withstand voltage circuit is, for example, a -7 V withstand voltage based on the power supply voltage. The source of the transistor PM1 is connected to the low breakdown voltage terminal TL which is an external terminal. The transistor PM1 is a switch that conducts / blocks a path between the terminal TL and the terminal Tc.

  The gate of the transistor PM1 is connected to the terminal Tvr via the transistor NM4. Internal power supply voltage Vreg is applied to terminal Tvr. The internal power supply voltage Vreg is, for example, -5 V which is a power supply voltage reference. The transistor NM4 is a depletion type N-type MOSFET. The transistor NM4 is a low withstand voltage transistor. The gate of the transistor NM4 and the source of the transistor NM4 are shorted. The drain of the transistor NM4 is connected to the gate of the transistor PM1. The source of the transistor NM4 is connected to the terminal Tvr. The transistor NM4 functions as a pull-down resistor. It is also possible to use a general resistor as the pull-down resistor.

  The transistor PM2 is a P-channel MOSFET, and functions as a switch for switching on / off of the path between the power supply terminal Tvd and the gate of the transistor PM1. The transistor PM2 is a low withstand voltage transistor.

  The drain of the transistor PM2 is connected to the gate of the transistor PM1. The gate of the transistor PM2 is connected to a connection point P4 at which one end of the resistor R4 and the anode of the Zener diode ZD4 are connected. The other end of the resistor R4 is connected to a connection point P3 to which the cathode of the Zener diode ZD3 and one end of the resistor R3 are connected. The anode of the Zener diode ZD3 is connected to the low breakdown voltage terminal TL.

  The other end of the resistor R3, the cathode of the Zener diode ZD4, the source of the transistor PM2, and the back gate of the transistor PM1 are connected to the power supply terminal Tvd to which the power supply voltage Vd is applied. The power supply voltage Vd is, for example, 12V.

  The operation of the protection circuit 20 having such a configuration will be described. Here, the semiconductor integrated circuit device (not shown) having the protection circuit 20 has a high voltage terminal (not shown) adjacent to the low voltage terminal TL. For example, a ground potential or the like is applied to the high withstand voltage terminal. The low withstand voltage terminal TL and the high withstand voltage terminal are adjacent to each other, so there is a possibility of short circuit.

  In a normal state in which the low withstand voltage terminal TL and the high withstand voltage terminal are not short circuited, a voltage lower than the sum of the threshold voltage Vth of the transistor PM2 and the zener voltage Vz of the zener diode ZD3 is applied between the power supply terminal Tvd and the terminal TL. Transistor PM2 is turned off (FIG. 3).

  In this case, the power supply terminal Tvd and the gate of the transistor PM1 are cut off, and the internal power supply voltage Vreg is applied to the gate of the transistor PM1 via the transistor NM4 as a pull-down resistor. Thereby, the transistor PM1 is turned on, and the path between the low breakdown voltage terminal TL and the terminal Tc is conducted by the transistor PM1 (FIG. 3). That is, in the normal state, the low breakdown voltage terminal TL and the low breakdown voltage circuit are connected.

  On the other hand, when an abnormal state occurs in which the low withstand voltage terminal TL and the high withstand voltage terminal (that is, the ground potential or the like) are shorted, the voltage applied between the power supply terminal Tvd and the low withstand voltage terminal TL is the threshold voltage Vth. And the sum of the zener voltage and the zener voltage Vz. Accordingly, the transistor PM2 is turned on (FIG. 4), and the power supply terminal Tvd and the gate of the transistor PM1 are conducted.

  More specifically, when a voltage lower than the Zener voltage of the Zener diode ZD4 at the threshold voltage Vth or higher is applied across the resistor R3, the Zener diode ZD4 is turned off, and a current flows in the resistor R3. Turns on.

  Also, when the voltage applied between the power supply terminal Tvd and the low withstand voltage terminal TL becomes higher and a voltage higher than the Zener voltage of the Zener diode ZD4 is applied across the resistor R3, the Zener diode ZD4 turns on. The current flows to the resistor R4, and the transistor PM2 is turned on. That is, the voltage between the gate and source of the transistor PM2 is clamped to the Zener voltage of the Zener diode ZD4. This can suppress the application of an overvoltage between the gate and the source of the transistor PM2.

  When the power supply terminal Tvd and the gate of the transistor PM1 are conducted, the power supply voltage Vd is applied to the gate of the transistor PM1, and the high breakdown voltage transistor PM1 is turned off (FIG. 4). Thus, the path between the low withstand voltage terminal TL and the terminal Tc is cut off. Therefore, when an overvoltage (such as a ground potential) is applied to the low withstand voltage terminal due to a short circuit with the adjacent high withstand voltage terminal, the low withstand voltage circuit is broken because an overvoltage is not applied to the low withstand voltage circuit connected to the terminal Tc. Can be suppressed.

  Such a protection circuit 20 can also miniaturize the semiconductor integrated circuit device as in the first embodiment.

<Example of Semiconductor Integrated Circuit Device>
Next, an example of a semiconductor integrated circuit device to which the protection circuit described above can be applied will be described. FIG. 5 is a block diagram showing a configuration example of a semiconductor integrated circuit device. The semiconductor integrated circuit device 1 of this embodiment is connected to / blocked between the application terminal of the power supply voltage (VBBX.VBBY) and the load (3X, 3Y) according to an instruction from the ECU [electronic control unit] 2. High-side switch IC. The on-vehicle high side switch IC is an example of an on-vehicle IPD (intelligent power device).

  The semiconductor integrated circuit device 1 includes two systems of NMOSFETs (high side switches) (10X, 10Y) and two systems of output terminals (T2X, T2Y) corresponding thereto, and two systems of output terminals are provided. The loads (3X, 3Y) can be connected. In FIG. 5, “X” and “Y” are attached to the same reference for each system, and the configuration for each system is the same, so in the following description, the system for which “X” is attached to the code for convenience Only the configuration of will be described representatively.

  The semiconductor integrated circuit device 1 includes a power supply terminal T1X which is an external terminal, an output terminal T2X, and an input terminal T3X as means for establishing an electrical connection with the outside of the device. The power supply terminal T1X is a terminal (VBB pin) for receiving supply of the power supply voltage VBBX (for example, 12 V) from a battery (not shown). The output terminal T2X is a terminal (OUT pin) for externally connecting a load 3X (a valve lamp, a relay coil, a solenoid, a light emitting diode, a motor or the like). The input terminal T3X is a terminal (IN pin) for receiving an external input of the external control signal SiX from the ECU 2.

  The semiconductor integrated circuit device 1 further includes an NMOSFET 10X, an output current monitoring unit 20X, a gate control unit 30X, a control logic unit 40X, a signal input unit 50X, an internal power supply unit 60X, and an abnormality protection unit 70X. Have.

  The NMOSFET 10X is a high withstand voltage (for example, 42 V withstand voltage) power transistor having a drain connected to the power supply terminal T1X and a source connected to the output terminal T2X. The NMOSFET 10X connected in this manner functions as a switch element (high side switch) for conducting / blocking the current path from the application terminal of the power supply voltage VBBX to the ground terminal via the load 3X. The NMOSFET 10X turns on when the gate drive signal G1X is at high level, and turns off when the gate drive signal G1X is at low level.

  The NMOSFET 10X may be designed to have an on-resistance value of several tens of mΩ. However, the lower the on-resistance value of the NMOSFET 10X, the easier it is for an overcurrent to flow at the time of grounding to the output terminal T2X (= when the output is shorted to the ground terminal or a low potential terminal according to this), and abnormal heat generation tends to occur. Therefore, the lower the on-resistance value of the NMOSFET 10X, the higher the importance of the overcurrent protection circuit 71X described later.

  The output current monitoring unit 20X includes an NMOSFET 21X and a sense resistor 22X, and generates a sense voltage VsX (corresponding to a sense signal) according to the output current Io flowing through the NMOSFET 10X.

  The NMOSFET 21X is a mirror transistor connected in parallel to the NMOSFET 10X, and generates a sense current Is according to the output current Io. The size ratio of the NMOSFET 10X to the NMOSFET 21X is m: 1 (where m> 1). Therefore, the sense current Is has a magnitude obtained by reducing the output current Io to 1 / m. As in the case of the NMOSFET 10X, the NMOSFET 21X is turned on when the gate drive signal G1X is at high level, and is turned off when the gate drive signal G1X is at low level.

  The sense resistor 22X (resistance value: Rs) is connected between the source of the NMOSFET 21X and the output terminal T2X, and a sense voltage VsX (= Is x Rs + VoX according to the sense current Is, where VoX is the output terminal T2X Is a current / voltage conversion element that generates an output voltage that appears.

  The gate control unit 30X performs on / off control of the NMOSFETs 10X and 21X by generating a gate drive signal G1X in which the current capability of the gate control signal S1X is enhanced and outputting it to the gates of the NMOSFETs 10X and 21X. The gate control unit 30X has a function of controlling the NMOSFETs 10X and 21X so as to limit the output current Io according to the overcurrent protection signal S71X.

  The control logic unit 40X receives the supply of the internal power supply voltage Vreg to generate a gate control signal S1X. For example, when the external control signal SiX is at a high level (= logic level when turning on the NMOSFET 10X), the internal power supply voltage Vreg is supplied from the internal power supply unit 60X, so the control logic unit 40X is activated and gate control is performed. The signal S1X becomes high level (= Vreg). On the other hand, when the external control signal SiX is at a low level (= logic level when turning off the NMOSFET 10X), the internal power supply voltage Vreg is not supplied from the internal power supply unit 60X, so the control logic unit 40X is inoperative and gate control is performed. The signal S1X goes low (= GND). The control logic unit 40X also monitors various abnormality protection signals (such as the overcurrent protection signal S71X).

  The signal input unit 50X is a Schmitt trigger that receives an input of the external control signal SiX from the input terminal T3X and transmits it to the control logic unit 40X and the internal power supply unit 60X. Note that, for example, the external control signal SiX becomes high level when the NMOSFET 10X is turned on, and becomes low level when the NMOSFET 10X is turned off.

  The internal power supply unit 60X generates a predetermined internal power supply voltage Vreg from the power supply voltage VBBX and supplies it to each part of the semiconductor integrated circuit device 1. Note that the operation of the internal power supply unit 60X is controlled according to the external control signal SiX. More specifically, the internal power supply unit 60X is in the operating state when the external control signal SiX is at the high level, and is in the non-operating state when the external control signal SiX is at the low level.

  The abnormality protection unit 70X is a circuit block that detects various abnormalities in the semiconductor integrated circuit device 1, and includes an open protection circuit (not shown), a temperature protection circuit, and a voltage reduction protection circuit in addition to the overcurrent protection circuit 71X.

  The overcurrent protection circuit 71X generates an overcurrent protection signal S71X according to the monitoring result of the sense voltage VsX (= whether or not an overcurrent abnormality of the output current Io has occurred). The overcurrent protection signal S71X is, for example, at low level when no abnormality is detected, and at high level when an abnormality is detected.

  FIG. 6 is a view showing an example of the pin arrangement of the semiconductor integrated circuit device 1 (package product). In the semiconductor integrated circuit device 1 shown in FIG. 6, eight pins are arranged on one of the opposite sides of the rectangular body and eight pins are arranged on the other.

  In the eight pins disposed on one side, the pin VBB, the pin SET, and the other pins are disposed in order from the end. That is, the pin VBB and the pin SET are adjacent to each other. In the eight pins arranged on the other side, four pins OUT1 and four pins OUT2 are arranged in order from the end.

  The pin VBB corresponds to the power supply terminal T1X in FIG. 5, and is a high breakdown voltage terminal to which a power supply voltage is applied. The pin SET is a terminal to which a resistor for setting the overcurrent setting value of the overcurrent protection circuits 71X and 71Y in FIG. 5 can be connected, and is a low withstand voltage terminal. The pin OUT1 corresponds to the output terminal T2X in FIG. 5, is a terminal for connecting the load 3X, and is a high withstand voltage terminal. The pin OUT2 corresponds to the output terminal T2Y in FIG. 5, is a terminal for connecting the load 3Y, and is a high breakdown voltage terminal.

  Therefore, in FIG. 6, only one of the high withstand voltage terminal and the low withstand voltage terminal is basically arranged on the same side, but the pin VBB and the low withstand voltage terminal are low because of the pin arrangement. The pin SET, which is a withstand voltage terminal, is disposed on the same side and adjacent to one another. Therefore, the pin VBB and the pin SET may short-circuit.

  Here, the protection circuit 10 (FIGS. 1 and 2) described above can be mounted on the semiconductor integrated circuit device 1. In this case, the low breakdown voltage terminal TL corresponds to the pin SET. Therefore, even when the pin VBB and the pin SET are short-circuited, the path between the pin SET (low withstand voltage terminal TL) and the low withstand voltage circuit is cut off by the protection circuit 10 (state of FIG. 2). It is possible to suppress the application of overvoltage to prevent the breakdown of the low withstand voltage circuit. Therefore, the semiconductor integrated circuit device 1 can be miniaturized since it is not necessary to arrange the unconnected terminal (NC) between the pin SET and the pin VBB or to configure the low breakdown voltage circuit with a high breakdown voltage element.

  In particular, in recent years, automotive ICs are required to comply with ISO 26262 (international standard for functional safety related to electrical and electronic of vehicles), and higher reliability is also required for automotive IPD. The protection circuit according to the present invention is highly effective.

<Application to vehicles>
FIG. 7 is an external view showing a configuration example of a vehicle. The vehicle X of this configuration example is equipped with a battery (not shown in the figure) and various electronic devices X11 to X18 that operate by receiving power supply from the battery. The mounting positions of the electronic devices X11 to X18 in this figure may differ from the actual ones for convenience of illustration.

  The electronic device X11 is an engine control unit that performs control related to the engine (injection control, electronic throttle control, idling control, oxygen sensor heater control, auto cruise control, and the like).

  The electronic device X12 is a lamp control unit that performs on / off control such as HID [high intensity discharged lamp] or DRL [daytime running lamp].

  The electronic device X13 is a transmission control unit that performs control related to the transmission.

  The electronic device X14 is a body control unit that performs control related to the motion of the vehicle X (ABS (anti-lock brake system) control, EPS (electric power steering) control, electronic suspension control, and the like).

  The electronic device X15 is a security control unit that performs drive control of a door lock, a security alarm, and the like.

  The electronic device X16 is an electronic device incorporated in the vehicle X at the factory shipment stage as a standard accessory or a manufacturer option such as a wiper, an electric door mirror, a power window, a damper (shock absorber), an electric sunroof, and an electric seat. It is.

  The electronic device X17 is an electronic device optionally mounted on the vehicle X as a user option item such as an on-board A / V [audio / visual] apparatus, a car navigation system, and an ETC [electronic toll collection system].

  The electronic device X18 is an electronic device equipped with a high voltage system motor such as a vehicle blower, an oil pump, a water pump, and a battery cooling fan.

  The semiconductor integrated circuit device 1, the ECU 2, and the loads 3X and 3Y described above can be incorporated into any of the electronic devices X11 to X18.

<Other Modifications>
Further, although the above embodiment has been described by taking the on-vehicle high-side switch IC as an example, the application object of the invention disclosed in the present specification is not limited to this, for example, The present invention can be widely applied to semiconductor integrated circuit devices other than in-vehicle applications as well as other in-vehicle IPDs (in-vehicle low-side switch ICs, in-vehicle power ICs, etc.).

  Further, various technical features disclosed in the present specification can be modified in various ways without departing from the gist of the technical creation other than the above embodiment. That is, the above embodiment should be considered as illustrative in all points and not restrictive, and the technical scope of the present invention is shown by the claims rather than the description of the above embodiment. It is to be understood that the present invention includes all modifications that fall within the meaning and scope equivalent to the claims.

  The present invention can be used, for example, in an in-vehicle IPD.

10, 20 protection circuit 101, 201 switching control unit NM1 to NM4 transistor PM1, PM2 transistor ZD1 to ZD4 Zener diode R1 to R4 resistance TL low withstand voltage terminal Tvr terminal Tc terminal Tgd ground terminal Tvd power supply terminal 1 semiconductor integrated circuit device 2 ECU
3X, 3Y Load T1X, T1Y Power Supply Terminal T2X, T2Y Output Terminal T3X, T3Y Input Terminal 10X, 10Y NMOSFET
20X, 20Y output current monitoring unit 21X, 21Y NMOSFET
22X, 22Y Sense resistor 30X, 30Y Gate control unit 40X, 40Y Control logic unit 50X, 50Y Signal input unit 60X, 60Y Internal power supply unit 70X, 70Y Abnormality protection unit 71X, 71Y Overcurrent protection circuit

Claims (12)

A first switch for switching on / off of a path between the low breakdown voltage circuit and the low breakdown voltage terminal;
A switching control unit that switches on and off of the first switch according to a voltage applied to the low withstand voltage terminal;
Protection circuit. The switching control unit
A pull-up resistor connected to the gate of the first switch, which is an N-channel MOSFET;
The protection circuit according to claim 1, further comprising: a second switch that switches conduction / cutoff of a path between the gate and the ground.   The protection circuit according to claim 2, wherein the pull-up resistor is a depletion type N-type MOSFET. The switching control unit further includes a first Zener diode and a first resistor,
The gate of the second switch, which is an N-channel MOSFET, is connected to a first connection point where the anode of the first Zener diode and one end of the first resistor are connected.
The source of the second switch is connected to the other end of the first resistor together with the application end of the ground potential,
The drain of the second switch is connected to the gate of the first switch,
The protection circuit according to claim 2, wherein a cathode of the first Zener diode is connected to the low voltage terminal. The switching control unit further includes a second Zener diode and a second resistor,
The anode of the second zener diode is connected to the source of the second switch,
The cathode of the second Zener diode is connected to a second connection point where the gate of the second switch and one end of the second resistor are connected,
The protection circuit according to claim 4, wherein the other end of the second resistor is connected to the first connection point. The switching control unit
A pull-down resistor connected to the gate of the first switch which is a P-channel MOSFET;
The protection circuit according to claim 1, further comprising: a third switch that switches conduction / cutoff of a path between the gate and the power supply terminal.   The protection circuit according to claim 6, wherein the pull-down resistor is a depletion type N-type MOSFET. The switching control unit further includes a third Zener diode and a third resistor,
The gate of the third switch, which is a P-channel MOSFET, is connected to a third connection point where the cathode of the third Zener diode and one end of the third resistor are connected,
The source of the third switch is connected to the other end of the third resistor together with the power supply terminal.
The drain of the third switch is connected to the gate of the first switch,
The protection circuit according to claim 6, wherein an anode of the third Zener diode is connected to the low withstand voltage terminal. The switching control unit further includes a fourth Zener diode and a fourth resistor,
The cathode of the fourth Zener diode is connected to the source of the third switch,
The anode of the fourth Zener diode is connected to a fourth connection point to which the gate of the third switch and one end of the fourth resistor are connected,
The protection circuit according to claim 8, wherein the other end of the fourth resistor is connected to the third connection point. A protection circuit according to any one of claims 1 to 9;
Low withstand voltage terminal,
And a high withstand voltage terminal adjacent to the low withstand voltage terminal.   11. The semiconductor integrated circuit device according to claim 10, wherein the low breakdown voltage terminal is a terminal to which a resistor for setting an overcurrent setting value of the overcurrent protection circuit can be connected. A semiconductor integrated circuit device according to claim 10 or 11;
And a load connected to the semiconductor integrated circuit device.

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