JP2019080996A - Game machine - Google Patents

Abstract

To provide a game machine, even when a power supply of the game machine is turned off, capable of notifying a specific device of opening of a door body.SOLUTION: When an inner frame 12 is closed, an inner-frame terminal plate output circuit 300a can ground one end of a capacitor CD7 by a switch SW3-3. Therefore, when the inner frame 12 is closed, an electric charge accumulated in the capacitor CD7 when the inner frame 12 is opened, is instantaneously discharged via the switch SW3-3 so as to be nulled. In this way, until the inner frame 12 is opened again, the electric charge accumulated in the capacitor CD7 is constantly nulled, so that, even when the inner frame 12 is continuously opened a plurality of times in a short time, an integration circuit 281 is normally operated, so that, regardless of the opening period of the inner frame 12, a fall period of a voltage to be applied to TRG terminal of a timer IC1 can be set to a fixed time (approximately 2 ms).SELECTED DRAWING: Figure 34

Description

  The present invention relates to a gaming machine represented by a pachinko machine, a drum-type game machine (for example, a slot machine), or a drum-type game machine using a game ball.

  In a pachinko machine, when a ball driven into a game area enters a symbol operation opening, a lottery is performed at the timing of the ball entering. In the case of a coin-operated game machine using a slot machine or a game ball, when the start lever is operated, a lottery is performed at the operated timing. As a result of the lottery, for example, when it is a jackpot, a large amount of prize balls and coins can be paid out. Since the control for determining the lottery and the jackpot is performed by the main control device, the main control device is likely to be a target of fraud.

As a specific fraudulent action, for example, the main control device may be replaced with a fraudulent one that frequently generates a jackpot, or a fraudulent substrate (for example, a “hanging board”) may be connected to the main control device. There are things that cause illegal Further, in the case of a pachinko machine, there is also an injustice which makes it easy for a ball to easily enter a winning opening or a symbol operating opening by bending a nail driven into the game board surface illegally.
In the case of a pachinko machine, the main control unit is mounted on the back of the game board. On the other hand, a glass frame is provided on the front of the game board, and the glass frame is individually openable and closable with respect to an inner frame body on which the game board is mounted. Therefore, if the fraudster commits an act against the game board or the main control device, the inner frame or the glass frame must be opened, but if the inner frame or the glass frame is opened, Since the opening is detected by the sensor and is notified to the hall computer that manages the game arcade, it can be easily grasped to which pachinko machine the cheating has been made.

JP, 2001-198332, A

  However, if the fraudster intrudes, for example, at midnight after the closing of the game arcade, and the intruder performs an illegal act by opening the inner frame or the glass frame, the power of the pachinko machine is cut off at that time. Since the pachinko machine is stopped, the opening of the inner frame or the glass frame can not be detected, and the opening can not be notified to the hall computer.

  The present invention has been made to solve the above-described problems and the like, and in the case where the door is opened while the power of the game machine is turned off, it is possible to grasp the opening. The purpose is to provide a gaming machine that can

  In order to achieve this object, the gaming machine according to claim 1 is provided with a main body, a door for opening and closing the front of the main body, a space formed by the door and the main body, and control of the game. A door opening detection unit for detecting the opening of the door with respect to the main body, and an opening state of the door when the opening of the door is detected by the door opening detection unit. For example, based on the period adjustment means for outputting a signal that is a predetermined output period regardless of the opening period of the door by the operation from the initial state to the prescribed time, and the signal output by the period adjustment means The output means for outputting the detection result by the door open detection means to the specific device, and the power supply means for supplying power to the output means and the period adjustment means to operate the door open detection means, Said door The system further comprises initialization means for initializing the period adjustment means when closing is detected, and the power supply means supplies power to the output means and the period adjustment means when the game machine is powered off. An off-off operating means is provided which is operated to supply.

  The game machine according to claim 2 is the game machine according to claim 1, wherein the door open detection means stops the power supply to the period adjustment means by the power supply means when the closing of the door body is detected. A stop means is provided.

  A game machine according to claim 3 is the game machine according to claim 1 or 2, wherein the period adjustment means is configured using an electric storage means for storing electric charge, and the power source means operates from an initial state to a prescribed time. The voltage generated along with the charge stored in the storage means by the power supplied to the output unit is output as a signal serving as the predetermined output period.

  The game machine according to claim 4 is the game machine according to claim 3, wherein the initialization means constitutes the period adjustment means when the door opening detection means detects that the door is closed. A discharging means is provided for bringing the storage means into an initial state by discharging the charge stored in the means.

  The gaming machine according to claim 5 is the gaming machine according to any one of claims 2 to 4, wherein the stop means is the power supply means when the door opening detection means detects that the door is closed. And releasing means for releasing the electrical connection between the time adjustment means and the time adjustment means.

  The gaming machine according to claim 6 is the gaming machine according to claim 5, wherein the initialization means constitutes the period adjustment means when the door opening detection means detects the opening of the door body. The power supply means and the period adjustment means are provided with discharge release means for releasing a short circuit by the discharge means between the means and the ground, and the stop means detects the opening of the door by the door open detection means. Power supply resuming means for stopping the release of the electrical connection by the releasing means and resuming the power supply to the period adjusting means by the power supply means, the door opening detecting means opening the door When it is detected, the power supply resuming means cancels the short circuit due to the discharging means of the storage means and the ground constituting the period adjusting means by the discharge releasing means, and When the release of the electrical connection by the release means with the space adjustment means is stopped, the power supply to the period adjustment means by the power supply means is resumed, and the closing of the door is detected by the door open detection means. The discharge means shorts the storage means constituting the period adjustment means to the ground after the electric connection between the power supply means and the period adjustment means is released by the release means, and is stored in the storage means Discharge the charge.

  According to the gaming machine of claim 1, when the opening of the door is detected by the door opening detection means, the period adjusting means operates from the initial state to the prescribed time regardless of the opening time of the door. A signal for a predetermined output period is output. Then, the output means outputs the detection result to the specific device based on the signal output from the period adjustment means. Here, the output period of the signal output by the period adjustment means is determined by the operation of the period adjustment means from the initial state to the specified time. In order to cause the period adjustment means to output a signal that is a predetermined output period regardless of the opening time of the door, the initialization means adjusts the period adjustment means when the door opening detection means detects the closing of the door. In the initial state. Therefore, the period adjusting means can always operate from the initial state when the door opening detecting means detects the opening of the door. Therefore, every time opening of the door is detected by the door opening detecting means, the period adjusting means is operated normally and stably from the initial state to the prescribed time, so that an output period predetermined for the period adjusting means is obtained. The signal can be output normally and stably, and the detection result can be output normally and stably from the output means to the specific device.

  Further, according to the gaming machine of claim 1, in addition to the state where the power supply of the gaming machine is turned on, the door opening detection means is provided even when the power supply of the gaming machine is turned off and the control means is stopped. When it is detected that the door is open, power is supplied to the output means and the period adjustment means by the operating means during off-state. Therefore, even if the power of the gaming machine is turned off and the control means is stopped, if the opening of the door is detected by the door open detection means, a signal which becomes an output period predetermined by the period adjustment means Is output, and the output means outputs the detection result to a specific device based on the output signal. Therefore, for example, even if the door is opened due to a fraudulent act by someone after closing the store where all the gaming machines are turned off, it is possible to identify the gaming machine with the opened door by the specific device. is there.

  According to the gaming machine of the second aspect, in addition to the effect of the gaming machine of the first aspect, when the closing of the door is detected by the door opening detection means, the stopping means is to the period adjusting means. Stop the power supply by the power supply means. Therefore, in a state where the operation of the period adjusting means is stopped by the stopping means, the period adjusting means can be initialized by the initializing means. Therefore, there is an effect that the period adjustment means can be normally and stably in the initial state.

  According to the gaming machine of the third aspect, in addition to the effects of the gaming machine of the first or second aspect, power from the power source means is supplied to the storage means constituting the period adjustment means from the initial state to the prescribed time. Then, charge is stored in the storage means. The period adjustment means outputs the voltage generated with the charge stored in the storage means as a signal serving as a predetermined output period. As described above, by configuring the period adjustment unit by the storage unit, the signal having a predetermined output period can be output with a simple configuration without the period adjustment unit being a complicated circuit. There is.

  According to the gaming machine of the fourth aspect, in addition to the effect of the gaming machine of the third aspect, the discharge means constitutes the period adjustment means when the closing of the door is detected by the door opening detection means. Discharge the charge stored in the storage means. Therefore, the charge stored in the storage means when the door opening detection means detects the opening of the door is discharged by the discharging means to zero when the door opening detection means detects that the door is closed. can do. Thus, when the opening of the door is detected by the door opening detection unit, the period adjustment unit configured by the storage unit can always operate from the initial state. Therefore, every time opening of the door is detected by the door opening detecting means, the period adjusting means is operated normally and stably from the initial state to the prescribed time, so that an output period predetermined for the period adjusting means is obtained. The signal can be output normally and stably, and the detection result can be output normally and stably from the output means to the specific device. In addition, as a discharge method of the storage means, it is exemplified that the storage means is short-circuited to the ground.

According to the gaming machine of the fifth aspect, in addition to the effect of the gaming machine according to any one of the second to fourth aspects, when the closing of the door is detected by the door opening detection means, the power source means The electrical connection with the period adjustment means is released by the release means. Therefore, in the state where the power supply to the period adjustment means is stopped by the release means, the period adjustment means can be initialized by the initialization means or the discharge means. Therefore, there is an effect that the period adjustment means can be normally and stably in the initial state.
According to the gaming machine of the sixth aspect, in addition to the effect of the gaming machine of the fifth aspect, when the opening of the door is detected by the door opening detection means, the power supply resuming means first performs the period. After causing the discharge releasing means to release the short circuit between the storage means constituting the adjusting means and the grant, the power supply from the power supply means to the period adjusting means is resumed. On the other hand, when closing of the door is detected by the door open detection means, the discharge means first causes the release means to release the electrical connection between the power supply means and the period adjustment means, and then the period adjustment means is configured. The storage means to be connected is short-circuited to ground to discharge the charge stored in the storage means. Therefore, there is no possibility that the power supply means and the ground are short-circuited in either of the case where the door opening detection means detects opening of the door and the case where the door opening detection means detects closing of the door body. . Therefore, there is an effect that breakage of the power supply means and the like caused by the short circuit between the power supply means and the ground can be surely prevented.

It is a front view of a pachinko machine. It is a front view of a game board of a pachinko machine. It is a rear view of a pachinko machine. It is a perspective view of a pachinko machine in the state where an inner frame, a front frame, and a lower tray unit were opened. It is a figure showing structure of a switch. It is a block diagram which shows the electric constitution of a pachinko machine. It is the block diagram which showed the electric constitution of the frame open detection circuit and the external output terminal board. It is the timing chart which showed the relationship of the state of an inner frame, the state of a front frame, the TRG terminal voltage of a timer, the OUT terminal voltage of a timer, and the output of an external output terminal board. (A) is a figure which showed typically area | region division setting and effective line setting of a display screen, (b) is a figure which illustrated the actual display screen. It is a figure which shows the outline | summary of various counters. 5 is a flowchart showing a start-up process performed by the MPU 201 in the main control device 110. It is a flowchart which shows the main processing performed by MPU in a main control apparatus. It is a flowchart which shows the fluctuation | variation process performed in main processing. It is the flowchart which showed the fluctuation start processing which is executed inside fluctuation processing. It is a flowchart which shows timer interruption processing. It is a flowchart which shows the starting winning a prize process performed in timer interruption processing. It is a flowchart which shows NMI interruption processing. It is the block diagram which showed the electric constitution of the frame open detection circuit of 2nd Embodiment. It is the timing chart which showed the relation of the state of inner frame 12, the state of front frame 14, the voltage of A of the frame open detection circuit of a 2nd embodiment, and the output of an external output terminal board. It is the block diagram which showed the electric constitution of the frame open detection circuit of 3rd Embodiment. It is the timing chart which showed the relationship of the state of an inner frame, the state of a front frame, the TRG terminal voltage of the timer of 3rd Embodiment, the OUT terminal voltage of the timer of 3rd Embodiment, and the output of an external output terminal board. It is a perspective view of a pachinko machine of a 4th embodiment in the state where an inner frame, a front frame, and a lower tray unit were opened. It is sectional drawing of switch SW3 used for the pachinko machine of 4th Embodiment. It is a block diagram which shows the electric constitution of the pachinko machine of 4th Embodiment. It is the block diagram which showed the electric constitution of the frame open detection circuit for inner frames, and the external output terminal board for inner frames. The state of the power supply of the pachinko machine of the fourth embodiment, the states of the switches SW3-1 and SW3-2, the TRG terminal voltage of the timer, the OUT terminal voltage of the timer, the output of the external output terminal plate for the inner frame, and for the inner frame It is the timing chart which showed the relation of the output of the input output port output circuit. It is the flowchart which showed the main processing performed by MPU in the main control apparatus of 4th Embodiment. It is the flowchart which showed the timer interruption processing which is executed by MPU inside the main control unit of 4th execution form. It is the flowchart which showed the starting process performed by MPU in the audio | voice lamp control apparatus of 4th Embodiment. It is the flowchart which showed the main processing performed by MPU in the voice lamp control device of a 4th embodiment. It is the flowchart which showed the door opening alerting | reporting process performed by MPU in the audio | voice lamp control apparatus of 4th Embodiment. It is the flowchart which showed the main processing performed by MPU in the display control apparatus of 4th Embodiment. It is the flowchart which showed the external interruption processing performed by MPU in the display control apparatus of 4th Embodiment. It is sectional drawing of switch SW3A used for the pachinko machine of 5th Embodiment. It is the block diagram which showed the electric constitution of the frame open detection circuit for inner frames used for the pachinko machine of 5th Embodiment, and the external output terminal board for inner frames. The state of the power supply of the pachinko machine of the fifth embodiment, the state of the inner frame, the state of the switch SW3-3, the state of the switch SW3-1 and the switch SW3-2, the voltage applied to the capacitor CD7, the voltage at the TRG terminal of the timer, It is the timing chart which showed the relationship between the OUT terminal voltage of a timer, the output of the external output terminal board for inner frames, and the output of the input / output port output circuit for inner frames.

  Hereinafter, an embodiment of a pachinko gaming machine (hereinafter simply referred to as a "pachinko machine") will be described based on the drawings. FIG. 1 is a front view of the pachinko machine 10, FIG. 2 is a front view of the game board 13 of the pachinko machine 10, and FIG. 3 is a rear view of the pachinko machine 10. As shown in FIG.

  As shown in FIG. 1, the pachinko machine 10 has an outer frame 11 in which an outer shell is formed by a substantially rectangular combination of wooden frames, and an outer frame 11 having substantially the same outer shape as the outer frame 11. And an inner frame 12 supported so as to be openable and closable. In the outer frame 11, metal hinges 18 are attached to upper and lower two places on the left side in front view (see FIG. 1) to support the inner frame 12, and the side on which the hinge 18 is provided is used as an opening / closing axis A frame 12 is supported so as to be openable and closable to the front side.

  In the inner frame 12, the game board 13 (see FIG. 2) having a large number of nails and winning openings 63, 64 and the like is detachably mounted from the back side. Balls are played by balls flowing down the front of the game board 13. In the inner frame 12, a ball emitting unit 112a (see FIG. 5) for emitting balls to the front area of the game board 13 and a ball for guiding balls emitted from the ball emitting unit 112a to the front area of the game board 13 Rails (not shown) and the like are attached.

  On the front side of the inner frame 12, a front frame 14 covering the upper front side and a lower tray unit 15 covering the lower side are provided. In order to support the front frame 14 and the lower tray unit 15, metal hinges 19 are attached to upper and lower two places on the left side in front view (see FIG. 1), and the side on which the hinge 19 is provided is an open / close shaft. The lower tray unit 14 and the lower tray unit 15 are supported so as to be able to open and close to the front side. The locking of the inner frame 12 and the locking of the front frame 14 are released by inserting a dedicated key into the key hole 21 of the cylinder lock 20 and performing a predetermined operation.

  The front frame 14 is an assembly of a resin part for decoration, an electric part, and the like, and a window portion 14 c having an opening formed in a substantially elliptical shape is provided at a substantially central portion thereof. A glass unit 16 having two glass sheets is disposed on the back side of the front frame 14, and the front of the game board 13 can be viewed on the front side of the pachinko machine 10 through the glass unit 16. In the front frame 14, an upper plate 17 for storing balls is formed in a substantially box-like shape with the upper surface opened and protruding upward, and prize balls, lending balls, etc. are discharged to the upper plate 17. The bottom surface of the upper plate 17 is formed to be inclined downward to the right as viewed from the front (see FIG. 1), and the inclination causes the ball inserted into the upper plate 17 to be guided to the ball firing unit 112a. Further, a frame button 22 is provided on the upper surface of the upper plate 17. The frame button 22 is operated by the player, for example, when changing the effect pattern of the variable display displayed on the third symbol display device 81 or changing the content of the effect at the time of the reach effect.

  In addition, the front frame 14 is provided with light emitting means such as various lamps around its periphery (for example, a corner portion). These light emitting means are controlled to change the light emission mode by lighting up or flashing according to the change in the gaming state at the time of a big hit, a predetermined reach time, etc., and play a role of enhancing the rendering effect during the game. The electric decoration parts 29-33 which incorporated light emission means, such as LED, are provided in the periphery of the window part 14c. In the pachinko machine 10, these electric decoration parts 29 to 33 function as effect lamps such as a big hit lamp, and at the time of big hit or reach production etc., each electric decoration part 29 to 33 is lit by lighting and blinking of the built-in LED. Alternatively, it blinks to notify that it is in the middle of a jackpot, or that it is in reach before the jackpot.

  Further, at the upper left portion of the front surface frame 14 in a front view (see FIG. 1), a light emitting means such as an LED is incorporated and provided with a display lamp 34 capable of displaying a payout ball and an error occurrence time. A small window 35 is formed on the lower side of the right side of the electric decoration 32 so that a transparent resin is attached from the back side so that the back side of the front frame 14 can be seen. 2), and the like can be viewed from the front of the pachinko machine 10. In addition, in the pachinko machine 10, a plating member 36 made of ABS resin plated with chromium is attached to the area around the electric decoration parts 29 to 33 in order to create more refreshingness.

  Under the window portion 14c, a ball rental operation unit 40 is disposed. The rental ball operation unit 40 is provided with a frequency display unit 41, a ball rental button 42, and a return button 43. When the rental ball operation unit 40 is operated with a bill, a card, etc. being inserted into a card unit (ball lending unit) (not shown) arranged on the side of the pachinko machine 10, the ball is A loan will be made. Specifically, the frequency display unit 41 is an area in which the remaining amount information of a card or the like is displayed, and the built-in LED lights up and the remaining amount is displayed as a number as remaining amount information. The ball lending button 42 is operated to obtain a lending ball based on the information recorded in the card etc. (recording medium), and the lending ball supplies the upper plate 17 as long as the remaining amount is present in the card etc. Be done. The return button 43 is operated when it is requested to return a card or the like inserted in the card unit. In the case of a pachinko machine in which a ball is lent directly to the upper plate 17 from a ball lending device or the like without passing through a card unit, a so-called cash machine does not require the ball operating unit 40. In this case, the ball operating unit 40 is used. A decorative seal or the like may be added to the installation part of to make the part configuration common. A pachinko machine using a card unit and a cash machine can be shared.

  In the lower tray unit 15 located below the upper tray 17, a lower tray 50 for storing the balls that can not be stored in the upper tray 17 is formed in a substantially box shape whose upper surface is opened at the central portion thereof There is. On the right side of the lower plate 50, an operation handle 51 operated by a player for driving a ball into the front of the game board 13 is disposed, and driving of the ball launch unit 112a is permitted inside the operation handle 51. Sensor 51a, a push-button stop switch 51b for stopping the firing of the ball during the pressing operation, and a variable resistor for detecting the amount of rotational operation of the operation handle 51 based on a change in electric resistance (Not shown) is built in. When the operation handle 51 is turned clockwise by the player, the touch sensor is turned on and the resistance value of the variable resistor changes in accordance with the amount of operation, and the amount of rotation operation of the operation handle 51 changes. A ball is fired at a strength corresponding to the changing resistance value of the variable resistor, whereby the ball is struck to the front of the game board 13 with a flying amount corresponding to the operation of the player. Further, in a state where the operation handle 51 is not operated by the player, the touch sensor 51a and the stop switch 51b are off.

  At the front lower portion of the lower plate 50, a ball removing lever 52 for operating when discharging the balls stored in the lower plate 50 downward is provided. The ball release lever 52 is always urged in the right direction, and by sliding it in the left direction against the urging, the bottom surface opening formed on the bottom surface of the lower plate 50 is opened. A ball falls naturally from the bottom opening and is discharged. The operation of the ball release lever 52 is usually performed with a box (generally referred to as a "two-and-a-box") for receiving the ball discharged from the lower plate 50 below the lower plate 50. The operating handle 51 is disposed on the right side of the lower plate 50 as described above, and the ashtray 53 is attached on the left side of the lower plate 50.

  As shown in FIG. 2, the gaming board 13 has a wooden base plate 60 cut into a substantially square shape in a front view, a large number of nails for guiding balls, a windmill and rails 61, 62, a general winning opening 63, a first The ball entrance 64, the variable winning device 65, the variable display device unit 80 and the like are assembled, and the peripheral edge portion is attached to the back surface side of the inner frame 12. The general winning opening 63, the first ball entrance 64, the variable winning device 65, and the variable display unit 80 are disposed in through holes formed in the base plate 60 by router processing, and a wood screw from the front side of the game board 13 It is fixed by etc. The front center portion of the game board 13 can be viewed from the front side of the inner frame 13 through the window portion 14c (see FIG. 1) of the front frame 14. The configuration of the game board 13 will be described below.

  An outer rail 62 formed by bending a belt-like metal plate into a substantially arc shape is planted on the front of the game board 13, and at the inside position of the outer rail 62, a belt-like metal plate like the outer rail 62 is formed. The arc-shaped inner rail 61 formed in the above is planted. The front outer periphery of the game board 13 is surrounded by the inner rails 61 and the outer rails 62, and the front and back are surrounded by the game board 13 and the glass unit 16 (see FIG. 1). A game area in which a game is played is formed by the behavior of the game. The game area is a front surface of the game board 13 and is formed by dividing two rails 61 and 62 and the arc member 70 into a substantially circular area (a winning opening etc. is disposed, and a shot ball is (Flowing down area).

  The two rails 61 and 62 are provided to guide the ball fired from the ball launch unit 112 a to the top of the game board 13. A return ball preventing member 68 is attached to the end portion (upper left part in FIG. 2) of the inner rail 61, and the situation in which the ball guided to the upper part of the game board 13 once comes back into the ball guide passage is prevented. Be done. At the end of the outer rail 62 (the upper right part in FIG. 2), the rubber return 69 is attached to a position corresponding to the largest flying portion of the ball, and the ball fired with a predetermined momentum strikes the rubber return 69 Is bounced toward the central part while being attenuated. In addition, a resin-made arc member 70 formed by providing an arc connecting the rails on the inner surface between the lower right end of the inner rail 61 and the upper right end of the outer rail 62 is a base. It is driven in and fixed to the plate 60.

  A first symbol display device 37 provided with a plurality of LEDs 37a as light emitting means and a 7-segment display 37b is disposed on the upper right side of the game area (the upper right side in FIG. 2). The first symbol display device 37 displays information according to each control performed by the main control device 110, and mainly displays the gaming state of the pachinko machine 10. The plurality of LEDs 37a indicate whether the pachinko machine 10 is in a definite variation, a time-short or a normal, by a lighting condition, indicate whether or not it is in a variation by a lighting condition, and a symbol corresponding to a definite variation hit of the stop symbol It indicates whether or not the symbol corresponding to the normal jackpot or the off symbol is displayed by the lighting state, or indicates the number of holding balls by the lighting state. The 7-segment display device 37b displays the number of rounds in a big hit and an error display. In addition, LED37a is comprised so that the luminescent color (for example, red, green, blue) of each LED may differ, and can suggest the various game states of the pachinko machine 10 with few LED by the combination of the luminescent color. .

  It should be noted that, while the pachinko machine 10 described above is in a definite variation, the jackpot probability is increased, and it is a gaming state where it is easy to shift to a special gaming state. Furthermore, during the definite change in the present embodiment, the probability of hitting the second symbol is increased, and it is a game state in which the ball is easy to enter the first ball entrance 64. Further, the pachinko machine 10 being in a short time is a gaming state in which the ball is likely to enter the first ball entrance 64 while the jackpot probability remains the same and only the hit probability of the second symbol is increased. In addition, the pachinko machine 10 being in the middle is the state of the game which is not a definite change or a time saving (the state that neither the jackpot probability nor the hit probability of the second symbol is increased). In addition, according to the game state of the pachinko machine 10, the time when the electric role (not shown) attached to the first ball entrance 64 opens and the number of times the electric role opens per hit are changed It is good also as a thing.

  Further, in the game area, there are provided a plurality of general winning openings 63 in which five to fifteen balls are paid out as winning balls by winning balls. Further, a variable display device unit 80 is disposed in the central portion of the game area. A third symbol display device 81 configured of a liquid crystal display (hereinafter simply referred to as a “display device”) that variably displays the third symbol on the variable display device unit 80 using a prize winning on the first entrance 64 as a trigger. And a second symbol display device 82 configured of a light emitting diode (hereinafter referred to as "LED") for fluctuating display of the second symbol triggered by passage of a ball of the second entry hole 67 as a trigger. .

  The display content of the third symbol display device 81 is controlled by a display control device 114 described later, and, for example, three symbol rows of left, middle and right are displayed. Each symbol row is constituted by a plurality of symbols, and these symbols are vertically scrolled for each symbol row, and the third symbol is variably displayed on the display screen of the third symbol display device 81. Further, in the present embodiment, the third symbol display device 81 is constituted by a large liquid crystal display of 8-inch size, and the variable display unit 80 is provided with a center frame so as to surround the outer periphery of the third symbol display device 81. 86 are provided. In the third symbol display device 81 of the present embodiment, the display of the gaming state accompanied by the control of the main control device 110 is performed by the first symbol display device 37, while the display of the first symbol display device 37 The display is decorative according to the Note that, instead of the display device, for example, the third symbol display device 81 may be configured using a reel or the like.

  In addition, when the ball enters the first ball entrance 64 until the stop symbol (one of the probability hit symbol, the normal hit symbol and the detached symbol) is displayed on the first symbol display device 37 The number of times of ball entry is suspended up to four times, and the number of times of suspension is indicated by the first symbol display device 37 and also indicated by the number of lights of the suspension lamp 85. The holding lamps 85 are provided for four for the maximum holding number, and are arranged symmetrically above the third symbol display device 81. In the present embodiment, the winning at the first entry slot 64 is configured to be held up to four times at maximum, but the maximum number of times of holding is not limited to four times, and is three times or less Alternatively, it may be set to five or more times (for example, eight times). In addition, the reserve lamp 85 is deleted, and the number of times of suspension of the variable display based on the winning on the first entrance 64 is reserved in a part of the third symbol display device 81 by a number or an area divided into four. It may be displayed in an aspect (for example, color or lighting pattern) different by the number of times. Further, since the number of holding times is indicated by the first symbol display device 37, it is possible not to perform lighting display by the holding lamp 85.

  The second symbol display device 82 has the display portion 83 of the second symbol and the holding lamp 84, and as the display symbol 83 (second symbol) in the display portion 83 every time the ball passes through the second entrance hole 67. The symbol of "o" and the symbol of "x" are alternately lit to perform variable display, and the variable display is stopped at a predetermined symbol (in the present embodiment, the symbol of "o"). (1) The ball inlet 64 is configured to be activated (opened) for a predetermined time. The number of times of passage of the second ball entrance 67 is suspended up to four times, and the number of times of suspension is displayed by the above-described first symbol display device 37 and also displayed on the suspension lamp 84 as well. In addition, as the variable display of the second symbol is performed by switching on and off the plurality of lamps in the display unit 83 as in the present embodiment, the first symbol display device 37 and the third symbol display device It may be performed using a part of 81. Similarly, the hold lamp 84 may be lighted by part of the third symbol display device 81. Further, the passage of the second ball entry port 67 is not limited to four times the maximum number of times of holding, similarly to the first ball entry port 64, and is three times or less, or five times or more (for example, It may be set to 8 times). Further, since the number of holding times is indicated by the first symbol display device 37, it is possible not to perform lighting display by the holding lamp 84.

  Below the variable display unit 80, a first ball entry port 64 through which a ball can enter is disposed. When the ball enters the first entrance 64, the first entrance switch (not shown) provided on the back side of the game board 13 is turned on, and the first entrance switch is turned on. The main controller 110 draws a jackpot and the display corresponding to the result of the drawing is shown by the LED 37 a of the first symbol display device 37. In addition, the first ball entry port 64 is also one of the winning openings in which five balls are paid out as winning balls when the balls enter.

  Below the first ball entrance 64, a variable winning device 65 is disposed, and at a substantially central portion thereof, a horizontally-long rectangular specified winning opening (large opening) 65a is provided. In the pachinko machine 10, when the lottery with the main control device 110 is a big hit, the LED 37a of the first symbol display device 37 is turned on so as to be a big hit stop symbol after a predetermined time (variation time) has passed. A stop symbol corresponding to the jackpot is displayed on the third symbol display device 81, and the occurrence of the jackpot is indicated. Thereafter, the gaming state transitions to a special gaming state (big hit) in which the ball is easy to win. In this special game state, the special winning opening 65a which is normally closed is opened for a predetermined time (for example, until 30 seconds have elapsed or 10 balls have been won).

  The specific winning hole 65a is closed when a predetermined time passes, and after the closing, the specific winning hole 65a is opened again for a predetermined time. The opening and closing operation of the specific winning hole 65a can be repeated, for example, 16 times (16 rounds) at the maximum. The state in which the opening and closing operation is being performed is a form of special gaming state advantageous to the player, and the player is paid out a larger amount of prize balls than usual as the provision of the gaming value (game value). Is done.

  Specifically, the variable winning device 65 is a horizontally long rectangular opening / closing plate covering the specific winning opening 65a, and a large opening solenoid (not shown) for driving to open / close forward about the lower side of the opening / closing plate. And have. The specific winning opening 65a is normally in a closed state in which the ball can not win or is difficult to win. In the case of a big hit, the large open port solenoid is driven to tilt the opening / closing plate to the lower front side, temporarily forming an open state in which the ball is easy to win in the specified winning port 65a. Operates to repeat the state and the state alternately.

  In addition, the special gaming state is not limited to the above-mentioned form. A large opening is provided in the game area which is opened and closed separately from the specific winning opening 65a, and when the LED 37a corresponding to the big hit is lit in the first symbol display device 37, the specific winning opening 65a is opened for a predetermined time, and the specific winning A game state in which a large opening provided separately from the specific winning opening 65a is opened for a predetermined time for a predetermined number of times as a special gaming state is triggered by the ball winning into the specific winning opening 65a while the opening 65a is open. It may be formed.

  In the left and right corners of the lower side of the game board 13, adhesive spaces K1 and K2 for attaching a certificate, an identification label and the like are provided, and the certificate paper and the like affixed to the adhesive space K1 is a front frame 14 Can be viewed through the small window 35 (see FIG. 1).

  Further, the game board 13 is provided with an out port 66. A ball which has not entered any of the winning openings 63, 64, 65a is guided to an unshown ball discharge path through the out port 66. A large number of nails are implanted in the game board 13 in order to appropriately disperse and adjust the falling direction of the ball, and various members (features) such as a windmill are disposed.

  As shown in FIG. 3, control board units 90 and 91 and a back pack unit 94 are mainly provided on the back side of the pachinko machine 10. The control board unit 90 is integrated with a main board (main controller 110), an audio lamp control board (audio lamp control apparatus 113), and a display control board (display control apparatus 114). In the control board unit 91, a delivery control board (delivery control device 111), a emission control board (firing control device 112), a power supply board (power supply device 115), and a card unit connection board 116 are mounted and unitized.

  In the back pack unit 94, a back pack 92 forming a protective cover and a dispensing unit 93 are unitized. In addition, each control board is used as an MPU as a one-chip microcomputer that controls each control, a port to communicate with various devices, a random number generator used in various lottery, time counting and synchronization etc. Clock pulse generation circuits etc. are mounted as needed.

  The main control unit 110, the audio lamp control unit 113 and the display control unit 114, the payout control unit 111 and the emission control unit 112, the power supply unit 115, and the card unit connection board 116 are accommodated in the substrate boxes 100 to 104, respectively. . The substrate boxes 100 to 104 each include a box base and a box cover that covers the opening of the box base. The box base and the box cover are connected to each other to accommodate the control devices and the respective substrates.

  In addition, the substrate box 100 (main controller 110) and the substrate box 102 (dispensing controller 111 and firing controller 112) connect the box base and the box cover unsealably (sealing structure) by a sealing unit (not shown) Consolidated). Further, a seal seal (not shown) is pasted over the box base and the box cover at the connection portion between the box base and the box cover. The sealing seal is made of a brittle material, and if it is attempted to peel off the sealing seal to open the substrate box 100 or 102, or if the substrate box 100 or 102 is to be opened forcibly, the box base side and the box cover It is cut to the side. Therefore, by confirming the sealing unit or the sealing seal, it can be known whether or not the substrate box 100, 102 has been opened.

  Dispensing unit 93 is located at the top of back pack unit 94 and opens upward, tank 130, tank rail 131 connected to the lower side of tank 130 and gently inclined toward the downstream side, and downstream of tank rail 131. A case rail 132 vertically connected to the side, and a dispensing device 133 provided at the most downstream portion of the case rail 132 and dispensing balls by a predetermined electrical configuration of the dispensing motor 216 (see FIG. 5) ing. The balls supplied from the island facility of the game hall are successively replenished to the tank 130, and the required number of balls are paid out by the payout device 133 as appropriate. The tank rail 131 is attached with a vibrator 134 for applying vibration to the tank rail 131.

  In addition, the payout control device 111 is provided with the state recovery switch 120, the emission control device 112 is provided with the operation knob 121 of the variable resistor, and the power supply device 115 is provided with the RAM erase switch 122. The state recovery switch 120 is operated to eliminate the ball clogging (return to the normal state) when a dispensing error occurs, such as a ball clogging of the dispensing motor 216 (see FIG. 4) portion, for example. The operation knob 121 is operated to adjust the launch force of the launch solenoid. The RAM erase switch 122 is operated when the power is turned on in order to return the pachinko machine 10 to the initial state.

  Next, with reference to FIG. 4, an internal configuration of the pachinko machine 10 will be described. FIG. 4 is a perspective view of the pachinko machine 10 with the inner frame 12, the front frame 14 and the lower tray unit 15 opened.

  The pachinko machine 10 is provided with an outer frame 11 forming an outer shell thereof, and the inner frame 12 is supported by the outer frame 11 so as to be able to open and close. In the game arcade, the outer peripheral surface of the outer frame 11 is fixed to an installation location called an island of the game arcade. The inner frame 12, the front frame 14 and the lower tray unit 15 are configured to be openable to the front side with respect to the outer frame 11, so the back side and the inside that can not be touched from the front side of the pachinko machine 10 Inspection and adjustment are performed by opening the inner frame 12 and the like to the front side with respect to the outer frame 11.

  In order to support the inner frame 12, metal upper hinges (not shown) and lower hinges (not shown) are attached to the outer frame 11 at two upper and lower positions on the left side of the front view. The inner frame 12 is supported openably and closably with the side provided with the upper hinge and the lower hinge as an opening and closing axis.

  The inner frame 12 is mainly formed of an inner frame base 55 made of ABS resin formed in a rectangular shape, and a substantially circular central window 55 a is formed at the center of the inner frame base 55. A mounting portion for the game board 13 is provided on the back side of the inner frame base 55, and the game board 13 is detachably mounted.

  The lower side of the central window 55a of the inner frame base 55 is formed in a concave shape in which the front side is open, and a flat mounting surface 52b is formed on the back side. On the mounting surface 52b, a firing unit 140 for firing a ball to the front of the game board 13, a passage forming member 54 for forming a passage for discharging the ball to the upper plate 17 and the lower plate 50, and the like are attached.

  A switch SW1 (SW1a, SW1b) for detecting the opening and closing of the inner frame 12 is provided between the outer frame 11 and the inner frame 12, and a front surface is provided between the inner frame 12 and the front frame 14 A switch SW2 (SW2a, SW2b) for detecting the opening and closing of the frame 14 is provided. The switch SW1 includes a female switch SW1a disposed on the surface of the outer frame 11 facing the inner frame 12 and a male switch SW1b disposed on the surface of the inner frame 12 facing the outer frame 11 Ru. Further, the switch SW2 includes a female switch SW2a disposed on the surface of the inner frame 12 facing the front frame 14 and a male switch SW2b disposed on the surface of the front frame 14 facing the inner frame 12 Configured

  Here, the structures of the switch SW1 and the switch SW2 will be described with reference to FIG. Since the switch SW1 and the switch SW2 have the same structure, the structure of the switch SW1 will be described, and the description of the switch SW2 will be omitted.

  FIG. 5 is a diagram showing the structure of the switch SW1. FIG. 5A is a view showing a state (cutoff state) of the switch SW1 in a state in which the inner frame 12 is closed. FIG. 5B is a diagram showing a state (conductive state) of the switch SW1 in a state in which the inner frame 12 is opened.

  As shown in FIG. 5A, the female switch SW1a disposed on the surface of the outer frame 11 facing the inner frame 12 incorporates a pair of terminal pairs SW1c made of metal which is a conductive member. ing. When the inner frame 12 is closed, the female switch SW1a disposed on the surface of the outer frame 11 opposed to the inner frame 12 is a male switch disposed on the surface opposed to the outer frame 11 of the inner frame 12. The mold switch SW1b is inserted, and the contact between the terminal pair SW1c is prevented. Therefore, in the state where the inner frame 12 is closed, the switch SW1 is in the state where the conduction is interrupted.

  On the other hand, as shown in FIG. 5 (b), when the inner frame 12 is opened, the female switch SW1a disposed on the surface of the outer frame 11 facing the inner frame 12 The male switch SW1b disposed on the surface facing the frame 11 is pulled out. Since the terminal pair SW1c contained in the female switch SW1a has a structure in which biasing force is generated in the direction opposite to each other, the terminal pair SW1c contacts each other when the male switch SW1b is pulled out from the female switch SW1a. Do. Therefore, in the state where the inner frame 12 is opened, the switch SW1 is in the conductive state.

  As described above, the switch SW1 is in the disconnection state when the inner frame 12 is closed, and is in the conduction state when the inner frame 12 is open. However, the structure of the switch SW1 is not limited to the shape described in FIG. 5, and in the state where the inner frame 12 is closed, the switch SW1 is in the blocking state, and in the state where the inner frame 12 is open, It is sufficient if the switch SW1 is in a conductive state. The same applies to the structure of the switch SW2.

  Next, the electrical configuration of the pachinko machine 10 will be described with reference to FIG. FIG. 6 is a block diagram showing the electrical configuration of the pachinko machine 10.

  The main controller 110 is mounted with an MPU 201 as a one-chip microcomputer which is an arithmetic device. The MPU 201 is a ROM 202 storing various control programs to be executed by the MPU 201 and fixed value data, and a memory for temporarily storing various data etc. when the control program stored in the ROM 202 is executed. A certain RAM 203 and various circuits such as an interrupt circuit, a timer circuit, and a data transmission / reception circuit are incorporated. Although various commands are transmitted from the main control unit 110 to the sub control unit by the data transmission / reception circuit in order to instruct the sub control units such as the payout control unit 111 and the audio lamp control unit 113 to operate. Such command is transmitted from the main control unit 110 to the sub control unit in one direction only.

  The RAM 203 is a stack area in which the contents of the internal registers of the MPU 201 and the return address of the control program executed by the MPU 201 are stored, and a work area in which various flags, counters, values of I / O, etc. Region). The RAM 203 is configured such that a backup voltage can be supplied from the power supply device 115 even after the power of the pachinko machine 10 is shut off to hold (back up) data, and all data stored in the RAM 203 is backed up.

  When the power is shut off due to the occurrence of a power failure or the like, the stack pointer at the time of the power shutoff (including the time of the power failure, the same applies hereinafter) and the value of each register are stored in the RAM 203. On the other hand, when the power is turned on (including the power on after the power failure is eliminated, the same applies hereinafter), the state of the pachinko machine 10 is restored to the state before the power is shut off based on the information stored in the RAM 203. Writing to the RAM 203 is executed when the power is shut off by the main processing (see FIG. 12), and restoration of each value written to the RAM 203 is executed in the start-up process (see FIG. 11) when the power is turned on. The power failure signal SG1 from the power failure monitoring circuit 252 is input to the NMI terminal (non-maskable interrupt terminal) of the MPU 201 at the time of power interruption due to the occurrence of a power failure or the like. When it is input, NMI interrupt processing (see FIG. 17) as power failure processing is immediately executed.

  An input / output port 205 is connected to the MPU 201 of the main control unit 110 via a bus line 204 configured by an address bus and a data bus. The input / output port 205 includes a payout control device 111, an audio lamp control device 113, a first symbol display device 37, a second symbol display device 82, various switches 208 including switches and sensors (not shown), and specific winnings. A solenoid 209 is connected, which is a large opening solenoid for opening and closing on the front side with the lower side of the opening and closing plate of the mouth 65a as an axis, and a solenoid for driving an electric part.

  The main control unit 110 is provided with a frame open detection circuit 260 that detects the opening of the inner frame 12 when the switch SW1 conducts and detects the opening of the front frame 14 when the switch SW2 conducts. There is. Connected to the frame opening detection circuit 260 are a switch SW1 for detecting the opening of the inner frame 12, a switch SW2 for detecting the opening of the front frame 14, and an external output terminal plate 261 configured to be connectable to the hall computer 262. It is done. An input / output unit (input / output port 205 and an input / output port 205) that inputs / outputs signals for connection between switch SW1 and switch SW2 and frame open detection circuit 260 and connection between frame open detection circuit 260 and external output terminal plate 261. The connection is made via different input / output ports (not shown). When the switch SW1 conducts to detect the opening of the inner frame 12 or the switch SW2 conducts to detect the opening of the front frame 14, the frame open detection circuit 260 transmits the external output terminal plate 261 to the hall computer 262, It outputs a pulse signal with a pulse width of 10 ms. The pulse signal output from the external output terminal plate 261 is stored in the hall computer 262. Therefore, by analyzing the pulse signal stored in the hall computer 262, the opening of the inner frame 12 or the front frame 14 can be detected.

  The frame open detection circuit 260 is not connected to the MPU 201 and the input / output port 205 (input / output port of the MPU 201) of the main control apparatus 110. Therefore, the frame open detection circuit 260 may be configured to be mounted on a device (circuit board) other than the main control device 110. For example, it may be mounted on a device (circuit board) on which no arithmetic device such as MPU or CPU is mounted, or a dedicated substrate for the frame open detection circuit 260 may be provided and mounted there. Even better, like the main control unit 110, the delivery control unit 111 and the emission control unit 112, the frame opening detection circuit 260 is housed in the substrate box, and the box base and the box cover provided on the substrate box are sealed unit Unopenable connection (connection by caulking) by (not shown). Then, a sealing seal (not shown) may be attached to the connecting portion between the box base and the box cover over the box cover and the box base.

  The payout control device 111 drives the payout motor 216 to control the payout of the winning balls and the lending balls. The MPU 211, which is an arithmetic device, has a ROM 212 storing a control program to be executed by the MPU 211, fixed value data and the like, and a RAM 213 used as a work memory or the like.

  The RAM 213 of the payout control device 111 is, like the RAM 203 of the main control device 110, a stack area where the contents of the internal registers of the MPU 211 and the return address of the control program executed by the MPU 211 are stored, various flags and counters , I / O, etc. are stored in the work area (work area). The RAM 213 is configured to be able to receive a backup voltage from the power supply device 115 even after the pachinko machine 10 is turned off and to hold (back up) data, and all data stored in the RAM 213 is backed up. Similar to the MPU 201 of the main control unit 110, the NMI terminal of the MPU 211 is configured to receive the power failure signal SG1 from the power failure monitoring circuit 252 at the time of power interruption due to the occurrence of a power failure or the like. When input to the MPU 211, NMI interrupt processing (see FIG. 17) as processing upon power failure is immediately executed.

  An input / output port 215 is connected to the MPU 211 of the payout control device 111 via a bus line 214 configured by an address bus and a data bus. The main controller 110, the payout motor 216, the emission control device 112, and the like are connected to the input / output port 215, respectively. Further, although not shown, the payout control device 111 is connected with a prize ball detection switch for detecting a prize ball paid out. The prize ball detection switch is connected to the payout control device 111 but not connected to the main control device 110.

  The emission control device 112 controls the ball emission unit 112 a so that the ball launch strength according to the amount of rotational operation of the operation handle 51 is obtained when the main controller 110 instructs the ball emission. The ball launch unit 112a includes a launch solenoid and an electromagnet (not shown), and the launch solenoid and the electromagnet are permitted to be driven when predetermined conditions are met. Specifically, the touch sensor 51a detects that the player is touching the operation handle 51, and the operation stop handle 51b for stopping the firing of the ball is off (condition that it is not operated), the operation handle The firing solenoid is excited corresponding to the amount of rotation of 51, and the ball is fired with a strength corresponding to the amount of operation of the operation handle 51.

  The audio lamp control device 113 is an output of sound in an audio output device (speaker etc. not shown) 226, an output of lighting and extinguishing in a lamp display device (such as illumination parts 29 to 33 and a display lamp 34), and a display control device 114. The setting of the display mode of the third symbol display device 81 to be performed is controlled. The MPU 221, which is an arithmetic device, has a ROM 222 storing a control program executed by the MPU 221, fixed value data, and the like, and a RAM 223 used as a work memory or the like.

  An input / output port 225 is connected to the MPU 221 of the audio lamp control device 113 via a bus line 224 configured by an address bus and a data bus. The main control unit 110, the display control unit 114, the audio output unit 226, the lamp display unit 227, etc. are connected to the input / output port 225, respectively.

  The display control device 114 controls the variable display of the third symbol in the third symbol display device (LCD) 81. The display control device 114 includes an MPU 231, a ROM (program ROM) 232, a work RAM 233, a video RAM 234, a character ROM 235, an image controller 236, an input port 237, an output port 238, and bus lines 239 and 240. have. The output side of the audio lamp control device 113 is connected to the input side of the input port 237, and the MPU 231, the ROM 232, the work RAM 233, and the image controller 236 are connected to the output side of the input port 237. A video RAM 234 and a character ROM 235 are connected to the image controller 236, and an output port 238 is connected via a bus line 240. The third symbol display device 81 is connected to the output side of the output port 238. In addition, even if the pachinko machine 10 is another model in which the jackpot lottery probability and the number of prize balls to be paid out in one jackpot are different models, the model of the specification with exactly the same symbol configuration displayed on the third symbol display device 81 Since the display control device 114 is a common part, cost reduction is achieved.

  The MPU 231 of the display control device 114 controls the display content of the third symbol display device 81 based on the symbol display command input from the audio lamp control device 113. The ROM 232 is a memory for storing various control programs executed by the MPU 231 and fixed value data. The work RAM 233 is a memory for temporarily storing work data and flags used when the MPU 231 executes various programs. The character ROM 235 is a memory storing data for effect such as a symbol (a background symbol or a third symbol) displayed on the third symbol display device 81. The video RAM 234 is a memory for storing effect data to be displayed on the third symbol display device 81, and the display content of the third symbol display device 81 is changed by rewriting the content of the video RAM 234.

  The image controller 236 adjusts the timing of each of the MPU 231, the video RAM 234, and the output port 238 to intervene reading and writing of data, and reads the display data stored in the video RAM 234 at a predetermined timing to display the third symbol display device 81. It is displayed on the

  The power supply unit 115 includes a power supply unit 251 for supplying power to each part of the pachinko machine 10, a power failure monitoring circuit 252 for monitoring power interruption due to a power failure, and a RAM provided with a RAM erase switch 122 (see FIG. 3). And an erase switch circuit 253. The power supply unit 251 is a device that supplies necessary operating voltages to the control devices 110 to 114 and the like through a power supply path (not shown). As a summary, the power supply unit 251 takes in a voltage of 24 volts AC supplied from the outside, 12 volts voltage for driving various switches such as various switches 208, solenoids such as solenoid 209, motor, etc. A voltage of 5 volts for logic, a backup voltage for RAM backup, and the like are generated, and these 12 volts, 5 volts and a backup voltage are supplied to the respective control devices 110 to 114 and the like.

  The power failure monitoring circuit 252 is a circuit for outputting the power failure signal SG1 to each NMI terminal of the MPU 201 of the main control device 110 and the MPU 211 of the payout control device 111 when the power is shut off due to the occurrence of a power failure or the like. The power failure monitoring circuit 252 monitors the voltage of the stable DC voltage of 24 volts, which is the maximum voltage output from the power supply unit 251, and determines that a power failure (power loss, power loss) occurs when this voltage becomes less than 22 volts. Then, the blackout signal SG1 is outputted to the main control unit 110 and the payout control unit 111. By the output of the power failure signal SG1, the main controller 110 and the payout control device 111 recognize the occurrence of the power failure, and execute the NMI interrupt process. The power supply unit 251 outputs a 5-volt voltage, which is a driving voltage of the control system, for a time sufficient for execution of the NMI interrupt processing even after the voltage of the DC stable 24 volts becomes less than 22 volts. Is configured to maintain a normal value. Therefore, the main control unit 110 and the payout control unit 111 can execute and complete the NMI interrupt processing (see FIG. 17) normally.

  The RAM erase switch circuit 253 is a circuit for outputting a RAM erase signal SG2 for clearing the backup data to the main control unit 110 when the RAM erase switch 122 is pressed. The main control device 110 and the payout control device 111 clear the backup data and clear the backup data in the payout control device 111 when the RAM erase signal SG2 is input when the pachinko machine 10 is powered on. A payout initialization command is sent to the payout control device 111.

  Next, referring to FIG. 7, the frame open detection circuit 260 and the external output terminal plate 261 will be described. FIG. 7 is a block diagram showing an electrical configuration of the frame open detection circuit 260 and the external output terminal plate 261. As shown in FIG. In FIG. 7, the frame open detection circuit 260 will be described first, and then the external output terminal plate 261 will be described.

  A frame open detection circuit 260 for detecting the open of the inner frame 12 or the open of the front frame 14 includes a DC power supply DC1 for supplying a DC voltage of 12 volts, a diode D1, capacitors CD1 to CD5, and resistors R1 to R4. It mainly includes a timer IC1 (LMC 555 manufactured by National Semiconductor Company), which is a C-MOS timer, and a transistor TR1 provided with an internal resistor R5 and an internal resistor R6.

  In order to detect the opening of the inner frame 12 by conducting the switch SW1 and to detect the opening of the front frame 14 by conducting the switch SW2, the above-mentioned parts of the frame open detection circuit 260 are shown in FIG. Connected according to the block diagram. Since the switch SW1 and the switch SW2 are connected in parallel and connected to the frame open detection circuit 260, the frame open detection circuit 260 detects the inner frame 12 or the front frame if either switch is conductive. The release of 14 can be detected.

  The DC power supply DC1 is a power supply that supplies a DC voltage of 12 volts to the frame open detection circuit 260 and the external output terminal plate 261. Power (power supply) to the DC power supply DC1 is supplied from a power supply unit 251 provided in the power supply device 115 through a power supply path (not shown). The DC power source DC1 is connected to the anode terminal of the diode D1. The cathode terminal of the diode D1 is connected to one end of a 0.1 F (farad) capacitor CD1. The other end of the capacitor CD1 is grounded. Further, one end of the capacitor CD1 is connected to one end of the switch SW1, one end of the switch SW2, and the VDD terminal and the RES terminal of the timer IC1.

  Capacitor CD1 is charged to supply DC voltage to frame open detection circuit 260 and external output terminal plate 261 when power supply to pachinko machine 10 is shut off and DC voltage of 12 volts is not supplied from DC power supply DC1. It is a part that demonstrates the function of a battery.

  This is because when the capacitor CD1 is supplied with power to the pachinko machine 10 and a DC voltage of 12 volts is supplied from the DC power supply DC1, the capacitor 0.1F (farad) of the capacitor CD1 and the capacitor CD1 are used. The charge is stored as a product of the applied DC voltage (about 11.3 volts minus 12 volts supplied from the DC power source DC1 minus about 0.7 volts at the diode D1).

  On the other hand, for example, the capacitor CD1 is stored in the capacitor CD1 when the operation time of the game arcade is ended and the power supply to the pachinko machine 10 is cut off and the DC voltage of 12 volts is not supplied from the DC power supply DC1. A DC voltage (about 11.3 volts) based on the stored charge is supplied to the frame open detection circuit 260 and the external output terminal plate 261.

  Therefore, the frame open detection circuit 260 naturally operates when power is supplied to the pachinko machine 10 and a DC voltage of 12 volts is supplied from the DC power supply DC1, and further, for example, sales of a game arcade Even when the power supply to the pachinko machine 10 is cut off and power supply to the pachinko machine 10 is cut off and the DC voltage of 12 volts is not supplied from the DC power supply DC1, it operates by the DC voltage supplied by the capacitor CD1, The opening of the frame 12 and the opening of the front frame 14 can be detected. In the present embodiment, the capacitor CD1 is used as a component for supplying a DC voltage to the frame open detection circuit 260 and the external output terminal plate 261 when a DC voltage of 12 volts is not supplied from the DC power supply DC1. . However, the present invention is not limited to this, and the capacitor CD1 may be a secondary battery (rechargeable battery) with a higher storage capacity or a primary battery that does not need to be charged.

  Further, the cathode terminal of the diode D1 is connected to one end of the capacitor CD1, and since the diode D1 functions to prevent the backflow of current, DC to the frame open detection circuit 260 and the external output terminal plate 261 from the capacitor CD1. Even when a voltage (about 11.3 volts) is supplied, the DC voltage is not applied to the DC power supply DC1, and the DC power supply DC1 is not damaged.

  The timer IC1 is a C-MOS timer and detects the opening of the inner frame 12 or the opening of the front frame 14 by connection of the 100 kΩ resistors R1 to R2 and the 0.1 μF capacitors CD3 to CD5, and the external output terminal It functions as a circuit for energizing the photocoupler PR1 of the plate 261 for about 10 ms.

  The operating voltage range of this timer IC 1 is the MPU 201 mounted on the main control unit 110, the MPU 211 mounted on the payout control unit 111, the MPU 221 mounted on the audio lamp control unit 113, and the MPU 231 mounted on the display control unit 114. It is set wider than each operating voltage range. Specifically, while the operating voltage range of timer IC 1 is about 1.5 volts to about 12.0 volts, each operating voltage range of MPUs 201, 211, 221 and 231 is about 4.5 volts It is about 5.5 volts (note that each operating voltage in this embodiment is about 5.0 volts). Therefore, the timer IC 1 can operate at a voltage lower than the respective operating voltages of the MPUs 201, 211, 221 and 231. Accordingly, even if the charge stored in the capacitor CD1 is reduced and the voltage supplied by the capacitor CD1 drops below about 4.5 volts, the timer IC1 can operate sufficiently. Further, for example, when the operating time of the game arcade is ended and the power supply to the pachinko machine 10 is cut off and the DC voltage of 12 volts is not supplied from the DC power supply DC1, that is, DC Power is supplied to the pachinko machine 10 when a voltage is supplied, and a DC voltage of 12 volts is supplied from a DC power supply DC1. Therefore, naturally, the timer IC 1 can operate at a DC voltage of 12 volts or less supplied to the frame open detection circuit 260 when power is supplied to the pachinko machine 10. Furthermore, since the timer IC1 is a timer composed of a C-MOS semiconductor, power consumption during operation can be suppressed, and a long operation can be performed.

  The VDD terminal of the timer IC1 is a terminal for inputting the DC voltage supplied to the timer IC1, and is connected to one end of the capacitor CD1. The VDD terminal of the timer IC1 is connected to one end of a 0.1 μF capacitor CD4, and the other end of the capacitor CD4 is connected to the GND terminal of the timer IC1 which is grounded. The capacitor CD4 reduces noise generated on the VDD terminal of the timer IC1 when the switch SW1 and the switch SW2 are turned on or off (when the inner frame 12 and the front frame 14 are opened or closed). .

  The RES terminal of the timer IC1 is a terminal for operating a reset function for forcibly setting the voltage output from the OUT terminal to the output stop state (zero volt) when the pulse signal is input to the RES terminal. However, in the present frame open detection circuit 260, since this reset function is not used, the RES terminal of the timer IC1 is connected to one end of the capacitor CD1 so that the reset function does not operate. Since the VDD terminal of timer IC1 and the RES terminal of timer IC1 are connected to one end of capacitor CD1 as described above, a DC voltage of about 11.3 volts is applied to the VDD terminal and RES terminal of timer IC1. Applied.

  When the switch SW1 and the switch SW2 are shut off (when the inner frame 12 and the front frame 14 are closed), the TRG terminal of the timer IC1 outputs approximately the voltage output from the OUT terminal of the timer IC1. When the voltage is set to 10.6 volts and either switch SW1 or switch SW2, or both switch SW1 and switch SW2 are turned on (either inner frame 12 or front frame 14; Or when both the inner frame 12 and the front frame 14 are in an open state), a terminal for setting the voltage output from the OUT terminal of the timer IC 1 to about 10.6 volts to zero volts in about 10 ms. . The TRG terminal of the timer IC1 is connected to one end of the resistor R2, one end of the capacitor CD5, the other end of the switch SW1, the other end of the switch SW2, one end of the resistor R1, and one end of the resistor R7 of the external output terminal plate 261. The other end of the resistor R2 and the other end of the capacitor CD5 are grounded.

  The resistor R2 connected to the TRG terminal of the timer IC1 is a timer when the inner frame 12 and the front frame 14 are in the open state and the switch SW1 and the switch SW2 are in the conductive state (see FIG. 5B). It is a resistor for applying a DC voltage (about 11.3 volts) to the TRG terminal of IC1. Further, the capacitor CD5 is a capacitor for reducing noise generated in the resistor R2 when the switch SW1 and the switch SW2 are turned on or off (when the inner frame 12 and the front frame 14 are opened or closed). It is.

  According to the above connection, when the switch SW1 and the switch SW2 are in the cut off state (when the inner frame 12 and the front frame 14 are in the closed state), no voltage is supplied to the resistor R2 and the capacitor CD5. The applied voltage (voltage applied to the TRG terminal of the timer IC1) is zero volts. At this time, the voltage output from the OUT terminal of the timer IC1 is approximately 10.6 volts.

  On the other hand, when either switch SW1 or switch SW2 or both switch SW1 and switch SW2 are in a conducting state (either inner frame 12 or front frame 14 or both inner frame 12 and front frame 14 When in the open state, voltage is supplied to the resistor R2 and the capacitor CD5, so the voltage applied to the resistor R2 and the capacitor CD5 (voltage applied to the TRG terminal of the timer IC1) is at one end of the capacitor CD1. It will be about 11.3 volts, the same as the applied voltage. At this time, the voltage output from the OUT terminal of the timer IC1 is about 10.6 volts for about 10 ms after either the switch SW1 or the switch SW2 or both the switch SW1 and the switch SW2 become conductive. And then zero volts.

  Thus, the voltage applied to the TRG terminal of the timer IC1 can set the voltage output from the OUT terminal of the timer IC1 to either approximately 10.6 volts or zero volts. The voltage applied to the TRG terminal of the timer IC1 (voltage applied to the resistor R2) becomes zero volts to about 11.3 volts when the switch SW1 or the switch SW2 becomes conductive (the inner frame 12 or the front frame 14 is opened). As described above, the voltage of about 10.6 volts output from the OUT terminal of the timer IC1 falls to zero volts, about 10 ms later than the rise of the voltage. The time difference between the rise of the voltage applied to the TRG terminal of the timer IC1 (voltage applied to the resistor R2) and the fall of the voltage output from the OUT terminal of the timer IC1 will be described later in detail. By approximately 10 ms, current is supplied to one end of the resistor R7 of the external output terminal plate 261 for approximately 10 ms, and the photocoupler PR1 of the external output terminal plate 261 is energized for approximately 10 ms.

  When the switch SW1 and the switch SW2 are shut off (the inner frame 12 and the front frame 14 are closed) and the voltage applied to the TRG terminal of the timer IC1 becomes zero volts, the voltage of about 10.6 volts is output to the OUT terminal of the timer IC1. While the switch SW1 or the switch SW2 is turned on (the inner frame 12 or the front frame 14 is opened), and the voltage applied to the TRG terminal of the timer IC1 rises to about 11.3 volts. It is a terminal that sets a voltage of about 10.6 volts being output to zero volts with a delay of about 10 ms. The OUT terminal is connected to one end of a 10 kΩ resistor R3. The other end of the resistor R3 is connected to one end of a capacitor CD2 and one end of a 10 kΩ resistor R4, and the other end of the capacitor CD2 and the other end of the resistor R4 are grounded.

  The resistors R3 and R4 are voltage dividing resistors for dividing the voltage output from the OUT terminal of the timer IC1. Therefore, the voltage output from the OUT terminal of the timer IC1 is divided into the resistor R3 and the resistor R4 according to the ratio of the resistance value of the resistor R3 to the resistance value of the resistor R4. Since both the resistors R3 and R4 are 10 kΩ, the voltage of about 10.6 volts output from the OUT terminal of the timer IC1 is divided by the resistors R3 and R4 to a maximum value of about 5.3 volts each. Be pressed.

  A 10 μF capacitor CD2 connected in parallel to the resistor R4 is a capacitor for stabilizing the voltage applied to the resistor R4. One end of the capacitor CD2 is connected to one end of the resistor R4, and the other end of the capacitor CD2 is connected to the other end of the resistor R4 and is grounded. By stabilizing the voltage applied to the resistor R4 with the capacitor CD2, the bias voltage applied between the base terminal b of the transistor TR1 and the emitter terminal e of the transistor TR1 is stabilized, and the voltage of the transistor TR1 is reduced. The operation can be stabilized.

  The transistor TR1 is a switching element that switches between the terminal of the collector terminal c of the transistor TR1 and the terminal of the emitter terminal e of the transistor TR1 to either conduction or cutoff based on the voltage applied to the resistor R4. The transistor TR1 is provided with an internal resistor R5 of 10 kΩ. One end of the resistor R4 is connected to one end of the internal resistor R5, and a base terminal b is connected to the other end of the internal resistor R5. The transistor TR1 is provided with an internal resistor R6 of 10 kΩ. The other end of the internal resistance R5 is connected to one end of the internal resistance R6, and the emitter terminal e is connected to the other end of the internal resistance R6.

  Therefore, when a voltage of about 10.6 volts is output from the OUT terminal of timer IC 1 (when inner frame 12 and front frame 14 are closed, and inner frame 12 or front frame 14 is opened) Voltage is divided by the resistors R3 and R4 and the voltage applied to the resistor R4 (about 5.3 volts) is equal to one end of the internal resistor R5 of the transistor TR1. It is applied between it and the emitter terminal e of the transistor TR1. As a result, the terminals of the collector terminal c of the transistor TR1 and the emitter terminal e of the transistor TR1 are conducted. At this time, if switch SW1 or switch SW2 is in a conductive state (inner frame 12 or front frame 14 is open), the voltage of about 10.6 volts output from the OUT terminal of timer IC1 is switched to zero volts. That is, a current is supplied to one end of the resistor R7 of the external output terminal plate 261 for about 10 ms after the inner frame 12 or the front frame 14 is opened. If current is supplied to one end of the resistor R7, the photocoupler PR1 of the external output terminal plate 261 can be energized for about 10 ms, and a pulse signal with a pulse width of about 10 ms can be output to the hall computer 262. However, when the inner frame 12 and the front frame 14 are closed and the switch SW1 and the switch SW2 are cut off, the connection between one end of the capacitor CD1 and the resistor R7 provided on the external output terminal plate 261 is cut off. Therefore, no current is supplied to one end of the resistor R7 of the external output terminal plate 261. Therefore, the photocoupler PR1 of the external output terminal plate 261 is not energized, and a pulse signal is not output to the hall computer 262.

  On the other hand, when the voltage at the OUT terminal of the timer IC1 is zero volts (about 10 ms after the inner frame 12 or the front frame 14 is opened), no voltage is applied to the resistor R4, so the internal resistor R5 of the transistor TR1 is Also, no voltage is applied between one end of the transistor TR1 and the emitter terminal e of the transistor TR1. As a result, the terminals of the collector terminal c of the transistor TR1 and the emitter terminal e of the transistor TR1 are cut off. Therefore, even if the switch SW1 or the switch SW2 is in the conductive state (the inner frame 12 or the front frame 14 is in the open state), the current is not supplied to one end of the resistor R7 of the external output terminal plate 261. Therefore, the photocoupler PR1 of the external output terminal plate 261 is not energized, and a pulse signal is not output to the hall computer 262.

  Thus, when the inner frame 12 or the front frame 14 is in the open state, the photocoupler PR1 of the external output terminal plate 261 can be energized for only about 10 ms. Therefore, when the inner frame 12 or the front frame 14 is in the open state, it is possible to output a pulse signal having a pulse width of about 10 ms from the external output terminal plate 261 to the hall computer 262.

  The TH terminal of the timer IC1 is a terminal for measuring the voltage applied to the TH terminal, and is connected to the other end of the resistor R1, one end of the capacitor CD3, and the DCH terminal of the timer IC1. The voltage applied to the TH terminal of timer IC1 is 2/3 the voltage (about 7.5 volts) of the DC voltage (about 11.3 volts) input to the VDD terminal of timer IC1. In this case, the impedance of the DCH terminal is switched from an infinite state to a zero state. When the impedance of the DCH terminal becomes zero (ground state), a voltage can not be applied to the capacitor CD3. On the other hand, when the impedance of the DCH terminal becomes infinite, a voltage can be applied to the capacitor CD3.

  Resistor R1 and capacitor CD3 connected to the TH terminal of timer IC1 and the DCH terminal of timer IC1 open inner frame 12 or front frame 14 based on the time constant which is the product of the resistance value of resistor R1 and capacitor CD3. In this case, it is a component for determining a period until switching the voltage of about 10.6 volts output from the OUT terminal of the timer IC1 to zero volts to about 10 ms. One end of the resistor R1 is connected to the other end of the switch SW1, the other end of the switch SW2, and one end of the resistor R7 of the external output terminal plate 261. The other end of the resistor R1 is connected to the TH terminal of the timer IC1, the DCH terminal of the timer IC1, and one end of the capacitor CD3. The other end of the capacitor CD3 is grounded.

  Here, the resistor R1 and the capacitor CD3 will be described together with the TRG terminal of the timer IC1, the TH terminal of the timer IC1, the DCH terminal of the timer IC1, and the OUT terminal of the timer IC1.

  When the inner frame 12 and the front frame 14 are closed (when the switches SW1 and SW2 are off), no voltage is supplied to the resistor R1, so the voltage applied to the TH terminal of the timer IC1 is zero volts (approximately 7.5 volts). And the DCH terminal of the timer IC1 is set to an infinite impedance state. Therefore, a voltage can be applied to the capacitor CD3, and the capacitor CD3 is in a chargeable state (a state in which charge can be stored). However, when the switch SW1 and the switch SW2 are cut off, since the connection between one end of the capacitor CD1 and the resistor R1 is cut off, no voltage is applied to the capacitor CD3 and the voltage applied to the capacitor CD3 is zero volts. It becomes. As described above, although the capacitor CD3 is in the chargeable state, the charge is not performed. At this time, the voltage at the OUT terminal of the timer IC1 is about 10.6 volts, and the collector terminal c and the emitter terminal e of the transistor TR1 are conductive. However, since the switch SW1 and the switch SW2 are in the cutoff state, no current is supplied to one end of the resistor R7 of the external output terminal plate 261. Therefore, the photocoupler PR1 of the external output terminal plate 261 is not energized, and no pulse signal is output from the external output terminal plate 261 to the hall computer 262.

  Next, when the inner frame 12 or the front frame 14 is opened (see FIG. 5B) and the switch SW1 or switch SW2 is turned on, the voltage applied to the TRG terminal of the timer IC1 (resistance R7) The applied voltage switches from zero volts to about 11.3 volts. At this time, the voltage at the OUT terminal of the timer IC1 is about 10.6 volts, and the collector terminal c and the emitter terminal e of the transistor TR1 are conductive. Therefore, current supply to one end of the resistor R7 is started, and the photocoupler PR1 of the external output terminal plate 261 is energized. Thus, the signal output to the hall computer 262 is started.

  At the same time as the voltage applied to the TRG terminal of the timer IC1 (voltage applied to the resistor R7) switches from zero volts to about 11.3 volts, a voltage is applied to the capacitor CD3 to charge the capacitor CD3. It is started. At this time, the voltage applied to the TH terminal of the timer IC1 starts to rise.

  The voltage at the OUT terminal of the timer IC1 is 2 / (the voltage applied to the TH terminal of the timer IC1 (the voltage applied to the capacitor CD3) is 2 / the voltage (approximately 11.3 volts) input to the VDD terminal of the timer IC1. Continue to hold approximately 10.6 volts until it is equal to a voltage of 3 or approximately 7.5 volts. When the voltage applied to the TH terminal of the timer IC1 (voltage applied to the capacitor CD2) rises and becomes equal to about 7.5 volts, the impedance of the DCH terminal of the timer IC1 changes from an infinite state to a zero state (ground Switch to the Then, the voltage applied to the capacitor CD3 becomes zero volts, and the charge stored in the capacitor CD3 is discharged. As a result, the voltage applied to the TH terminal of the timer IC1 switches from about 7.5 volts to zero volts. By switching the voltage applied to the TH terminal of the timer IC1, the voltage at the OUT terminal of the timer IC1 switches from about 10.6 volts to zero volts. Then, the conduction between the collector terminal c and the emitter terminal e of the transistor TR1 is cut off, and the current supply to one end of the resistor R7 is stopped. As a result, the energization of the photocoupler PR1 of the external output terminal plate 261 is stopped, and the output of the signal to the hall computer 262 is stopped.

  Thus, when the inner frame 12 or the front frame 14 is in the open state and the switch SW1 or the switch SW2 is in the conductive state (see FIG. 5B), the signal is output from the OUT terminal of the timer IC1. The period until the voltage of about 10.6 volts is switched to zero volts, that is, the period until the voltage applied to the TH terminal of timer IC1 (voltage applied to capacitor CD3) changes from zero volts to about 7.5 volts The time is determined to be about 10 ms based on the time constant which is the product of the resistance value of the resistor R1 and the capacitance of the capacitor CD3. Then, when the inner frame 12 or the front frame 14 is in the open state, the supply of current to one end of the resistor R7 of the photocoupler PR1 of the external output terminal plate 261 is started. Then, about 10 ms after the start of supply of current to one end of the resistor R7, the voltage of about 10.6 volts output from the OUT terminal of the timer IC1 switches to zero volts, and the collector terminal c and the emitter terminal of the transistor TR1 The conduction with e is interrupted and the current supply to one end of the resistor R7 is stopped. Thus, when the inner frame 12 or the front frame 14 is in the open state, current is supplied to one end of the resistor R7 of the external output terminal plate 261 for about 10 ms, and the photocoupler PR1 of the external output terminal plate 261 is about 10 ms. It can be energized only during the Therefore, when the inner frame 12 or the front frame 14 is in the open state, it is possible to output a pulse signal having a pulse width of about 10 ms from the external output terminal plate 261 to the hall computer 262.

  When the inner frame 12 and the front frame 14 change from the open state to the closed state (the switch SW1 and the switch SW2 change from the conductive state to the cut off state), that is, the voltage applied to the TRG terminal of the timer IC1 (applied to the resistor R7) When the voltage (V) switches from about 11.3 volts to zero volts, the voltage at the OUT terminal of the timer IC1 switches from zero volts to about 10.6 volts. In this state, as described above, the collector terminal c and the emitter terminal e of the transistor TR1 are conductive, but since the switch SW1 and the switch SW2 are in the cut off state, one end of the resistor R7 of the external output terminal plate 261 is No current is supplied. Therefore, the photocoupler PR1 of the external output terminal plate 261 is not energized, and a pulse signal is not output from the external output terminal plate 261 to the hall computer 262.

  As described above, when the inner frame 12 or the front frame 14 is in the open state, one end of the resistor R7 of the external output terminal plate 261 is based on the time constant which is the product of the resistance value of the resistor R1 and the capacitor CD3. The current is supplied for about 10 ms, and the photocoupler PR1 of the external output terminal plate 261 can be energized for about 10 ms. As a result, when the inner frame 12 or the front frame 14 is in the open state, it is possible to output a pulse signal with a pulse width of about 10 ms from the external output terminal plate 261 to the hall computer 262.

  It returns to the explanation of FIG. The CNT terminal of the timer IC1 is a terminal that adjusts the output period of the voltage output from the OUT terminal of the timer IC1 by the signal input to the CNT terminal. However, this frame open detection circuit 260 does not adjust the output period of the voltage output from the OUT terminal of the timer IC1 (the output period of the voltage output from the OUT terminal of the timer IC1 is fixed to 10 ms). The CNT terminal is not connected to any part of the frame open detection circuit 260 and the external output terminal plate 261 and is open.

  As described above, when the inner frame 12 or the front frame 14 is in the open state and the switch SW1 or the switch SW2 is in the conductive state (see FIG. 5B), the frame open detection circuit 260 detects the external output terminal plate 261. Start supplying current to one end of the resistor R7 of On the other hand, when about 10 ms elapses after the inner frame 12 or the front frame 14 is opened, the frame open detection circuit 260 cuts off the conduction between the collector terminal c of the transistor TR1 and the emitter terminal e of the transistor TR1. Switching to the state, the current supply to one end of the resistor R7 of the external output terminal plate 261 is stopped. As a result, the photocoupler PR1 of the external output terminal plate 261 is energized for about 10 ms, and a pulse signal with a pulse width of about 10 ms is output from the external output terminal plate 261 to the hall computer 262.

  Although the door open detection circuit 260 detects the open of the inner frame 12 or the open of the front frame 14 by using the LMC 555 in the timer IC1, the circuit for energizing the photocoupler PR1 for about 10 ms is realized. It is not limited. That is, a circuit that generates a pulse signal for one opening of the inner frame 12 or one opening of the front frame 14 is realized using another integrated circuit or the like for the timer IC 1, part 1 It is sufficient if the photocoupler PR1 is energized for a predetermined period based on the pulse signal.

  Next, the external output terminal plate 261 connected to the frame open detection circuit 260 and connected to the hall computer 262 will be described. The external output terminal plate 261 has a function of outputting a pulse signal with a pulse width of about 10 ms to the hole computer 262, and is mainly configured of a 1 kΩ resistor R7 and a photocoupler PR1.

  The resistor R7 is a resistor for limiting the current supplied to the photocoupler PR1, and one end of the resistor R7 is connected to one end of the resistor R1 of the frame open detection circuit 260, the other end of the switch SW1, and the other end of the switch SW2. The other end of the resistor R7 is connected to the primary side of the photocoupler PR1 (anode terminal of the light emitting diode). The photocoupler PR1 is a current switch including a light emitting diode and a light receiving element (phototransistor) that receives light emitted by the light emitting diode. As described above, the light emitting diode on the primary side of the photocoupler PR1 has an anode terminal connected to one end of the resistor R7, and a cathode terminal connected to the collector terminal c of the transistor TR1 of the frame open detection circuit 260. A light receiving element (phototransistor) on the secondary side of the photocoupler PR1 is connected to the hole computer 262.

  Thus, for about 10 ms after the inner frame 12 or the front frame 14 is in the open state (the switch SW1 or the switch SW2 is in the conductive state), the terminal between the collector terminal c of the transistor TR1 and the emitter terminal e of the transistor TR1 is conductive Then, the light emitting diode on the primary side of the photocoupler PR1 is supplied with current through the resistor R7, and the light emitting diode emits light for about 10 ms. Then, the light receiving element (phototransistor) on the secondary side of the photocoupler PR1 receives the emitted light, converts the received light of about 10 ms into a pulse signal (electric signal) having a pulse width of about 10 ms, and The pulse signal is output to the hall computer 262. The hole computer 262 can store the pulse signal output from the light receiving element (phototransistor) on the secondary side of the photocoupler PR1. Thus, the hole computer 262 can store the fact that the inner frame 12 has been opened or the front frame 14 has been opened.

  On the other hand, when the inner frame 12 and the front frame 14 are closed (when the switch SW1 and the switch SW2 are shut off), no voltage is supplied to one end of the resistor R7, so the light emitting diode is the primary side of the photocoupler PR1. No current is supplied to the Therefore, no pulse signal is output from the light receiving element (phototransistor) on the secondary side of the photocoupler PR1 to the hole computer 262.

  Here, an advantage of using the photocoupler PR1 for the external output terminal plate 261 for outputting a pulse signal to the hall computer 262 will be described. The photocoupler PR1 converts the current supplied to the light emitting diode on the primary side into light, causes the light receiving element (phototransistor) on the secondary side to receive the light, and outputs a pulse signal (electric signal) (light emission A configuration in which a signal is transmitted in one direction from the diode to the light receiving element). Therefore, an electrical signal such as a pulse signal can not be transmitted from the light receiving element (phototransistor) on the secondary side to the light emitting diode on the primary side. As a result, the frame open detection circuit 260 is connected to the light emitting diode on the primary side of the photocoupler PR1, and the hole computer 262 is connected to the light receiving element (phototransistor) on the secondary side of the photocoupler PR1. Can not be transmitted to the main controller 110 or the like provided with the frame opening detection circuit 260 or the frame opening detection circuit 260. Therefore, by using the photocoupler PR1, while the transmission of an electrical signal such as an incorrect pulse signal from the hole computer 262 to the frame open detection circuit 260 or the main controller 110 etc. is prevented, the hole computer from the external output terminal plate 261 is used. 262 has the advantage of being able to transmit pulse signals.

  Furthermore, in the photocoupler PR1, the light emitting diode on the primary side and the light receiving element (phototransistor) on the secondary side are electrically isolated. Therefore, for example, even if the current supplied to the light emitting diode of the photocoupler PR1 includes electrical noise, the electrical noise is not transmitted to the phototransistor on the secondary side. Therefore, the use of the photocoupler PR1 has the advantage that the external output terminal plate 261 can output an accurate pulse signal to the hall computer 262.

  As described above, since the frame open detection circuit 260 is provided with the 0.1 F capacitor CD1, the frame open detection circuit 260 is supplied with power to the pachinko machine 10, and the DC power supply DC1 to 12 volts is used. When the DC voltage is supplied, it operates naturally, and further, for example, the operating time of the game arcade is finished, the power supply to the pachinko machine 10 is cut off, and the DC power source DC1 supplies a DC voltage of 12 volts from DC1. Even if not, the opening of the inner frame 12 and the opening of the front frame 14 can be detected. Then, when the opening of the inner frame 12 or the opening of the front frame 14 is detected by the frame open detection circuit 260, a pulse signal having a pulse width of about 10 ms can be output from the external output terminal plate 261 to the hall computer 262. The pulse signal output from the external output terminal plate 261 to the hall computer 262 is stored in the hall computer 262 which continues operating for 24 hours.

  Here, in general, the game arcade has a security contract with a private security company, and when there is an intruder to the game arcade, a security guard of the security company rushes to the game arcade. However, since cheating is conducted in a short time, in most cases when the security guard comes in, the intruder has already escaped from the game arcade, and it is impossible to determine which pachinko machine 10 cheating has taken place. There was a problem of that. Pachinko machine 10 for which cheating has been made must be restored to its normal state, but if it is not known which pachinko machine 10 cheating has been done, inner frame 12 and front frame 14 of all pachinko machines 10 It must be opened and inspected one by one, and performing this work in a game arcade where a large number of pachinko machines 10 are installed has been a considerable labor.

  However, according to the pachinko machine 10 of the present embodiment, when the opening of the inner frame 12 or the opening of the front frame 14 is detected by the frame opening detection circuit 260, the pulse width of about 63 seconds from the external output terminal plate 261 to the hole computer 262. Output a pulse signal of 10 ms. Then, the output pulse signal is stored in the hall computer 262. Therefore, by the pulse signal stored in the hall computer 262, it is possible to specify the pachinko machine 10 in which the inner frame 12 or the front frame 14 has been opened. Furthermore, the open time of the inner frame 12 of the specified pachinko machine 10 or the open time of the specified pachinko machine 10 is stored by storing the output time of the output pulse signal together with the output of the pulse signal from the external output terminal plate 261 to the hall computer 262. The opening time of the front frame 14 can be detected.

  For example, when the operating time of the game arcade is over and power supply to pachinko machine 10 is cut off and DC voltage is supplied from capacitor CD1 to frame open detection circuit 260 and external output terminal board 261, When the total supply period of the current from the capacitor CD1 to the photocoupler PR1 along with the opening of the frame 12 or the front frame 14 is extended or the number of times of detection of the opening of the inner frame 12 or the front frame 14 is increased The capacity of the CD1 may be increased (for example, the capacity of the capacitor CD1 may be 1 F) or the capacitor CD1 may be changed to a secondary battery with a large storage capacity.

  Next, referring to FIG. 8, the TRG terminal voltage (external output terminal plate) of timer IC1 changes according to the state of switch SW1 (the state of inner frame 12) and the state of switch SW2 (the state of front frame 14). The relationship between the voltage applied to one end of the resistor R7 261, the OUT terminal voltage of the timer IC1, and the output of the external output terminal plate 261 (input of the hall computer 262) will be described. 8 shows the state of the switch SW1 (the state of the inner frame 12), the state of the switch SW2 (the state of the front frame 14), the voltage at the TRG terminal of the timer IC1 (the voltage applied to one end of the resistor R7 of the external output terminal plate 261) ), A timing chart showing the relationship between the OUT terminal voltage of the timer IC1 and the output of the external output terminal plate 261 (input of the hall computer 262).

  As shown in FIG. 8A, when the switch SW1 becomes conductive (the inner frame 12 is opened) at t1, as shown in FIG. 8C, the TRG terminal voltage of the timer IC1 (external output terminal plate The voltage applied to one end of the resistor R7 of 261 switches from zero volt to about 11.3 volts at t1. At this time, as shown in FIG. 8D, the timer IC1 continues to output a voltage of about 10.6 volts from the OUT terminal until about 10 ms elapses from t1. Thereby, current supply is started (at t1) to the light emitting diode on the primary side of the photocoupler PR1 of the external output terminal plate 261 (see FIG. 7). Then, as shown in FIG. 8E, the output of the light receiving element (phototransistor) on the secondary side of the photocoupler PR1, that is, the output of the external output terminal plate 261 is cut from the low state to the high state at t1. It changes. As a result, output of a pulse signal indicating opening of the inner frame 12 or the front frame 14 to the hole computer 262 is started.

  Then, when about 10 ms elapses from t1, as shown in FIG. 8D, the timer IC1 switches the voltage of the OUT terminal from about 10.6 volts to zero volts. Then, the current supply to one end of the resistor R7 of the external output terminal plate 261 is stopped. Therefore, the output of the external output terminal plate 261 switches from the high state to the low state when 10 ms elapses from t1. Thus, by switching the output of the external output terminal plate 261, the pulse width of the pulse signal output from the external output terminal plate 261 to the hall computer 262 can be limited to about 10 ms.

  As shown in FIG. 8A, when the switch SW1 is in the cut off state (the inner frame 12 is in the closed state) at time t2, as shown in FIG. 8C, the TRG terminal voltage of the timer IC1 (external output The voltage applied to one end of the resistor R7 of the terminal plate 261 switches from about 11.3 volts to zero volts, and the OUT terminal voltage of the timer IC1 switches from zero volts to about 10.6 volts (at time t2). As a result, the frame open detection circuit 260 is again set to a state in which the inner frame 12 and the front frame 14 can be detected.

  Next, as shown in FIG. 8A, when the switch SW2 becomes conductive (the front frame 14 is opened) at time t3, as shown in FIG. 8C, the TRG terminal voltage of the timer IC1 (external The voltage applied to one end of the resistor R7 of the output terminal plate 261 switches from zero volt to about 11.3 volts at t3. At this time, as shown in FIG. 8D, the timer IC1 continues to output a voltage of about 10.6 volts from the OUT terminal until about 10 ms elapses from t3. Thereby, current supply is started (at t3) to the light emitting diode on the primary side of the photocoupler PR1 of the external output terminal plate 261 (see FIG. 7). Then, as shown in FIG. 8E, the output of the light receiving element (phototransistor) on the secondary side of the photocoupler PR1, that is, the output of the external output terminal plate 261 is cut from low to high at t3. It changes. As a result, output of a pulse signal indicating opening of the inner frame 12 or the front frame 14 to the hole computer 262 is started.

  Then, when about 10 ms has elapsed from t3 time, as shown in FIG. 8 (d), the timer IC1 switches the voltage of the OUT terminal from about 10.6 volts to zero volts. Then, the current supply to one end of the resistor R7 of the external output terminal plate 261 is stopped. Therefore, the output of the external output terminal plate 261 switches from the high state to the low state when 10 ms elapses from t3. Thus, by switching the output of the external output terminal plate 261, the pulse width of the pulse signal output from the external output terminal plate 261 to the hall computer 262 can be limited to about 10 ms.

  As shown in FIG. 8A, when the switch SW2 is in the closed state (the front frame 14 is closed), as shown in FIG. 8C, the TRG terminal voltage of the timer IC1 (external output terminal plate 261 The voltage applied to one end of the resistor R7 switches from about 11.3 volts to zero volts, and the OUT terminal voltage of the timer IC1 switches from zero volts to about 10.6 volts (at time t4). As a result, the frame open detection circuit 260 is again set to a state in which the inner frame 12 and the front frame 14 can be detected.

  Finally, the case where the switch SW2 is in the conductive state (the front frame 14 is in the open state) when the switch SW1 is in the conductive state (the inner frame 12 is in the open state) will be described. As shown in FIG. 8A, at time t5, the switch SW1 becomes conductive (the inner frame 12 is open), and as shown in FIG. 8B, the switch SW2 is conductive at time t6 (front surface) When the frame 14 is in the open state, as shown in FIG. 8C, the voltage at the TRG terminal of the timer IC1 (voltage applied to one end of the resistor R7 of the external output terminal plate 261) Switch to 11.3 volts. At this time, as shown in FIG. 8D, the timer IC 1 continues to output a voltage of about 10.6 volts from the OUT terminal until about 10 ms elapses from t5. Thereby, current supply is started (at t5) to the light emitting diode on the primary side of the photocoupler PR1 of the external output terminal plate 261 (see FIG. 7). Then, as shown in FIG. 8E, the output of the light receiving element (phototransistor) on the secondary side of the photocoupler PR1, that is, the output of the external output terminal plate 261 is cut from the low state to the high state at t5. It changes. As a result, output of a pulse signal indicating opening of the inner frame 12 or the front frame 14 to the hole computer 262 is started.

  Then, when about 10 ms elapses from t5, as shown in FIG. 8 (d), the timer IC1 switches the voltage of the OUT terminal from about 10.6 volts to zero volts. Then, the current supply to one end of the resistor R7 of the external output terminal plate 261 is stopped. Therefore, the output of the external output terminal plate 261 switches from the high state to the low state when 10 ms elapses from t5. Thus, by switching the output of the external output terminal plate 261, the pulse width of the pulse signal output from the external output terminal plate 261 to the hall computer 262 can be limited to about 10 ms.

  As shown in FIG. 8A, the switch SW1 is in the cut off state (the inner frame 12 is in the closed state) at t7, and the switch SW2 is in the cut off state at t8 as shown in FIG. When the front frame 14 is closed, as shown in FIG. 8C, the TRG terminal voltage of the timer IC1 (voltage applied to one end of the resistor R7 of the external output terminal plate 261) is approximately 11.3 volts. At the same time, the OUT terminal voltage of the timer IC1 switches from zero volt to about 10.6 volt (at t8). As a result, the frame open detection circuit 260 is again set to a state in which the inner frame 12 and the front frame 14 can be detected.

  As described above, even when the switch SW2 is in the conductive state (the front frame 14 is in the open state) when the switch SW1 is in the conductive state (the inner frame 12 is in the open state), the timer IC1 performs the conduction period of the switch SW1. Regardless of the length of the open period of the inner frame 12 and the length of the conductive period of the switch SW2 (the open period of the front frame 14), either one of the switch SW1 or the switch SW2 is in the conductive state When about 10 ms elapses from the time when (one of the inner frame 12 and the front frame 14 is opened), the voltage at the OUT terminal is switched from about 10.6 volts to zero volts. Thus, the supply period of the current supplied to the photocoupler PR1 of the external output terminal plate 261 is approximately 10 ms.

  Therefore, for example, when the operating time of the game arcade is ended and the power supply to the pachinko machine 10 is cut off, and the DC voltage of 12 volts is not supplied from the DC power supply DC1 to the frame open detection circuit 260 and the external output terminal board 261, That is, when the DC voltage of about 11.3 volts is supplied from the capacitor CD1 to the frame open detection circuit 260 and the external output terminal plate 261, the supply period of the current supplied from the capacitor CD1 to the photocoupler PR1 is the inner frame About 12 ms can be held for one opening of the front frame 14. Therefore, the power consumption due to the opening of the inner frame 12 or the front frame 14 can be reduced.

  Here, since the capacity of the capacitor CD1 is 0.1 F and the voltage applied to the capacitor CD1 is about 11.3 volts, the charge stored in the capacitor CD1 is the capacity of the capacitor CD1 and the voltage applied to the capacitor CD1. It becomes approximately 1.13 C (coulomb) from the product of The electric charge of about 1.13 C stored in the capacitor CD1 corresponds to about 500 times of current supply when the supply period of the current supplied from the capacitor CD1 to the photocoupler PR1 is about 10 ms. Do. Therefore, for example, when the operating time of the game arcade is ended and the power supply to the pachinko machine 10 is cut off and the DC voltage of 12 volts is not supplied from the DC power supply DC1, the inner frame 12 is opened (switch SW1 Even when the conduction or the opening of the front frame 14 (the conduction of the switch SW2) is performed many times, the frame opening detection circuit 260 opens the inner frame 12 or opens the front frame 14 (activation of the switch SW1 or The conduction of the switch SW2 can be reliably detected each time up to about 500 times, and a pulse signal can be output from the external output terminal plate 261 to the hall computer 262. At this time, when the opening of the inner frame 12 or the opening of the front frame 14 reaches about 500 times, the charge stored in the capacitor CD1 decreases and the value of the current supplied from the capacitor CD1 to the photocoupler PR1 decreases. The pulse signal can be stored in the hole computer 262 by increasing the detection sensitivity of the pulse signal of the computer 262 (by lowering the threshold for the amplitude of the pulse signal).

  In the present embodiment, when the inner frame 12 or the front frame 14 is opened and the switch SW1 or the switch SW2 is conductive, a pulse signal is output from the external output terminal plate 261 to the hall computer 262, It is not limited to this. That is, when the connection of each part of the main frame opening detection circuit 260 is changed, the inner frame 12 or the front frame 14 is opened, and the opened inner frame 12 or the front frame 14 is closed, A current may be supplied for about 10 ms to output a pulse signal from the external output terminal plate 261 to the hall computer 262.

  However, in the frame open detection circuit 260 of this embodiment, when the inner frame 12 or the front frame 14 is open and the switch SW1 or the switch SW2 is conductive, a pulse signal from the external output terminal plate 261 to the hall computer 262 Can be detected quickly, so that the opening of the inner frame 12 or the front frame 14 can be detected quickly. Thus, the opening of the inner frame 12 or the front frame 14 can be detected before the inner frame 12 or the front frame 14 is opened and the main control device 110 or the game board 13 is tampered with. Therefore, it is possible to prevent an abnormal operation due to the fraudulent action that occurs when the power is supplied to the pachinko machine 10.

  The pulse signal output from the external output terminal plate 261 to the hall computer 262 is stored in the hall computer 262 which continues operating for 24 hours. Therefore, by the pulse signal stored in the hall computer 262, it is possible to specify the pachinko machine 10 in which the inner frame 12 or the front frame 14 has been opened. Furthermore, the open time of the inner frame 12 of the specified pachinko machine 10 or the open time of the specified pachinko machine 10 is stored by storing the output time of the output pulse signal together with the output of the pulse signal from the external output terminal plate 261 to the hall computer 262. The opening time of the front frame 14 can be detected.

  Further, when the inner frame 12 and the front frame 14 are closed (when the switch SW1 and the switch SW2 are shut off), the OUT terminal voltage of the timer IC 1 is about 10.6 volts, so the frame open detection circuit 260 The terminals of the collector terminal c of the transistor TR1 and the emitter terminal e (see FIG. 7) of the transistor TR1 become conductive. However, at this time, the current flowing through the transistor TR1 is only the base current. The resistors R3 and R5 which determine the current value of the base current both have a resistance value of 10 kΩ, which is sufficiently larger than the resistance value (1 kΩ) of the resistor R7 which limits the current supplied to the photocoupler PR1. Therefore, the current value of the base current can be limited to about 100 μA (note that when the switch SW1 and the switch SW2 are conducted, the current value supplied to the photocoupler PR1 is about 11.3 mA). Therefore, the consumption of the charge stored in the capacitor CD1 due to the conduction state of the transistor TR1 can be stopped only slightly.

  Also, when the inner frame 12 and the front frame 14 are closed (when the switch SW1 and the switch SW2 are shut off), the OUT terminal voltage of the timer IC1 is about 10.6 volts, so the OUT terminal of the timer IC1 is The current is consumed via the resistors R3 and R4 connected in series between Q and ground. However, both of the resistors R3 and R4 have a resistance value of 10 kΩ, which is sufficiently larger than the resistance value (1 kΩ) of the resistor R7 that limits the current supplied to the photocoupler PR1. Therefore, when the inner frame 12 and the front frame 14 are closed, the value of the current flowing from the OUT terminal of the timer IC 1 to the ground can be limited to about 530 μA through the resistors R3 and R4. Therefore, consumption of the charge stored in the capacitor CD1 by the resistors R3 and R4 can be stopped only slightly.

  When inner frame 12 and front frame 14 are closed (when switch SW1 and switch SW2 are cut off), consumption of charge stored in capacitor CD1 by the base current of transistor TR1 and resistance R3 and If it is desired to further suppress the consumption of the charge stored in the capacitor CD1 by the resistor R4, the resistance values of the resistors R3, R4 and R5 may be made larger than 10 kΩ.

  Furthermore, when the inner frame 12 and the front frame 14 are closed and the switch SW1 and the switch SW2 are shut off, consumption of the charge stored in the capacitor CD1 by the base current of the transistor TR1 and the capacitor CD1 by the resistor R3 and the resistor R4 If it is desired to make the consumption of the charge stored in the memory be zero, the following configuration may be adopted. A male switch SW1b and a male switch SW2b are further provided in the switch SW1 and the switch SW2, respectively, and two male switches SW1b and two male switches SW2b disposed in the switch SW1 and the switch SW2, respectively. Corresponding to this, the female switch SW1a and the female switch SW2a are further provided in the switch SW1 and the switch SW2, respectively, and the female switch SW1a and the female switch SW2a disposed in the switch SW1 and the switch SW2 are respectively Do each one. Thereby, one new combination of the male switch SW1b and the female switch SW1a is added to the switch SW1. Similarly to the switch SW1, the combination of the male switch SW2b and the female switch SW2a is newly added to the switch SW2. Then, the connection between the OUT terminal of the timer IC1 in the frame open detection circuit 260 and one end of the resistor R3 is cut off, and is incorporated in the newly added female switch SW1a to the OUT terminal of the timer IC1 after the connection cut. One end of a pair of terminal pairs SW1c is connected. Then, the other end of the pair of terminals SW1c incorporated in the newly added female switch SW1a is connected to one end of the resistor R3 after disconnection. Similarly, one end of a pair of terminal pairs SW2c built in the newly added female switch SW2a is connected to the OUT terminal of the timer IC1 after disconnection. Then, the other end of the pair of terminals SW2c incorporated in the newly added female switch SW2a is connected to one end of the resistor R3 after disconnection. With this configuration, when the inner frame 12 and the front frame 14 are closed and the switch SW1 and the switch SW2 are shut off, the resistance R3 is approximately 10.6 volts which is the OUT terminal voltage of the timer IC1. The consumption of the charge stored in the capacitor CD1 by the base current of the transistor TR1 and the consumption of the charge stored in the capacitor CD1 by the resistor R4 by the base current of the transistor TR1 are zeroed without being applied to the resistors R4 and R5 it can. On the contrary, when one of the inner frame 12 or the front frame 14 or both the inner frame 12 and the front frame 14 is open (one of the switch SW1 or the switch SW2, or both the switch SW1 and the switch SW2 Of the timer IC1 is divided and applied to the resistor R3, the resistor R4, the resistor R5, the resistor R6, and the capacitor CD2 to supply the current to the photocoupler PR1. It can be done normally via resistor R7.

  The place where the connection with the OUT terminal of the timer IC1 is disconnected and the connection between the terminal pair SW1c and the terminal pair SW2c is not limited to the above. For example, the other end of the resistor R3 is disconnected from the other end of the resistor R4, the resistor R5, and one end of the capacitor CD2, and the pair is incorporated in the newly added female switch SW1a at the other end of the resistor R3 after disconnection. One end of the terminal pair SW1c of Then, the other end of the pair of terminals SW1c incorporated in the newly added female switch SW1a is connected to one end of the resistor R4, the resistor R5 and the capacitor CD2 after disconnection. Similarly, one end of a pair of terminal pairs SW2c built in the newly added female switch SW2a is connected to the other end of the resistor R3 after disconnection. Then, the other end of the pair of terminal pair SW2c built in the newly added female switch SW2a may be connected to one end of the resistor R4, the resistor R5 and the capacitor CD2 after disconnection. That is, when the inner frame 12 and the front frame 14 are closed by the newly added male switch SW1b and female switch SW1a and the newly added male switch SW2b and female switch SW2a, (When the switch SW1 and the switch SW2 are cut off), the conduction between the OUT terminal of the timer IC1 and the ground is cut off, and either the inner frame 12 or the front frame 14 or the inner frame 12 and the front frame 14 Resistor R3, resistor R4, resistor R5, resistor R6 and resistor R6 if both of them are open (if either switch SW1 or switch SW2 or both switch SW1 and switch SW2 are conducting). The voltage at the OUT terminal of the timer IC1 may be divided and applied to the capacitor CD2

  When it is desired to separately store in the hole computer 262 which one of the inner frame 12 and the front frame 14 is opened, the following configuration may be employed. First, one frame opening detection circuit 260 and one external output terminal plate 261 used in this embodiment are newly provided, the switch SW2 connected in parallel to the switch SW1 is disconnected, and the disconnected switch SW2 is newly added. It may be connected to the provided frame open detection circuit 260. Specifically, one end of the disconnected switch SW2 is connected to one end of the capacitor CD1 of the newly provided frame open detection circuit 260, the VDD terminal of the timer IC1, one end of the capacitor CD4, and the RES terminal of the timer IC1 and disconnected. The other end of the switch SW2 may be connected to one end of the capacitor CD5 of the newly provided frame open detection circuit 260, one end of the resistor R1, and one end of the resistor R7 of the external output terminal board 261. Thus, the frame open detection circuit 260 and the external output terminal plate 261 are newly provided, and only the switch SW2 is connected to the newly provided frame open detection circuit 260, and the existing frame open detection circuit 260 is a switch. By connecting only SW1, when the switch SW1 is conductive (the inner frame 12 is open), the pulse signal output from the existing external output terminal plate 261 and the switch SW2 are conductive (the front frame 14 is open) And the pulse signal output from the newly provided external output terminal plate 261 can be separately output to the hall computer 262. Here, the hall computer 262 has an input terminal for a pulse signal output from the existing external output terminal plate 261 (for detecting the continuity of the switch SW1 (for detecting the opening of the inner frame 12)) and an external output terminal newly provided. The input terminal of the pulse signal output from the plate 261 (for detecting the continuity of the switch SW2 (for detecting the opening of the front frame 14)) and the input terminal of the pulse signal are separately set. According to this configuration, conduction of the switch SW1 (opening of the inner frame 12) and conduction of the switch SW2 (opening of the front frame 14) can be distinguished and stored in the hall computer 262. Therefore, according to the pulse signal stored in the hall computer 262, there is conduction of the switch SW1 (opening of the inner frame 12), conduction of the switch SW2 (opening of the front frame 14), or both. Can accurately detect the

  Furthermore, when power is supplied to the pachinko machine 10, which one of the inner frame 12 and the front frame 14 is opened is stored separately in the hall computer 262, and the inner frame 12 and the front frame 14 If it is desired to notify the pachinko machine 10 when either one is open, the following configuration may be adopted. First, one frame opening detection circuit 260 and one external output terminal plate 261 used in this embodiment are newly provided, the switch SW2 connected in parallel to the switch SW1 is disconnected, and the disconnected switch SW2 is newly added. It connects to the provided frame open detection circuit 260. Next, male switches SW1b and SW2b and female switches SW1a and SW2a are respectively newly provided in the switch SW1 and the switch SW2. Then, when the inner frame 12 or the front frame 14 is opened and the switch SW1 or the switch SW2 is turned on by using the newly provided male switch SW1 b, SW2 b and the female switch SW1 a, SW2 a, a signal is sent to the MPU 201. It may be configured to be input.

  Specifically, one end of the disconnected switch SW2 is connected to one end of the capacitor CD1 of the newly provided frame open detection circuit 260, the VDD terminal of the timer IC1, one end of the capacitor CD4, and the RES terminal of the timer IC1 and disconnected. The other end of the switch SW2 may be connected to one end of the capacitor CD5 of the newly provided frame open detection circuit 260, one end of the resistor R1, and one end of the resistor R7 of the external output terminal board 261. Thus, the frame open detection circuit 260 and the external output terminal plate 261 are newly provided, and only the switch SW2 is connected to the newly provided frame open detection circuit 260, and the existing frame open detection circuit 260 is a switch. By connecting only SW1, when the switch SW1 is conductive (the inner frame 12 is open), the pulse signal output from the existing external output terminal plate 261 and the switch SW2 are conductive (the front frame 14 is open) And the pulse signal output from the newly provided external output terminal plate 261 can be separately output to the hall computer 262.

  Next, a male switch SW1b and a male switch SW2b are further provided in the switch SW1 and the switch SW2, respectively, and two male switches SW1b and two male switches SW2b disposed in the switch SW1 and the switch SW2, respectively. Do. Corresponding to this, the female switch SW1a and the female switch SW2a are further provided in the switch SW1 and the switch SW2, respectively, and the female switch SW1a and the female switch SW2a disposed in the switch SW1 and the switch SW2 are respectively Do each one. Thus, one combination of the male switch SW1b and the female switch SW1a is newly added to the switch SW1. Further, similarly to the switch SW1, one combination of the male switch SW2b and the female switch SW2a is newly added to the switch SW2. Then, one end of a pair of terminal pair SW1c built in the newly added female switch SW1a is connected to the DC power supply DC1 of the existing frame open detection circuit 260 and built in the newly added female switch SW1a The other end of the pair of terminals SW1c is connected to the input / output port 205 of the MPU 201 via a voltage dividing circuit configured by a resistor. Similarly, one end of a pair of terminal pair SW2c incorporated in the newly added female switch SW2a is connected to the DC power source DC1 of the newly provided frame open detection circuit 260, and the newly added female type The other end of the pair of terminal pair SW2c built in the switch SW2a is connected to the input / output port 205 of the MPU 201 via a voltage dividing circuit configured by a resistor, and a port different from the other end of the terminal pair SW1c. Furthermore, in the MPU 201, the inner frame 12 or the front frame 14 is opened, the switch SW1 or the switch SW2 is conducted, and a voltage of 5 volts (supplied from the DC power source DC1 by the voltage dividing circuit) to detect opening of the inner frame 12. Voltage is reduced to 5 volts) or 5 volts to detect the opening of the inner frame 14 (the voltage dividing circuit reduces the voltage of 12 volts supplied from the DC power supply DC1 to 5 volts) ) Is input to the input / output port 205, a command indicating that the opening of the inner frame 12 or the front frame 14 has been detected is transmitted to the audio lamp control device 113 or the display control device 114. At this time, the command transmitted from the MPU 201 is a command when the release of the inner frame 12 is detected (hereinafter referred to as “inner frame command”) and a command when the front frame 14 is released (hereinafter “the command Separate with the front frame command. Then, the voice lamp control device 113 that has received each command performs notification in different modes depending on when the inner frame command is received and when the front frame command is received. For example, a different warning sound may be emitted from the audio output device 226, or the lighting mode of the lamp display device 227 may be made different. In addition, the display control device 114 that has received each of these commands performs display in different modes depending on when the inner frame command is received and when the front frame command is received. For example, when the display control device 114 receives the inner frame command, the third symbol display device 81 displays "The inner frame is open" or the display control device 114 receives the front frame command. In order to display the third symbol display device 81, "the front frame is open" may be displayed.

  Thus, one combination of male switch SW1b and female switch SW1a is newly added to switch SW1, and the combination of male switch SW2b and female switch SW2a is newly added to switch SW2 as well as switch SW1. If one of the switches SW1 is turned on (when the inner frame 12 is opened), the MPU 201 sends an inner frame command to the audio lamp control device 113 or the display control device 114. Configure to send. Further, when the switch SW2 is turned on (when the front frame 14 is opened), the MPU 201 is configured to transmit a front frame command to the audio lamp control device 113 or the display control device 114. By configuring in this manner, notification of different modes is performed using the voice lamp control device 113 or the display control device 114 when the inner frame 12 is opened and when the front frame 14 is opened. Can. Thereby, using the pachinko machine 10, it is accurately determined whether the switch SW1 has been turned on (the opening of the inner frame 12), the switch SW2 has been turned on (the opening of the front frame 14), or both. Can be detected.

  Further, a frame opening detection circuit 260 and an external output terminal plate 261 are newly provided, and only the switch SW2 is connected to the newly provided frame opening detection circuit 260, and the existing frame opening detection circuit 260 is a switch SW1. The pulse signal output from the existing external output terminal plate 261 and the conduction of the switch SW2 (the opening of the front frame 14) when there is the conduction of the switch SW1 (the opening of the inner frame 12). When there is a problem, the pulse signal output from the newly provided external output terminal plate 261 can be separately output to the hall computer 262. Therefore, according to the pulse signal stored in the hall computer 262, there is conduction of the switch SW1 (opening of the inner frame 12), conduction of the switch SW2 (opening of the front frame 14), or both. Can accurately detect the

  In the present embodiment, the pulse signal output from the external output terminal plate 261 is output to the hall computer 262 where the installation place is different from that of the pachinko machine 10, but the present invention is not limited to this. A dedicated storage device having the function of the hall computer 262 may be provided for each pachinko machine 10, and the dedicated storage device may be provided on the back side of each pachinko machine 10 provided with the main control device 110 and the like. In this case, more specifically, a dedicated storage device such as the main control unit 110, the payout control unit 111 and the emission control unit 112 is housed in the substrate box, and the box base and the box cover provided on the substrate box And unsealably connected by a sealing unit (not shown) (connection by caulking structure). Then, a seal seal (not shown) is attached to the connection portion between the box base and the box cover over the box cover and the box base.

  Next, the display contents of the third symbol display device 81 will be described with reference to FIG. FIG. 9 is a drawing for explaining the display screen of the third symbol display device 81, and FIG. 9 (a) is a view schematically showing area division setting and effective line setting of the display screen, FIG. 9B is a diagram illustrating an actual display screen.

  The third pattern is composed of ten types of main designs with numbers “0” to “9” and one type of sub-patterns of petal shape formed smaller than the main designs. Each main symbol is configured by attaching numbers from "0" to "9" on the rear symbol consisting of a wooden box, and the main symbol with an odd number (1, 3, 5, 7, 9) is The front of the wooden box is almost fully filled with large numbers. On the other hand, the main design with an even number (0, 2, 4, 6, 8) protects almost the front of the wooden box almost completely, and additional patterns imitating characters such as bath cloth and helmet are added. An even number is small in green on the lower right side of the attached symbol and is added so as to be displayed on the front side of the attached symbol.

  Further, in the pachinko machine 10 of the present embodiment, when the lottery result by the main control unit 110 is a big hit, a variation display in which the same main symbol is aligned is performed, and a big hit occurs after the variation display is finished. It is configured to In the case of shifting to a high probability state (probability state) after the end of the jackpot, variable display is performed in which the main symbols (corresponding to “high probability symbols”) to which odd numbers are added are aligned. On the other hand, when transitioning to the low probability state after the big hit ends, the variable display in which the main symbols (corresponding to the "low probability symbols") to which the even number is added is aligned is performed. Here, the high probability state refers to a state in which the subsequent jackpot probability is increased as added value after the end of the jackpot, that is, the time of so-called probability fluctuation (probability variation). Further, the normal state (low probability state) refers to a time when the probability change is not positive, and refers to a state where the jackpot probability is normal, that is, a state where the jackpot probability is lower than that of the probability change.

  As shown in FIG. 9A, the display screen of the third symbol display device 81 is largely divided into two vertically, and the lower 2/3 is a main display area Dm in which the third symbol is variably displayed, and others The upper 1/3 of the sub-display area Ds is for displaying a notice effect or a character.

  In the main display area Dm, three left, middle, and right symbol rows Z1, Z2, and Z3 are displayed. In each of the symbol rows Z1 to Z3, the above-described third symbol is displayed in a prescribed order. That is, in each of the symbol rows Z1 to Z3, the main symbols are arranged in ascending or descending order of the numbers, and one sub symbol is arranged between the respective main symbols. Therefore, a total of 20 third symbols of 10 main symbols and 10 sub-symbols are set in each symbol row, and scroll from top to bottom with periodicity for each symbol row Z1 to Z3. Variable display is performed. In particular, the numbers of the main symbols are arranged in descending order in the left symbol row Z1, and the numbers of the main symbols are arranged in ascending order in the middle symbol row Z2 and the right symbol row Z3.

  Further, in the main display area Dm, the third symbol is displayed on the upper, middle, and lower three stages for each symbol row Z1 to Z3. Therefore, a total of nine third symbols in three rows and three columns are displayed on the third symbol display device 81. In the main display area Dm, five effective lines, that is, an upper line L1, a middle line L2, a lower line L3, an upper right line L4, and an upper left line L5 are set. Then, at each game, the variation display is stopped in the order of left symbol row Z1 → right symbol row Z3 → middle symbol row Z2, and a combination of big hit symbols on any effective line at the time of the stop (in this embodiment, If it is aligned with the same combination of the main symbols, the jackpot animation is displayed as a jackpot.

  The sub display area Ds is provided horizontally above the main display area Dm, and is equally divided into three notice areas Ds1 to Ds3 in the left-right direction. Here, the left and right notice areas Ds1 and Ds3 are usually covered with a double-opening opaque door electrically opened and closed by a solenoid (not shown), and sometimes the solenoid is excited and the door is on the near side. By being opened, the display area becomes visible to the player. The central notice area Ds2 is a display area that is always visible without being covered by the door.

  As shown in FIG. 9B, on the actual display screen, a total of nine main symbols and sub-symbols of the third symbol are displayed in the main display area Dm. In the sub display area Ds, the left and right doors are closed, and the left and right notice areas Ds1 and Ds3 are covered and the display screen can not be viewed. When one or both of the left and right doors are opened in the middle of the variable display, a moving image is displayed in the left and right notice areas Ds1 and Ds3 and the player is more likely to transition to the jackpot than usual It is suggested. In the central notice area Ds2, normally, a predetermined character (a boy with a hachimaki in this embodiment) performs a predetermined movement, sometimes performs a special movement other than the predetermined movement, or another character An announcement effect is performed by making it appear. Although the display screen of the third symbol display device 81 is divided into upper and lower display areas Dm and Ds in principle, the third symbol and characters etc. are displayed more largely across the display areas Dm and Ds. Display effects can be performed.

  Next, with reference to FIG. 10, a counter and the like provided in the RAM 203 of the main control device 110 will be described. These counters and the like are used by the MPU 201 of the main control device 110 in order to perform a jackpot lottery, setting of display of the first symbol display device 37, lottery of display results of the second symbol display device 82, and the like.

  For the setting of the display of the big hit lottery and the first symbol display device 37, the first hit random number counter C1 used for the big hit lottery, the first hit type symbol counter C2 used for selecting the big hit symbol, and the stop pattern selection counter C3, a first initial value random number counter CINI1 used to set the initial value of the first random number counter C1, and fluctuation type counters CS1, CS2, and CS3 used for fluctuation pattern selection are used. The second random number counter C4 is used for lottery of the second symbol display device 82, and the second initial value random number counter CINI2 is used for setting the initial value of the second random number counter C4. Each of these counters is a loop counter in which 1 is added to the previous value each time updating is performed, and the value returns to 0 after reaching the maximum value.

  Each counter is updated at an interval of 4 ms which is an execution interval of the main processing (see FIG. 12) or at an interval of 2 ms which is an execution interval of the timer interrupt process It is suitably stored in the counter buffer for The RAM 203 is provided with a storage ball storage area consisting of one execution area and four storage areas (storage first to fourth areas), and each of these areas is connected to the first entrance 64. The values of the first random number counter C1, the first collision type counter C2 and the stop pattern selection counter C3 are respectively stored according to the winning timing of the ball.

  Each counter will be described in detail. For example, the first random number counter C1 is sequentially incremented by one within the range of 0 to 738, and returns to 0 after reaching the maximum value (that is, 738). In particular, when the first random number counter C1 makes one revolution, the value of the first initial value random number counter CINI1 at that time is read as the initial value of the first random number counter C1. Further, the first initial value random number counter CINI1 is configured as a loop counter updated in the same range as the first random number counter C1 (value = 0 to 738), and each time timer interrupt processing (see FIG. 15) is executed. It is updated once and repeatedly updated within the remaining time of the main processing (see FIG. 12). The value of the first random number counter C1 is, for example, periodically (in the present embodiment, updated once in each timer interrupt processing), and the holding ball is stored in the RAM 203 at the timing when the ball wins the first entrance 64. It is stored in the area. There are two types of jackpot random number values for low probability and high probability, and the number of jackpot random numbers at low probability is 2 and the value is “373, 727”. The number of random numbers that will be jackpots when there is a high probability is 14, and the values are "59, 109, 163, 211, 263, 317, 367, 421, 479, 523, 631, 683, 733".

  The first hit type counter C2 determines the display mode of the first symbol display device 37 in the case of a big hit, and in the present embodiment, 1 is sequentially added within the range of 0 to 4, and the maximum value (maximum value ( In other words, it is configured to return to 0 after reaching 4). The value of the first hit type counter C2 is, for example, periodically (in the present embodiment, updated once in each timer interrupt processing), the holding ball storage of the RAM 203 at the timing when the ball wins the first entrance 64 It is stored in the area. In addition, the value of the random number that is in the high probability state after the big hit is "1, 2, 3", the value of the random number that is in the low probability state after the big hit is "0, 4", and two types of hit types are determined Ru. Therefore, the display mode corresponding to the stop symbol displayed on the first symbol display device 37 is a display mode corresponding to two types of jackpots of the high probability state and the low probability state, and one type of display mode corresponding to the off One of the three display modes in total is selected.

  The stop pattern selection counter C3 is configured to be sequentially incremented by one within the range of 0 to 238, for example, and return to 0 after reaching the maximum value (i.e., 238). In the present embodiment, the pattern of the effect displayed on the third symbol display device 81 is selected by the stop pattern selection counter C3, and after the reach is generated, the final stop symbol is shifted by only one before and after the reach symbol. With "stop before and after out of reach" (for example, in the range of 0 to 8), and with the same reach, the final stop design stops at other than before and after reach with "reach other than out of back and forth" (for example, in the range of 9 to 38) Three stop (rendering) patterns are selected: “complete out” (for example, a range of 39 to 238) in which the reach does not occur. The value of the stop pattern selection counter C3 is, for example, periodically updated (once in each timer interrupt processing in the present embodiment), and the holding ball storage area of the RAM 203 at the timing when the ball wins the first entrance 64. Stored in

  The stop pattern selection counter C3 is provided with a plurality of tables having different ranges of random numbers for which a stop pattern is selected. This depends on whether the current state of the pachinko machine 10 is in the high probability state or in the low probability state, or in which area of the holding ball storage area each random number value is stored (ie, the number of holdings), etc. This is to change the selection ratio of the stop pattern.

  For example, in a high probability state, a table with a wide range of random values from 10 to 238 corresponding to the stop pattern of "completely out" is selected, so that reach effects are not selected more than necessary because jackpots are easily generated. It becomes easy to be selected as "complete removal". In this table, "longitudinal outreach" narrows to 0 to 5 and "non back and forth out of reach" also narrows to 6 to 9, making it difficult to select "back and forth out of reach" and "reach other than back and forth". In addition, if each random number value is not stored in the holding ball storage area in the low probability state, the disturbance corresponding to the “perfectly out” stopping pattern in order to secure the ball entering time to the first entrance 64 A table with a narrow numerical value range of 51 to 238 is selected, and it becomes difficult to select "complete out". In this table, the range of random number values corresponding to the stop pattern of "reach other than back and forth deviation" is as wide as 9 to 50, and "reach other than back and forth deviation" is easily selected. Therefore, in the low probability state, since the ball entering time of the ball to the first ball entrance 64 can be secured, the fluctuation display by the third symbol display device 81 can be easily continued.

  Of the two variation type counters CS1 and CS2, one variation type counter CS1 is sequentially incremented by one within the range of 0 to 198, for example, and returns to 0 after reaching the maximum value (that is, 198). The other variation type counter CS2 is configured to be sequentially incremented by one within a range of 0 to 240, for example, and returned to 0 after reaching the maximum value (i.e., 240). In the following description, CS1 is also referred to as "first variation type counter" and CS2 is also referred to as "second variation type counter".

  A rough display mode such as so-called normal reach, super reach, premium reach, etc. is determined by the first variation type counter CS1. Specifically, the determination of the display mode is the determination of the variation time of the symbol variation. Further, the second fluctuation type counter CS2 determines a fluctuation time (in other words, the number of fluctuation symbols) until the final stop symbol (in the present embodiment, the middle symbol) stops after the reach occurrence. Based on the fluctuation time determined by the fluctuation type counters CS1 and CS2, the display control device 114 determines the reach type and the fine symbol fluctuation mode of the third symbol displayed on the third display device 81. Therefore, by combining these fluctuation type counters CS1 and CS2, various diversification of fluctuation patterns can be easily realized. Further, it is also possible to determine the symbol variation mode only by the first variation type counter CS1, or to determine the symbol variation mode similarly by the combination of the first variation type counter CS1 and the stop symbol. The values of the variation type counters CS1 and CS2 are updated once each time the main process (see FIG. 12) to be described later is executed once, and are repeatedly updated even within the remaining time in the main process.

  For example, the value of the fluctuation type counter CS3 is sequentially incremented by one within the range of 0 to 162, and returns to 0 after reaching the maximum value (that is, 162). In the following description, CS3 is also referred to as a "third variation type counter". The third symbol display device 81 of the present embodiment performs decorative effects according to the display mode of the first symbol display device 37, and in addition to the variation of the symbols, it is possible to slide the changing symbols A notice effect such as passing a notice character for giving notice of occurrence of reach effect is performed. The effect pattern of the advance effect is selected by the fluctuation type counter CS3. Specifically, the time required for the advance notice effect is added to the fluctuation time, and on the other hand, the fluctuation time is subtracted to shorten the time in which the fluctuation display is performed, and the effect pattern not to add or subtract the fluctuation time is selected . As in the case of the stop pattern selection counter C3, the fluctuation type counter CS3 is provided with a plurality of tables having different ranges of random numbers for which the effect pattern is selected, and is the current state of the pachinko machine 10 high probability state? The selection ratio of each effect pattern is configured to be different depending on whether it is in the low probability state or in which area of the holding ball storage area each random number value is stored.

  As described above, the fluctuation time of the symbol fluctuation is determined by the fluctuation type counters CS1 and CS2, and the time to be added / subtracted to / from the fluctuation time is determined by the fluctuation type counter CS3. Therefore, the final change time until the final stop symbol stops is determined by the change type counters CS1, CS2, and CS3.

  The second random number counter C4 is configured, for example, as a loop counter that is sequentially incremented by one within the range of 0 to 250, and returns to 0 after reaching the maximum value (that is, 250). In the present embodiment, the value of the second random number counter C4 is updated, for example, periodically at each timer interrupt processing, and the ball passes either the left or right second entrance (through gate) 67. It is acquired when it is detected. The number of random numbers to be won is 149, and the range is “5 to 153”. The second initial value random number counter CINI2 is configured as a loop counter that is updated in the same range as the second random number counter C4 (value = 0 to 250), and is once for each timer interrupt process (see FIG. 15) As well as being updated, it is repeatedly updated within the remaining time of the main process (see FIG. 12).

  Next, each control process executed by the MPU 201 in the main control apparatus 110 will be described with reference to the flowcharts of FIGS. The processing of the MPU 201 is roughly classified into a start-up process activated upon power-on, a main process executed after the start-up process, and a timer activated periodically (in a 2 ms cycle in this embodiment) There are interrupt processing and NMI interrupt processing activated by the input of the power failure signal SG1 to the NMI terminal. For convenience of explanation, timer interrupt processing and NMI interrupt processing will be described first, and then start processing and The main processing will be described.

  FIG. 15 is a flowchart showing timer interrupt processing. The timer interrupt process is executed by the MPU 201 of the main control unit 110, for example, every 2 ms. In the timer interrupt process, first, read processing of various winning switches is executed (S501). That is, while reading the states of various switches connected to the main control device 110, the state of the switches is determined to store detection information (winning detection information).

  Next, the first initial value random number counter CINI1 and the second initial value random number counter CINI2 are updated (S502). Specifically, the first initial value random number counter CINI1 is incremented by 1 and cleared to 0 when the counter value reaches the maximum value (738 in the present embodiment). Then, the updated value of the first initial value random number counter CINI1 is stored in the corresponding buffer area of the RAM 203. Similarly, the second initial value random number counter CINI2 is incremented by 1, and when the counter value reaches the maximum value (250 in the present embodiment), it is cleared to 0, and the second initial value random number counter CINI2 is updated The value is stored in the corresponding buffer area of the RAM 203.

  Further, the first random number counter C1, the first collision type counter C2, the stop pattern selection counter C3 and the second random number counter C4 are updated (S503). Specifically, the first random number counter C1, the first collision type counter C2, the stop pattern selection counter C3 and the second random number counter C4 are respectively incremented by 1, and their counter values are maximum values (this embodiment). Then, when 738, 4, 238, 250) are reached, they are cleared to 0 respectively. Then, the updated values of the counters C1 to C4 are stored in the corresponding buffer area of the RAM 203.

  Thereafter, the start winning process (see FIG. 16) accompanying the winning on the first ball entrance 64 is executed (S504), the launch control process is executed (S505), and the timer interrupt process is ended. In the firing control process, the touch sensor 51a detects that the player is touching the operation handle 51, and the firing of the ball is turned on, provided that the strike stop switch 51b for stopping the firing is not operated. It is a process of deciding on / off. The main controller 110 instructs the launch controller 112 to launch the ball when the launch of the ball is on.

  Here, the start winning process executed in the process of S504 will be described with reference to the flowchart of FIG. FIG. 16 is a flowchart showing the start winning process (S504) executed in the timer interrupt process (see FIG. 15).

  When the start winning process is executed, first, it is determined whether or not the ball has won the first ball entrance 64 (start winning) (S601). If it is determined that the ball has won the first ball entrance 64 (S601: Yes), whether or not the number N of operation pending balls of the first symbol display device 37 is less than the upper limit (4 in the present embodiment) It is determined (S602). If there is a winning on the first ball entrance 64 and the number of operation holding balls N <4 (S602: Yes), the number of operation holding balls N is incremented by 1 (S603), and further updated in step S503. The respective values of the first random number counter C1, the first collision type counter C2 and the stop pattern selection counter C3 are stored in the first of the vacant holding areas of the holding ball storage area of the RAM 203 (S604). On the other hand, if there is no winning at the first entrance 64 (S601: No), or if there is a winning at the first entrance 64, it is not the number of operation holding balls N <4 (S602: No) , S603 and S604 are skipped, the start winning process is ended, and the process returns to the timer interrupt process.

  FIG. 17 is a flowchart showing NMI interrupt processing. The NMI interrupt process is a process executed by the MPU 201 of the main control device 110 when the power of the pachinko machine 10 is shut off due to the occurrence of a power failure or the like. By this NMI interrupt processing, the occurrence information of the power-off is stored in the RAM 203. That is, when the power of the pachinko machine 10 is shut off due to the occurrence of a blackout or the like, the blackout signal SG1 is output from the blackout monitoring circuit 252 to the NMI terminal of the MPU 201 in the main control unit 110. Then, the MPU 201 interrupts the control under execution and starts the NMI interrupt processing, stores the power-off occurrence information in the RAM 203 as the setting of the power-off occurrence information (S 651), and ends the NMI interrupt processing Do.

  The above-described NMI interrupt processing is also executed by the payout and emission control device 111 in the same manner, and the power disconnection occurrence information is stored in the RAM 213 by the NMI interrupt processing. That is, when the power of the pachinko machine 10 is shut off due to the occurrence of a blackout etc., the blackout signal SG1 is outputted from the blackout monitoring circuit 252 to the NMI terminal of the MPU 211 in the payout launch control device 111, and the MPU 211 interrupts the control under execution. Then, NMI interrupt processing is started.

  Next, with reference to FIG. 11, the start-up process when the main controller 110 is powered on will be described. FIG. 11 is a flowchart showing the start-up process executed by the MPU 201 in the main control device 110. This start-up process is started by the reset upon power-on. In the start-up process, first, an initial setting process associated with power on is executed (S101). Specifically, a predetermined value determined in advance is set in the stack pointer, and the sub-side control device (peripheral control devices such as the audio lamp control device 113 and the payout control device 111) becomes operable. In order to wait, wait processing (one second in the present embodiment) is executed. Next, access to the RAM 203 is permitted (S103).

  Thereafter, it is determined whether or not the RAM erase switch 122 (see FIG. 3) provided in the power supply 115 is turned on (S104), and if it is turned on (S104: Yes), the process proceeds to S110. On the other hand, if the RAM erase switch 122 is not turned on (S104: No), it is further determined whether or not the occurrence information of power-off is stored in the RAM 203 (S105). If not stored (S105: No) Since there is a possibility that the process at the time of the previous power-off did not end normally, the process proceeds to S110 also in this case.

  If the occurrence information of the power failure is stored in the RAM 203 (S105: Yes), the RAM determination value is calculated (S106), and if the calculated RAM determination value is not normal (S107: No), that is, the calculated RAM If the determination value does not match the RAM determination value stored at the time of power-off, the backed up data is destroyed, so the process also proceeds to S110. The RAM determination value is, for example, a checksum value at a work area address of the RAM 203, as described later in the process of S213 of FIG. Instead of the RAM determination value, the validity of the backup may be determined based on whether or not the keyword written in the predetermined area of the RAM 203 is correctly stored.

  In the process of S111, a payout initialization command is transmitted to initialize the payout control device 111 to be the control device on the sub side (peripheral control device) (S111). When receiving the payout initialization command, the payout control device 111 clears the area (work area) other than the stack area of the RAM 213, sets an initial value, and can start the payout control of the gaming ball. After transmitting the payout initialization command, main controller 110 executes initialization processing (S112, S113) of RAM 203.

  As described above, in the pachinko machine 10, the power is turned on while pressing the RAM erase switch 122 when initializing the RAM data at the time of power on, for example, at the time of opening of a hall. Therefore, if the RAM erase switch 122 is pressed when the start-up process is executed, the RAM initialization process (S112, S113) is executed. In addition, the initialization process (S112, S113) of the RAM 203 is also executed similarly when the occurrence of the power-off is not set or when the backup abnormality is confirmed by the RAM determination value (checksum value etc.). . In the initialization process of the RAM (S112, S113), the use area of the RAM 203 is cleared to 0 (S112), and then the initial value of the RAM 203 is set (S113). After execution of the initialization process of the RAM 203, the process proceeds to the process of S110.

  On the other hand, if the RAM erase switch 122 is not turned on (S104: No), occurrence information of the power failure is stored (S105: Yes), and if the RAM determination value (checksum value etc.) is normal ( S107: Yes), while holding the backed up data in the RAM 203, clear the power-off occurrence information (S108). Next, a payout recovery command at the time of power recovery for transmitting the control device (peripheral control device) on the sub side back to the gaming state at the time of driving power supply interruption is transmitted (S109), and the process proceeds to S110. When the payout control device 111 receives this payout recovery command, it holds the data stored in the RAM 213, and can start the payout control of the gaming balls. In the process of S110, an interrupt is permitted, and the process proceeds to the main process described later.

  Next, with reference to FIG. 12, the main processing to be executed after the above-described start-up processing will be described. FIG. 12 is a flowchart showing main processing executed by the MPU 201 in the main control apparatus 110. In this main processing, main processing of the game is executed. As an outline thereof, each processing of S201 to S206 is executed as periodic processing of 4 ms cycle, and the counter updating processing of S209 and S210 is executed with the remaining time.

  In the main process, first, output data such as a command updated in the previous process is transmitted to each control device (peripheral control device) on the sub side (S201). Specifically, the presence or absence of the winning detection information detected in the switch reading process of S501 is determined, and if there is the winning detection information, a prize ball command corresponding to the acquired ball number is transmitted to the payout control device 111. Further, by this external output processing, the variation pattern command necessary for the variation display of the third symbol by the third symbol display device 81, the stop symbol command, the stop command, the rendering time addition command and the like are transmitted to the voice lamp control device 113. Furthermore, when firing a ball, a ball launch signal is sent to the launch controller 112.

  Next, the values of the fluctuation type counters CS1, CS2, and CS3 are updated (S202). Specifically, the variation type counters CS1, CS2, and CS3 are incremented by one, and when the counter values reach the maximum values (198, 240, and 162 in the present embodiment), they are cleared to zero. Then, the updated values of the variation type counters CS1, CS2, and CS3 are stored in the corresponding buffer area of the RAM 203.

  When the variation type counters CS1, CS2 and CS3 have been updated, the prize ball counting signal and the payout abnormality signal received from the payout control device 111 are read (S203), and the processing and the first pattern display device 37 are performed. A variation process of setting a variation pattern or the like of the third symbol by the three symbol display device 81 is executed (S204). The details of the variation process will be described later with reference to FIG.

  After the end of the variation process, a large opening opening / closing process is performed to open or close the specific winning opening (large opening) 65a of the variable winning device 65 in the big hit state (S205). That is, the specific winning opening 65a is opened for each round of the jackpot state, and it is determined whether the maximum opening time of the specific winning opening 65a has passed or whether the specified winning opening 65a has a prescribed number of balls. Then, when any one of these conditions is established, the specific winning hole 65a is closed. The opening and closing of the specific winning hole 65a is repeated for a predetermined number of rounds.

  Next, display control processing of a second symbol (for example, a symbol of “o” or “x”) by the second symbol display device 82 is executed (S206). Simply stated, on the condition that the ball has passed through the second entrance (through gate) 67, the value of the second random number counter C4 is acquired at the timing when it passes and the second symbol display device 82 The variable display of the second symbol is carried out on the display unit 83 of the above. Then, the second lottery is conducted based on the value of the second random number counter C4, and when the second symbol is hit, the electrically operated combination attached to the first ball entrance 64 is opened for a predetermined time.

  After that, it is determined whether or not the occurrence information of the power failure is stored in the RAM 203 (S207), and if the occurrence information of the power failure is not stored in the RAM 203 (S207: No), the power failure signal from the power failure monitoring circuit 252 SG1 is not output and the power is not shut off. Therefore, in such a case, it is determined whether or not the execution timing of the next main processing has arrived, that is, whether or not a predetermined time (4 ms in the present embodiment) has elapsed since the start of the previous main processing (S208) If the predetermined time has already passed (S208: Yes), the process proceeds to S201, and the above-described processes from S201 are repeated.

  On the other hand, if the predetermined time has not yet elapsed from the start of the previous main processing (S208: No), the first main processing is performed until the predetermined time is reached, that is, within the remaining time until the next main processing execution timing is reached. (1) The update of the initial value random number counter CINI1, the second initial value random number counter CINI2 and the variation type counters CS1, CS2, CS3 is repeatedly executed (S209, S210).

  First, the first initial random number counter CINI1 and the second initial random number counter CINI2 are updated (S209). Specifically, the first initial value random number counter CINI1 and the second initial value random number counter CINI2 are incremented by 1, and cleared to 0 when the counter value reaches the maximum value (738, 250 in the present embodiment). Do. Then, the updated values of the first initial value random number counter CINI1 and the second initial value random number counter CINI2 are stored in the corresponding buffer areas of the RAM 203, respectively.

  Next, the variation type counters CS1, CS2, and CS3 are updated (S210). Specifically, the variation type counters CS1, CS2, and CS3 are incremented by one, and when the counter values reach the maximum values (198, 240, and 162 in the present embodiment), they are cleared to zero. Then, the updated values of the variation type counters CS1, CS2, and CS3 are stored in the corresponding buffer areas of the RAM 203, respectively.

  Here, since the execution time of each process of S201-S206 changes according to the state of a game, the remaining time until it reaches the execution timing of the next main process is not constant but fluctuates. Therefore, by repeatedly executing the update of the first initial value random number counter CINI1 and the second initial value random number counter CINI2 using such remaining time, the first initial value random number counter CINI1 and the second initial value random number counter CINI2 (ie, The initial value of the first random number counter C1 and the initial value of the second random number counter C4 can be randomly updated, and the variation type counters CS1, CS2, and CS3 can also be randomly updated.

  Further, in the process of S207, if the occurrence information of the power failure is stored in the RAM 203 (S207: Yes), the power is shut off due to the occurrence of the power failure or the power off, and the power failure monitoring circuit 252 outputs the power failure signal SG1. As a result, it means that the NMI interrupt process of FIG. 17 has been executed, so that the process at the time of the power-off after S211 is executed. First, the occurrence of each interrupt processing is prohibited (S211), and a power-off command indicating that the power is shut off is sent to another control device (peripheral control devices such as the payout control device 111 and the audio lamp control device 113). And transmit (S212). Then, the RAM determination value is calculated, the value is stored (S213), the access to the RAM 203 is inhibited (S214), and the infinite loop is continued until the power is completely shut off and the processing can not be performed. Here, the RAM determination value is, for example, a checksum value in a stack area and a work area backed up in the RAM 203.

  The processing of S207 is at the end of a series of processing corresponding to the change in the state of the game performed in S201 to S206, or at the end of one cycle of the processing of S209 and S210 performed within the remaining time. It is running. Therefore, in the main process of main controller 110, since the occurrence information of the power-off is confirmed at the timing when each setting is finished, when returning from the power-off state, the process is performed after the end of the start-up process. It can start from the process of S201. That is, as in the case of being initialized in the start-up process, the process can be started from the process of S201. Therefore, in the process at the time of power shutoff, even if the contents of each register used by the MPU 201 are saved to the stack area or the value of the stack pointer is not saved, the stack pointer By setting to a predetermined value (initial value), it is possible to start from the process of S201. Therefore, the control load on the main control device 110 can be reduced, and accurate control can be performed without the main control device 110 malfunctioning or runaway.

  Next, the fluctuation process (S204) will be described with reference to FIG. FIG. 13 is a flowchart showing the variation process (S204) executed in the main process (see FIG. 12). In this variation processing, first, it is determined whether or not a jackpot is currently occurring (S301). The jackpot includes the middle of a jackpot game displayed on the third symbol display device 81 and the first symbol display device 37 at the time of the jackpot and the middle of a predetermined time after the jackpot game is over. If the result of the determination is that the jackpot is in progress (S301: Yes), the present processing ends.

  If the jackpot is not inside (S301: No), it is determined whether or not the display mode of the first symbol display device 37 is changing (S302), and the display mode of the first symbol display device 37 is not changing (S302: No), it is determined whether the number of operation pending balls N is larger than 0 (S303). If the operation pending ball number N is 0 (S303: No), this processing ends. If the operation holding ball number N> 0 (S303: Yes), the operation holding ball number N is decremented by 1 (S304), and the data stored in the holding ball storage area is shifted (S305). This data shift process is a process of sequentially shifting data stored in the pending first to fourth areas of the pending ball storage area toward the execution area, and the first pending area → the execution area, the second pending area → The data in each area is shifted in such a way as the first holding area, the third holding area, the second holding area, the fourth holding area, and the third holding area. After the data shift process, the variation start process of the first symbol display device 37 is executed (S306). The change start process will be described later with reference to FIG.

  If it is determined in the process of S302 that the display mode of the first symbol display device 37 is changing (S302: Yes), it is determined whether a changing time has elapsed (S307). The display time during fluctuation of the first symbol display device 37 is determined according to the fluctuation pattern selected by the fluctuation type counters CS1 and CS2 and the addition time selected by the fluctuation type counter CS3, and this fluctuation time is If it has not elapsed (S307: No), the display of the first symbol display device 37 is updated (S308).

  In the present embodiment, of the LEDs 37a of the first symbol display device 37, for example, if the currently lit LED is red until the fluctuation time has elapsed, the red LED is selected. Turn off the green LED and turn on the green LED, turn off the green LED and turn on the blue LED, and turn on the blue LED if it is on. A display mode is set to turn off the light and turn on the red LED.

  The variation process is executed every 4 ms, but if the illumination color of the LED is changed each time the variation process is executed, the player can not confirm the change of the illumination color of the LED. Therefore, each time the variation process is performed, a counter (not shown) is counted by one so that the player can check the change in the lighting color of the LED, and the LED reaches 100 when the counter reaches 100. Change the lighting color of. That is, the lighting color of the LED is changed every 0.4 s. The value of the counter is reset to 0 when the lighting color of the LED is changed.

  On the other hand, if the fluctuation time of the first symbol display device 37 has elapsed (S307: Yes), a display mode corresponding to the stop symbol of the first symbol display device 37 is set (S309). The setting of the stop symbol is determined whether it is a big hit according to the value of the first random number counter C1 and if it is a big hit, it will be a high probability state after the big hit by the value of the first hit type counter C2. Whether it is a low probability state symbol or not is determined. In the present embodiment, the red LED is turned on in the high probability state after a big hit, the green LED is turned on in the low probability state, and the blue LED is turned on if it is off. . In addition, although the display of each LED is cancelled | released, when the next fluctuation | variation display is started, it is good also as what makes it light only for several seconds after the stop of a fluctuation | variation.

  When the display mode of the first symbol display device 37 corresponding to the stop symbol is set in the process of S309, the variation stop of the third symbol display device 81 is stopped to synchronize with the lighting of the LED in the first symbol display device 37 A command is set (S310). When receiving the stop command, the audio lamp control unit 113 instructs the display control unit 114 to stop. The third symbol display device 81 stops the variation when the variation time has elapsed, and upon receiving the stop command, the variation effect of 1 in the third symbol display device 81 ends.

  Next, the fluctuation start process will be described with reference to FIG. FIG. 14 is a flowchart showing the fluctuation start process (S306) executed in the fluctuation process (see FIG. 13). In the variation start process (S306), first, it is determined whether or not a big hit based on the value of the first random number counter C1 stored in the execution area of the holding ball storage area (S401). Whether or not the jackpot is determined is determined based on the relationship between the value of the first random number counter C1 and the mode at each time. As described above, "373, 727" is the winning value among the numbers 0 to 738 of the first random number counter C1 at the normal low probability, and at the high probability, "59, 109, 163, 211, 263, 317, 367, 421, 479, 523, 631, 683, 733 "is the hit value.

  When it is determined that it is a big hit (S401: Yes), the value of the first hit type counter C2 stored in the execution area of the holding ball storage area is confirmed, and the display mode at the big hit is set (S402) ). In the process of S402, whether to shift to the high probability state or to the low probability state is set after the big hit based on the value of the first hit type counter C2. When the transition state after the big hit is set, the display mode of the first symbol display device 37 (the lighting state of the LED 37a) is set. In addition, based on the transition state after the big hit, the stop symbol of the big hit to be stopped and displayed by the third symbol display device 81 is set by the sound lamp control device 113 and the display control device 114. That is, the stop symbol in the third symbol display device 81 is set by setting the transition state after the big hit by the process of S402. In the case of "0, 4" among the numbers 0 to 4 of the first type counter C2, thereafter, transition to the low probability state is made, and in the case of "1, 2, 3", transition to the high probability state .

  Next, a fluctuation pattern at the time of jackpot is determined (S403). When the variation pattern is set in the process of S403, the display time of the first symbol display device 37 is set, and the variation time of the third symbol until stopping with the big hit symbol in the third symbol display device 81 is determined. Ru. At this time, check the values of the variation type counters CS1 and CS2 stored in the counter buffer of the RAM 203, and based on the value of the first variation type counter CS1, of rough symbol variation such as normal reach, super reach, premium reach The fluctuation time (in other words, the number of fluctuation symbols) until the final stop symbol (in this embodiment, the middle symbol Z2) stops after reaching is determined based on the value of the second fluctuation type counter CS2 while determining the fluctuation time. decide.

  The relationship between the value of the first variation type counter CS1 and the variation time, and the relationship between the value of the second variation type counter CS2 and the variation time are prescribed in advance by a table or the like. However, the fluctuation time may be set using only the value of the first fluctuation type counter CS1 without using the value of the second fluctuation type counter CS2, and may be set by only the value of the first fluctuation type counter CS1. Depending on the value of the first variation type counter CS1 and the game conditions, etc., each time whether to set or to set with both values of both variation type counters CS1 and CS2 is determined.

  If it is determined that the jackpot is not a jackpot in the process of S401 (S401: No), a display mode at the time of disconnection is set (S404). In the process of S404, the display mode of the first symbol display device 37 is set off to a display mode corresponding to the symbol, and based on the value of the stop pattern selection counter C3 stored in the execution area of the holding ball storage area The effect to be displayed on the third symbol display device 81 is set as to whether it is a front or back reach, a reach other than the front or back, or a complete out. In the present embodiment, as described above, the range of values corresponding to each stop pattern of the stop pattern selection counter C3 is in accordance with whether the state is the high probability state or the low probability state and the operation suspension number N. The table is set to be different.

  Next, the fluctuation pattern at the time of detachment is determined (S405), the display time of the first symbol display device 37 is set, and the fluctuation time of the third symbol until it stops at the third symbol display device 81 at the disappointing symbol Is determined. At this time, as in the process of S403, the values of the fluctuation type counters CS1 and CS2 stored in the counter buffer of the RAM 203 are confirmed, and the normal reach, super reach, and premium reach based on the value of the first fluctuation type counter CS1. And so on while determining the rough fluctuation time of the symbol fluctuation and the fluctuation time until the final stop symbol (in this embodiment, the middle symbol Z2) is stopped after the reach occurrence based on the value of the second fluctuation type counter CS2. For example, the number of fluctuation symbols is determined.

  When the process of S403 or the process of S405 is finished, an effect time to be added to or subtracted from the fluctuation time determined by the first and second type counters CS1 and CS2 is determined (S406). At this time, addition / subtraction of the rendering time is determined based on the value of the third type counter CS3 stored in the counter buffer of the RAM 203, the display time of the first symbol display device 37 is set, and the third symbol display The fluctuation time of the device 81 is set. In the present embodiment, according to the value of the third variation type counter CS3, the addition / subtraction of the presentation time is determined not to change the time of the variation display and when 1 second is added to the variation display time, the variation display time is 2 In the case of adding seconds, four types of added values are determined in the case of subtracting the variation display time by one second.

  In addition, when the fluctuation display time is added / subtracted, the advance notice effect that the expectation value of the big hit becomes high in the third symbol display device 81 (for example, the slip effect effect or the like which makes the fluctuation time of the fluctuation symbol longer than usual and slips An effect of displaying the advance notice character, an effect of shortening the fluctuation time of the fluctuation symbol of 1 than usual and immediately stopping it, etc. are performed. Also, if the value of the random number counter C1 per win is a big hit, the probability that the additional value of 2 seconds is selected is set high, so the player should expect a big hit by confirming the notice effect. Can.

  Next, the variation pattern command is set according to the variation pattern (variation time) determined in the process of S403 or S405 (S407), and the stop symbol command is set according to the stop symbol set in the process of S402 or S404. (S408). Then, a rendering time addition command is set according to the addition value of the rendering time determined in the process of S406 (S409), and the process returns to the variation process.

  As described above, according to the pachinko machine 10, when the inner frame 12 or the front frame 14 is in the open state and the switch SW1 or the switch SW2 is in the conductive state (see FIG. 5B), the frame open detection is performed. The circuit 260 supplies a current to one end of the resistor R7 of the external output terminal plate 261 until about 10 ms elapses (about 10 ms) after the inner frame 12 or the front frame 14 is opened. Then, current is supplied to the light emitting diode on the primary side of the photocoupler PR1 provided on the external output terminal plate 261 via the resistor R7, and the light emitting diode emits light for about 10 ms. When the light receiving element (phototransistor) on the secondary side of the photocoupler PR1 receives the light from the light emitting diode, the light receiving element (phototransistor) on the secondary side of the photocoupler PR1 has a pulse width of about 10 ms. Converts it into a pulse signal (electrical signal) of about 10 ms and outputs the pulse signal to the hall computer 262. The output pulse signal is stored in the hall computer 262. Therefore, by using the frame opening detection circuit 260 and the external output terminal plate 261, the hole computer 262 can store the fact that the inner frame 12 has been opened or the front frame 14 has been opened. The hall computer 262 is kept operating for 24 hours. Therefore, the open frame detection circuit 260 outputs the pulse signal from the external output terminal plate 261 and also the time when the pulse signal is output, that is, the open time of the inner frame 12 and the open time of the front frame 14 as well. It can be stored in 262.

  Further, since the frame open detection circuit 260 is provided with a 0.1 F capacitor CD1, the frame open detection circuit 260 is supplied with power to the pachinko machine 10, and a DC voltage of DC voltage 12 to 12 volts is applied. When it is supplied, it naturally operates, and furthermore, for example, the business hours of the game are over, the power supply to the pachinko machine 10 is cut off, and a DC voltage of 12 volts is supplied from the DC power supply DC1 Even if not, the opening of the inner frame 12 and the opening of the front frame 14 can be detected. Therefore, for example, even when the operating time of the game arcade is over and the power supply to the pachinko machine 10 is cut off, a pulse signal with a pulse width of about 10 ms is output from the external output terminal board 261 to the hall computer 262 can do.

  Next, a pachinko machine according to a second embodiment will be described with reference to FIGS. 18 and 19. The pachinko machine of the second embodiment is obtained by changing the frame open detection circuit 260 of the pachinko machine 10 of the first embodiment to a frame open detection circuit 270 which is another configuration. The frame open detection circuit 270 of the second embodiment is simpler in circuit configuration than the frame open detection circuit 260 of the first embodiment. Specifically, the frame open detection circuit 270 of the second embodiment removes the timer IC1, the resistors R1 to R3 and the capacitors CD3 to CD5 from the frame open detection circuit 260 of the first embodiment, and the capacitors CD1 have different capacities. The circuit configuration is simplified by changing to the capacitor CD6 and changing the connection of each component.

  According to the frame open detection circuit 270 of the second embodiment, a high signal whose output period fluctuates according to the open period of the inner frame 12 or the front frame 14 can be output to the hall computer 262. Alternatively, in addition to the fact that the opening of the front frame 14 can be detected, the opening period of the inner frame 12 or the front frame 14 can also be detected.

  FIG. 18 is a block diagram showing the electrical configuration of the frame open detection circuit 270 of the second embodiment. The same parts as those of the frame open detection circuit 260 according to the first embodiment described above with reference to FIG. 7 will be assigned the same reference numerals and descriptions thereof will be omitted, and only different parts will be described.

  The capacitor CD6 is obtained by changing the capacity of the capacitor CD1 used in the frame open detection circuit 260 of the first embodiment from 0.1 F (farad) to 1 F (farad). The capacitor CD6 is a component that functions as a rechargeable battery as the capacitor CD1 of the frame open detection circuit 260 of the first embodiment, one end of the capacitor CD6 is connected to the cathode of the diode D1, and the other end of the capacitor CD6 is grounded. There is.

  As in the case of the above-described capacitor CD1 (see FIG. 7), the capacitor CD6 is supplied with power to the pachinko machine of the second embodiment, and is supplied with a DC voltage of 12 volts from the DC power supply DC1. It is determined by the product of the capacitance 1F of the capacitor CD6 and the DC voltage applied to the capacitor CD6 (about 11.3 volts obtained by subtracting 0.7 volt of the voltage drop at the diode D1 from 12 volts supplied from the DC power supply DC1) Store the charge.

  On the other hand, for example, when the operating time of the game arcade is over, the power supply to the pachinko machine of the second embodiment is cut off, and the DC voltage of 12 volts is not supplied from the DC power supply DC1, the capacitor CD6 A DC voltage (about 11.3 volts) based on the charge stored in the capacitor CD 6 is supplied to the frame open detection circuit 270 and the external output terminal plate 261.

  Specifically, since the capacitor CD6 has a capacitance of 1F (farad) and the voltage applied to the capacitor CD6 is about 11.3 volts, the charge stored in the capacitor CD6 is the capacitance of the capacitor CD6 and that of the capacitor CD6. It becomes about 11.3 C (coulomb) from the product of applied voltage. The charge of about 11.3 C stored in the capacitor CD 6 is about 10 minutes in the output period of the high signal outputted from the external output terminal plate 261 to the hall computer 262. Therefore, for example, even if the operating time of the game arcade is over, the power supply to the pachinko machine of the second embodiment is cut off, and a DC voltage of 12 volts is not supplied from the DC power supply DC1, the external The frame opening detection circuit 270 can detect the opening of the inner frame 12 or the front frame 14 until the total output period of the high signal output from the output terminal plate 261 becomes about 10 minutes. The frame open detection circuit 270 can also detect the open period of the inner frame 12 or the front frame 14. When the total output period of opening the inner frame 12 or opening the front frame 14 approaches approximately 10 minutes, the charge stored in the capacitor CD6 decreases, and the value of the current supplied from the capacitor CD6 to the photocoupler PR1 decreases. However, the high signal can be stored in the hole computer 262 by increasing the detection sensitivity of the high signal of the hole computer 262 (by lowering the threshold for the amplitude of the high signal).

  As described above, when the power supply to the pachinko machine of the second embodiment is performed and a DC voltage of 12 volts is supplied from the DC power supply DC1, it naturally operates. Further, for example, the business hours of the game arcade When the power supply to the pachinko machine of the second embodiment is cut off and the DC voltage of 12 volts is not supplied from the DC power supply DC1, the frame open detection circuit 270 is not Since the farad) capacitor CD6 is provided, the frame opening detection circuit 270 can detect the opening of the inner frame 12 and the opening of the front frame 14. The cathode terminal of the diode D1 is connected to one end of the capacitor CD6, and the diode D1 functions to prevent the backflow of current, so the capacitor CD6 transmits a direct current to the frame open detection circuit 270 and the external output terminal plate 261. Even when a voltage (about 11.3 volts) is supplied, the DC voltage is not applied to the DC power supply DC1, and the DC power supply DC1 is not damaged. In the present embodiment, the capacitor CD6 is used as a component for supplying a DC voltage to the frame open detection circuit 270 and the external output terminal plate 261 when a DC voltage of 12 volts is not supplied from the DC power supply DC1. . However, the present invention is not limited to this, and the capacitor CD6 may be a secondary battery (rechargeable battery) with a higher storage capacity or a primary battery that does not need to be charged.

  One end of the capacitor CD6 is connected to one end of the switch SW1 and one end of the switch SW2, and is connected to one end of the resistor R7 of the external output terminal plate 261. One end of a resistor R9 is connected to the other ends of the switch SW1 and the switch SW2. The other end of the resistor R9 is connected to one end of the capacitor CD2, one end of the resistor R4, and one end of the internal resistor R5 of the transistor TR1.

  By this connection, one of the switch SW1 or the switch SW2 (one of the inner frame 12 or the front frame 14), or both of the switch SW1 and the switch SW2 are in a conductive state (both the inner frame 12 and the front frame 14 are open) During the period, since the direct current voltage is supplied to the resistor R4, the terminal of the collector terminal c of the transistor TR1 and the terminal of the emitter terminal e of the transistor TR1 are conducted. Then, during this period, current is supplied to the light emitting diode on the primary side of the photocoupler PR1 via the resistor R7 of the external output terminal plate 261. Thereby, one of the switch SW1 or the switch SW2 (one of the inner frame 12 or the front frame 14), or both of the switch SW1 and the switch SW2 are in a conductive state (both the inner frame 12 and the front frame 14 are in an open state). During the period, a high signal is output from the light receiving element (phototransistor) on the secondary side of the photocoupler PR1 to the hole computer 262. Therefore, according to the frame open detection circuit 270 of the second embodiment, since the 1F (farad) capacitor CD6 is provided in the frame open detection circuit 270, power is supplied to the pachinko machine of the second embodiment. Even when a DC voltage of 12 volts is not supplied from the DC power supply DC1, a high signal whose output period fluctuates according to the open period of the inner frame 12 or the front frame 14 is shut off. Can be output to the hall computer 262. Therefore, in addition to the fact that the opening of the inner frame 12 or the front frame 14 can be detected, the opening period of the inner frame 12 or the front frame 14 can also be detected. The hall computer 262 is kept operating for 24 hours. Therefore, the frame open detection circuit 270 outputs the high signal from the external output terminal plate 261 and the time when the high signal is output, that is, the open time of the inner frame 12 and the open time of the front frame 14 as well. It can be stored in 262.

  Furthermore, for example, when the operating time of the game arcade is over and the power supply to the pachinko machine 10 is cut off, and the DC voltage of 12 volts is not supplied from the DC power supply DC1 to the frame open detection circuit 270 and the external output terminal board 261 That is, when the DC voltage of about 11.3 volts is supplied from the capacitor CD6 to the frame open detection circuit 270 and the external output terminal plate 261, the supply period of the current supplied from the capacitor CD6 to the photocoupler PR1 is the inner frame 12 or the period in which the front frame 14 is open. Therefore, the power consumption by opening the inner frame 12 or the front frame 14 can be suppressed small.

  For example, when the operating time of the game arcade is over and the power supply to the pachinko machine is cut off, and the DC voltage is supplied from the capacitor CD6 to the frame open detection circuit 270 and the external output terminal board 261, the inner frame When the total supply period of the current from the capacitor CD6 to the photocoupler PR1 along with the opening of the front frame 14 or 12 is extended or the number of times of detection of the opening of the inner frame 12 or the front frame 14 is increased, the capacitor CD6 The capacity of the capacitor CD6 may be increased (for example, the capacity of the capacitor CD6 may be 10 F), or the capacitor CD6 may be changed to a secondary battery with a large storage capacity.

  Next, referring to FIG. 19, the voltage A of frame open detection circuit 270 changes according to the state of switch SW1 (the state of inner frame 12) and the state of switch SW2 (the state of front frame 14) (FIG. 18) and the output of the external output terminal plate 261 (input of the hall computer 262) will be described. 19 shows the state of the switch SW1 (the state of the inner frame 12), the state of the switch SW2 (the state of the front frame 14), the voltage A of the frame open detection circuit 270 and the output of the external output terminal plate 261 (the state of the hall computer 262 3 is a timing chart showing the relationship of input). Each time from t1 to t8 described in FIG. 19 is the same as each time from t1 to t8 described in the timing chart of the frame open detection circuit 260 according to the first embodiment shown in FIG. is there.

  As shown in FIG. 19 (a), when the switch SW1 becomes conductive (the inner frame 12 is in the open state) at time t1, the frame open detection circuit 270 is followed as shown in FIG. 19 (c). The voltage at A (see FIG. 18) switches from zero volts to about 11.3 volts (at t1). Then, as shown in FIG. 19D, the output of the light receiving element (phototransistor) on the secondary side of the photocoupler PR1, that is, the output of the external output terminal plate 261 switches from the low state to the high state (t1 Time). Thereby, the output of a high signal indicating opening of the inner frame 12 or the front frame 14 to the hall computer 262 is started.

  Then, as shown in FIG. 19 (a), when the switch SW1 is in the cut off state (the inner frame 12 is in the closed state) at t2, as shown in FIG. 19 (c), the voltage of A of the frame open detection circuit 270 Switches from about 11.3 volts to zero volts (at t2). Then, following this, as shown in FIG. 19 (d), the output of the external output terminal plate 261 switches from the high state to the low state (at time t2).

  The switching of the output of the external output terminal plate 261 becomes a high signal, and the high signal is output from the external output terminal plate 261 to the hall computer 262 during t1 to t2. That is, a high signal whose pulse width is an output period from t1 to t2 is output from the external output terminal plate 261 to the hall computer 262.

  Next, as shown in FIG. 19 (a), when the switch SW1 becomes conductive (the inner frame 12 is in the open state) at time t3, the frame is opened following this, as shown in FIG. 19 (c). The voltage at A of the detection circuit 270 (see FIG. 18) switches from zero volt to about 11.3 volts (at time t3). Then, as shown in FIG. 19D, the output of the light receiving element (phototransistor) on the secondary side of the photocoupler PR1, that is, the output of the external output terminal plate 261 switches from low to high (t3). Time). Thereby, the output of a high signal indicating opening of the inner frame 12 or the front frame 14 to the hall computer 262 is started.

  Then, as shown in FIG. 19A, when the switch SW1 is in the cut off state (the inner frame 12 is in the closed state) at time t4, as shown in FIG. 19C, the voltage of A of the frame open detection circuit 270 Switches from about 11.3 volts to zero volts (t4). Then, following this, as shown in FIG. 19 (d), the output of the external output terminal plate 261 switches from the high state to the low state (at t4).

  The switching of the output of the external output terminal plate 261 is a high signal, and the high signal is output from the external output terminal plate 261 to the hall computer 262 during t3 to t4. That is, a high signal which is an output period of pulse width from t3 to t4 is output from the external output terminal plate 261 to the hall computer 262.

  Finally, the case where the switch SW2 is in the conductive state (the front frame 14 is in the open state) when the switch SW1 is in the conductive state (the inner frame 12 is in the open state) will be described. As shown in FIG. 19 (a), the switch SW1 becomes conductive (the inner frame 12 is open) at t5, and as shown in FIG. 19 (b), the switch SW2 is conductive (front) at t6. When the frame 14 is in the open state), as shown in FIG. 19C, the voltage A (see FIG. 18) of the frame open detection circuit 270 switches from zero volt to about 11.3 volts at t5. Then, following this, as shown in FIG. 19D, as shown in FIG. 19D, the output of the external output terminal plate 261 switches from the low state to the high state (at time t5). Thereby, the output of a high signal indicating opening of the inner frame 12 or the front frame 14 to the hall computer 262 is started.

  Then, as shown in FIG. 19A, at time t7, the switch SW1 is in the closed state (the inner frame 12 is closed), and as shown in FIG. 19B, the switch SW2 is in the closed state at t8. When (the front frame 14 is closed), as shown in FIG. 19C, the voltage of A of the frame open detection circuit 270 switches from zero volt to about 11.3 volts at t8. Then, following this, as shown in FIG. 19 (d), the output of the external output terminal plate 261 switches from the high state to the low state (at t8).

  The switching of the output of the external output terminal plate 261 becomes a high signal, and the high signal is output from the external output terminal plate 261 to the hall computer 262 during t5 to t8. That is, a high signal which is an output period of pulse width from t5 to t8 is output from the external output terminal plate 261 to the hall computer 262.

  Thus, when the switch SW1 and the switch SW2 are in the conductive state (the inner frame 12 and the front frame 14 are in the open state), in the frame open detection circuit 270, either one of the switch SW1 or the switch SW2 is in the conductive state (the inner frame 12 or the front frame 14 from the open state) until both the switch SW1 and the switch SW2 are in the closed state (both the inner frame 12 and the front frame 14 are closed) A high signal can be output from the output terminal plate 261 to the hall computer 262. Therefore, in addition to the fact that the opening of the inner frame 12 or the front frame 14 can be detected, when either one of the inner frame 12 or the front frame 14 is in the open state, both the inner frame 12 and the front frame 14 can be detected. It is possible to detect the open period until the closed state.

  As described above, according to the pachinko machine of the second embodiment, since the frame open detection circuit 270 is provided with the 1F (farad) capacitor CD6, the power supply to the pachinko machine of the second embodiment is interrupted. Even when a DC voltage of 12 volts is not supplied from the DC power supply DC1, the frame open detection circuit 270 outputs a high signal whose output period fluctuates according to the open period of the inner frame 12 or the front frame 14. It can be output to the hall computer 262. Then, the hall computer 262 outputs the high signal from the external output terminal plate 261 and stores the output period of the outputted high signal, thereby detecting the opening of the inner frame 12 or the front frame 14. In addition to what can be done, the opening period of the inner frame 12 or the front frame 14 can also be detected. In addition, the high signal output from the external output terminal plate 261 to the hall computer 262 is stored in the hall computer 262 which continues operating for 24 hours. Therefore, by the high signal stored in the hall computer 262, it is possible to specify the pachinko machine in which the inner frame 12 or the front frame 14 has been opened. Furthermore, the hall computer 262 outputs the high signal from the external output terminal plate 261 and stores the output time of the outputted high signal, so that the open time or front face of the inner frame 12 of the specified pachinko machine is stored. The opening time of the frame 14 can also be detected.

  Next, a pachinko machine of a third embodiment will be described with reference to FIGS. 20 and 21. FIG. The pachinko machine of the third embodiment is obtained by changing the frame opening detection circuit 260 of the pachinko machine 10 of the first embodiment to a frame opening detection circuit 280 which is another configuration. The frame opening detection circuit 280 according to the third embodiment simplifies the circuit configuration of the frame opening detection circuit 260 according to the first embodiment. Specifically, the frame open detection circuit 280 of the third embodiment removes the resistor R2 and the capacitors CD4 and CD5 from the frame open detection circuit 260 of the first embodiment, and removes the resistor R1, the capacitor CD3, the resistor R7 and the switch SW1. And the switch SW2 are changed, the timer IC1 is made to function as a monostable multivibrator, and an integration circuit 281 composed of the resistor 10 and the capacitor CD7 is connected in front of the TRG terminal of the timer IC1. Is a simplified version of Then, with respect to the frame open detection circuit 260 of the first embodiment, the frame open detection circuit 280 of the third embodiment is output from the form of the voltage applied to the TRG terminal of the timer IC1 and the OUT terminal of the timer IC1. The aspect of the voltage is changed.

  According to the frame open detection circuit 280 of the third embodiment, the integration circuit 281 makes the falling period of the voltage applied to the TRG terminal of the timer IC 1 constant regardless of the open period of the inner frame 12 or the front frame 14 By setting the period (about 2 ms), the falling period of the voltage applied to the TRG terminal of timer IC1 is longer than the period (about 10 ms) in which a voltage of about 9.6 volts is output from the OUT terminal of timer IC1. It can be adjusted short. Therefore, regardless of the open period of the inner frame 12 or the front frame 14, the supply period of the current supplied from the capacitor CD1 to the photocoupler PR1 is limited to about 10 ms per one open of the inner frame 12 or the front frame 14. be able to. Therefore, the frame open detection circuit 280 can simplify the circuit configuration as compared with the frame open detection circuit 260, and keep the period in which a voltage of about 9.6 volts is outputted from the OUT terminal of the timer IC1 to about 10 ms. Thus, the power consumption due to the opening of the inner frame 12 or the front frame 14 can be suppressed to be smaller than that of the frame opening detection circuit 260.

  FIG. 20 is a block diagram showing the electrical configuration of the frame open detection circuit 280 of the third embodiment. The same parts as those of the frame open detection circuit 260 according to the first embodiment described above with reference to FIG. 7 will be assigned the same reference numerals and descriptions thereof will be omitted, and only different parts will be described.

  When the power supply to the pachinko machine is shut off and the DC voltage from DC power source DC1 is not supplied to 12 volts, one end of the capacitor CD1 that supplies the DC voltage to the frame open detection circuit 280 and the external output terminal plate 261 is It is connected to one end of a 100 kΩ resistor R10, and is connected to the VDD terminal of the timer IC1, one end of a 100 kΩ resistor R1a, the RES terminal of the timer IC1, and one end of a 1 kΩ resistor R7a.

  The other end of the resistor R1a is connected to one end of a 0.1 μF capacitor CD3a, and is connected to the DCH terminal of the timer IC1 and the TH terminal of the timer IC1. The other end of the capacitor CD3a is grounded. By the connection between the capacitor CD3a and the resistor R1a, the timer IC1 opens the inner frame 12 or the front frame 14 and thereby the switch SW1 or the switch SW2 becomes conductive, and the voltage applied to the TRG terminal of the timer IC1 is When it falls to zero volts, it functions as a monostable multivibrator that raises the voltage of the OUT terminal of the timer IC1 from zero volt to about 9.6 volts for about 10 ms. Note that about 10 ms, which is a period for raising the voltage at the OUT terminal of timer IC1 from zero volt to about 9.6 volts, is the product of the resistance value (100 kΩ) of resistor R1a and the capacitance value (0.1 μF) of capacitor CD3a. It is determined by a certain time constant.

  The resistor R10 is a resistor that stabilizes a voltage applied to the TRG terminal of the timer IC1, and is a resistor that configures an integration circuit 281 with the capacitor CD7. The other end of the resistor R10 is connected to the anode terminal of the diode D2, and the cathode terminal of the diode D2 is connected to the TRG terminal of the timer IC1, and a Zener having a limiting voltage (Zener voltage) of about 10.5 volts. The cathode terminal of the diode D3 is connected to one end of each of the switch SW1 and the switch SW2 connected in parallel. Therefore, when the inner frame 12 and the front frame 14 are closed and the switch SW1 and the switch SW2 are shut off, the voltage applied to the TRG terminal of the timer IC1 is about 11.3 volts supplied from the capacitor CD1. Of the voltage drop across resistor R10 and about 0.7 volts of the voltage drop across diode D2 are approximately 10.3 volts.

  The 0.02 μF capacitor CD7 is a capacitor that forms an integration circuit 281 with the resistor R10 and controls the voltage applied to the TRG terminal of the timer IC1. The other end of each of the switch SW1 and the switch SW2 is connected to one end of the capacitor CD7, and the other end of the capacitor CD7 is grounded. Integral circuit 281 formed of capacitor CD7 and resistor R10 is applied to the TRG terminal of timer IC1 when switch SW1 or switch SW2 becomes conductive as inner frame 12 or front frame 14 is opened. The voltage of about 10.3 volts is dropped to zero volts, and the voltage of the TRG terminal of the timer IC 1 is returned to about 10.3 volts again about 2 ms after the drop.

  Specifically, when the inner frame 12 or the front frame 14 is opened and the switch SW1 or switch SW2 is turned on in response to the opening, a voltage of about 10.3 volts supplied from the capacitor CD1 is applied to the capacitor CD7. The application of voltage is started to start charging of the capacitor CD7. At the start of this charging, the voltage applied to the capacitor CD7 instantaneously becomes zero volts, so that the voltage applied to the TRG terminal of the timer IC1 instantaneously becomes zero volts. Then, as the capacitor CD7 is charged, the capacitor CD7 raises the voltage applied to the TRG terminal of the timer IC1, and finally controls the voltage applied to the TRG terminal of the timer IC1 to about 10.3 volts. It is

  During the period until the capacitor CD7 is completely charged, that is, the voltage of about 10.3 volts applied to the TRG terminal of the timer IC1 falls to zero volts, and from that fall, the voltage of the TRG terminal of the timer IC1 becomes Again, the time to return to about 10.3 volts, about 2 ms, is determined by the time constant, which is the product of the resistance (100 k.OMEGA.) Of resistor R10 and the capacitance (0.02 .mu.F) of capacitor CD7.

  As described above, during the period (about 2 ms) from when the voltage applied to the TRG terminal of the timer IC1 falls and the voltage at the TRG terminal of the timer IC1 returns to about 10.3 volts again (about 2 ms). Thus, regardless of the open periods of the inner frame 12 and the front frame 14, the voltage at the OUT terminal of the timer IC1 is adjusted to a period shorter than the period (about 10 ms) rising from zero volts to about 9.6 volts. Note that after the voltage applied to the TRG terminal of the timer IC1 falls by changing the resistance value of the resistor R10 and the capacitance value of the capacitor CD7, the voltage of the TRG terminal of the timer IC1 is about 10.3 volts It is possible to freely change the period until it returns to 0 ° within about 10 ms, which is the period until the voltage at the OUT terminal of the timer IC1 rises from zero volt to about 9.6 volts.

  Here, in the monostable multivibrator, the signal is not normally output from the output terminal unless the input period of the signal input to the input terminal is shorter than the output period of the signal output from the output terminal (from the output terminal The signal continues to be output). Therefore, when the timer IC1 is made to function as a monostable multivibrator without using the integration circuit 281, the timer IC1 is shorter than the period in which the voltage at the OUT terminal of the timer IC1 rises from zero volts to about 9.6 volts. The period of time until the voltage at the TRG terminal returns to about 10.3 volts again from zero volt, that is, the open period of the inner frame 12 and the front frame 14 (the conduction period of the switches SW1 and SW2) should be short. However, since the open period of the inner frame 12 and the front frame 14 can not be predicted at all, the inner frame 12 and the voltage of the OUT terminal of the timer IC 1 rise more than the period when rising from zero volts to about 9.6 volts. In order to always shorten the open period of the front frame 14, it is necessary to set a period in which the voltage at the OUT terminal of the timer IC1 rises from zero volt to about 9.6 volt as a sufficiently long period. For example, if the open period of the inner frame 12 and the front frame 14 is predicted to be from several tens of seconds to several minutes, the period during which the voltage at the OUT terminal of the timer IC1 rises from zero volts to about 9.6 volts is sufficient margin. You have to set from several minutes to several tens of minutes. Then, during this set period, the DC voltage is continuously supplied from the capacitor CD1 to the frame open detection circuit 280 and the external output terminal plate 261, so that the consumption of the capacitor CD1 becomes remarkable. Therefore, a special circuit configuration is necessary in order to suppress consumption of the charge stored in capacitor CD1 after functioning timer IC1 as a monostable multivibrator without using integration circuit 281. there were.

  However, when the inner frame 12 or the front frame 14 is opened by providing the integration circuit 281 in the previous stage of the TRG terminal of the timer IC1, the timer IC1 is opened regardless of the open period (the conduction period of the switch SW1 and the switch SW2). Adjust the period from when the voltage applied to the TRG terminal of the IC falls to zero volts and returns again to about 10.3 volts, shorter than the period when the voltage at the OUT terminal of the timer IC1 rises from zero volt to about 9.6 volts can do. As described above, the timer IC1 can be normally operated by setting the falling period of the TRG terminal voltage of the timer IC1 to a fixed period (about 2 ms) regardless of the open periods of the inner frame 12 and the front frame 14 by the integration circuit 281. It is possible to operate and keep the period in which the voltage at the OUT terminal of the timer IC1 rises from zero volts to about 9.6 volts to about 10 ms.

  Then, when the voltage at the OUT terminal of the timer IC1 rises from zero volt to about 9.6 volts for about 10 ms, the collector terminal and the emitter terminal of the transistor TR1 conduct for about 10 ms, and via the resistor R7a Current is supplied from the capacitor CD1 to the photocoupler PR1 for about 10 ms. As a result, a pulse signal with a pulse width of about 10 ms is output from the external output terminal plate 261 to the hole computer 262 for one opening of the inner frame 12 or the front frame 14. As described above, even if the timer IC1 is made to function as a monostable multivibrator, the integration circuit 281 is provided before the TRG terminal of the timer IC1, thereby suppressing consumption of the charge stored in the capacitor CD1, The output period of the pulse signal output from the external output terminal plate 261 to the hall computer 262 can be limited to about 10 ms without adopting a circuit configuration as described above.

  The cathode terminal of the zener diode D3 whose limiting voltage (zener voltage) is about 10.5 volts is connected to the TRG terminal of the timer IC1, and the anode terminal of the zener diode D3 is connected to the ground. In the Zener diode D3, when the inner frame 12 or the front frame 14 is opened and the switch SW1 or the switch SW2 is turned on, the charge stored in the capacitor CD7 and the voltage supplied from the capacitor CD1 are superimposed. This is an element that prevents an overvoltage (for example, a voltage of 12.3 volts) that is generated due to the above to destroy the timer IC1 from being applied to the TRG terminal of the timer IC1. Specifically, the inner frame 12 or the front frame 14 is opened, the switch SW1 or the switch SW2 is turned on, and the charge stored in the capacitor CD7 is again transmitted within the relatively short time. When the switch SW1 or the switch SW2 is turned on, the other end side of the switch SW1 or the switch SW2 is discharged from the other end side to the one end side. A voltage of about 10.3 volts discharged from capacitor CD7 and a voltage of about 10.3 volts supplied from capacitor CD1 are superimposed, and an overvoltage of the magnitude that destroys timer IC1 is applied to the TRG terminal of timer IC1. It can be applied. However, since a Zener diode D3 having a limited voltage (zener voltage) of about 10.5 volts is connected between the TRG terminal of timer IC1 and the ground, the voltage applied to the TRG terminal of timer IC1 is The maximum value is about 10.5 volts, and an overvoltage of magnitude that destroys the timer IC1 is not applied to the TRG terminal of the timer IC1. Thus, using a simple configuration and inexpensive Zener diode D3, it is possible to prevent an overvoltage having a magnitude that destroys the timer IC1 from being applied to the TRG terminal of the timer IC1, and to prevent damage to the timer IC1. it can.

  As described above, since the limited pressure reduction (zener voltage) of the Zener diode D3 is about 10.5 volts, the inner frame 12 and the front frame 14 are closed, and the switch SW1 and the switch SW2 are shut off. In this case, the current supplied from the capacitor CD1 does not flow to the ground via the Zener diode D3, and the charge of the capacitor CD1 is not consumed. Further, the cathode terminal of the diode D2 is connected to one end of the switch SW1 and the switch SW2, and the diode D2 exhibits the function of preventing the backflow of current, so a voltage of about 10.3 volts discharged from the capacitor CD7 However, they are not damaged by being applied to the capacitor CD1 and the VDD terminal of the timer IC1.

  As described above, in the timer IC1 of the frame open detection circuit 280, the inner frame 12 or the front frame 14 is opened, the switch SW1 or the switch SW2 is conducted, and the voltage applied to the TRG terminal of the timer IC1 falls to zero volts. Also, for about 10 ms from this fall, the voltage of the OUT terminal of the timer IC1 functions as a monostable multi-vibrator that raises it from zero volt to about 9.6 volt. Then, by providing the integration circuit 281 in the front stage of the TRG terminal of the timer IC1, when the inner frame 12 or the front frame 14 is opened, the timer IC1 is turned on regardless of the open period of the inner frame 12 and the front frame 14. Adjust the period until the voltage applied to the TRG terminal returns to about 10.3 volts after falling to zero volts, shorter than the period when the voltage at the OUT terminal of the timer IC1 rises from zero volts to about 9.6 volts Can. Thus, as the monostable multivibrator, the integration circuit 281 sets the falling period of the TRG terminal voltage of the timer IC 1 to a fixed period (about 2 ms) regardless of the open periods of the inner frame 12 and the front frame 14. The functioning timer IC1 can be operated normally, and the period in which the voltage at the OUT terminal of the timer IC1 rises from zero volts to about 9.6 volts can be limited to about 10 ms. Thus, the period in which current is supplied from the capacitor CD1 to the photocoupler PR1 can be limited to about 10 ms, and the output period of the pulse signal output from the external output terminal plate 261 to the hall computer 262 can be limited to about 10 ms. it can.

  Further, since the frame open detection circuit 280 is provided with the 0.1 F capacitor CD1, the frame open detection circuit 280 is supplied with power to the pachinko machine, and a DC voltage of 12 volts from the DC power source DC1 is When supplied, it naturally operates, and for example, when the operating time of the game arcade is over, the power supply to the pachinko machine is cut off, and a DC voltage of 12 volts from the DC power source DC1 is not supplied. Even in this case, the opening of the inner frame 12 and the opening of the front frame 14 can be detected. Then, when the opening of the inner frame 12 or the opening of the front frame 14 is detected by the frame open detection circuit 280, a pulse signal with a pulse width of about 10 ms is sent from the external output terminal plate 261 to the hole computer 262 for one detection. Can be output. The pulse signal output from the external output terminal plate 261 to the hall computer 262 is stored in the hall computer 262 which continues operating for 24 hours. Therefore, by the pulse signal stored in the hall computer 262, it is possible to identify the pachinko machine in which the inner frame 12 or the front frame 14 has been opened. Furthermore, the opening time or the front surface of the inner frame 12 of the specified pachinko machine is stored by storing the output time of the output pulse signal as well as the output of the pulse signal from the external output terminal plate 261 to the hall computer 262. The opening time of the frame 14 can be detected.

  Although the door open detection circuit 280 detects the open of the inner frame 12 or the open of the front frame 14 by using the LMC 555 for the timer IC1, the circuit for energizing the photocoupler PR1 for about 10 ms is realized. It is not limited. That is, a circuit that generates a pulse signal for one opening of the inner frame 12 or one opening of the front frame 14 is realized using another integrated circuit or the like for the timer IC 1, part 1 It is sufficient if the photocoupler PR1 is energized for a predetermined period based on the pulse signal.

  Also, for example, when the operating time of the game arcade is over and the power supply to the pachinko machine is cut off, and the DC voltage is supplied from the capacitor CD1 to the frame open detection circuit 280 and the external output terminal board 261, When the total supply period of the current from the capacitor CD1 to the photocoupler PR1 along with the opening of the front frame 14 or 12 is extended or the number of times of detection of the opening of the inner frame 12 or the front frame 14 is increased, The capacity of the capacitor CD1 may be increased (for example, the capacity of the capacitor CD1 may be 1 F), or the capacitor CD1 may be changed to a secondary battery with a large storage capacity.

  Next, referring to FIG. 21, the TRG terminal voltage of timer IC1 changes according to the state of switch SW1 (the state of inner frame 12) and the state of switch SW2 (the state of front frame 14) The relationship between the OUT terminal voltage and the output of the external output terminal plate 261 (input of the hall computer 262) will be described. 21 shows the state of the switch SW1 (the state of the inner frame 12), the state of the switch SW2 (the state of the front frame 14), the TRG terminal voltage of the timer IC1, the OUT terminal voltage of the timer IC1, and the output of the external output terminal plate 261 (FIG. 7 is a timing chart showing the relationship of the input of the hole computer 262). Note that each time from t1 to t8 described in FIG. 21 is the same as each time from t1 to t8 described in the timing chart of the frame open detection circuit 260 of the first embodiment shown in FIG. is there.

  As shown in FIG. 21A, when the switch SW1 becomes conductive (the inner frame 12 is opened) at t1, charging of the capacitor CD7 is started, and as shown in FIG. 21C, the timer IC1 is turned on. The TRG terminal voltage falls from about 10.3 volts to zero volts (at t1). Then, following this, as shown in FIG. 21D, the OUT terminal voltage of the timer IC1 rises from zero volt to about 9.6 volts (at t1). Thereby, the collector terminal and the emitter terminal of the transistor TR1 of the frame opening detection circuit 280 are conducted, and current supply is started to the light emitting diode on the primary side of the photocoupler PR1 of the external output terminal plate 261 (see FIG. 20). (At t1). Then, as shown in FIG. 21E, the output of the light receiving element (phototransistor) on the secondary side of the photocoupler PR1, that is, the output of the external output terminal plate 261 is cut from the low state to the high state at t1. It changes. As a result, output of a pulse signal indicating opening of the inner frame 12 or the front frame 14 to the hole computer 262 is started.

  Next, as shown in FIG. 21C, when about 2 ms elapses from time t1, the charging of the capacitor CD7 is completed, and the voltage at the TRG terminal of the timer IC1 returns from zero volt to about 10.3 volts again. However, since about 10 ms has not elapsed since the voltage at the OUT terminal of timer IC1 rose from zero volts to about 9.6 volts, the OUT terminal voltage of timer IC1 is about 9.6 volts. It is maintaining the state.

  After that, when about 10 ms elapses from t1, as shown in FIG. 21D, the timer IC1 switches the voltage of the OUT terminal from about 9.6 volts to zero volts. Then, the collector terminal and the emitter terminal of the transistor TR1 of the frame opening detection circuit 280 are disconnected, and the current supply to one end of the resistor R7a of the external output terminal plate 261 is stopped. Therefore, as shown in FIG. 21E, the output of the external output terminal plate 261 switches from the high state to the low state when about 10 ms has elapsed from t1. As a result, the output of the pulse signal output to the hall computer 262 is stopped. Thus, by switching the output of the external output terminal plate 261, the pulse width of the pulse signal output from the external output terminal plate 261 to the hall computer 262 can be limited to about 10 ms.

  As shown in FIG. 21A, when the switch SW1 is in the closed state (the inner frame 12 is closed) at time t2, the frame open detection circuit 280 detects the inner frame 12 and the front frame 14 again. It is set to the possible state.

  Next, as shown in FIG. 21B, when the switch SW2 becomes conductive (the front frame 14 is opened) at t3, charging of the capacitor CD7 is started, and as shown in FIG. 21C, The TRG terminal voltage of the timer IC1 falls from about 10.3 volts to zero volts (at time t3). Then, following this, as shown in FIG. 21D, the OUT terminal voltage of the timer IC1 rises from zero volt to about 9.6 volts (at time t3). Thereby, the collector terminal and the emitter terminal of the transistor TR1 of the frame opening detection circuit 280 are conducted, and current supply is started to the light emitting diode on the primary side of the photocoupler PR1 of the external output terminal plate 261 (see FIG. 20). (T3). Then, as shown in FIG. 21E, the output of the light receiving element (phototransistor) on the secondary side of the photocoupler PR1, that is, the output of the external output terminal plate 261 is cut from low to high at t3. It changes. As a result, output of a pulse signal indicating opening of the inner frame 12 or the front frame 14 to the hole computer 262 is started.

  The charge stored in the capacitor CD7 between t1 and t2 is instantaneously completed through the zener diode D3 at t3. Since the discharge period of the capacitor CD7 is a very small period from about 2 ms in which the voltage at the TRG terminal of the timer IC1 changes from about 10.3 volts to zero volts and becomes about 10.3 volts again, the TRG of the timer IC1 is It does not significantly affect the voltage applied to the terminals. Furthermore, in addition to the discharge, the charge stored in the capacitor CD7 from t1 to t2 is also discharged by the self discharge of the capacitor CD7.

  At time t3, the voltage of about 10.3 volts supplied from the capacitor CD1 and the voltage of about 10.3 volts associated with the charge stored in the capacitor CD7 are superimposed on the TRG terminal of the timer IC1. An overvoltage having a magnitude that destroys the timer IC1 may be applied. However, since the Zener diode D3 whose limiting voltage (Zener voltage) is approximately 10.5 volts is connected to the front stage of the TRG terminal of the timer IC1, the maximum value of the voltage applied to the TRG terminal of the timer IC1 is The overvoltage which is about 10.5 volts and which destroys the timer IC1 is not applied to the TRG terminal of the timer IC1.

  Next, as shown in FIG. 21C, when about 2 ms elapses from t3, charging of the capacitor CD7 is completed, and the voltage at the TRG terminal of the timer IC1 returns from zero volt to about 10.3 volts again. However, since about 10 ms has not elapsed since the voltage at the OUT terminal of timer IC1 has risen from zero volts to about 9.6 volts, the OUT terminal voltage of timer IC1 is about 9.6 volts. It is maintaining the state.

  Thereafter, when about 10 ms has elapsed from t3 time, as shown in FIG. 21D, the timer IC1 switches the voltage of the OUT terminal from about 9.6 volts to zero volts. Then, the collector terminal and the emitter terminal of the transistor TR1 of the frame opening detection circuit 280 are disconnected, and the current supply to one end of the resistor R7a of the external output terminal plate 261 is stopped. Therefore, the output of the external output terminal plate 261 switches from the high state to the low state as shown in FIG. 21 (e) when about 10 ms has elapsed from t3. As a result, the output of the pulse signal output to the hall computer 262 is stopped. Thus, by switching the output of the external output terminal plate 261, the pulse width of the pulse signal output from the external output terminal plate 261 to the hall computer 262 can be limited to about 10 ms.

  As shown in FIG. 21B, when the switch SW2 is in the closed state (the front frame 14 is closed) at t4, the frame open detection circuit 280 detects the inner frame 12 and the front frame 14 again. It is set to the possible state.

  Finally, the case where the switch SW2 is in the conductive state (the front frame 14 is in the open state) when the switch SW1 is in the conductive state (the inner frame 12 is in the open state) will be described. As shown in FIG. 21 (a), the switch SW1 becomes conductive (the inner frame 12 is open) at t5, and as shown in FIG. 21 (b), the switch SW2 is conductive (front) at t6. When the frame 14 is opened, charging of the capacitor CD7 is started at t5, and as shown in FIG. 21C, the voltage at the TRG terminal of the timer IC1 falls from about 10.3 volts to zero volts (t5). Time). Then, following this, as shown in FIG. 21D, the OUT terminal voltage of the timer IC1 rises from zero volt to about 9.6 volts (at t5). Thereby, the collector terminal and the emitter terminal of the transistor TR1 of the frame opening detection circuit 280 are conducted, and current supply is started to the light emitting diode on the primary side of the photocoupler PR1 of the external output terminal plate 261 (see FIG. 20). (At 5 o'clock). Then, as shown in FIG. 21E, the output of the light receiving element (phototransistor) on the secondary side of the photocoupler PR1, that is, the output of the external output terminal plate 261 is cut from low to high at t5. It changes. As a result, output of a pulse signal indicating opening of the inner frame 12 or the front frame 14 to the hole computer 262 is started.

  Since the charge stored in the capacitor CD7 between t3 and t4 is instantaneously completed through the zener diode D3 at t5, it significantly affects the voltage applied to the TRG terminal of the timer IC1. is not. Furthermore, in addition to this discharge, the charge stored in the capacitor CD7 from t3 to t4 is also discharged by the self discharge of the capacitor CD7.

  At time t5, the voltage of about 10.3 volts supplied from capacitor CD1 and the voltage of about 10.3 volts associated with the charge stored in capacitor CD7 are superimposed on the TRG terminal of timer IC1. An overvoltage having a magnitude that destroys the timer IC1 may be applied. However, since the maximum value of the voltage applied to the TRG terminal of the timer IC1 is about 10.5 volts by the Zener diode D3, an overvoltage having a magnitude that destroys the timer IC1 is applied to the TRG terminal of the timer IC1. There is no.

  Next, as shown in FIG. 21C, when about 2 ms elapses from t5, charging of the capacitor CD7 is completed, and the voltage at the TRG terminal of the timer IC1 returns from zero volt to about 10.3 volts again. However, since about 10 ms has not elapsed since the voltage at the OUT terminal of timer IC1 has risen from zero volts to about 9.6 volts, the OUT terminal voltage of timer IC1 is about 9.6 volts. It is maintaining the state.

  After that, when about 10 ms elapses from t5, as shown in FIG. 21D, the timer IC1 switches the voltage of the OUT terminal from about 9.6 volts to zero volts. Then, the collector terminal and the emitter terminal of the transistor TR1 of the frame opening detection circuit 280 are disconnected, and the current supply to one end of the resistor R7a of the external output terminal plate 261 is stopped. Therefore, as shown in FIG. 21E, the output of the external output terminal plate 261 switches from the high state to the low state when about 10 ms elapses from t5. As a result, the output of the pulse signal output to the hall computer 262 is stopped. Thus, by switching the output of the external output terminal plate 261, the pulse width of the pulse signal output from the external output terminal plate 261 to the hall computer 262 can be limited to about 10 ms.

  As shown in FIG. 21 (a), the switch SW1 is in the shutoff state (the inner frame 12 is in the closed state) at t7, and the switch SW2 is in the shutoff state at t8 as shown in FIG. 21 (b). When (the front frame 14 is in a closed state), the frame open detection circuit 280 is again set to a state in which the inner frame 12 and the front frame 14 can be detected.

  As described above, even when the switch SW2 is in the conductive state (the front frame 14 is in the open state) when the switch SW1 is in the conductive state (the inner frame 12 is in the open state), the timer IC1 performs the conduction period of the switch SW1. Regardless of (the open period of the inner frame 12) and the conduction period of the switch SW2 (the open period of the front frame 14), either one of the switch SW1 or the switch SW2 is in the conductive state (either the inner frame 12 or the front frame 14 Becomes open, and the voltage at the OUT terminal of the timer IC1 is switched from about 9.6 volts to zero volts when about 10 ms elapses after the voltage at the TRG terminal of the timer IC1 falls from about 10.3 volts to zero volts. Thus, the supply period of the current supplied to the photocoupler PR1 of the external output terminal plate 261 is approximately 10 ms.

  Therefore, for example, when the operating time of the game arcade is over and the power supply to the pachinko machine is cut off and the DC voltage of 12 volts is not supplied from the DC power supply DC1 to the frame open detection circuit 280 and the external output terminal board 261, ie When the DC voltage of about 10.3 volts is supplied from the capacitor CD1 to the frame open detection circuit 280 and the external output terminal plate 261, the supply period of the current supplied from the capacitor CD1 to the photocoupler PR1 is the inner frame 12 Or it can be fixed to about 10 ms per one opening of the front frame 14. Therefore, the power consumption due to the opening of the inner frame 12 or the front frame 14 can be reduced.

  Here, since the capacity of the capacitor CD1 is 0.1 F and the voltage applied to the capacitor CD1 is about 11.3 volts, the charge stored in the capacitor CD1 is the capacity of the capacitor CD1 and the voltage applied to the capacitor CD1. It becomes approximately 1.13 C (coulomb) from the product of The electric charge of about 1.13 C stored in the capacitor CD1 corresponds to about 500 times of current supply when the supply period of the current supplied from the capacitor CD1 to the photocoupler PR1 is about 10 ms. Do. Therefore, for example, when the operating time of the game arcade is over and the power supply to the pachinko machine is cut off, and the DC voltage of 12 volts is not supplied from the DC power supply DC1, opening of the inner frame 12 (conduction of switch SW1 Or, even when the opening of the front frame 14 (the conduction of the switch SW2) is performed many times, the frame opening detection circuit 280 opens the inner frame 12 or opens the front frame 14 (the conduction of the switch SW1 or the switch The conduction of the switch SW2 can be reliably detected each time up to about 500 times, and a pulse signal can be output from the external output terminal plate 261 to the hall computer 262. At this time, when the opening of the inner frame 12 or the opening of the front frame 14 reaches about 500 times, the charge stored in the capacitor CD1 decreases and the value of the current supplied from the capacitor CD1 to the photocoupler PR1 decreases. The pulse signal can be stored in the hole computer 262 by increasing the detection sensitivity of the pulse signal of the computer 262 (by lowering the threshold for the amplitude of the pulse signal).

  As described above, according to the pachinko machine of the third embodiment, when the inner frame 12 or the front frame 14 is in the open state and the switch SW1 or the switch SW2 is in the conductive state, the integrating circuit 281 causes the inner frame The fall period of the voltage applied to the TRG terminal of the timer IC 1 is set to a fixed period (about 2 ms) regardless of the open period of the front frame 14 or 12. Then, the timer IC1 functioning as a monostable multivibrator operates normally, and the voltage at the OUT terminal of the timer IC1 is approximately 0 volts from the zero volt until approximately 10 ms elapses after the voltage at the TRG terminal of the timer IC1 falls to zero volts. Start up to 9.6 volts. Thus, current is supplied to the light emitting diode on the primary side of the photocoupler PR1 provided on the external output terminal plate 261 through the resistor R7a, and the light emitting diode emits light for about 10 ms. When the light receiving element (phototransistor) on the secondary side of the photocoupler PR1 receives the light from the light emitting diode, the light receiving element (phototransistor) on the secondary side of the photocoupler PR1 has a pulse width of about 10 ms. Converts it into a pulse signal (electrical signal) of about 10 ms and outputs the pulse signal to the hall computer 262. The output pulse signal is stored in the hall computer 262. Therefore, by using the frame open detection circuit 280 provided with the integration circuit 281 and the external output terminal plate 261, it is stored in the hall computer 262 that the inner frame 12 has been opened or the front frame 14 has been opened. it can. The hall computer 262 is kept operating for 24 hours. Therefore, the open frame detection circuit 280 outputs the pulse signal from the external output terminal plate 261 and also the time when the pulse signal is output, that is, the open time of the inner frame 12 and the open time of the front frame 14 as well. It can be stored in 262.

  Further, since the frame open detection circuit 280 is provided with the 0.1 F capacitor CD1, the frame open detection circuit 280 is supplied with power to the pachinko machine, and a DC voltage of 12 volts from the DC power source DC1 is When supplied, it naturally operates, and for example, when the operating time of the game arcade is over, the power supply to the pachinko machine is cut off, and a DC voltage of 12 volts from the DC power source DC1 is not supplied. Even in this case, the opening of the inner frame 12 and the opening of the front frame 14 can be detected. Therefore, for example, even when the operating time of the game arcade is over and the power supply to the pachinko machine is cut off, a pulse signal with a pulse width of about 10 ms is output from the external output terminal plate 261 to the hall computer 262 be able to.

  In the present embodiment, when the inner frame 12 or the front frame 14 is opened and the switch SW1 or the switch SW2 is conductive, a pulse signal is output from the external output terminal plate 261 to the hall computer 262, It is not limited to this. That is, when the connection of each part of the main frame opening detection circuit 280 is changed, the inner frame 12 or the front frame 14 is opened, and the opened inner frame 12 or the front frame 14 is closed, A current may be supplied for about 10 ms to output a pulse signal from the external output terminal plate 261 to the hall computer 262.

  However, in the frame open detection circuit 280 of the present embodiment, when the inner frame 12 or the front frame 14 is open and the switch SW1 or the switch SW2 is conductive, a pulse signal from the external output terminal plate 261 to the hall computer 262 Can be detected quickly, so that the opening of the inner frame 12 or the front frame 14 can be detected quickly. Thus, the opening of the inner frame 12 or the front frame 14 can be detected before the inner frame 12 or the front frame 14 is opened and the main control device 110 or the game board 13 is tampered with. Therefore, it is possible to prevent an abnormal operation due to the fraudulent action that occurs when power is supplied to the pachinko machine.

  Next, a pachinko machine 500 of a fourth embodiment will be described with reference to FIGS. In the pachinko machine 500 of the fourth embodiment, when power is supplied to the pachinko machine 500 and a DC voltage of 12 volts is supplied from the DC power supply DC1, either the inner frame 12 or the front frame 14 is When released, the pachinko machine 500 is used to separately notify which one has been released, and separately which one is released is output to the hall computer 262. On the other hand, in the pachinko machine 500 of the fourth embodiment, for example, when the operating time of the game arcade is over and the power supply to the pachinko machine is shut off and the DC voltage of 12 volts is not supplied from the DC power supply DC1. Even if the control of the main control unit 110 is stopped, when either the inner frame 12 or the front frame 14 is opened, which one is opened is separately output to the hall computer 262.

  Therefore, according to the pachinko machine 500 of the fourth embodiment, when any of the inner frame 12 and the front frame 14 is opened when a DC voltage of 12 volts is supplied from the DC power supply DC1, the inner frame The pachinko machine 500 can be used to separately notify whether there is an opening 12, an opening of the front frame 14, or both openings. Furthermore, according to the pachinko machine 500 of the fourth embodiment, in addition to the case where a DC voltage of 12 volts is supplied from the DC power supply DC1, the case where a DC voltage of 12 volts is not supplied from the DC power supply DC1. Also, when either the inner frame 12 or the front frame 14 is opened, pulse signals can be separately output to the hall computer 262. Therefore, the pulse signal stored in the hall computer 262 can identify whether the inner frame 12 has been opened, the front frame 14 has been opened, or both have been opened.

  The internal configuration of a pachinko machine 500 according to the fourth embodiment will be described with reference to FIG. FIG. 22 is a perspective view of the pachinko machine 500 with the inner frame 12, the front frame 14 and the lower tray unit 15 opened. In the pachinko machine 500 of the fourth embodiment, the switches SW1 (SW1a and SW1b) and the switches SW2 (SW2a and SW2b) provided in the pachinko machine 10 of the first embodiment described above with reference to FIG. ) Is changed to switch SW3 and switch SW4. Therefore, the same parts as those of the pachinko machine 10 described above with reference to FIG. 4 are assigned the same reference numerals and descriptions thereof will be omitted, and only different parts will be described.

  Between the outer frame 11 and the inner frame 12, a switch SW3 for detecting the opening and closing of the inner frame 12 is provided. Between the inner frame 12 and the front frame 14, the front frame 14 is opened and A switch SW4 for detecting closure is provided. The opening and closing of the inner frame 12 and the opening and closing of the front frame 14 can be separately detected by the switch SW3 and the switch SW4.

  Next, with reference to FIG. 23, the structures of the switch SW3 and the switch SW4 will be described. Since the switch SW3 and the switch SW4 have the same structure, the structure of the switch SW3 will be described, and the description of the switch SW4 will be omitted.

  FIG. 23 is a cross-sectional view of the switch SW3. FIG. 23A is a cross-sectional view showing the state (cutoff state) of the switch SW3 in a state in which the inner frame 12 is closed. FIG. 23B is a cross-sectional view showing the state (conductive state) of the switch SW3 in the state where the inner frame 12 is opened.

  As shown in FIG. 23A, the switch SW3 disposed on the surface of the outer frame 11 facing the inner frame 12 includes a movable shaft SW3a that abuts the closed state of the inner frame 12 and its movable shaft Conductor plates SW3-1a and SW3-2a made of metal which is a conductive member disposed in SW3a, and metals provided at opposing positions of the conductor plates SW3-1a and SW3-2a Support plates SW3-1c and SW3-2c for arranging the pair of terminal plates SW3-1b and SW3-2b and the pair of terminal plates SW3-1b and SW3-2b in the casing SW3b, and the conductor plate SW3 -2a is disposed on the surface opposite to the surface facing the pair of terminal boards SW3-2b, and generates a biasing force in a direction toward the pair of terminal boards SW3-2b with respect to the conductor board SW3-2a Spring SW3c and It is provided. The switch SW3-1 is configured by the conductor plate SW3-1a and the pair of terminal plates SW3-1b, and the switch SW3-2 is configured by the conductor plate SW3-2a and the pair of terminal plates SW3-2b. Thus, the switch SW3 incorporates two switches, the switch SW3-1 and the switch SW3-2.

  As shown in FIG. 23A, when the inner frame 12 is closed, the movable shaft SW3a is in contact with the inner frame 12, and the movable shaft SW3a is pushed into the housing SW3b. Accordingly, the contact between the conductor plate SW3-1a and the pair of terminal plates SW3-1b is prevented, and the contact between the conductor plate SW3-2a and the pair of terminal plates SW3-2b is prevented. Therefore, in the state where the inner frame 12 is closed, the switches SW3-1 and SW3-2 both become in a state in which the conduction is cut off.

  On the other hand, as shown in FIG. 23 (b), when the inner frame 12 is open, the contact between the movable shaft SW3a and the inner frame 12 is released, so the biasing force of the pair of springs SW3c The plate SW3-1a is in contact with the pair of terminal plates SW3-1b, and the conductor plate SW3-2a is in contact with the pair of terminal plates SW3-2b. Therefore, in the state in which the inner frame 12 is open, both the switch SW3-1 and the switch SW3-2 are in the conductive state.

  As described above, while the switch SW3-1 and the switch SW3-2 incorporated in the case SW3b are both in the closed state when the inner frame 12 is closed, the conductive state is obtained when the inner frame 12 is opened. It becomes. That is, the switch SW3-1 and the switch SW3-2 have a structure in which the conduction state and the interruption state operate in conjunction with each other. However, the structure of the switch SW3 is not limited to the shape described in FIG. 23, and in the state where the inner frame 12 is closed, the switch SW3-1 and the switch SW3-2 are cut off, while the inner frame 12 is closed. In the open state, the switch SW3-1 and the switch SW3-2 may be in a conductive state. The same applies to the structure of the switch SW4.

  Next, an electrical configuration of the pachinko machine 500 will be described with reference to FIG. FIG. 24 is a block diagram showing an electrical configuration of the pachinko machine 500. As shown in FIG. In the pachinko machine 500 of the fourth embodiment, the circuit configuration of the frame opening detection circuit 260 provided in the main control device 110 of the pachinko machine 10 of the first embodiment described above with reference to FIG. It is changed to the frame open detection circuit 290, and the electrical connection of the inner frame frame open detection circuit 290 is changed. And the pachinko machine 500 of 4th Embodiment changes the external output terminal board 261 mentioned above in FIG. 6 into the external output terminal board 291 for inner frames. In addition to this, in the pachinko machine 500 of the fourth embodiment, a front frame open detection circuit 292 is newly provided in the main control device 110 of the pachinko machine 10 of the first embodiment described above with reference to FIG. is there. In the pachinko machine 500 of the fourth embodiment, a front frame external output terminal plate 293 is newly provided corresponding to the front frame frame opening detection circuit 292 newly provided in the main control device 110. It is. Therefore, the same parts as those of the pachinko machine 10 described above with reference to FIG. 6 will be assigned the same reference numerals and descriptions thereof will be omitted, and only different parts will be described.

  The main control device 110 is provided with an inner frame opening detection circuit 290 that detects the opening of the inner frame 12 when the switch SW3 (the switch SW3-1 and the switch SW3-2) conducts. The inner frame opening detection circuit 290 is an input / output port 205 which is an input / output port of the MPU 201, a switch SW3 for detecting opening of the inner frame 12, and an outer output for the inner frame configured to be connectable to the hall computer 262. The terminal board 291 is connected. An input / output unit (input / output unit) that performs signal input / output for connection between the switch SW3 and the inner frame open detection circuit 290 and connection between the inner open frame detection circuit 290 and the outer output terminal board for inner frame 291 The connection is made via an input / output port different from the input / output port 205 (not shown).

  When the power supply to the pachinko machine 500 is performed and the DC voltage of 12 volts is supplied from the DC power supply DC1, the inner frame frame open detection circuit 290 switches SW3 (switches SW3-1 and SW3-2). When it is detected that the inner frame 12 is open, a signal of 5 volts DC is output to the input / output port 205. When this signal is input to the input / output port 205, the pachinko machine 500 turns on an inner frame open flag 203a described later, and an inner frame open command indicating the opening of the inner frame 12 is input via the input / output port 205. It is output to the audio lamp control device 113. Then, the voice lamp control device 113 that has received this inner frame open command turns on an inner frame open command reception flag 223a described later, and outputs an inner frame open command to the display control device 114. The lamp display device 227 is used to notify that the inner frame 12 is open. In addition, the display control device 114 that has received the inner frame open command output from the audio lamp control device 113 turns on a display inner frame open command reception flag 233c described later, and displays a message indicating opening of the inner frame 12 3 Display on the symbol display device 81. In addition to this, when the switch SW3 (the switch SW3-1 and the switch SW3-2) becomes conductive to detect the opening of the inner frame 12, the inner frame frame open detection circuit 290 detects a hole from the inner frame external output terminal plate 291. A pulse signal having a pulse width of 10 ms is output to the computer 262.

  On the other hand, when the operating time of the game arcade is ended and the power supply to the pachinko machine 500 is cut off and the DC voltage of 12 volts is not supplied from the DC power supply DC1, for example, When the switch SW3 (the switch SW3-1 and the switch SW3-2) is turned on to detect the opening of the inner frame 12, no signal is output to the input port 205, and a hole is formed from the inner frame external output terminal plate 291. A pulse signal having a pulse width of 10 ms is output to the computer 262. The pulse signal output from the inner frame external output terminal plate 291 is stored in the hall computer 262. Therefore, by analyzing the pulse signal stored in the hall computer 262, the opening of the inner frame 12 can be detected.

  Further, the main control device 110 is provided with a front frame opening detection circuit 292 that detects the opening of the front frame 14 when the switch SW4 (the switch SW4-1 and the switch SW4-2) becomes conductive. The front frame frame open detection circuit 292 is an input / output port 205 which is an input / output port of the MPU 201, a switch SW4 for detecting the opening of the front frame 14, and an external output for front frame configured to be connectable to the hall computer 262. The terminal board 293 is connected. An input / output unit (input / output unit) for inputting / outputting signals for connection between the switch SW4 and the front frame frame open detection circuit 292 and connection between the front frame frame open detection circuit 292 and the front frame external output terminal plate 293 The connection is made via an input / output port different from the port 205 (not shown).

  The front frame opening detection circuit 292 has the same function as the inner frame opening detection circuit 290 described above. That is, when the power supply to the pachinko machine 500 is performed and the DC voltage of 12 volts is supplied from the DC power supply DC1, the switch SW4 (the switch SW4-1 and the switch SW4-2) becomes conductive and the front frame 14 When it detects the open state, it outputs a signal of 5 volts DC to the input / output port 205. When this signal is input to the input / output port 205, the pachinko machine 500 turns on the front frame open flag 203b described later, and the front frame open command indicating the open of the front frame 14 is input via the input / output port 205. It is output to the audio lamp control device 113. Then, the voice lamp control device 113 that has received this front frame open command turns on the front frame open command reception flag 223b described later, and outputs the front frame open command to the display control device 114. The lamp display device 227 is used to notify that the front frame 14 is open. In addition, the display control device 114 that has received the front frame open command output from the audio lamp control device 113 turns on the display front frame open command reception flag 233 d and displays a message indicating the open of the front frame 14 with the third symbol It is displayed on the display device 81. In addition to this, when the switch SW4 (the switch SW4-1 and the switch SW4-2) conducts to detect the opening of the front frame 14, the front frame frame open detection circuit 292 detects a hole from the front frame external output terminal plate 293. A pulse signal having a pulse width of 10 ms is output to the computer 262.

  On the other hand, in the front frame opening detection circuit 292, for example, the power supply to the pachinko machine 500 is shut off after the business hours of the game arcade have ended and the DC voltage of 12 volts is not supplied from the DC power supply DC1. When the switch SW4 (the switch SW4-1 and the switch SW4-2) is turned on to detect the opening of the front frame 14, no signal is output to the input port 205, and a hole is formed from the front frame external output terminal plate 293. A pulse signal having a pulse width of 10 ms is output to the computer 262. The pulse signal output from the front frame external output terminal plate 293 is stored in the hall computer 262. Therefore, by analyzing the pulse signal stored in the hall computer 262, the opening of the front frame 14 can be detected.

  Here, the front frame opening detection circuit 292 and the inner frame opening detection circuit 290 are respectively connected to different input ports of the input / output port 205. Therefore, the signal output from the front frame opening detection circuit 292 and the signal output from the inner frame opening detection circuit 290 are separately input to the input / output port 205. Therefore, the MPU 201 mounted on the main control unit 110 outputs the signal input to the input / output port 205 as the signal output from the front frame opening detection circuit 292 or the inner frame opening detection circuit 290. Can be determined.

  The front frame external output terminal plate 293 and the inner frame external output terminal plate 291 are connected to different input terminals of the hall computer 262, respectively. Therefore, the pulse signal output from the front frame external output terminal plate 293 and the pulse signal output from the inner frame external output terminal plate 291 are separately input to the hall computer 262. Thus, the pulse signal output from the front frame external output terminal plate 293 and the pulse signal output from the inner frame external output terminal plate 291 can be stored separately in the hall computer 262. Therefore, by analyzing the pulse signals stored individually in the hall computer 262, it is possible to detect whether the inner frame 12 has been opened or the front frame 14 has been opened.

  As described above, the main control unit 110 includes the inner frame opening detection circuit 290 that operates when the inner frame 12 is opened and the front opening detection circuit 292 that operates when the front frame 14 is opened. Provided separately. Therefore, when either or both of the inner frame 12 and the front frame 14 are opened, in addition to being able to determine which opening has occurred by the notification performed by the pachinko machine 500, the hall computer It can also be determined by the pulse signal stored in 262.

  The RAM 203 of the main control unit 110 is provided with an inner frame open flag 203a and a front frame open flag 203b. The inner frame open flag 203 a is a flag indicating the open state or the closed state of the inner frame 12. As described above, when the power supply to the pachinko machine 500 is performed and the DC voltage of 12 volts is supplied from the DC power supply DC1, the inner frame 12 is opened, and the switch SW3 (the switch SW3-1 and the switch SW3 When -2) conducts, a signal of 5 volts DC is output from the inner frame opening detection circuit 290 to the input / output port 205. When the 5-volt signal is detected by the MPU 201 through the input / output port 205, the inner frame open flag 203a is turned on. When the inner frame open flag 203a is turned on, the MPU 201 transmits, to the sound lamp control device 113, an inner frame open command notifying that the inner frame 12 has been opened.

  On the other hand, when the power supply to the pachinko machine 500 is performed and the DC voltage of 12 volts is supplied from the DC power supply DC1, the inner frame 12 is closed, and the switch SW3 (switch SW3-1 and switch SW3-2 Signal is stopped from the inner frame opening detection circuit 290 to the input / output port 205 (the output from the inner frame opening detection circuit 290 to the input / output port 205 is zero volts). ). When the stop of the signal output is detected by the MPU 201 through the input / output port 205, the inner frame open flag 203a is turned off. When the inner frame opening flag 203a is turned off, the MPU 201 transmits, to the sound lamp control device 113, an inner frame closing command notifying that the inner frame 12 is closed. As described above, when the inner frame 12 is opened, the inner frame open flag 203a is turned on, and when the inner frame 12 is closed, the inner frame open flag 203a is turned off.

  The front frame open flag 203b is a flag indicating the open state or the closed state of the front frame 14. When power is supplied to the pachinko machine 500 and a DC voltage of 12 volts is supplied from the DC power supply DC1, the front frame 14 is opened, and the switch SW4 (the switch SW4-1 and the switch SW4-2) When turned on, a signal of 5 volts DC is outputted from the front frame opening detection circuit 292 to the input / output port 205. When the 5-volt signal is detected by the MPU 201 through the input / output port 205, the front frame open flag 203b is turned on. When the front frame open flag 203b is turned on, the MPU 201 transmits, to the sound lamp control device 113, a front frame open command for notifying that the front frame 14 has been opened.

  On the other hand, when power is supplied to the pachinko machine 500 and a DC voltage of 12 volts is supplied from the DC power supply DC1, the front frame 14 is closed, and the switch SW4 (the switch SW4-1 and the switch SW4-2 Signal is stopped from the front frame opening detection circuit 292 to the input / output port 205 (the output from the front opening detection circuit 292 to the input / output port 205 is zero volts). ). When the stop of the signal output is detected by the MPU 201 through the input / output port 205, the front frame open flag 203b is turned off. When the front frame opening flag 203b is turned off, the MPU 201 transmits, to the sound lamp control device 113, a front frame closing command notifying that the front frame 14 has been closed. Thus, when the front frame 14 is opened, the front frame open flag 203b is turned on, and when the front frame 14 is closed, the front frame open flag 203b is turned off.

  The RAM 223 of the voice lamp control device 113 is provided with an inner frame open command reception flag 223a and a front frame open command reception flag 223b. The inner frame open command reception flag 223a is a flag indicating whether the command received by the voice lamp control device 113 is an inner frame open command or an inner frame close command. As described above, when power is supplied to the pachinko machine 500 and a DC voltage of 12 volts is supplied from the DC power supply DC1, the inner frame open flag 203a is turned on when the inner frame 12 is opened. The MPU 201 transmits an inner frame open command to the sound lamp control device 113. When the inner frame open command is detected by the MPU 221 through the input / output port 225, the inner frame open command reception flag 223a is turned on. When the inner frame open command reception flag 223a is turned on, the MPU 221 transmits, to the display control device 114, an inner frame open command notifying that the inner frame 12 has been opened. Further, the MPU 221 uses an audio output device 226 and a lamp display device 227 to notify that the inner frame 12 is open.

  On the other hand, when the power supply to the pachinko machine 500 is performed and the DC voltage of 12 volts is supplied from the DC power supply DC1, when the inner frame 12 is closed, the inner frame open flag 203a is turned off and the voice is An inner frame closing command is transmitted to the lamp control device 113 by the MPU 201. When the inner frame closing command is detected by the MPU 221 through the input / output port 225, the inner frame open command reception flag 223a is turned off. When the inner frame open command reception flag 223a is turned off, the MPU 221 transmits, to the display control device 114, an inner frame closing command notifying that the inner frame 12 is closed. Further, the MPU 221 stops the notification performed using the audio output device 226 and the lamp display device 227. Thus, when the inner frame 12 is released and the inner frame open command is detected by the MPU 221, the inner frame open command reception flag 223a is turned on, while the inner frame 12 is closed and the inner frame closed command is sent to the MPU 221. When detected, the inner frame release command reception flag 223a is turned off.

  The front frame open command reception flag 223b is a flag indicating whether the command received by the voice lamp control device 113 is a front frame open command or a front frame close command. When power is supplied to the pachinko machine 500 and a DC voltage of 12 volts is supplied from the DC power supply DC1, when the front frame 14 is opened, the front frame open flag 203b is turned on to control the audio lamp The front frame open command is transmitted to the device 113 by the MPU 201. When the front frame open command is detected by the MPU 221 through the input / output port 225, the front frame open command reception flag 223b is turned on. When the front frame open command reception flag 223b is turned on, the MPU 221 transmits, to the display control device 114, a front frame open command notifying that the front frame 14 has been opened. Further, the MPU 221 uses an audio output device 226 and a lamp display device 227 to notify that the front frame 14 is open.

  On the other hand, when power is supplied to the pachinko machine 500 and a DC voltage of 12 volts is supplied from the DC power supply DC1, when the front frame 14 is closed, the front frame open flag 203b is turned off and the voice is The front frame closing command is transmitted to the lamp control device 113 by the MPU 201. When the front frame closing command is detected by the MPU 221 through the input / output port 225, the front frame open command reception flag 223b is turned off. When the front frame open command reception flag 223b is turned off, the MPU 221 transmits, to the display control device 114, a front frame closing command for notifying that the front frame 14 is closed. Further, the MPU 221 stops the notification performed using the audio output device 226 and the lamp display device 227. Thus, when the front frame 14 is opened and the front frame open command is detected by the MPU 221, the front frame open command reception flag 223b is turned on, while the front frame 14 is closed and the front frame closed command is sent to the MPU 221. When it is detected, the front frame open command reception flag 223b is turned off.

  The RAM 233 of the display control device 114 is provided with a rendering permission flag 233a, a variation start flag 233b, a display inner frame opening command reception flag 233c, and a display front frame opening command reception flag 233d. The effect permission flag 233a is a flag for permitting the start of the display of the third symbol display device 81, and the effect permission command transmitted after the processing of the initial setting of the main control device 110 is performed via the voice lamp control device 113 When the display control device 114 receives (when the effect permission command is detected by the MPU 231 via the input port 237), it is turned on. Once the effect permission flag 233a is turned on, the on state is continued.

  The fluctuation start flag 233b is a flag for permitting the start of the fluctuation display in the third symbol display device 81, and the display control device 114 changes the fluctuation pattern command output from the main control device 110 to the voice lamp control device 113. It is turned on (when the MPU 231 detects the fluctuation pattern command output from the main control unit 110 via the input port 237) when it is received via the communication port 237. The fluctuation start flag 233b is turned off when the fluctuation display is started in the third symbol display device 81. Here, the reason that the fluctuation start flag 233b is turned off is that, in the present embodiment, the fluctuation display is started in the third symbol display device 81 when the fluctuation start flag 233b is turned on, If the change start flag 233b is not turned off, the process of the change start described later (the process of S1010 in FIG. 31) is repeatedly performed, and the normal process is not performed.

  Next, the display inner frame release command reception flag 233c will be described. The display inner frame open command reception flag 233c is a flag indicating whether the command received by the display control device 114 is an inner frame open command or an inner frame close command. As described above, when power is supplied to the pachinko machine 500 and a DC voltage of 12 volts is supplied from the DC power supply DC1, when the inner frame 12 is opened, the main controller 110 controls the audio lamp controller An inner frame open command is transmitted to the display control device 114 via the link 113, informing that the inner frame 12 has been opened. When the inner frame open command is detected by the MPU 231 through the input port 237, the display inner frame open command reception flag 233c is turned on. When the display inner frame release command reception flag 233c is turned on, the MPU 231 displays a message indicating the release of the inner frame 12 on the third symbol display device 81.

  On the other hand, when power is supplied to the pachinko machine 500 and a DC voltage of 12 volts is supplied from the DC power supply DC1, when the inner frame 12 is closed, the main controller 110 controls the sound lamp controller 113. An inner frame closing command is transmitted to the display control device 114 to notify that the inner frame 12 has been closed. When the inner frame closing command is detected by the MPU 231 through the input port 237, the display inner frame open command reception flag 233c is turned off. When the display inner frame release command reception flag 233c is turned off, the MPU 231 deletes the message indicating the release of the inner frame 12 displayed on the third symbol display device 81.

  Finally, the display front frame open command reception flag 233d will be described. The display front frame open command reception flag 233 d is a flag indicating whether the command received by the display control device 114 is a front frame open command or a front frame close command. When power is supplied to the pachinko machine 500 and a DC voltage of 12 volts is supplied from the DC power supply DC1, when the front frame 14 is opened, the main control unit 110 via the audio lamp control unit 113 , And sends a display frame open command to the display control device 114 to notify that the front frame 14 has been opened. When the front frame open command is detected by the MPU 231 through the input port 237, the display front frame open command reception flag 233d is turned on. When the display front frame open command reception flag 233 d is turned on, the MPU 231 displays a message indicating the opening of the front frame 14 on the third symbol display device 81.

  On the other hand, when the power supply to the pachinko machine 500 is performed and the DC voltage of 12 volts is supplied from the DC power supply DC1, when the front frame 14 is closed, the main controller 110 controls the audio lamp controller 113. A front frame closing command is transmitted to the display control device 114 to notify that the front frame 14 has been closed. When the front frame closing command is detected by the MPU 231 via the input port 237, the display front frame opening command reception flag 233d is turned off. When the display front frame open command reception flag 233 d is turned off, the MPU 231 erases the message indicating the opening of the front frame 14 displayed on the third symbol display device 81.

  Next, with reference to FIG. 25, the inner frame opening detection circuit 290 and the inner output output terminal plate 291 used in the pachinko machine 500 of the fourth embodiment will be described. FIG. 25 is a block diagram showing an electrical configuration of the inner frame opening detection circuit 290 and the outer output terminal plate 291 for the inner frame. Note that the inner frame opening detection circuit 290 removes the switch SW2 connected in parallel to the switch SW1 of the opening detection circuit 280 of the third embodiment described above with reference to FIG. 20, and switches the switch SW1 to the switch SW3-1. It is comprised from the terminal board output circuit 290a for inner frames which changed, and the input / output port output circuit 290b for inner frames which has switch SW3-2 which operate | moves interlockingly with switch SW3-1. The inner frame terminal plate output circuit 290a has the same configuration as the frame open detection circuit 280 of the third embodiment described above with reference to FIG. 20 except that the switch SW2 is removed and the switch SW1 is changed to the switch SW3-1. It is. The inner frame external output terminal plate 291 has the same configuration as the external output terminal plate 261 of the third embodiment described above with reference to FIG. Therefore, for the inner frame opening detection circuit 290 and the inner outer output terminal board 291, the same parts as those of the frame open detection circuit 280 and the outer output terminal board 261 described above with reference to FIG. The explanation will be omitted and only the different parts will be explained.

  Further, the front frame frame open detection circuit 292 has a front frame terminal plate output circuit 292a (not shown) and a front frame input / output port output circuit 292b, similarly to the configuration of the inner frame frame open detection circuit 290. And (not shown). Front frame terminal plate output circuit 292a differs from inner frame terminal plate output circuit 290a only in that the switch to be connected is changed from switch SW3-1 to switch SW4-1; The configuration is the same as that of the frame terminal board output circuit 290a. That is, the front frame terminal board output circuit 292 a differs from the inner frame frame open detection circuit 290 only in the switch connected thereto, and has the same function as the inner frame frame open detection circuit 290. Similarly, front frame input / output port output circuit 292b differs from inner frame input / output port output circuit 290b only in that the switch connected is changed from switch SW3-2 to switch SW4-2. , And others have the same configuration as the inner frame input / output port output circuit 290b. That is, the front frame input / output port output circuit 292b differs from the inner frame input / output port output circuit 290b only in the switch connected thereto, and has the same function as the inner frame input / output port output circuit 290b. The front frame external output terminal plate 293 has the same configuration as the inner frame external output terminal plate 291, that is, the same configuration as the external output terminal plate 261 of the third embodiment described above with reference to FIG. is there. Therefore, the description of the front frame opening detection circuit 292 (front frame terminal plate output circuit 292a and front frame input / output port output circuit 292b) and the front frame external output terminal plate 293 will be omitted.

  As shown in FIG. 25, in the switch SW3-2 used for the inner frame input / output port output circuit 290b, one end of the switch SW3-2 (one end of the terminal plate 3-2b) is the DC power source DC1 and the anode of the diode D1. The other end of the switch SW3-2 (the other end of the terminal plate 3-2b) is connected to one end of a resistor R11 having a resistance value of 140 kΩ.

  The other end of the resistor R11 is connected to one end of a resistor R12 having a resistance value of 100 kΩ and the input / output port 205, and the other end of the resistor R12 is grounded. The resistor R11 and the resistor R12 constitute a voltage dividing circuit that divides the DC voltage of 12 volts supplied from the DC power supply DC1. Therefore, when power is supplied to the pachinko machine 500 and a DC voltage of 12 volts is supplied from the DC power supply DC1, when the inner frame 12 is opened and the switch SW3-2 is turned on, the DC power supply DC1 is The 12 volt DC voltage supplied is divided by the resistors R11 and R12. At this time, the DC voltage applied to the resistor R12 is about 5 volts. Therefore, when the inner frame 12 is opened and the switch SW3-2 is turned on, a signal of 5 volts is input from the inner frame input / output port output circuit 290b to the input / output port 205. When power is supplied to the pachinko machine 500 and a DC voltage of 12 volts is supplied from the DC power supply DC1, the inner frame 12 is opened and provided in the inner frame terminal plate output circuit 290a. When the switch SW3-1 becomes conductive, the inner frame terminal plate output circuit 290a performs the same operation as the operation described in the frame opening detection circuit 280 of the third embodiment in FIG. And a pulse signal of 10 ms in pulse width are output to the hall computer 262.

  On the other hand, when power is supplied to the pachinko machine 500 and a DC voltage of 12 volts is supplied from the DC power supply DC1, the inner frame 12 is closed and provided in the inner frame input / output port output circuit 290b. When the switch SW3-2 is turned off, no DC voltage is applied to the resistors R11 and R12. Therefore, when the switch SW3 shuts off and the switch SW3-2 shuts off, no signal is input from the inner frame input / output port output circuit 290b to the input / output port 205 (input / output from the inner frame input / output port output circuit 290b) The DC voltage input to the port 205 is zero volts). When power is supplied to the pachinko machine 500 and a DC voltage of 12 volts is supplied from the DC power supply DC1, the inner frame 12 is closed and provided in the inner frame terminal plate output circuit 290a. When the switch SW3-1 turns off, the inner frame terminal plate output circuit 290a performs the same operation as the operation described in the frame open detection circuit 280 of the third embodiment in FIG. 20, and detection of the inner frame 12 is performed again. It is set to the possible state.

  For example, when the operating time of the game arcade is over and the power supply to the pachinko machine 500 is cut off, the DC voltage of 12 volts is not supplied from the DC power supply DC1, so the switch SW3-2 is conducted. Also, no signal is input from the inner frame input / output port output circuit 290b to the input / output port 205 (the DC voltage input from the inner frame input / output port output circuit 290b to the input / output port 205 is zero volts).

  However, power is supplied to the inner frame terminal plate output circuit 290a from the capacitor CD1 as described in the frame opening detection circuit 280 of the third embodiment of FIG. Therefore, for example, even when the operating hours of the game arcade are over and the power supply to the pachinko machine 500 is shut off, the inner frame 12 is opened and provided in the inner frame terminal board output circuit 290a. When the switch SW3-1 becomes conductive, the inner frame terminal plate output circuit 290a outputs a pulse signal having a pulse width of 10 ms to the hole computer 262 from the inner frame external output terminal plate 291.

  As described above, when power is supplied to the pachinko machine 500 and the DC voltage of 12 volts is supplied from the DC power supply DC1, the inner frame 12 is opened, and the input / output port output circuit for inner frame 290b is performed. When the provided switch SW3-2 conducts, a signal of 5 volts is input from the inner frame input / output port output circuit 290b to the input / output port 205. When a signal of 5 volts is input to the input / output port 205, the pachinko machine 500 uses an audio output device 226 and a lamp display device 227 to notify that the inner frame 12 is open. In addition, the pachinko machine 500 displays a message indicating the opening of the inner frame 12 on the third symbol display device 81. Furthermore, when the inner frame 12 is opened and the switch SW3-1 provided in the inner frame terminal plate output circuit 290a conducts, the inner frame terminal plate output circuit 290a is turned to the hole from the inner frame external output terminal plate 291. A pulse signal having a pulse width of 10 ms is output to the computer 262.

  On the other hand, for example, when the operating time of the game arcade is over and the power supply to the pachinko machine 500 is cut off, the inner frame 12 is opened since the DC voltage of 12 volts is not supplied from the DC power supply DC1. Even when the switch SW3-2 provided in the inner frame input / output port output circuit 290b conducts, no signal is input from the inner frame input / output port output circuit 290b to the input / output port 205 (inner frame input / output The DC voltage input from the port output circuit 290b to the input / output port 205 is zero volts). However, even if, for example, the operating time of the game arcade is over and the power supply to the pachinko machine 500 is cut off, the power is supplied from the capacitor CD1 to the inner frame terminal board output circuit 290a. Therefore, when the inner frame 12 is opened and the switch SW3-1 provided in the inner frame terminal plate output circuit 290a conducts, the inner frame terminal plate output circuit 290a outputs the signal from the inner frame external output terminal plate 291. A pulse signal having a pulse width of 10 ms is output to the hall computer 262.

  The pulse signal output from the inner frame external output terminal plate 291 is stored in the hall computer 262 which keeps operating for 24 hours. Therefore, by the pulse signal stored in the hall computer 262, the pachinko machine in which the inner frame 12 has been opened can be identified. Furthermore, the hall computer 262 outputs the pulse signal from the inner frame external output terminal plate 291 and stores the output time of the output pulse signal so that the inner frame 12 of the specified pachinko machine is opened. Time can be detected.

  Thus, when the inner frame 12 is opened when power is supplied to the pachinko machine 500, the function of outputting a pulse signal to the hall computer 262 and the power supply to the pachinko machine 500 are cut off. When the inner frame 12 is open, the function of outputting a pulse signal to the hall computer 262 can be exhibited by the inner frame terminal plate output circuit 290 a which is one circuit.

  Further, one end of the switch SW3-2 of the inner frame input / output port output circuit 290b is connected to the DC power supply DC1 and the anode terminal of the diode D1. Therefore, when the inner frame 12 is opened when the pachinko machine 500 is powered on, the switch SW3-2 is turned on to supply power from the DC power supply DC1 to the inner frame input / output port output circuit 290b. Thus, the inner frame input / output port output circuit 290b is in an operating state. On the other hand, when the pachinko machine 500 is powered off, no power is supplied from the DC power supply DC1 to the inner frame input / output port output circuit 290b, so the inner frame 12 is opened and the switch SW3-2 is opened. Even in this case, the inner frame input / output port output circuit 290b is in the stop state.

  On the other hand, one end of the switch SW3-1 of the inner frame terminal plate output circuit 290a is connected to one end of the capacitor CD1 via the diode D2 and the resistor R10. Therefore, when the inner frame 12 is opened when the power of the pachinko machine 500 is turned on, the switch SW3-1 becomes conductive, and power is supplied from the DC power supply DC1 to the inner frame terminal plate output circuit 290a. The inner frame terminal board output circuit 290a is in an operating state. On the other hand, when the pachinko machine 500 is powered off, the power supply from the DC power supply DC1 to the inner frame terminal plate output circuit 290a is stopped, but the inner frame 12 is opened and the switch SW3-1 is turned on. Then, since power is supplied from the capacitor CD1 to the inner frame terminal plate output circuit 290a, the inner frame terminal plate output circuit 290a is in an operating state. Here, when the pachinko machine 500 is powered off and power is supplied from the capacitor CD1 to the inner frame terminal plate output circuit 290a, power is supplied to the inner frame input / output port output circuit 290b. It can be cut off by the diode D1 that exerts a backflow prevention function. Therefore, when the power of the pachinko machine 500 is turned off, the number of times the inner frame terminal plate output circuit 290a can be operated can be increased, and the number of times the open of the inner frame 12 can be detected can be increased.

  In the timer IC1 of the inner frame terminal plate output circuit 290a, when the inner frame 12 is opened, the switch SW3-1 is turned on, and the voltage applied to the TRG terminal of the timer IC1 falls to zero volts, this rising occurs. It functions as a monostable multivibrator that raises the voltage of the OUT terminal of the timer IC1 from zero volt to about 9.6 volts for about 10 ms from the fall. Then, by providing the integrating circuit 281 in the previous stage of the TRG terminal of the timer IC1, when the inner frame 12 is opened, the voltage applied to the TRG terminal of the timer IC1 is regardless of the open period of the inner frame 12. After falling to zero volts, the period until it returns to about 10.3 volts can be adjusted to be shorter than the period when the voltage at the OUT terminal of timer IC1 rises from zero volts to about 9.6 volts. As described above, the timer IC1 functions as a monostable multivibrator by setting the falling period of the TRG terminal voltage of the timer IC1 to a fixed period (about 2 ms) regardless of the open period of the inner frame 12 by the integration circuit 281. Can be normally operated, and the period in which the voltage at the OUT terminal of the timer IC1 rises from zero volts to about 9.6 volts can be kept to about 10 ms. Thus, the period in which current is supplied from the capacitor CD1 to the photocoupler PR1 can be limited to about 10 ms, and the output period of the pulse signal output from the inner frame external output terminal plate 291 to the hole computer 262 is about 10 ms. You can fasten it.

  Next, referring to FIG. 26, regardless of the on / off state of the power supply of pachinko machine 500, the terminal board output for the inner frame changes according to the conduction / non-connection state of switch SW3-1 (open / close state of inner frame 12). Pachinko machine 500, TRG terminal voltage of timer IC1 of circuit 290a, OUT terminal voltage of timer IC1 of terminal board output circuit 290a for inner frame, output of inner frame external output terminal board 291 (input of hall computer 262) A description will be given of the relationship with the output of the inner frame input / output port output circuit 290b, which changes in accordance with the ON / OFF state (open / close state of the inner frame 12) of the switch SW3-2 when the power supply of the power source is turned on. FIG. 26 shows the on / off state of the power supply of the pachinko machine 500 (the state of the DC voltage supplied by the DC power supply DC1), and the conduction interruption state (the open / closed state of the inner frame 12) of the switch SW3-1 and the switch SW3-2. TRG terminal voltage of timer IC1 of inner frame terminal plate output circuit 290a, OUT terminal voltage of timer IC1 of inner frame terminal plate output circuit 290a, output of inner frame external output terminal plate 291 (input of hall computer 262 And the output of the inner frame input / output port output circuit 290b.

  As described above, the front frame terminal board output circuit 292a provided in the front frame frame open detection circuit 292 differs from the inner frame terminal board output circuit 290a in that the switches connected are from the switch SW3-1. Only the switch SW 4-1 is changed, and the other configuration is the same as that of the inner frame terminal board output circuit 290 a. Therefore, the operation of the front frame terminal plate output circuit 292a is the same as the operation of the inner frame terminal plate output circuit 290a. Further, the front frame input / output port output circuit 292b differs from the inner frame input / output port output circuit 290b only in that the switch connected is changed from the switch SW3-2 to the switch SW4-2, The other configuration is the same as that of the inner frame input / output port output circuit 290b. Therefore, the operation of the front frame input / output port output circuit 292b is the same as the operation of the inner frame input / output port output circuit 290b. Furthermore, since the front frame external output terminal plate 293 has the same configuration as the inner frame external output terminal plate 291, the operation of the front frame external output terminal plate 293 is the same as the inner frame external output terminal plate 291. It is. Therefore, the description of the operation of the front frame terminal plate output circuit 292a, the front frame input / output port output circuit 292b, and the front frame external output terminal plate 293 is omitted.

  As shown in FIG. 26A, the power supply of the pachinko machine 500 is in the on state until t11 o'clock (the DC voltage supplied by the DC power supply DC1 is in the 12 volt state until t11 o'clock); The power supply of the machine 500 is turned off (the DC voltage supplied by the DC power supply DC1 is zero volts). Therefore, power from the DC power supply DC1 is supplied to the inner frame terminal plate output circuit 290a and the inner frame input / output port output circuit 290b until t11: 00. Then, after t11, supply of power by the DC power supply DC1 to the inner frame terminal plate output circuit 290a and the inner frame input / output port output circuit 290b is stopped. However, since the capacitor CD1 is provided in the inner frame terminal plate output circuit 290a, after t11, power is supplied from the capacitor CD1 to the inner frame terminal plate output circuit 290a. Therefore, the inner frame terminal board output circuit 290a is in an operable state also after time t11.

  As shown in FIG. 26 (b), when the switch SW3-1 becomes conductive (the inner frame 12 is open) at t9, charging of the capacitor CD7 is started, and as shown in FIG. 26 (c), the timer The TRG terminal voltage of IC1 falls from about 10.3 volts to zero volts (at t9). Then, following this, as shown in FIG. 26D, the OUT terminal voltage of the timer IC1 rises from zero volt to about 9.6 volt (at t9). Thereby, the collector terminal and the emitter terminal of the transistor TR1 of the inner frame terminal plate output circuit 290a are conducted, and the light emitting diode on the primary side of the photocoupler PR1 of the inner frame external output terminal plate 291 (see FIG. 25) The current supply is started (at t9). Then, as shown in FIG. 26E, the output of the light receiving element (phototransistor) on the secondary side of the photocoupler PR1, that is, the output of the inner frame external output terminal plate 291 is high from the low state at t9. Switch to the state. Thereby, the output of a pulse signal indicating opening of the inner frame 12 to the hole computer 262 is started. Further, as shown in FIG. 26B, when the switch SW3-2 becomes conductive (the inner frame 12 is opened) at time t9, the resistors R11 and R12 of the inner frame input / output port output circuit 290b are DC Power from the power supply DC1 is supplied, and the voltage applied to the resistor R12 becomes 5 volts (at t9). Therefore, as shown in FIG. 26F, a signal with a DC voltage of 5 volts is output from the inner frame input / output port output circuit 290b to the input / output port 205 (at t9).

  Next, as shown in FIG. 26C, when about 2 ms elapses from t9, the charging of the capacitor CD7 is completed, and the voltage at the TRG terminal of the timer IC1 returns from zero volt to about 10.3 volts again. However, since about 10 ms has not elapsed since the voltage at the OUT terminal of timer IC1 has risen from zero volts to about 9.6 volts, the OUT terminal voltage of timer IC1 is about 9.6 volts. It is maintaining the state.

  Thereafter, when about 10 ms elapses from t9, as shown in FIG. 26 (d), the timer IC1 switches the voltage of the OUT terminal from about 9.6 volts to zero volts. Then, the collector terminal and the emitter terminal of the transistor TR1 of the inner frame terminal plate output circuit 290a are disconnected, and the current supply to one end of the resistor R7a of the inner frame external output terminal plate 291 is stopped. Therefore, the output of the inner frame external output terminal plate 291 switches from the high state to the low state as shown in FIG. As a result, the output of the pulse signal output to the hall computer 262 is stopped. Thus, by switching the output of the inner frame external output terminal plate 291, the pulse width of the pulse signal output from the inner frame external output terminal plate 291 to the hole computer 262 can be limited to about 10 ms.

  As shown in FIG. 26 (b), when the switch SW3-1 is in the closed state (the inner frame 12 is closed) at t10, the inner frame terminal plate output circuit 290a detects the inner frame 12 again. Is set to a possible state. Further, as shown in FIG. 26B, when the switch SW3-2 is in the cut off state (the inner frame 12 is closed) at t10, the resistance R11 and the resistance R12 of the inner frame input / output port output circuit 290b are output. The power supply from the DC power supply DC1 is stopped, and the voltage applied to the resistor R12 becomes zero volt (at t10). Therefore, as shown in FIG. 26 (f), the signal of 5 volts DC output from the inner frame input / output port output circuit 290b to the input / output port 205 is stopped at t10 (input for the inner frame). The output from the output port output circuit 290b to the input / output port 205 becomes zero volts at t10).

  As shown in FIG. 26 (a), when the power of the pachinko machine 500 is turned off after t11 (when the DC voltage supplied by the DC power supply DC1 becomes zero volts), the inner frame terminal plate output circuit 290a and the inner frame The supply of power by the DC power supply DC1 to the input / output port output circuit 290b is stopped. However, even if the power of the pachinko machine 500 is in the OFF state, the power from the capacitor CD1 is supplied to the inner frame terminal plate output circuit 290a. Therefore, as shown in FIG. 26 (b), when the switch SW3-1 becomes conductive (the inner frame 12 is opened) at t12, charging of the capacitor CD7 is started, as shown in FIG. 26 (c). The TRG terminal voltage of the timer IC1 falls from about 10.3 volts to zero volts (at t12). Then, following this, as shown in FIG. 26 (d), the OUT terminal voltage of the timer IC1 rises from zero volt to about 9.6 volt (at t12). Thereby, the collector terminal and the emitter terminal of the transistor TR1 of the inner frame terminal plate output circuit 290a are conducted, and the light emitting diode on the primary side of the photocoupler PR1 of the inner frame external output terminal plate 291 (see FIG. 25) The current supply is started (at t12). Then, as shown in FIG. 26E, the output of the light receiving element (phototransistor) on the secondary side of the photocoupler PR1, that is, the output of the inner frame external output terminal plate 291 is high from the low state at t12. Switch to the state. Thereby, the output of a pulse signal indicating opening of the inner frame 12 to the hole computer 262 is started. On the other hand, as shown in FIG. 26B, even if the switch SW3-2 becomes conductive (the inner frame 12 is opened) at time t12, the resistors R11 and R12 of the inner frame input / output port output circuit 290b Since the power from the DC power supply DC1 is not supplied to that (because the DC voltage supplied by the DC power supply DC1 is zero volts), the voltage applied to the resistor R12 is zero volts (at t12). Therefore, as shown in FIG. 26 (f), the signal output from the inner frame input / output port output circuit 290b to the input / output port 205 maintains the stopped state (input from the inner frame input / output port output circuit 290b). The output to the output port 205 maintains zero volts).

  The charge stored in the capacitor CD7 of the inner frame terminal plate output circuit 290a between t9 and t10 is instantaneously completed through the Zener diode D3 of the inner frame terminal plate output circuit 290a at t12. . Since the discharge period of the capacitor CD7 is a very small period from about 2 ms in which the voltage at the TRG terminal of the timer IC1 changes from about 10.3 volts to zero volts and becomes about 10.3 volts again, the TRG of the timer IC1 is It does not significantly affect the voltage applied to the terminals. Furthermore, in addition to the discharge, the charge stored in the capacitor CD7 from t9 to t10 is also discharged by the self discharge of the capacitor CD7.

  Further, at time t12, the TRG terminal of the timer IC1 of the inner frame terminal plate output circuit 290a stores the voltage of about 10.3 volts supplied from the capacitor CD1 and the capacitor CD7 of the inner frame terminal plate output circuit 290a. A voltage of about 10.3 volts associated with the stored charge may be superimposed to apply an overvoltage that is sized to destroy timer IC1. However, since the Zener diode D3 whose limiting voltage (Zener voltage) is approximately 10.5 volts is connected to the front stage of the TRG terminal of the timer IC1, the maximum value of the voltage applied to the TRG terminal of the timer IC1 is The overvoltage which is about 10.5 volts and which destroys the timer IC1 is not applied to the TRG terminal of the timer IC1.

  Next, as shown in FIG. 26C, when about 2 ms elapses from t12, the charging of the capacitor CD7 of the inner frame terminal plate output circuit 290a is completed, and the TRG terminal voltage of the timer IC1 starts again from zero volts. Return to about 10.3 volts. However, since about 10 ms has not elapsed since the voltage at the OUT terminal of timer IC1 has risen from zero volts to about 9.6 volts (time t12), the OUT terminal voltage of timer IC1 is about 9.6 volts. It is maintaining the state.

  Thereafter, when about 10 ms elapses from t12, as shown in FIG. 26 (d), the timer IC1 switches the voltage of the OUT terminal from about 9.6 volts to zero volts. Then, the collector terminal and the emitter terminal of the transistor TR1 of the inner frame terminal plate output circuit 290a are disconnected, and the current supply to one end of the resistor R7a of the inner frame external output terminal plate 291 is stopped. Therefore, as shown in FIG. 26E, the output of the inner frame external output terminal plate 291 switches from the high state to the low state when about 10 ms has elapsed from t12. As a result, the output of the pulse signal output to the hall computer 262 is stopped. Thus, by switching the output of the inner frame external output terminal plate 291, the pulse width of the pulse signal output from the inner frame external output terminal plate 291 to the hole computer 262 can be limited to about 10 ms.

  As shown in FIG. 26 (b), when the switch SW3-1 is in the closed state (the inner frame 12 is closed) at t13, the inner frame terminal plate output circuit 290a detects the inner frame 12 again. Is set to a possible state. Similarly, as shown in FIG. 26B, when the switch SW3-2 is in the shutoff state (the inner frame 12 is in the closed state) at t13, the inner frame input / output port output circuit 290b supplies power to the pachinko machine 500. Is set to a state in which the inner frame 12 can be detected.

  As described above, when the power supply to the pachinko machine 500 is performed and the DC voltage of 12 volts is supplied from the DC power supply DC1 (at the time of t11), the inner frame 12 is opened and the inner frame is opened. When the switch SW3-1 provided in the terminal board output circuit 290a is turned on, the inner frame terminal board output circuit 290a outputs a pulse signal with a pulse width of 10 ms to the hall computer 262 from the inner frame external output terminal board 291. Do. Furthermore, when the inner frame 12 is opened and the switch SW3-2 provided in the inner frame input / output port output circuit 290b conducts, a signal of 5 volts from the inner frame input / output port output circuit 290b to the input / output port 205 Is input.

  In addition, for example, even when the power supply to the pachinko machine 500 is shut off after the business hours of the game arcade have ended (even after t11), the inner frame terminal board output circuit 290a Since the power is supplied from the capacitor CD1, when the inner frame 12 is opened and the switch SW3-1 provided in the inner frame terminal plate output circuit 290a conducts, the inner frame terminal plate output circuit 290a A pulse signal having a pulse width of 10 ms is output from the inner frame external output terminal plate 291 to the hall computer 262. However, for example, when the operating time of the game arcade is over and the power supply to the pachinko machine 500 is cut off (in the case of after t11), the DC voltage of DC power from DC1 to DC 12 volts is within the inner frame Since it is not supplied to the input / output port output circuit 290b, even if the inner frame 12 is opened and the switch SW3-2 provided in the inner frame input / output port output circuit 290b conducts, the input / output for the inner frame A signal is not output from port output circuit 290 b to input / output port 205 (DC voltage output from inner frame input / output port output circuit 290 b to input / output port 205 is zero volts).

  Thus, when power is supplied to the pachinko machine 500, the function of outputting a signal to the input / output port 205 and the function of outputting a pulse signal to the hall computer 262 when the inner frame 12 is opened, And the function of outputting a pulse signal to the hall computer 262 when the inner frame 12 is opened when the power supply to the pachinko machine 500 is interrupted, the inner frame opening detection circuit 290 being one circuit. Can be demonstrated.

  Further, when the switch SW3-1 and the switch SW3-2 become conductive (the inner frame 12 is open), the timer IC1 of the inner frame terminal plate output circuit 290a performs the on period of the switch SW3-1 (in the inner frame 12). Regardless of the open period), when the switch SW3-1 becomes conductive (the inner frame 12 is open) and about 10 ms elapses after the voltage at the TRG terminal of the timer IC1 falls from about 10.3 volts to zero volts, the timer IC1 Switch the voltage at the OUT terminal of the switch from about 9.6 volts to zero volts. Thus, the supply period of the current supplied to the photocoupler PR1 of the inner frame external output terminal plate 291 is approximately 10 ms.

  Therefore, for example, the operating time of the game arcade is finished, the power supply to the pachinko machine is cut off, and to the inner frame terminal board output circuit 290a and the inner frame external output terminal board 291. Is supplied from the capacitor CD1 to the photocoupler PR1 when the DC voltage of about 10.3 volts is supplied from the capacitor CD1 to the inner frame terminal plate output circuit 290a and the inner frame external output terminal plate 291. The supply period of the supplied current can be limited to about 10 ms per one opening of the inner frame 12. Therefore, the power consumption due to the opening of the inner frame 12 can be reduced.

  Next, each control process executed by the MPU 201 in the main control device 110 of the pachinko machine 500 of the fourth embodiment will be described with reference to the flowcharts of FIGS. 27 and 28. Note that each control process executed by the main control device 110 of the pachinko machine 500 of the fourth embodiment is a main process among the control processes executed by the main control device 110 of the pachinko machine 10 of the first embodiment ( 12) and timer interrupt processing (see FIG. 15) are modified, and the other control processing is the same as each control processing executed by the main control device 110 of the pachinko machine 10 of the first embodiment. It is. Therefore, in the pachinko machine 500 of the fourth embodiment, the main process shown in FIG. 27 and the timer interrupt process shown in FIG. 28 will be described, and the descriptions of the other control processes will be omitted. For convenience of explanation, the timer interrupt process (FIG. 28) will be described first, and then the main process (FIG. 27) will be described.

  The timer interrupt process executed by the main control device 110 of the pachinko machine 500 of the fourth embodiment will be described with reference to FIG. FIG. 28 is a flowchart showing timer interrupt processing executed by the MPU 201 in the main control device 110. The timer interrupt process is executed by the MPU 201 of the main control unit 110, for example, every 2 ms. The timer interrupt process executed by the main control device 110 of the pachinko machine 500 of the fourth embodiment shown in FIG. 28 is the timer interrupt process executed by the main control device 110 of the pachinko machine 10 of the first embodiment. A process of setting the inner frame opening flag 203a and the front frame opening flag 203b on or off (the process of S506 to S513) is added between the processes of S501 and S502 (see FIG. 15). Therefore, the same parts as those of the timer interrupt process of the pachinko machine 10 according to the first embodiment described above with reference to FIG. 15 will be assigned the same reference numerals and descriptions thereof will be omitted, and only different parts will be described.

  In the timer interrupt process, first, read processing of various winning switches is executed (S501). That is, while reading the states of various switches connected to the main control device 110, the state of the switches is determined to store detection information (winning detection information).

  Next, the output reading process of the inner frame input / output port output circuit 290b is executed (S506). That is, the voltage value of the signal output from the inner frame input / output port output circuit 290 b to the input / output port 205 is read. Then, it is judged whether or not the output (signal) of the inner frame input / output port output circuit 290b read is 5 volts (S507). If the output (signal) of the inner frame input / output port output circuit 290b read is 5 volts (S507: Yes), the inner frame 12 is opened, so the inner frame open flag 203a is turned on (S508) . On the other hand, if the output (signal) of the inner frame input / output port output circuit 290b read is zero volts (S507: No), the inner frame open flag 203a is turned off since the inner frame 12 is closed (S509). ).

  After the processing of S508 or S509, the output reading processing of the front frame input / output port output circuit 292b is executed (S510). That is, the voltage value of the signal output from the front frame input / output port output circuit 292 b to the input / output port 205 is read. Then, it is judged whether or not the output (signal) of the front frame input / output port output circuit 292b read is 5 volts (S511). If the output (signal) of the front frame input / output port output circuit 292b read is 5 volts (S511: Yes), the front frame 14 is opened, so the front frame open flag 203b is turned on (S512) . On the other hand, if the output (signal) of the front frame input / output port output circuit 292b read is zero volts (S511: No), the front frame open flag 203b is turned off since the front frame 14 is closed (S513) ). After the processing of S512 or S513, update of the first initial value random number counter CINI1 and the second initial value random number counter CINI2 is executed (S502).

  As described above, when the output (signal) of the inner frame input / output port output circuit 290b read is 5 volts, the main controller 110 turns on the inner frame open flag 203a because the inner frame 12 is opened. Make it On the other hand, if the output (signal) of the inner frame input / output port output circuit 290b read is zero volts, the inner frame 12 is closed, so the inner frame open flag 203a is turned off. Further, when the output (signal) of the front frame input / output port output circuit 292b read is 5 volts, the main control unit 110 turns on the front frame open flag 203b because the front frame 14 is opened. . On the other hand, if the output (signal) of the front frame input / output port output circuit 292b read is zero volts, the front frame open flag 203b is turned off since the front frame 14 is closed.

  Next, with reference to FIG. 27, the main processing executed by the main control device 110 of the pachinko machine 500 of the fourth embodiment will be described. FIG. 27 is a flowchart showing main processing executed by the MPU 201 in the main control apparatus 110. In this main processing, main processing of the game is executed. As a summary, each process of S201 to S206 and S215 to S220 is executed as a periodic process of 4 ms cycle, and the counter update process of S209 and S210 is executed with the remaining time.

  The main processing performed by the main control device 110 of the pachinko machine 500 of the fourth embodiment shown in FIG. 27 is the main processing performed by the main control device 110 of the pachinko machine 10 of the first embodiment (see FIG. 12). Between S201 and S202), sending either an inner frame open command or an inner frame close command, or a front frame open command or a front frame close command to the voice lamp control device 113 (S215 to Processing of S220 is added. Therefore, the same parts as those of the main processing of the pachinko machine 10 according to the first embodiment described above with reference to FIG. 12 will be assigned the same reference numerals and descriptions thereof will be omitted, and only different parts will be described.

  In the main process executed by the main control device 110 of the pachinko machine 10 of the fourth embodiment, an external output for transmitting output data such as a command updated in the previous process to each control device (peripheral control device) on the sub side After the process (S201) is performed, it is determined whether the inner frame open flag 203a is on (S215). If the inner frame open flag 203a is on (S215: Yes), that is, if the inner frame 12 is open, an inner frame open command is transmitted to the voice lamp control device 113 (S216). On the other hand, if the inner frame opening flag 203a is off (S215: No), that is, if the inner frame 12 is closed, an inner frame closing command is transmitted to the voice lamp control device 113 (S217). After the processing of S216 or S217, it is determined whether the front frame opening flag 203b is on (S218). If the front frame open flag 203b is on (S218: Yes), that is, if the front frame 14 is open, a front frame open command is transmitted to the voice lamp control device 113 (S219). On the other hand, if the front frame opening flag 203b is off (S218: No), that is, if the front frame 14 is closed, a front frame closing command is transmitted to the voice lamp control device 113 (S220). After the processing of S219 or S220, the variation type counters CS1, CS2, CS3 are updated (S202).

  As described above, when the inner frame open flag 203a is on, that is, the inner frame 12 is opened, the main control device 110 repeatedly transmits the inner frame open command to the voice lamp control device 113. On the other hand, if the inner frame open flag 203a is off, that is, the inner frame 12 is closed, an inner frame closing command is repeatedly transmitted to the voice lamp control device 113. Further, when the front frame opening flag 203b is on, that is, the front frame 14 is opened, the main control device 110 repeatedly transmits the front frame opening command to the sound lamp control device 113. On the other hand, if the front frame opening flag 203b is off, that is, the front frame 14 is closed, the front frame closing command is repeatedly transmitted to the voice lamp control device 113.

  The command transmission of the main control device 110 may be performed as follows. For example, when the inner frame 12 is opened and the inner frame open flag 203a is turned on, the main control device 110 transmits an inner frame open command once to the voice lamp control device 113, and the inner frame 12 is closed. When the inner frame opening flag 203a is turned off, the inner frame closing command may be transmitted to the sound lamp control device 113 once. Similarly, when the front frame 14 is opened and the front frame open flag 203b is turned on, the main control unit 110 transmits a front frame open command to the voice lamp control unit 113 once, and the front frame 14 is closed. When the front frame opening flag 203b is turned off, the front frame closing command may be transmitted to the sound lamp control device 113 once.

  Next, with reference to FIGS. 29 to 31, the process performed by the audio lamp control device 113 will be described. FIG. 29 is a flowchart showing the start-up process executed by the MPU 221 in the audio lamp control device 113. This start-up process is started when the power is turned on.

  When the start-up process is executed, first, an initial setting process is performed upon power-on (S701). Specifically, a predetermined value determined in advance is set in the stack pointer. After that, depending on whether the power-off process flag is on or not, the current start-up process is a power-down process in S816 (see FIG. 30) due to a momentary voltage drop (a momentary power failure, so-called "temporary stoppage"). It is determined whether or not it is started during the execution of (S702). As described later with reference to FIG. 30, when the power-off command is received from the main control device 110 (see S812 in FIG. 30), the audio lamp control device 113 executes the power-off processing in S816. The power-off processing flag is turned on before the power-off processing is performed, and the power-off processing flag is turned off after the power-off processing is completed. Therefore, whether or not the power-off process in step S815 is being executed can be determined based on the state of the power-off process flag.

  If the power-off process flag is off (S702: No), the current start-up process is started after the power is completely shut off, or after a momentary power failure occurs and the power-off of S816 occurs. It was started after completing execution of the process, or was started after reset (only without receiving a power-off command from the main control unit 110) by resetting only the MPU 221 of the audio lamp control unit 113 due to noise or the like. is there. Therefore, in these cases, it is checked whether the data in the RAM 223 is destroyed (S703).

  Confirmation of data corruption in the RAM 223 is performed as follows. That is, in the specific area of the RAM 223, data as a keyword of "55AAh" is written by the process of S706. Therefore, the data stored in the specific area is checked, and if the data is "55 AAh", there is no data destruction of the RAM 223, and conversely, if "55 AAh", the data destruction of the RAM 223 can be confirmed. If data corruption in the RAM 223 is confirmed (S703: Yes), the process proceeds to S704 and initialization of the RAM 223 is started. On the other hand, if the data destruction of the RAM 223 is not confirmed (S703: No), the process proceeds to S708.

  In addition, since the keyword of "55AAh" is not memorize | stored in the specific area | region of RAM223 when the start-up process this time is started after the power supply was cut off completely (The memory of RAM223 is lost by power-off. (From S703), it is determined that the data in the RAM 223 is destroyed (S703: Yes), and the process proceeds to S704. On the other hand, the current start-up process is started after completing the execution of the power-off process of S816 after an instantaneous power failure occurs, or is reset only to the MPU 221 of the audio lamp control device 113 due to noise or the like. If the start of the program is started, since the keyword "55AAh" is stored in the specific area of the RAM 223, the data of the RAM 223 is determined to be normal (S703: No), and the process proceeds to S708.

  If the power-off process flag is on (S702: Yes), the current start-up process is after a momentary power failure has occurred, and during the execution of the power-off process of S816, the voice lamp control device 113 The MPU 221 is reset and started. In such a case, since the power-off process is being executed, the storage state of the RAM 223 is not necessarily correct. Therefore, since the control can not be continued in such a case, the process proceeds to S704 and initialization of the RAM 223 is started.

  In the process of S704, the storage area of the entire range of the RAM 223 is checked (S704). As a check method, first, “0FFh” is written for each byte, and it is read for each byte to check whether it is “0FFh”, and if “0FFh”, it is determined that it is normal. The writing and confirmation for each byte is performed in the order of “55h”, “0AAh”, and “00h” next to “0FFh”. By the read / write check of the RAM 223, all storage areas of the RAM 223 are cleared to zero.

  If it is determined that the read / write check is normal for all the storage areas of the RAM 223 (S 705: Yes), the keyword “55 AAh” is written in the specific area of the RAM 223 to set RAM destruction check data (S 706). By checking the keyword "55AAh" written in this specific area, it is checked whether there is data corruption in the RAM 223 or not. On the other hand, if an abnormality in the read / write check is detected in any storage area of the RAM 223 (S 705: No), the abnormality of the RAM 223 is notified (S 707), and an infinite loop is performed until the power is shut off. The abnormality of the RAM 223 is notified by the display lamp 34. The voice output device 226 may output a voice to notify the abnormality of the RAM 223.

  In the process of S708, it is determined whether the power-off flag is on (S708). The power-off flag is turned on when the power-off process of S816 is performed (see S815 in FIG. 30), so the power-off flag is turned on by the process of S815 as described later with reference to FIG. That is, since the power-off flag is turned on before the power-off process of S816 is performed, it is instantaneous that the current start-up process is instantaneous when the power-off flag is turned on until the process of S708 is performed. This is the case where the process is started after the power failure has occurred and the execution of the power-off process in S816 has not been completed. Therefore, in such a case (S708: Yes), the work area of the RAM is cleared to initialize each processing of the audio lamp control device 113 (S709), and the initial value of the RAM 223 is set (S710). The permission is set (S711) to shift to the main processing. The work area of the RAM 223 is an area other than the area for storing a command or the like received from the main control device 110.

  On the other hand, the reason for reaching the processing of S708 in the state where the power-off flag is turned off is that, for example, the current startup processing is started after the power is completely shut off, and the processing of S708 through S706 is performed. It is a case where the processing is reached or the MPU 221 of the audio lamp control device 113 is reset only (without receiving a power-off command from the main control device 110) due to noise or the like. Therefore, in such a case (S 708: No), S 709, which is a process of clearing the work area of the RAM 223, is skipped, the process proceeds to S 710, and the initial value of the RAM 223 is set (S 710). Then (S711), it shifts to the main processing.

  The reason for skipping the clearing process of S709 is that, when the process of S708 is reached through the processes of S704 to S706, all the storage areas of the RAM 223 have already been cleared by the process of S704. If the MPU 221 of the audio lamp control device 113 is reset only due to noise or the like and the start-up process is started, the data of the work area of the RAM 223 is saved without being cleared, and the audio lamp control device 113 is stored. It is because control of can be continued.

  Next, with reference to FIG. 30, the main process executed after the start-up process of the audio lamp control device 113 will be described. FIG. 30 is a flow chart showing main processing executed by the MPU 221 of the audio lamp control device 113. When the main process is executed, it is first determined whether 1 ms or more has elapsed since the main process was started (S801), and if 1 ms or more has not elapsed (S801: No), the processes of S802 to S809 And the process proceeds to S810. In the process of S801, it is the process related to display (effect) in S802 to S809 to determine whether or not 1 ms has elapsed, and while it is not necessary to edit in a short cycle (within 1 ms), each of S810 This is because it is preferable to execute the counter update processing and the command reception processing in step S811 in a short cycle. This makes it possible to prevent reception omission of the command transmitted from the main control device 110.

  If 1 ms or more has passed in the process of S801 (S801: Yes), the setting of the lighting mode of the display lamp 34 or the output mode of each lamp is set to be the lighting mode of the lamp edited in the process of S807 described later After that, the power on notification process is executed (S803). The power on notification process is to notify that the power is turned on for a predetermined time (for example, 30 seconds) when the power is turned on, and the notification is made by the voice output device 226 or the lamp display device 227. It will be. Further, a command may be transmitted to the display control device 114 so as to notify that power is supplied on the screen of the third symbol display device 81. If the power is not turned on, the process proceeds to step S804 without performing notification by the power on notification process.

  In the process of S804, the customer waiting effect is executed, and thereafter, the number-of-helds display update process is executed (S805). In the customer waiting effect, when the pachinko machine 500 is not played by the player for a predetermined time, a setting is made to switch the display of the third symbol display device 81 to the title screen, and the setting is displayed as a command. It is sent to 114. In the pending number display updating process, a process of lighting the pending lamp 85 according to the operation pending ball N is performed.

  Thereafter, the frame button input monitoring and rendering process is executed (S806). In this frame button input monitoring and effect processing, the input whether or not the frame button 22 operated by the player has been pressed in order to enhance the effect is monitored, and the input of the frame button 22 is confirmed. It is a process set to perform an effect. For example, when the advance notice character appears at the start of the variable display, pressing the frame button 22 displays the expected value of the jackpot due to the current fluctuation, or pressing the frame button 22 during reach production produces an expectation for the jackpot. Alternatively, it may be a decision button for changing to an effect that can be possessed or selecting one reach effect among a plurality of reach effects. If the frame button 22 is not provided, the process of S806 is omitted.

  When the frame button input monitoring / rendering process is finished, the lamp editing process is executed (S807), and then the sound editing / output process is executed (S808). In the lamp editing process, lighting patterns and the like of the electric decoration portions 29 to 33 are set to correspond to the display performed by the third symbol display device 81. In the sound editing / output processing, the output pattern of the audio output device 226 is set to correspond to the display performed by the third symbol display device 81, and the sound is output from the audio output device 226 according to the setting.

  Thereafter, the liquid crystal effect execution management process is executed (S809), and the process proceeds to the process of S810. In the liquid crystal effect execution management process, a time synchronized with the time required for the fluctuation display performed by the third symbol display device 81 is set based on the fluctuation pattern command and the presentation time addition command transmitted from the main control device 110. Based on the time set in the liquid crystal effect execution monitoring process, the effect time of the lamp editing process of S807 and the sound editing / output process of S808 is set.

  In the process of S810, the variation display process of the third symbol display device 81 is executed. In this variation display process, a plurality of counters (a counter for setting a stop symbol for big hit, a counter for selecting a stop symbol for removal, etc.) installed in the voice lamp control device 113 are updated, and the value of the counter and the main Set the symbol to be stopped and displayed on the third symbol display device 81 based on the fluctuation pattern command and stop symbol command transmitted from the control device 110, or change the display pattern of fluctuation display (reach before and after reach, reach other than back and forth, complete miss) Etc. are set. The stop symbol and the variation pattern are transmitted to the display control device 114 as a command.

  In the process of S810, for example, when the command of the variation pattern transmitted from the main control device 110 is "completely out", the completely out A pattern is selected from the plurality of patterns corresponding to the complete out, and the third symbol display A command is transmitted to the display control device 110 so that the effect of the completely out A pattern is performed in the device 81. Therefore, since the detailed change pattern displayed on the third symbol display device 81 is determined by the sound lamp control device 113 with respect to one change pattern determined by the main control device 110, the control of the main control device 110 is performed. The burden can be reduced. Furthermore, since the pattern of each effect determined in the main control device 110 can be reduced, the storage capacity of the ROM 202 can be reduced, and cost reduction can be achieved.

  Then, a command from the main control device 110 is received (S811). When a command from the main control unit 110 is received, if it is a command used by the audio lamp control unit 113 according to the command, processing corresponding to the command is performed, the processing result is stored in the RAM 233 and used by the display control unit 114 If it is a command, the command is sent to the display control device 114.

  When the process of S811 is completed, it is determined whether or not the occurrence information of the power-off is stored in the work RAM 233 (S812). The power-off occurrence information is stored when a power-off command is received from the main control device 110. If the power-off occurrence information is stored in the process of S812 (S812: Yes), both the power-off flag and the power-off process flag are turned on (S815), and the power-off process is executed (S816). After the power-off process is executed, the power-off process flag is turned off (S817), and then the process is looped endlessly. In the power-off process, the occurrence of the interrupt process is inhibited, and each output port is turned off, and the outputs from the audio output device 226 and the lamp display device 227 are turned off. In addition, the storage of the occurrence information of the power-off is also erased.

  On the other hand, if the power failure occurrence information is not stored in the process of S812 (S812: No), either the inner frame 12 or the front frame 14 is opened, or both the inner frame 12 and the front frame 14 are opened. If there is a door open notification process (S813) to notify using the voice output device 226 and the lamp display device 227.

  Here, the door open notification processing will be described with reference to FIG. FIG. 31 is a flow chart showing a door opening notification process executed by the MPU 221 of the audio lamp control device 113. This door open notification processing determines whether the voice lamp control device 113 has received four commands of the inner frame open command, the front frame open command, the inner frame close command, and the front frame close command, and according to the determination Is a process of executing notification.

  In the door open notification process, first, in the process of S811 (see FIG. 30), it is determined whether an inner frame open command indicating that the inner frame 12 is open has been received (S901). If the inner frame open command is received (S901: Yes), it is determined whether the inner frame open command reception flag 223a is on (S902). If the inner frame open command reception flag 223a is not on (S902: No), the inner frame open notification process, which is the process of S905 described later, has not been started yet, so to start the inner frame open notification process, S903. Move to the subsequent processing. First, the inner frame open command reception flag 223a is turned on to indicate that the inner frame open command has been received (S903), and the inner frame open command is transmitted to the display control device 114 (S904). Then, an inner frame opening notification process of notifying that the inner frame 12 is opened using the voice output device 226 and the lamp display device 227 is started (S905). In this inner frame opening notification process, for example, the inner frame 12 is opened using a voice output device 226 with an electronic sound, such as “the inner frame is open”, or using the lamp display device 227. To indicate, for example, 4 blinks per second. This makes it possible to notify an unspecified number of persons that the inner frame 12 has been opened.

  The main control device 110 repeatedly transmits an inner frame open command to the voice lamp control device 113 while the inner frame 12 is open. Therefore, when the inner frame open command has already been received and the processes of S903 to S905 have been executed, if the inner frame open command is received again (S901: Yes), the inner frame open command reception flag 223a Is determined to be on (S902: Yes), and the internal frame opening notification process (S905) that has already been started is continuously executed (S906). Thereby, while the inner frame 12 is open, the inner frame opening notification process (S905) is continuously executed. When the inner frame opening command is not received in the process of S811 (S901: No), the process of S903 to S906 is skipped.

  Next, in the process of S811 (see FIG. 30), it is determined whether a front frame opening command indicating that the front frame 14 is open has been received (S907). If the front frame open command is received (S907: Yes), it is determined whether the front frame open command reception flag 223b is on (S908). If the front frame opening command reception flag 223b is not on (S908: No), the front frame opening notification processing, which is the processing of S911 described later, has not yet been started, so to start the front frame opening notification processing, S909. Move to the subsequent processing. First, the front frame open command reception flag 223b is turned on to indicate that the front frame open command has been received (S909), and the front frame open command is transmitted to the display control device 114 (S910). Then, a front frame opening notification process of notifying that the front frame 14 is opened using the voice output device 226 and the lamp display device 227 is started (S911). In this front frame opening notification processing, for example, the sound output device 226 is used to notify by "electronic noise" that "the front frame is open", or the front frame 14 is opened using the lamp display device 227. To indicate, for example, blinking once a second. This makes it possible to notify an unspecified number of persons that the front frame 14 has been opened.

  The main control unit 110 repeatedly transmits the front frame opening command to the voice lamp control unit 113 while the front frame 14 is open. Therefore, when the front frame open command has already been received and the processes of S909 to S911 have been executed, if the front frame open command is received again (S907: Yes), the front frame open command reception flag 223b Is determined to be on (S908: Yes), and the front frame opening notification process (S911), which has already been started, is continuously executed (S912). As a result, while the front frame 14 is open, the front frame opening notification process (S911) is continuously executed. When the front frame open command is not received in the process of S811 (S907: No), the process of S909 to S912 is skipped.

  Next, in the process of S811 (see FIG. 30), it is determined whether an inner frame closing command indicating that the inner frame 12 is closed has been received (S913). If the inner frame closing command has been received (S913: Yes), it is determined whether the inner frame open command reception flag 223a is on (S914). If the inner frame open command reception flag 223a is on (S914: Yes), although the inner frame open notification process (S905) is started, the process (S917) to end the inner frame open notification process described later is still executed. Since the process is not performed, the process proceeds to the process after S915 to execute the process of ending the inner frame opening notification process. First, the inner frame open command reception flag 223a is turned off to indicate that the inner frame close command has been received (S915), and the inner frame close command is transmitted to the display control device 114 (S916). Then, the inner frame opening notification process which has been executed using the voice output device 226 and the lamp display device 227 is ended (S917). Thus, the notification indicating the opening of the inner frame 12 which has been performed using the audio output device 226 or the lamp display device 227 can be ended.

  The main control device 110 repeatedly transmits an inner frame closing command to the voice lamp control device 113 while the inner frame 12 is closed. Therefore, when the inner frame closing command has already been received and the processes of S915 to S917 have been executed, if the inner frame closing command is received again (S913: Yes), the inner frame open command reception flag 223a Is determined to be off (S914: No), and the processing of S915 to S917 is skipped. Further, even if the inner frame closing command is not received in the process of S811 (S913: No), the process of S915 to S917 is skipped.

  Next, in the process of S811 (see FIG. 30), it is determined whether a front frame closing command indicating that the front frame 14 is closed has been received (S918). If the front frame closing command has been received (S918: Yes), it is determined whether the front frame open command reception flag 223b is on (S919). If the front frame open command reception flag 223b is on (S919: Yes), although the front frame open notification process (S911) is started, the process (S922) to end the front frame open notification process described later is still executed. Since the process is not performed, the process proceeds to the process of S920 and subsequent steps in order to execute the process of ending the front frame opening notification process. First, the front frame open command reception flag 223b is turned off to indicate that the front frame close command has been received (S920), and the front frame close command is transmitted to the display control device 114 (S921). Then, the front frame opening informing process which has been executed using the voice output device 226 and the lamp display device 227 is ended (S922). Thereby, the notification which shows opening of the front frame 14 performed using the audio | voice output device 226 or the lamp | ramp display apparatus 227 can be complete | finished.

  The main controller 110 repeatedly transmits the front frame closing command to the voice lamp control device 113 while the front frame 14 is closed. Therefore, when the front frame closing command has already been received and the processing of S920 to S922 has been executed, if the front frame closing command is received again (S918: Yes), the front frame open command reception flag 223a Is determined to be off (S919: No), and the processing of S920 to S922 is skipped. Further, even when the front frame closing command is not received in the process of S811 (S918: No), the process of S920 to S922 is skipped.

  As described above, the voice lamp control device 113 indicates that the inner frame open command reception flag 223a is received when the inner frame open command is received in the process of S811 (see FIG. 30). After turning on (S903), an inner frame open command is transmitted to the display control unit 114 (S904), and an inner frame open notification process is started (S905). Since the inner frame opening notification process (S905) is continuously performed until the inner frame 12 is closed, it is possible to notify an unspecified number of persons that the inner frame 12 is open. Similarly, when the voice lamp control device 113 receives the front frame open command in the process of S811 (see FIG. 30), the voice lamp control device 113 turns on the front frame open command reception flag 223b to indicate that the front frame open command is received. (S909), transmits a front frame open command to the display control device 114 (S910), and starts front frame open notification processing (S911). This front frame opening notification process (S911) is continuously performed until the front frame 14 is closed, so that it can be notified to an unspecified number of persons that the front frame 14 is open.

  When the inner lamp closing command is received in the process of S811 (see FIG. 30) and the inner frame opening notification process (S905) is already performed, the voice lamp control device 113 receives the inner frame opening command reception flag. 223a is turned off to indicate that the inner frame closing command has been received (S915), the inner frame closing command is transmitted to the display control device 114 (S916), and the inner frame opening notification process is ended (S917). Similarly, when the front frame closing command is received in the process of S811 (see FIG. 30), the front frame opening command reception flag 223b is closed when the front frame opening notification process (S911) is already performed. It is turned off to indicate that the command has been received (S920), a front frame closing command is transmitted to the display control device 114 (S921), and the front frame opening notification processing is ended (S922).

  It returns to the explanation of FIG. After execution of the door opening notification process (S813), whether or not the RAM 223 is destroyed is determined based on the keyword stored in the RAM 223 (S814), and if the RAM 223 is not destroyed (S814: No), S801 Returning to the process, the main process is repeatedly executed. On the other hand, if the RAM 223 is destroyed (S 814: Yes), the processing is looped endlessly to stop the execution of the subsequent processing. Here, since it is determined that the RAM is destroyed and the main processing is not executed when the loop is infinite, the display by the third symbol display device 81 does not change thereafter. Therefore, the player can know that an abnormality has occurred, and can call a clerk or the like in the hall to ask for repair of the pachinko machine 500 or the like. Further, when it is confirmed that the RAM 223 is destroyed, notification of the destruction of the RAM may be performed by the audio output device 226 or the lamp display device 227.

  Next, processing performed by the display control device 114 will be described with reference to FIGS. 32 and 33. For the convenience of description, the external interrupt process of FIG. 33 will be described first, and then the main process of FIG. 32 will be described.

  FIG. 33 is a flowchart showing the external interrupt process executed by the MPU 231 in the display control unit 114, which is executed when a command is received from the audio lamp control unit 113. When the external interrupt processing is executed, the received command is determined by the processing of S1101 to S1106. If the received command is a rendering permission command (S1101: Yes), the rendering permission flag 233a of the work RAM 233 is turned on (S1108), and the external interrupt processing is ended. If the received command is a fluctuation pattern command (S1101: No, S1102: Yes), the fluctuation start flag 233b of the work RAM 233 is turned on (S1109), and the external interrupt processing is ended.

  Next, if the received command is the inner frame open command (S1101: No, S1102: No, S1103: Yes), the display inner frame open command reception flag 233c of the work RAM 233 receives the inner frame open command. The display is turned on (S1110), and the display of "The inner frame is open" is started on the third symbol display device 81 (S1111). Thereafter, the external interrupt processing is ended. By the start of display on the third symbol display device 81, it can be notified to an unspecified number of persons that the inner frame 12 is open. In addition, the character of "the inner frame is open | released" displayed on the 3rd symbol display apparatus 81 is superimposed on the effect display currently displayed on the 3rd symbol display apparatus 81, and is displayed. In addition, the character "The inner frame is open" is closed while the inner frame 12 is open, that is, the inner frame 12 is closed and the display inner frame open command reception flag 233c is turned off, which will be described later. It is displayed on the third symbol display device 81 continuously until the process of S1115 is performed.

  Next, if the received command is the front frame open command (S1101: No, S1102: No, S1103: No, S1104: Yes), the display front frame open command reception flag 233d of the work RAM 233 is set to the front frame open command. It is turned on to indicate that it has been received (S1112), and the display of "the front frame is open" is started on the third symbol display device 81 (S1113). Thereafter, the external interrupt processing is ended. By the start of display on the third symbol display device 81, it can be informed to an unspecified number of persons that the front frame 14 is open. In addition, the character of "the front frame is open | released" displayed on the 3rd symbol display apparatus 81 is superimposed on the effect display currently displayed on the 3rd symbol display apparatus 81, and is displayed. In addition, the character "front frame is open" indicates that the front frame 14 is closed while the front frame 14 is open, that is, the display front frame open command reception flag 233d is turned off, which will be described later. It is continuously displayed on the third symbol display device 81 until the processing of S1117 is performed.

  Next, if the received command is the inner frame closing command (S1101: No, S1102: No, S1103: No, S1104: No, S1105: Yes), the display inner frame open command reception flag 233c of the work RAM 233 is It is turned off to indicate that the inner frame closing command has been received (S1114), and the display of "the inner frame is open" of the third symbol display device 81 is erased (S1115). Thereafter, the external interrupt processing is ended.

  Next, if the received command is the front frame closing command (S1101: No, S1102: No, S1103: No, S1104: No, S1105: No, S1106: Yes), the display front frame open command of the work RAM 233 is received The flag 233d is turned off to indicate that the front frame closing command has been received (S1116), and the display of "the front frame is open" of the third symbol display device 81 is erased (S1117). Thereafter, the external interrupt processing is ended.

  Finally, if the received command is none of a production permission command, a variation pattern command, an inner frame open command, a front frame open command, an inner frame close command or a front frame close command (S1101: No, S1102: No, S1103: No, S1104: No, S1105: No, S1106: No) A process corresponding to the other received command is executed (S1107), and the external interrupt process is ended. For example, if the received command is a stop command, processing for stopping the change being performed by the third symbol display device 81 is executed.

  As described above, when the display control device 114 receives the inner frame open command, the display inner frame open command reception flag 233c of the work RAM 233 is turned on to indicate that the inner frame open command has been received (S1110). 3 The display starts as "The inner frame is open" on the symbol display device 81 (S1111). By the start of display on the third symbol display device 81, it can be notified to an unspecified number of persons that the inner frame 12 is open. Similarly, when the display control device 114 receives the front frame open command, the display front frame open command reception flag 233 d of the work RAM 233 is turned on to indicate that the front frame open command has been received (S 1112). The display of "the front frame is open" is started on the symbol display device 81 (S1113). By the start of display on the third symbol display device 81, it can be informed to an unspecified number of persons that the front frame 14 is open.

  Then, when the display control device 114 starts displaying “the inner frame is open” in the third symbol display device 81, when the inner frame closing command is received, the display inner frame open command for the work RAM 233 The reception flag 233c is turned off to indicate that the inner frame closing command has been received (S1114), and the display of "the inner frame is open" of the third symbol display device 81 is erased (S1115). Similarly, when the display control device 114 starts displaying "the front frame is open" on the third symbol display device 81, when the front frame closing command is received, the display front frame of the work RAM 233 is opened. The command reception flag 233d is turned off to indicate that the front frame closing command is received (S1116), and the display of "the front frame is open" of the third symbol display device 81 is erased (S1117).

  Next, main processing executed by the display control device 114 will be described with reference to FIG. FIG. 32 is a flowchart showing the main process executed by the MPU 231 in the display control device 114, and this main process is started when the power is turned on. First, an initial setting process associated with power on is executed (S1001). Specifically, the MPU 231 is initialized, and processing of clearing the storage of the work RAM 233 and the video RAM 234 is performed. Thereafter, the compressed character information stored in the character ROM 235 is read (S1002), the read character information is decompressed, and the decompressed character information is stored in the video RAM 234 (S1003). Furthermore, in order to display the initial screen, information corresponding to the initial screen is extracted from the character information written in the video RAM 234, and the video RAM 234 different from the area in the video RAM 234 storing the character information decompressed in the process of S1003. The extracted character information is written in the area in (S1004).

  Next, in order to determine whether the rendering permission command transmitted from the main control device 110 has been received, it is determined whether the rendering permission flag 233a is turned on (S1005), and the rendering permission flag 233a is not on. (S1005: No), processing of S1006 and subsequent steps is awaited until the rendering permission command is transmitted from the main control device 110, that is, until the rendering permission flag 233a is turned on.

  As a result of the determination in S1005, if the rendering permission flag 233a is turned on (S1005: Yes), the character information extracted in the process of S1004 is displayed on the third symbol display device 81. Then, the process proceeds to S1006 and subsequent steps.

  In the process of S1006, it is determined whether or not the display being executed by the third symbol display device 81 is in a big hit (S1006), and if it is not in a big hit (S1006: No), in the third symbol display device 81 It is judged whether or not the fluctuation start flag 233b for permitting the start of the fluctuation display is turned on (S1007). As a result, if the fluctuation start flag 233b is turned on (S1007: Yes), the fluctuation start flag 233b is turned off (S1008), and the fluctuation corresponding to the fluctuation pattern command is started on the display screen of the third symbol display device 81. (S1009). Here, in the process of S1008, the fluctuation start flag 233b is turned off in the pachinko machine 500 of the present embodiment, when the fluctuation start flag 233b is turned on, the fluctuation display is started in the third symbol display device 81. (S1007: Yes to S1009), if the fluctuation start flag 233b is not turned off, the fluctuation start process (S1009) is repeatedly executed, and the normal process is not executed.

  On the other hand, as a result of the discrimination in the process of S1007, when the fluctuation start flag 233b is off (S1007: No) or when the fluctuation is started in the process of S1009, the fluctuation effect process is performed (S1010). In the fluctuation presentation process, when the fluctuation display is continuously performed, the character information and the presentation pattern information are updated and set (new extraction of character information from the video RAM 234 and the extracted video information of the character information to the video RAM 234) Writing) and the variable display is not performed, the process proceeds to the process of S1011 without performing any process. Here, in the process of S1011, in order to execute the process (S1006 to S1010) for performing effects in the third symbol display device 81 every 20 ms, whether 20 ms or more has elapsed since the process of S1006 was started If it is not confirmed, the process waits until 20 ms or more elapses (S1011: No), and if 20 ms or more has elapsed (S1011: Yes), the process proceeds to S1006.

  If the result of the process of S1006 shows that the jackpot is in progress (S1006: Yes), the jackpot effect process is executed (S1012). In the jackpot effect processing, the number of rounds is updated, the number of prize balls is updated, the background image is updated for each round, etc. (new extraction of character information from video RAM 234 and video RAM 234 for extracted character information Write to). After the end of the jackpot effect process (S1012), the process proceeds to the process of S1011.

  As described above, according to the pachinko machine 500 of the fourth embodiment, the inner frame input / output port output circuit 290b of the inner frame open frame detection circuit 290 supplies power to the pachinko machine 500, When a DC voltage of 12 volts is supplied from the DC power supply DC1 and the switch SW3-2 is turned on to detect the opening of the inner frame 12, a signal of a DC voltage of 5 volts is output to the input / output port 205. When this signal is input to the input / output port 205, the pachinko machine 500 transmits an inner frame open command to the audio lamp control device 113, and the audio output device 226 and the lamp display device 227 are used to Report the release. Further, the pachinko machine 500 transmits an inner frame open command to the display control device 114 via the audio lamp control device 113, and displays a message indicating the open of the inner frame 12 on the third symbol display device 81. Therefore, it is possible to clearly notify an unspecified number of people that the inner frame 12 is open.

  Similarly, according to the pachinko machine 500 of the fourth embodiment, the front frame input / output port output circuit 292b of the front frame frame opening detection circuit 292 is supplied with power to the pachinko machine 500, and from the DC power supply DC1. When the DC voltage of 12 volts is supplied, when the switch SW4-2 is turned on to detect the opening of the front frame 14, a signal of the DC voltage of 5 volts is output to the input / output port 205. When this signal is input to the input / output port 205, the pachinko machine 500 transmits a front frame open command to the audio lamp control device 113, and the audio output device 226 and the lamp display device 227 are used to Report the release. Further, the pachinko machine 500 transmits a front frame opening command to the display control device 114 via the audio lamp control device 113, and displays a message indicating the opening of the front frame 14 on the third symbol display device 81. Therefore, it is possible to clearly notify an unspecified number of persons that the front frame 14 is open.

  On the other hand, according to the pachinko machine 500 of the fourth embodiment, the inner frame terminal board output circuit 290a of the inner frame frame open detection circuit 290 is added in the case where a DC voltage of 12 volts is supplied from the DC power supply DC1. For example, even if the operating time of the game arcade is over and the power supply to the pachinko machine 500 is cut off and the DC voltage of 12 volts is not supplied from the DC power supply DC1 (the main control device 110 is stopped Even when the switch SW3-1 is turned on to detect the opening of the inner frame 12, a pulse signal with a pulse width of 10 ms is output from the inner frame external output terminal plate 291 to the hall computer 262. The pulse signal output from the inner frame external output terminal plate 291 is stored in the hall computer 262. Therefore, by analyzing the pulse signal stored in the hall computer 262, for example, even if the operating time of the game arcade is over and the power supply to the pachinko machine 500 is shut off, An open can be detected.

  Similarly, according to the pachinko machine 500 of the fourth embodiment, the front frame terminal plate output circuit 292a of the front frame frame open detection circuit 292 is supplied with a DC voltage of 12 volts from the DC power supply DC1. In addition, for example, even if the operating time of the game arcade is over and the power supply to the pachinko machine 500 is cut off and the DC voltage of 12 volts is not supplied from the DC power supply DC1 (the main control device 110 is stopped And when the switch SW4-1 is turned on to detect the opening of the front frame 14, a pulse signal with a pulse width of 10 ms is output from the front frame external output terminal plate 293 to the hall computer 262. . The pulse signal output from the front frame external output terminal plate 293 is stored in the hall computer 262. Therefore, by analyzing the pulse signal stored in the hall computer 262, for example, even if the power supply to the pachinko machine 500 is shut off after the business hours of the game arcade have ended, An open can be detected.

  Thus, when the inner frame 12 is opened when power is supplied to the pachinko machine 500, the function of outputting a pulse signal to the hall computer 262 and the power supply to the pachinko machine 500 are cut off. When the inner frame 12 is open, the function of outputting a pulse signal to the hall computer 262 can be exhibited by the inner frame terminal plate output circuit 290 a which is one circuit.

  Also, the function of outputting a pulse signal to the hall computer 262 when the front frame 14 is opened while power is supplied to the pachinko machine 500, and the power supply to the pachinko machine 500 is interrupted. When the front frame 14 is opened, the function of outputting a pulse signal to the hall computer 262 can be exhibited by the front frame terminal plate output circuit 292 a which is one circuit.

  The hall computer 262 is kept operating for 24 hours. Therefore, in the inner frame terminal board output circuit 290a, the pulse signal is output from the inner frame external output terminal board 291, and the time when the pulse signal is output, that is, the open time of the inner frame 12 is also a hall computer. It can be stored in 262. Similarly, in the front frame terminal plate output circuit 292a, the pulse signal is output from the front frame external output terminal plate 293, and the time when the pulse signal is output, that is, the open time of the front frame 14 is also a hole. It can be stored in the computer 262.

  In the fourth embodiment, the pachinko machine 500 separately reports the opening of the inner frame 12 and the opening of the front frame 14 using the audio output device 226 and the lamp display device 227. Further, the pachinko machine 500 separately displays the opening of the inner frame 12 and the opening of the front frame 14 using the third symbol display device 81. However, the present invention is not limited to this, and the opening of the inner frame 12 and the opening of the front frame 14 may be performed in the same notification mode and display mode. Specifically, the notification performed using the audio output device 226 and the lamp display device 227 may be the same between the case where the inner frame 12 is opened and the case where the front frame 14 is opened. Similarly, the display performed using the third symbol display device 81 may be the same between the case where the inner frame 12 is opened and the case where the front frame 14 is opened. In this case, when either one or both of the inner frame 12 and the front frame 14 are opened, the third symbol display device 81 may display "the door is open".

  In the fourth embodiment, the pachinko machine 500 performs notification using the audio output device 226 and the lamp display device 227 when the inner frame 12 is opened or the front frame 14 is opened, and The display was performed using the symbol display device 81. However, the present invention is not limited to this, and either of notification using the audio output device 226 and the lamp display device 227 or display using the third symbol display device 81 may be performed.

  Next, with reference to FIGS. 34 to 36, a pachinko machine 600 of the fifth embodiment will be described. The pachinko machine 600 of the fifth embodiment includes three switches SW3-1, SW3-2, and SW3-3, which are switches SW3 connected to the inner frame opening detection circuit 290 of the pachinko machine 500 of the fourth embodiment. It is changed to switch SW3A in which the switch is incorporated, and switch SW4 connected to the front frame opening detection circuit 292 of the pachinko machine 500 of the fourth embodiment is a switch SW4-1, SW4-2, 3 of SW4-3. The zener diode D3 used in the inner frame opening detection circuit 290 and the front frame opening detection circuit 292 of the pachinko machine 500 of the fourth embodiment is removed after changing to the switch SW4A in which two switches are incorporated. (Without removing the Zener diode D3, the inner frame opening detection circuit 290 and the front opening detection It may be connected in the same manner as the circuit 292). In the following, the inner frame opening detection circuit 290 of the fourth embodiment will be changed to the inner opening detection circuit 290 of the fourth embodiment as the inner opening detection circuit 300 in the fifth embodiment. In the pachinko machine 600 of the fifth embodiment, the front frame frame open detection circuit 302 is the front frame frame open detection circuit 302 in which the above-described change is made to the front frame frame open detection circuit 292 of the pachinko machine 500 of the fourth embodiment. Therefore, the inner frame terminal plate output circuit 290a of the fourth embodiment is changed to the inner frame terminal plate output circuit 290a, and the fourth embodiment is the inner frame terminal plate output circuit 300a of the fifth embodiment. The inner frame input / output port output circuit 290b of the pachinko machine 500 according to the embodiment is changed to the inner frame input / output port output circuit 300b in the fifth embodiment. Similarly, the front frame terminal plate output circuit 292a of the fourth embodiment has been modified as the front frame terminal plate output circuit 302a of the fifth embodiment. The front frame input / output port output circuit 292 b of the pachinko machine 500 according to the fourth embodiment is the front frame input / output port output circuit 302 b according to the fifth embodiment.

  According to the pachinko machine 600 of the fifth embodiment, the capacitor CD7 of the integration circuit 281 of the inner frame opening detection circuit 300 (inner frame terminal board output circuit 300a) is stored when the inner frame 12 is opened. When the inner frame 12 is closed, the stored charge is instantaneously discharged to ground through the switch SW3-3 connected to the inner frame frame open detection circuit 300 (inner frame terminal plate output circuit 300a). can do. Similarly, when the front frame 14 is opened, the charge accumulated in the capacitor CD7 of the integration circuit 281 of the front frame frame open detection circuit 302 (front frame terminal plate output circuit 302 a) is closed by the front frame 14. In this case, discharge to ground can be made instantaneously through the switch SW4-3 connected to the front frame opening detection circuit 302 (front frame terminal plate output circuit 302a).

  As described above, since the charge stored in the capacitor CD7 of the integration circuit 281 is always zero until the inner frame 12 or the front frame 14 is again opened, the inner frame 12 or the front frame 14 is Even if the open circuit is continuously opened a plurality of times in a short time, the integration circuit 281 operates normally and the voltage applied to the TRG terminal of the timer IC1 regardless of the open period of the inner frame 12 or the front frame 14 The falling period of can be made into a fixed period (about 2 ms).

  Further, according to the pachinko machine 600 of the fifth embodiment, as described above, the charge stored in the capacitor CD7 of the integrating circuit 281 of the inner frame opening detection circuit 300 (inner frame terminal plate output circuit 300a) is When the inner frame 12 is closed, it is discharged to the ground through the switch SW3-3, and is stored in the capacitor CD7 of the integrating circuit 281 of the front frame frame opening detection circuit 302 (front frame terminal plate output circuit 302a) The charge is discharged to the ground through the switch SW4-3 when the front frame 14 is closed. Therefore, unlike the pachinko machine 500 of the fourth embodiment, when the inner frame 12 or the front frame 14 is opened again and the switch SW3-1 or the switch SW4-1 is conducted, the charge stored in the capacitor CD7 is An overvoltage (for example, a voltage of 12.3 volts) which is superimposed on the voltage supplied from the capacitor CD1 and which destroys the timer IC1 is not applied to the TRG terminal of the timer IC1. Therefore, it is possible to eliminate the need for the Zener diode D3 that prevents the application of an overvoltage having a magnitude that destroys the timer IC1.

  Further, according to the pachinko machine 600 of the fifth embodiment, as in the pachinko machine 500 of the fourth embodiment, when the DC voltage of 12 volts is supplied from the DC power supply DC1, the inner frame 12 and the front frame 14 The pachinko machine 600 is used to separately report whether the inner frame 12 has been opened, the front frame 14 has been opened, or both have been opened. be able to. Furthermore, according to the pachinko machine 600 of the fifth embodiment, similarly to the pachinko machine 500 of the fourth embodiment, in addition to the case where a DC voltage of 12 volts is supplied from the DC power supply DC1, the DC power supply DC1 to 12 volts Even when no DC voltage is supplied, when either the inner frame 12 or the front frame 14 is opened, pulse signals can be separately output to the hall computer 262. Therefore, the pulse signal stored in the hall computer 262 can identify whether the inner frame 12 has been opened, the front frame 14 has been opened, or both have been opened.

  In the description of the pachinko machine 600 of the fifth embodiment, the same parts as those of the pachinko machine 500 of the fourth embodiment are denoted by the same reference numerals, and the description thereof is omitted, and only different parts will be described.

  The structure of the switch SW3A connected to the inner frame opening detection circuit 300 and the switch SW4A connected to the front opening detection circuit 302 will be described with reference to FIG. The switch SW3A is obtained by adding the switch SW3-3 to the switch SW3 incorporating the switches SW3-1 and SW3-2, and the other structure is the same as the switch SW3. Similarly, the switch SW4A is obtained by adding the switch SW4-3 to the switch SW4 incorporating the switches SW4-1 and SW4-2, and the other structure is the same as the switch SW4. Therefore, in the switch SW3A and the switch SW4A, the same parts as those of the switch SW3 and the switch SW4 are given the same reference numerals, and the description thereof is omitted, and only different parts will be described. Further, since the switch SW3A and the switch SW4A have the same structure, the structure of the switch SW3A will be described, and the description of the switch SW4A will be omitted.

  FIG. 34 is a cross-sectional view of the switch SW3A. FIG. 34 (a) is a cross-sectional view showing the state (shutdown state) of the switch SW3A in the state where the inner frame 12 is closed. Further, FIG. 34 (b) is a cross-sectional view showing the state of the switch SW3A in the state where the inner frame 12 is in the process of being opened or closed. Further, FIG. 34C is a cross-sectional view showing a state (conductive state) of the switch SW3A in a state in which the inner frame 12 is opened.

  As shown in FIG. 34 (a), the switch SW3A connected to the inner frame opening detection circuit 300 is provided with a switch SW3-3 which operates reverse to the switch SW3-1 and the switch SW3-2. There is. The switch SW3-3 includes a conductor plate SW3-3a made of metal, which is a conductive member disposed on the movable shaft SW3a in contact with the closed state of the inner frame 12, and the conductor plate SW3-3a facing each other. A pair of terminal boards SW3-3b made of metal disposed at the positions, a support board SW3-3c for arranging the pair of terminal boards SW3-3b in the casing SW3b, and a conductor board SW3-3a A pair of springs SW3ca are provided on the surface facing the pair of terminal plates SW3-3b and generate an urging force in a direction opposite to the pair of terminal plates SW3-3b with respect to the conductor plate SW3-3a. ing. Thus, the switch SW3 incorporates three switches: the switch SW3-1, the switch SW3-2, and the switch SW3-3.

  As shown in FIG. 34 (a), when the inner frame 12 is closed, the movable shaft SW3a abuts on the inner frame 12, and the movable shaft SW3a is pushed into the housing SW3b. Accordingly, the contact between the conductor plate SW3-1a and the pair of terminal plates SW3-1b is prevented, and the contact between the conductor plate SW3-2a and the pair of terminal plates SW3-2b is prevented. On the other hand, conductor board SW3-3a and a pair of terminal boards SW3-3b contact. Therefore, in the state where the inner frame 12 is closed, the switch SW3-1 and the switch SW3-2 both become in a state in which the conduction is cut off, while the switch SW3-3 becomes in the state of conduction.

  Next, as shown in FIG. 34 (b), when the inner frame 12 is in the process of being opened or closed, the contact of the movable shaft SW3a with the inner frame 12 is released, so attachment of the pair of springs SW3ca The contact force between the conductor plate SW3-1a and the pair of terminal plates SW3-1b, the contact between the conductor plate SW3-2a and the pair of terminal plates SW3-2b, and the conductor plate SW3-3a and the pair of terminal plates SW3-3b Any contact with the body is in a state of being blocked. Therefore, in the state in which the inner frame 12 is in the process of being opened or being closed, all of the switches SW3-1, SW3-2, and SW3-3 are in the state in which the conduction is interrupted.

  Furthermore, as shown in FIG. 34C, in a state where the inner frame 12 is opened, the biasing force of the pair of springs SW3ca causes the conductor plate SW3-1a and the pair of terminal plates SW3-1b to be in contact with each other. The conductor plate SW3-2a and the pair of terminal plates SW3-2b are in contact with each other. On the other hand, the contact between the conductor plate SW3-3a and the pair of terminal plates SW3-3b is hindered. Therefore, in the state where the inner frame 12 is opened, both the switch SW3-1 and the switch SW3-2 are in the conductive state, while the switch SW3-3 is in the state in which the conduction is cut off.

  As described above, while the switch SW3-1 and the switch SW3-2 incorporated in the case SW3b are both in the closed state when the inner frame 12 is closed, the conductive state is obtained when the inner frame 12 is opened. It becomes. On the other hand, the switch SW3-3 incorporated in the case SW3b operates reverse to the switch SW3-1 and the switch SW3-2, and becomes conductive when the inner frame 12 is closed, while the inner frame When 12 is open, it is cut off. That is, the switch SW3-1 and the switch SW3-2 have a structure in which the conduction state and the disconnection state operate in conjunction with each other, and the switch SW3-3 is a state opposite to the states of the switch SW3-1 and the switch SW3-2. It becomes the structure which does the operation which becomes. However, the structure of the switch SW3A is not limited to the shape described in FIG. 34, and in the state where the inner frame 12 is closed, the switch SW3-1 and the switch SW3-2 are cut off, and the switch SW3-3 is In the conductive state, when the inner frame 12 is open, the switch SW3-1 and the switch SW3-2 may be conductive and the switch SW3-3 may be in the cut-off state. The same applies to the structure of the switch SW4A.

  Next, with reference to FIG. 35, the inner frame opening detection circuit 300 and the inner external output terminal plate 291 used in the pachinko machine 600 of the fifth embodiment will be described. FIG. 35 is a block diagram showing an electrical configuration of inner frame open circuit detection circuit 300 and inner frame external output terminal plate 291. Referring to FIG. Note that the inner frame opening detection circuit 300 of the pachinko machine 600 of the fifth embodiment is the switch SW3-1 connected to the inner frame opening detection circuit 290 of the pachinko machine 500 of the fourth embodiment. , The switch SW3A in which three switches, SW3-2, and SW3-3 are built in, is removed, and the Zener diode D3 used in the inner frame frame open detection circuit 290 of the pachinko machine 500 of the fourth embodiment is removed. It is a thing. The inner frame opening detection circuit 300 has the same configuration as the inner opening detection circuit 290 described above with reference to FIG. The inner frame external output terminal plate 291 of the pachinko machine 600 of the fifth embodiment has the same structure as the inner frame external output terminal plate 291 of the pachinko machine 500 of the fourth embodiment. Therefore, the inner frame opening detection circuit 300 and the inner outer output terminal plate 291 are the same as the inner opening detection circuit 290 and the inner outer output terminal plate 291 described above with reference to FIG. The same reference numerals will be assigned and the description thereof will be omitted, and only different parts will be described.

  Further, the front frame opening detection circuit 302 used in the pachinko machine 600 of the fifth embodiment is different from the inner opening detection circuit 300 used in the pachinko machine 600 of the fifth embodiment in connection. The switch to be operated is only the place where the switch SW3A is changed to the switch SW4A, and the other configuration is the same as that of the inner frame opening detection circuit 300. The front frame external output terminal plate 293 used in the pachinko machine 600 of the fifth embodiment has the same configuration as the inner frame external output terminal board 291 used in the pachinko machine 600 of the fifth embodiment. That is, the inner frame external output terminal plate 291 of the pachinko machine 500 of the fourth embodiment described above with reference to FIG. 25 has the same structure. Therefore, the description of the front frame opening detection circuit 302 and the front frame external output terminal plate 293 is omitted.

  As shown in FIG. 35, in the switch SW3-3 (see FIG. 34), one end of the switch SW3-3 (one end of the terminal plate 3-3b) is the other end of the switch SW3-1 (see FIG. 34). The other end of the terminal plate 3-2b and one end of the capacitor CD7 are connected, while the other end of the switch SW3-3 (the other end of the terminal plate 3-3b) is grounded. Thus, the inner frame terminal board output circuit 300a of the pachinko machine 600 of the fifth embodiment is obtained by adding the switch SW3-3 to the inner frame terminal board output circuit 290a of the pachinko machine 500 of the fourth embodiment. Become. The inner frame input / output port output circuit 300b of the pachinko machine 600 of the fifth embodiment has the same configuration as the inner frame input / output port output circuit 290b of the pachinko machine 500 of the fourth embodiment.

  As described above, the switch SW3-3 used for the inner frame terminal plate output circuit 300a performs an operation reverse to the state of the switch SW3-1 and the switch SW3-2. Therefore, when the inner frame 12 is closed, the switch SW3-3 conducts and one end of the capacitor CD7 is grounded, while the switch SW3-1 and the switch SW3-2 are disconnected. Become.

  Then, when the inner frame 12 is changed from the closed state to the open state, the switch SW3-3 is first cut off after the switch SW3-3 is cut off, and then the switch SW3-1 and the switch SW3-2 are turned on (see FIG. 34 (a)-> Fig. 34 (b)-> Fig. 34 (c)). Thus, when the inner frame 12 changes from the closed state to the open state, first, one end of the capacitor CD7 is disconnected from the ground by the switch SW3-3, and then the power from the capacitor CD1 is switched to the switch SW3-1. To the capacitor CD7. Therefore, when the inner frame 12 changes from the closed state to the open state, the capacitor CD1 that supplies power does not short to ground. Therefore, when the inner frame 12 changes from the closed state to the open state, the power from the capacitor CD1 flows to the ground, and short-circuit breaks the inner frame frame open detection circuit 300 (inner frame terminal plate output circuit 300a). Absent. When the inner frame 12 is opened, the switch SW3-1 is turned on, and the power of the capacitor CD1 is supplied to the capacitor CD7, charge is stored in the capacitor CD7 as described above, and the stored charge is increased. As a result, the voltage generated in the capacitor CD7 increases. Then, the fall of the voltage applied to the TRG terminal of the timer IC1 can be made constant (about 2 ms) by the change of the voltage generated in the capacitor CD7. As described above, the fall period of the voltage applied to the TRG terminal of the timer IC1 is adjusted by the integration circuit 281, that is, adjusted by the capacitor CD7 and the resistor R10, so that a simple circuit is not used. The falling period of the voltage applied to the TRG terminal of the timer IC1 can be set as a fixed period at low cost.

  Next, when the inner frame 12 changes from the open state to the closed state, the switch SW3-1 and the switch SW3-2 first become disconnected due to the structure of the switch SW3A, and then the switch SW3-3 becomes conductive ( Fig. 34 (c)-> Fig. 34 (b)-> Fig. 34 (a)). Thus, when the inner frame 12 changes from the open state to the closed state, first, the power supplied from the capacitor CD1 to the capacitor CD7 is stopped by the switch SW3-1, and then one end of the capacitor CD7 is It grounds via switch SW3-3. Therefore, when the inner frame 12 changes from the open state to the closed state, the capacitor CD1 that supplies power does not short to ground. Therefore, when the inner frame 12 changes from the open state to the closed state, the power from the capacitor CD1 does not flow into the ground and short circuit the inner frame frame open detection circuit 300.

  When the inner frame 12 is closed, the switch SW3-1 is turned off and the power supplied from the capacitor CD1 to the capacitor CD7 is stopped, and one end of the capacitor CD7 is grounded by the switch SW3-3. Can. Therefore, when the inner frame 12 is in the closed state, the charge stored in the capacitor CD7 can be instantaneously discharged through the switch SW3-3 when the inner frame 12 is in the open state, and can be made zero. . Therefore, since the charge stored in the capacitor CD7 is always zero until the inner frame 12 is opened again, even if the inner frame 12 is continuously opened a plurality of times in a short time. The integration circuit 281 operates normally, and regardless of the open period of the inner frame 12, the fall period of the voltage applied to the TRG terminal of the timer IC1 can be made a fixed period (about 2 ms).

  Further, as described above, the inner frame opening detection circuit 300 (inner frame terminal board output circuit 300a) is stored in the capacitor CD7 when the inner frame 12 is opened when the inner frame 12 is closed. The charge thus generated can be momentarily discharged to the ground via the switch SW3-3. Therefore, when the inner frame 12 is opened and the switch SW3-1 is turned on, the charge stored in the capacitor CD7 is superimposed on the voltage supplied from the capacitor CD1, and the overvoltage (of the magnitude that destroys the timer IC1 For example, a voltage of 12.3 volts) is not applied to the TRG terminal of the timer IC1. Therefore, it is possible to eliminate the need for a Zener diode that prevents the application of an overvoltage having a magnitude that destroys the timer IC1.

  Further, as described above, the inner frame opening detection circuit 300 changes the switch SW3 connected to the inner frame opening detection circuit 290 of the pachinko machine 500 of the fourth embodiment to the switch SW3A, and the fourth embodiment is implemented. The Zener diode D3 used in the inner frame opening detection circuit 290 of the pachinko machine 500 is removed, and the configuration is the same as that of the inner frame opening detection circuit 290 except for the above change. The inner frame external output terminal plate 291 of the pachinko machine 600 of the fifth embodiment has the same structure as the inner frame external output terminal plate 291 of the pachinko machine 500 of the fourth embodiment.

  Therefore, as in the case of the pachinko machine 500 of the fourth embodiment, when the power supply to the pachinko machine 600 is performed and the DC voltage of 12 volts is supplied from the DC power supply DC1, the inner frame 12 is opened, When the switch SW3-2 provided in the inner frame input / output port output circuit 300b conducts, a signal of 5 volts is output from the inner frame input / output port output circuit 300b to the input / output port 205. When a signal of 5 volts is input to the input / output port 205, the pachinko machine 600 uses the audio output device 226 and the lamp display device 227 to notify that the inner frame 12 is open. In addition, the pachinko machine 600 displays a message indicating the opening of the inner frame 12 on the third symbol display device 81. Furthermore, when the inner frame 12 is opened and the switch SW3-1 provided in the inner frame terminal plate output circuit 300a conducts, the inner frame terminal plate output circuit 300a is opened from the inner frame external output terminal plate 291. A pulse signal having a pulse width of 10 ms is output to the computer 262.

  On the other hand, for example, when the operating time of the game arcade is over and the power supply to the pachinko machine 600 is shut off, the inner frame 12 is opened since the DC voltage of 12 volts is not supplied from the DC power supply DC1. Even when the switch SW3-2 provided in the inner frame input / output port output circuit 300b conducts, no signal is input from the inner frame input / output port output circuit 300b to the input / output port 205 (inner frame input / output The DC voltage input from the port output circuit 300b to the input / output port 205 is zero volts). However, even if, for example, the operating time of the game arcade is over and the power supply to the pachinko machine 600 is cut off, the power is supplied from the capacitor CD1 to the inner frame terminal board output circuit 300a. Therefore, when the inner frame 12 is opened and the switch SW3-1 provided in the inner frame terminal plate output circuit 300a conducts, the inner frame terminal plate output circuit 300a is operated from the inner frame external output terminal plate 291. A pulse signal having a pulse width of 10 ms is output to the hall computer 262.

  The pulse signal output from the inner frame external output terminal plate 291 is stored in the hall computer 262 which keeps operating for 24 hours. Therefore, by the pulse signal stored in the hall computer 262, the pachinko machine in which the inner frame 12 has been opened can be identified. Furthermore, the hall computer 262 outputs the pulse signal from the inner frame external output terminal plate 291 and stores the output time of the output pulse signal so that the inner frame 12 of the specified pachinko machine is opened. Time can be detected.

  Thus, when the power supply to the pachinko machine 600 is being performed, the function of outputting a signal to the input / output port 205 and the function of outputting a pulse signal to the hall computer 262 when the inner frame 12 is opened; And the function of outputting a pulse signal to the hall computer 262 when the inner frame 12 is opened when the power supply to the pachinko machine 600 is interrupted, the inner frame opening detection circuit 300 which is one circuit. Can be demonstrated.

  Further, one end of the switch SW3-2 of the inner frame input / output port output circuit 300b is connected to the DC power supply DC1 and the anode terminal of the diode D1. Therefore, when the inner frame 12 is opened while the pachinko machine 600 is powered on, the switch SW3-2 is turned on to supply power from the DC power supply DC1 to the inner frame input / output port output circuit 300b. Thus, the inner frame input / output port output circuit 300b is in an operating state. On the other hand, when the pachinko machine 600 is powered off, no power is supplied from the DC power supply DC1 to the inner frame input / output port output circuit 300b, so the inner frame 12 is opened and the switch SW3-2 is opened. Even in this case, the inner frame input / output port output circuit 300b is stopped.

  On the other hand, one end of the switch SW3-1 of the inner frame terminal plate output circuit 300a is connected to one end of the capacitor CD1 via the diode D2 and the resistor R10. Therefore, when the inner frame 12 is opened when the power of the pachinko machine 600 is turned on, the switch SW3-1 conducts and power is supplied from the DC power supply DC1 to the inner frame terminal plate output circuit 300a. The inner frame terminal board output circuit 300a is in an operating state. On the other hand, when the pachinko machine 600 is powered off, the power supply from the DC power supply DC1 to the inner frame terminal plate output circuit 300a is stopped, but the inner frame 12 is opened and the switch SW3-1 is turned on. Then, since power is supplied from the capacitor CD1 to the inner frame terminal plate output circuit 300a, the inner frame terminal plate output circuit 300a is in an operating state. Here, when the pachinko machine 600 is powered off and power is supplied from the capacitor CD1 to the inner frame terminal plate output circuit 300a, power is supplied to the inner frame input / output port output circuit 300b. It can be cut off by the diode D1 that exerts a backflow prevention function. Therefore, when the power of the pachinko machine 600 is turned off, the number of times the inner frame terminal plate output circuit 300a can be operated can be increased, and the number of detections of the opening of the inner frame 12 can be increased.

  In the timer IC1 of the inner frame terminal plate output circuit 300a, when the inner frame 12 is opened, the switch SW3-1 is turned on, and the voltage applied to the TRG terminal of the timer IC1 falls to zero volts, this rising occurs. It functions as a monostable multivibrator that raises the voltage of the OUT terminal of the timer IC1 from zero volt to about 9.6 volts for about 10 ms from the fall. Then, by providing the integrating circuit 281 in the previous stage of the TRG terminal of the timer IC1, when the inner frame 12 is opened, the voltage applied to the TRG terminal of the timer IC1 is regardless of the open period of the inner frame 12. After falling to zero volts, the period until it returns to about 10.3 volts can be adjusted to be shorter than the period when the voltage at the OUT terminal of timer IC1 rises from zero volts to about 9.6 volts. As described above, the timer IC1 functions as a monostable multivibrator by setting the falling period of the TRG terminal voltage of the timer IC1 to a fixed period (about 2 ms) regardless of the open period of the inner frame 12 by the integration circuit 281. Can be normally operated, and the period in which the voltage at the OUT terminal of the timer IC1 rises from zero volts to about 9.6 volts can be kept to about 10 ms. Thus, the period in which current is supplied from the capacitor CD1 to the photocoupler PR1 can be limited to about 10 ms, and the output period of the pulse signal output from the inner frame external output terminal plate 291 to the hole computer 262 is about 10 ms. You can fasten it.

  Referring to FIG. 36, the voltage applied to capacitor CD7 (charge stored in capacitor CD7) changes according to the open / close state of inner frame 12 regardless of the power on / off state of pachinko machine 600 , The TRG terminal voltage of the timer IC1 of the inner frame terminal plate output circuit 300a, the OUT terminal voltage of the timer IC1 of the inner frame terminal plate output circuit 300a, and the output of the inner frame external output terminal plate 291 (of the hall computer 262 The relationship between the input) and the output of the inner frame input / output port output circuit 300b which changes according to the open / closed state of the inner frame 12 when the power of the pachinko machine 600 is turned on will be described. 36 shows the on / off state (state of the DC voltage supplied by the DC power source DC1) of the pachinko machine 600, the open / close state of the inner frame 12, the conduction / off state of the switch SW3-3, the switch SW3-1 and The ON / OFF state of the switch SW3-2, the voltage applied to the capacitor CD7 (the charge stored in the capacitor CD7), the TRG terminal voltage of the timer IC1 of the inner frame terminal plate output circuit 300a, and the inner frame terminal plate output The timing chart showing the relationship between the OUT terminal voltage of timer IC1 of circuit 300a, the output of inner frame external output terminal plate 291 (input of hall computer 262), and the output of inner frame input / output port output circuit 300b is there.

  As described above, the front frame terminal board output circuit 302a provided in the front frame frame open detection circuit 302 differs from the inner frame terminal board output circuit 300a in that the switch connected is the switch SW4-1. There is only one switch SW 3-1 and one switch SW 4-3 or switch SW 3-3. Therefore, since the operation of the front frame terminal plate output circuit 302a is the same as the operation of the inner frame terminal plate output circuit 300a, the description of the operation of the front frame terminal plate output circuit 302a will be omitted. The front frame input / output port output circuit 302b is different from the inner frame input / output port output circuit 300b only in that the switch connected is the switch SW4-2 or the switch SW3-2. is there. Therefore, since the operation of the front frame input / output port output circuit 302b is the same as the operation of the inner frame input / output port output circuit 300b, the description of the operation of the front frame input / output port output circuit 302b is omitted. . Further, as described above with reference to FIG. 35, since the front frame external output terminal plate 293 has the same configuration as the inner frame external output terminal plate 291, the operation of the front frame external output terminal plate 293 is for the inner frame. It is identical to the external output terminal plate 291. Therefore, the description of the operation of the front frame external output terminal plate 293 is omitted.

  As shown in FIG. 36 (a), the power supply of the pachinko machine 600 is in the on state until t18 (the DC voltage supplied by the DC power supply DC1 is 12 volts until t18), and after t18 The power of the machine 600 is turned off (the DC voltage supplied by the DC power supply DC1 is zero volts). Therefore, power from the DC power supply DC1 is supplied to the inner frame terminal plate output circuit 300a and the inner frame input / output port output circuit 300b until time t18. Then, after t18, power supply by the DC power supply DC1 to the inner frame terminal plate output circuit 300a and the inner frame input / output port output circuit 300b is stopped. However, since the capacitor CD1 is provided in the inner frame terminal plate output circuit 300a, after t18, power is supplied from the capacitor CD1 to the inner frame terminal plate output circuit 300a. Therefore, the inner frame terminal board output circuit 300a is operable even after t18.

  When the inner frame 12 changes from the closed state to the open state between t14 and t15 as shown in FIG. 36 (b), the switch SW3-3 follows this, as shown in FIG. 36 (c). It will be in the interruption | blocking state from a conduction | electrical_connection state (t14 time). Thereafter, as shown in FIG. 36 (d), the switch SW3-1 and the switch SW3-2 are switched from the cutoff state to the conduction state (at t15). The switch SW3-3 is turned off at t14, and the switches SW3-1 and SW3-2 are turned on at t15 because of the structure of the switch SW3A (FIG. 34 (a) → FIG. 34 (b) → See FIG. 34 (c)).

  When the switch SW3-1 becomes conductive at time t15, charging of the capacitor CD7 is started, and as shown in FIG. 36 (e), the voltage applied to the capacitor CD7 starts rising from zero volt (time t15). When the switch SW3-1 becomes conductive, the TRG terminal voltage of the timer IC1 becomes the same as the voltage applied to the capacitor CD7. Therefore, as shown in FIG. 36 (f), the TRG terminal voltage of the timer IC1 is about 10 Fall from 3 volts to zero volts and start rising (at t15). Following this, as shown in FIG. 36 (g), the OUT terminal voltage of the timer IC1 rises from zero volt to about 9.6 volt (at t15). As a result, the collector terminal and the emitter terminal of the transistor TR1 of the inner frame terminal plate output circuit 300a are conducted, and the light emitting diode on the primary side of the photocoupler PR1 of the inner frame external output terminal plate 291 (see FIG. 35) The current supply is started (at t15). Then, as shown in FIG. 36H, the output of the light receiving element (phototransistor) on the secondary side of the photocoupler PR1, that is, the output of the inner frame external output terminal plate 291 is high from the low state at time t15. Switch to the state. Thereby, the output of a pulse signal indicating opening of the inner frame 12 to the hole computer 262 is started. Further, as shown in FIG. 36 (d), when the inner frame 12 changes from the closed state to the open state between t14 and t15 and the switch SW3-2 becomes conductive (t15), the inner frame is inserted. The power from the DC power supply DC1 is supplied to the resistor R11 and the resistor R12 of the output port output circuit 300b, and the voltage applied to the resistor R12 becomes 5 volts (at t15). Therefore, as shown in FIG. 36 (i), a signal with a DC voltage of 5 volts is output from the inner frame input / output port output circuit 300b to the input / output port 205 (at t15).

  Next, as shown in FIG. 36 (e), when about 2 ms elapses from t15, the charging of the capacitor CD7 is completed, and the voltage applied to the capacitor CD7 becomes about 10.3 volts. Then, as shown in FIG. 36 (f), the voltage at the TRG terminal of the timer IC1 returns from zero volt to about 10.3 volts (approximately 2 ms has elapsed from t15). However, since about 10 ms has not elapsed since the voltage at the OUT terminal of timer IC1 has risen from zero volts to about 9.6 volts (time t15), the OUT terminal voltage of timer IC1 is about 9.6 volts. It is maintaining the state.

  Thereafter, when about 10 ms elapses from t15, as shown in FIG. 36 (g), the timer IC1 switches the voltage of the OUT terminal from about 9.6 volts to zero volts. Then, the collector terminal and the emitter terminal of the transistor TR1 of the inner frame terminal plate output circuit 300a are disconnected, and the current supply to one end of the resistor R7a of the inner frame external output terminal plate 291 is stopped. Therefore, the output of the inner frame external output terminal plate 291 switches from the high state to the low state as shown in FIG. 36 (h) when about 10 ms elapses from t15. As a result, the output of the pulse signal output to the hall computer 262 is stopped. Thus, by switching the output of the inner frame external output terminal plate 291, the pulse width of the pulse signal output from the inner frame external output terminal plate 291 to the hole computer 262 can be limited to about 10 ms.

  When the inner frame 12 changes from the open state to the closed state between t16 and t17 as shown in FIG. 36 (b), the switch SW3-1 and the switch SW3-2 as shown in FIG. 36 (d). Is switched from the conduction state to the interruption state at t16. Thereafter, as shown in FIG. 36C, the switch SW3-3 becomes conductive again (at t17). The switch SW3-1 and the switch SW3-2 are cut off at t16, and the switch SW3-3 becomes conductive at t17 because of the structure of the switch SW3A ((FIG. 34 (c) → FIG. 34 (b) → Refer to FIG. 34 (a)).

  As shown in FIG. 36 (d), when the switch SW3-1 turns off (at t16) and then the switch SW3-3 conducts (at t17) as shown in FIG. 36 (c), the capacitor CD7 is turned on. One end is grounded, and as shown in FIG. 36E, the charge stored in the capacitor CD7 is instantaneously discharged between t15 and t16 (t17). As a result, as shown in FIG. 36 (e), the charge stored in the capacitor CD7 becomes zero, and the voltage applied to the capacitor CD7 becomes zero volt (at t17). Accordingly, the inner frame terminal board output circuit 300a is again set to a state in which the inner frame 12 can be detected (at t17). Also, as shown in FIG. 36 (d), when the switch SW3-2 is cut off (at t16), power is supplied from the DC power supply DC1 to the resistor R11 and the resistor R12 of the inner frame input / output port output circuit 300b. Is stopped, and the voltage applied to the resistor R12 becomes zero volt (at t16). Therefore, as shown in FIG. 36 (i), the signal of DC voltage 5 volts output from the inner frame input / output port output circuit 300b to the input / output port 205 is stopped at t16 (inner frame input The output from the output port output circuit 300b to the input / output port 205 becomes zero volts at t16).

  Next, as shown in FIG. 36A, when the power of the pachinko machine 600 is turned off after t18 (when the DC voltage supplied by the DC power supply DC1 becomes zero volts), the inner frame terminal plate output circuit 300a The supply of power by the DC power supply DC1 to the inner frame input / output port output circuit 300b is stopped. However, even if the power of the pachinko machine 600 is in the OFF state, the power from the capacitor CD1 is supplied to the inner frame terminal plate output circuit 300a. Therefore, when the inner frame 12 changes from the closed state to the open state again, for example, between t19 and t20 after about 3 minutes from the time t17 at which the previous closed state was reached, this is followed in FIG. As shown in c), the switch SW3-3 changes from the conductive state to the cut-off state (at t19), and then, as shown in FIG. 36 (d), the switch SW3-1 and the switch SW3-2 from the cut-off state to the conductive state And (t20), charging of the capacitor CD7 is started. Therefore, as shown in FIG. 36 (e), the voltage applied to the capacitor CD7 starts rising from zero volt (at t20). Here, the switch SW3-3 is turned off at t19, and the switches SW3-1 and SW3-2 are turned on at t20 because of the structure of the switch SW3A (FIG. 34 (a) → FIG. 34 (b) → See FIG. 34 (c)).

  As shown in FIG. 36 (d), when the switch SW3-1 switches from the cutoff state to the conduction state (at t20), the voltage at the TRG terminal of the timer IC1 becomes the same as the voltage applied to the capacitor CD7. As shown in (f), once the voltage at the TRG terminal of the timer IC1 falls from about 10.3 volts to zero volts, the rise starts (at t20). Following this falling, as shown in FIG. 36 (g), the OUT terminal voltage of the timer IC1 rises from zero volt to about 9.6 volts (at t20). As a result, the collector terminal and the emitter terminal of the transistor TR1 of the inner frame terminal plate output circuit 300a are conducted, and the light emitting diode on the primary side of the photocoupler PR1 of the inner frame external output terminal plate 291 (see FIG. 35) The current supply is started (at t20). Then, as shown in FIG. 36H, the output of the light receiving element (phototransistor) on the secondary side of the photocoupler PR1, that is, the output of the inner frame external output terminal plate 291, is high from the low state at t20. Switch to the state. Thereby, the output of a pulse signal indicating opening of the inner frame 12 to the hole computer 262 is started. On the other hand, as shown in FIG. 36 (d), even if the inner frame 12 changes from the closed state to the open state again between t19 and t20, and the switch SW3-2 becomes conductive (t20), Since power from the DC power supply DC1 is not supplied to the resistors R11 and R12 of the inner frame input / output port output circuit 300b (since the DC voltage supplied by the DC power supply DC1 is zero volts), the voltage applied to the resistor R12 Becomes zero volts (at t20). Therefore, as shown in FIG. 36 (i), the signal output from the inner frame input / output port output circuit 300b to the input / output port 205 maintains the stopped state (input from the inner frame input / output port output circuit 300b). The output to the output port 205 maintains zero volts).

  Next, as shown in FIG. 36E, when about 2 ms has elapsed from t20, the charging of the capacitor CD7 is completed, and the voltage applied to the capacitor CD7 becomes about 10.3 volts. Then, as shown in FIG. 36 (f), the voltage at the TRG terminal of the timer IC1 returns from zero volt to about 10.3 volts (approximately 2 ms has elapsed from t20). However, since about 10 ms has not elapsed since the voltage at the OUT terminal of timer IC1 has risen from zero volts to about 9.6 volts (time t20), the OUT terminal voltage of timer IC1 is about 9.6 volts. It is maintaining the state.

  Thereafter, when about 10 ms has elapsed from t20, as shown in FIG. 36 (g), the timer IC1 switches the voltage of the OUT terminal from about 9.6 volts to zero volts. Then, the collector terminal and the emitter terminal of the transistor TR1 of the inner frame terminal plate output circuit 300a are disconnected, and the current supply to one end of the resistor R7a of the inner frame external output terminal plate 291 is stopped. Therefore, the output of the inner frame external output terminal plate 291 switches from the high state to the low state as shown in FIG. 36 (h) when about 10 ms elapses from t20. As a result, the output of the pulse signal output to the hall computer 262 is stopped. Thus, by switching the output of the inner frame external output terminal plate 291, the pulse width of the pulse signal output from the inner frame external output terminal plate 291 to the hole computer 262 can be limited to about 10 ms.

  When the inner frame 12 changes from the open state to the closed state between t21 and t22 as shown in FIG. 36 (b), the switch SW3-1 and the switch SW3- as shown in FIG. 36 (d). At time t21, 2 is switched from the conduction state to the interruption state. Thereafter, as shown in FIG. 36C, the switch SW3-3 becomes conductive again (at t22). The switch SW3-1 and the switch SW3-2 are cut off at t21, and the switch SW3-3 is turned on at t22 because of the structure of the switch SW3A ((FIG. 34 (c) → FIG. 34 (b) → 34 (a))).

  As shown in FIG. 36 (d), when the switch SW3-1 turns off (at t21) and then the switch SW3-3 turns on (at t22) as shown in FIG. 36 (c), the capacitor One end of the CD 7 is grounded, and as shown in FIG. 36E, the charge stored in the capacitor CD 7 is instantaneously discharged between t20 and t21 (t22). As a result, as shown in FIG. 36 (e), the charge stored in the capacitor CD7 becomes zero, and the voltage applied to the capacitor CD7 becomes zero volt (at t22). Therefore, the inner frame terminal board output circuit 300a is again set in a state in which the inner frame 12 can be detected (at t22). Further, as shown in FIG. 36 (d), when the switch SW3-2 is turned off (at t21), the input / output port output circuit 300b for the inner frame is switched to the inner frame when the pachinko machine 600 is powered on. It is set to a state in which 12 detections are possible (at t21).

  As described above, when the inner frame 12 is closed (at t17 and t22), the inner frame frame opening detection circuit 300 (inner frame terminal plate output circuit 300a) shuts off the switch SW3-1 to set the capacitor CD1. After the power supplied to the capacitor CD7 is stopped, one end of the capacitor CD7 can be grounded by the switch SW3-3. Therefore, when the inner frame 12 is in the closed state (at t17 and t22), the charge stored in the capacitor CD7 when the inner frame 12 is in the open state (from the charge stored at t15 to t16 and from t20 The charge stored at t21) can be discharged instantaneously via switch SW3-3 to zero (t17 and t22). As a result, since the charge stored in the capacitor CD7 is always zero until the inner frame 12 is opened again, it is assumed that the inner frame 12 is continuously opened a plurality of times in a short time. Also, the integration circuit 281 operates normally, and the fall period of the voltage applied to the TRG terminal of the timer IC1 can be made constant (about 2 ms) regardless of the open period of the inner frame 12.

  Further, when the inner frame 12 changes from the closed state to the open state (from t14 time to t15 time and t19 time to t20 time), the inner frame frame open detection circuit 300 (inner frame terminal plate output circuit 300a) Due to the structure, first, after the switch SW3-3 is turned off (at t14 and t19), the switch SW3-1 and the switch SW3-2 become conductive (at t15 and t20). As described above, when the inner frame 12 changes from the closed state to the open state, first, one end of the capacitor CD7 is disconnected from the ground by the switch SW3-3 (t14 and t19), and thereafter, from the capacitor CD1 Power is supplied to the capacitor CD7 via the switch SW3-1 (at t15 and t20). Therefore, when the inner frame 12 changes from the closed state to the open state, the capacitor CD1 that supplies power does not short to ground. Therefore, when the inner frame 12 changes from the closed state to the open state, the power from the capacitor CD1 flows to the ground, and short-circuit breaks the inner frame frame open detection circuit 300 (inner frame terminal plate output circuit 300a). Absent.

  Similarly, when the inner frame 12 changes from the open state to the closed state (from t16 time to t17 time and t21 time to t22 time), the switch SW3A turns on the inner frame frame open detection circuit 300 (inner frame terminal plate output circuit 300a). Due to the structure of the switch SW3, after the switches SW3-1 and SW3-2 are turned off (at t16 and t21), the switch SW3-3 is turned on (at t17 and t22, see FIG. 34). . Thus, when the inner frame 12 changes from the open state to the closed state, first, the power supplied from the capacitor CD1 to the capacitor CD7 is stopped by the switch SW3-1 (t16 and t21), and then Then, one end of the capacitor CD7 is grounded via the switch SW3-3 (t17 and t22). Therefore, when the inner frame 12 changes from the open state to the closed state, the capacitor CD1 that supplies power does not short to ground. Therefore, when the inner frame 12 changes from the open state to the closed state, the power from the capacitor CD1 flows to the ground, and short-circuit breaks the inner frame frame open detection circuit 300 (inner frame terminal plate output circuit 300a). Absent.

  In addition, when the inner frame 12 is in the open state when the inner frame 12 is in the closed state (at t17 and t22), the inner frame 12 is in the open state. The charge stored in the CD 7 can be discharged instantaneously to the ground through the switch SW3-3 (at t17 and t16) (the charge stored at t15 to t16 and the charge stored at t20 to t21) t 22 o'clock). Therefore, when the inner frame 12 is opened and the switch SW3-1 is turned on (at t15 and t20), the charge stored in the capacitor CD7 is superimposed on the voltage supplied from the capacitor CD1, and the timer IC1 is set. An overvoltage (for example, a voltage of 12.3 volts) which is to be destroyed is not applied to the TRG terminal of the timer IC1. Therefore, it is possible to eliminate the need for a Zener diode that prevents the application of an overvoltage having a magnitude that destroys the timer IC1.

  Further, as described above, the inner frame opening detection circuit 300 changes the switch SW3 connected to the inner frame opening detection circuit 290 of the pachinko machine 500 of the fourth embodiment to the switch SW3A, and the fourth embodiment is implemented. The Zener diode D3 used in the inner frame opening detection circuit 290 of the pachinko machine 500 is removed, and the configuration is the same as that of the inner frame opening detection circuit 290 except for the above change. The inner frame external output terminal plate 291 of the pachinko machine 600 of the fifth embodiment has the same structure as the inner frame external output terminal plate 291 of the pachinko machine 500 of the fourth embodiment.

  Therefore, as in the case of the pachinko machine 500 of the fourth embodiment, when the power supply to the pachinko machine 600 is performed and a DC voltage of 12 volts is supplied from the DC power supply DC1 (at time t18), When the frame 12 is opened and the switch SW3-1 provided in the inner frame terminal plate output circuit 300a conducts, the inner frame terminal plate output circuit 300a transmits the inner frame external output terminal plate 291 to the hall computer 262. , And outputs a pulse signal with a pulse width of 10 ms. Furthermore, when the inner frame 12 is opened and the switch SW3-2 provided in the inner frame input / output port output circuit 300b conducts, a signal of 5 volts from the inner frame input / output port output circuit 300b to the input / output port 205 Is output.

  In addition, for example, even when the operating time of the game arcade is over and the power supply to the pachinko machine 600 is cut off (even after t18), the inner frame terminal board output circuit 300a Since the power is supplied from the capacitor CD1, when the inner frame 12 is opened and the switch SW3-1 provided in the inner frame terminal plate output circuit 300a conducts, the inner frame terminal plate output circuit 300a A pulse signal having a pulse width of 10 ms is output from the inner frame external output terminal plate 291 to the hall computer 262. However, for example, when the operating time of the game arcade is over and the power supply to the pachinko machine 600 is cut off (in the case of after t18), the DC voltage of DC power from DC1 to DC 12 volts is within the inner frame Because it is not supplied to the input / output port output circuit 300b, even if the inner frame 12 is opened and the switch SW3-2 provided in the inner frame input / output port output circuit 300b conducts, the input / output for the inner frame A signal is not output from port output circuit 300 b to input / output port 205 (DC voltage output from inner frame input / output port output circuit 300 b to input / output port 205 is zero volts).

  Thus, when power is supplied to the pachinko machine 600, the function of outputting a signal to the input / output port 205 and the function of outputting a pulse signal to the hall computer 262 when the inner frame 12 is opened, And the function of outputting a pulse signal to the hall computer 262 when the inner frame 12 is opened when the power supply to the pachinko machine 600 is interrupted, the inner frame open circuit detecting circuit 300 being one circuit. Can be demonstrated.

  The pulse signal output from the inner frame external output terminal plate 291 is stored in the hall computer 262 which keeps operating for 24 hours. Therefore, by the pulse signal stored in the hall computer 262, the pachinko machine in which the inner frame 12 has been opened can be identified. Furthermore, the hall computer 262 outputs the pulse signal from the inner frame external output terminal plate 291 and stores the output time of the output pulse signal so that the inner frame 12 of the specified pachinko machine is opened. Time can be detected.

  In addition, when the inner frame 12 is opened and the switch SW3-1 and the switch SW3-2 become conductive, the timer IC1 of the inner frame terminal plate output circuit 300a does not matter regardless of the conduction period of the switch SW3-1. The switch SW3-1 becomes conductive regardless of the open period of the inner frame 12, and about 10 ms after the TRG terminal voltage of the timer IC1 falls from about 10.3 volts to zero volts, the OUT terminal of the timer IC1 Switch the voltage from about 9.6 volts to zero volts. Thus, the supply period of the current supplied to the photocoupler PR1 of the inner frame external output terminal plate 291 is approximately 10 ms.

  Therefore, for example, the business hours of the game arcade are finished, the power supply to the pachinko machine 600 is cut off, and the inner frame terminal board output circuit 300a and the inner frame external output terminal board 291 are DC power 12 to 12 volts DC. When no voltage is supplied, that is, when a DC voltage of about 10.3 volts is supplied from capacitor CD1 to inner frame terminal plate output circuit 300a and inner frame external output terminal plate 291, photocoupler PR1 from capacitor CD1. The supply period of the current supplied to it can be limited to about 10 ms per one opening of the inner frame 12. Therefore, the power consumption due to the opening of the inner frame 12 can be reduced.

  In each embodiment, the pulse signals output from the external output terminal plate 261, the inner frame external output terminal plate 291, and the front frame external output terminal plate 293 are not limited to the hall computer 262, which has a different installation place from the pachinko machine. Although it output to, it is not restricted to this. A dedicated storage device having the function of the hall computer 262 may be provided for each pachinko machine, and the dedicated storage device may be provided on the back side of each pachinko machine provided with the main control device 110 and the like. In this case, more specifically, a dedicated storage device such as the main control unit 110, the payout control unit 111 and the emission control unit 112 is housed in the substrate box, and the box base and the box cover provided on the substrate box And unsealably connected by a sealing unit (not shown) (connection by caulking structure). Then, a seal seal (not shown) is attached to the connection portion between the box base and the box cover over the box cover and the box base.

  In the fourth and fifth embodiments, the inner frame external output terminal plate 291 and the front frame external output terminal plate 293 are provided on different substrates, but the present invention is not limited to this. The inner frame external output terminal plate 291 and the front frame external output terminal plate 293 may be provided on the same substrate. Even when the inner frame external output terminal plate 291 and the front frame external output terminal plate 293 are provided on the same substrate, the inner frame external output terminal plate 291 is the inner frame frame open detection circuit 290. The front frame external output terminal plate 293 is connected to the front frame frame open detection circuit 292. The inner frame external output terminal plate 291 and the front frame external output terminal plate 293 separately output pulse signals to the hall computer 262.

  In the fourth embodiment and the fifth embodiment, the inner frame frame open detection circuit 290 for detecting the opening of the inner frame 12 and the front frame frame open detection circuit 292 for detecting the open front frame 14 are separately provided. However, the present invention is not limited to this. In the case of outputting to the hall computer 262 without distinguishing the opening of the inner frame 12 and the front frame 14, the following configuration may be employed. First, the front frame opening detection circuit 292 and the front output output terminal plate 293 are removed to leave the inner opening detection circuit 290 and the inner output output plate 291 in the main control unit 110. Then, the switch SW3 and the switch SW4 may be connected in parallel and connected to the inner frame opening detection circuit 290. With this configuration, it is possible to output to the hall computer 262 without distinguishing the opening of the inner frame 12 and the front frame 14. It should be noted that what is left in the main control device 110 may be the front frame frame open detection circuit 292 and the front frame external output terminal plate 293 instead of the inner frame frame open detection circuit 290 and the inner frame external output terminal plate 291. .

  In the fourth and fifth embodiments, when the inner frame 12 is opened, a signal of 5 volts is output to the input / output port 205 using the inner frame input / output port output circuit 290b. It is not limited. When a signal of 5 volts is output to the input / output port 205 when the inner frame 12 is opened without using the inner frame input / output port output circuit 290b, the following configuration may be employed. First, the inner frame input / output port output circuit 290b is removed from the inner frame frame open detection circuit 290 (the DC power supply DC1 is left). Next, a resistor is connected in series between the emitter terminal e of the transistor TR1 and the ground, and the input / output port 205 is connected to a connection point between the emitter terminal e of the transistor TR1 and the resistor connected in series. Then, when the collector terminal c and the emitter terminal e of the transistor TR1 conduct, that is, when the inner frame 12 is opened, a resistor connected in series so that a signal of 5 volts is output to the input / output port 205 You can adjust the value. As a result, when the inner frame 12 is opened, the switch SW3-2, the resistor R11, and the resistor R12 are unnecessary, and a signal of 5 volts is output to the input / output port 205, and a pulse signal of 10 ms in pulse width is output from the hall computer. It can be output to 262. Although the case where the inner frame input / output port output circuit 290b is unnecessary is described above, the front frame opening detection circuit is also used when the front frame input / output port output circuit 292b is unnecessary. The same procedure may be applied to 292.

In the first to fifth embodiments, the external output terminal board 261, the external output terminal board 291 for the inner frame, the external output terminal board 293 for the front frame, and the hall computer 262 are connected to each other. A pulse signal is output from the inner frame external output terminal plate 291 and the front frame external output terminal plate 293 to the hall computer 262 to store the opening of the inner frame 12 or the front frame 14 in the hall computer 262. It is not limited to For example, in a pachinko machine, an EEPROM (Electronically Erasable and
A programmable read only memory) and a backup RAM are provided. Then, the external output terminal plate 261, the inner frame external output terminal plate 291, and the front frame external output terminal plate 293 are connected to the EEPROM and the backup RAM. With this configuration, the open state of the inner frame 12 or the front frame 14 can be stored in the EEPROM or the backup RAM. Then, when the power of the pachinko machine is turned on, the MPU 201 confirms the storage of the EEPROM and the backup RAM. Thereby, the opening of the inner frame 12 or the front frame 14 can be detected using a pachinko machine. That is, the role of the hall computer 262 can be played by the EEPROM or the backup RAM (the role of the “specified device” described in the claims can be played by the EEPROM or the backup RAM). Note that the RAM 203 may be used as the backup RAM.

  Although the present invention has been described above based on the embodiment, the present invention is not limited to the above embodiment, and various modifications and improvements can be easily made without departing from the scope of the present invention. It can be guessed that.

  For example, in each of the above embodiments, each command is transmitted from the main control unit 110 to the sound lamp control unit 113, and the sound lamp control unit 113 instructs the display control unit 114 to display. However, the main control unit 110 may transmit the command directly to the display control unit 114. Further, an audio lamp control device may be connected to the display control device, and the display control device may be configured to transmit an output of each sound and a command instructing lighting of the lamp to the audio lamp control device. Furthermore, the audio lamp control device and the display control device may be configured as one control device.

  Further, in the above embodiment, the winnings to the first entrance 64 and the passage of the second entrance 67 are configured to be respectively suspended up to 4 times, but the maximum number of times is up to 4 times. The number of times is not limited, and may be set to three times or less, or five times or more (for example, eight times). In addition, the number of times of suspension of variable display based on winning on the first entrance 64 is different by a number or number of areas divided by four even in part of the third symbol display device 81 by the number of times of suspension A light emitting member such as a lamp may be provided separately from the first symbol display device 37, and may be displayed in a mode (for example, a color or a lighting pattern), and the number of reservations is notified by the light emitting member. You may.

  Further, as shown in the above embodiment, the variable display, which is a kind of dynamic display, is not limited to the one in which the symbols as identification information are vertically scrolled on the display screen of the third symbol display device 81, The symbol may be moved and displayed along a predetermined path such as a lateral direction or an L-shape. In addition, the dynamic display of identification information is not limited to the variable display of symbols, and, for example, one or more characters may be displayed in various ways along with the symbols or in addition to the symbols, or may be displayed in various ways. It also includes the effect display etc. In this case, one or more characters are used as the third symbol.

  The present invention may be implemented on a pachinko machine or the like of a type different from that of the above embodiment. For example, it may be implemented in a so-called second type pachinko gaming machine having a winning device having a special area such as V zone. Furthermore, in addition to the pachinko machine, it may be implemented as another game machine such as an allearch or a ball.

  The present invention may be implemented on a pachinko machine or the like of a type different from that of the above embodiment. For example, a pachinko machine (common name, two-time, three-time, and so on) in which the jackpot expected value can be increased until the jackpot state occurs a plurality of times (for example, two times, three times) including the jackpot once May be implemented as In addition, the pachinko machine may be implemented as a pachinko machine that generates a special game in which a predetermined game value is given to the player, as a prerequisite to winning a ball in a predetermined area after the jackpot symbol is displayed. In addition, it is possible to have the winning device which possesses special territory such as V zone and to execute to the pachinko machine which becomes special game state as a necessary condition to make the special territory win the ball. Furthermore, in addition to pachinko machines, various types of gaming machines may be implemented, such as arelapachis, ball balls, slot machines, gaming machines in which so-called pachinko machines and slot machines are fused.

  In the slot machine, for example, a symbol is changed by operating the operation lever in a state where the coin is inserted and the symbol effective line is determined, and the symbol is stopped and determined by operating the stop button. It is a thing. Therefore, as a basic concept of the slot machine, “a display device is provided which displays the identification information after displaying the identification information sequence consisting of a plurality of identification information in a variable manner, and is derived from the operation of the starting operation means (for example, operation lever) The variable display of identification information is started, and the variable display of identification information is stopped and fixedly displayed due to the operation of the operation means for stop (for example, stop button) or when a predetermined time elapses. It is a slot machine that generates a special game that gives a predetermined game value to the player, as a prerequisite that the combination of identification information at the time is a specific one. In this case, the game medium is represented by coins, medals, etc. An example is given.

  In addition, as a specific example of a gaming machine in which a pachinko machine and a slot machine are fused, a display device is provided which variably displays a symbol row consisting of a plurality of symbols and then displays the symbols, and is provided with a handle for ball launch. Not included. In this case, after the injection of a predetermined amount of balls based on a predetermined operation (button operation), for example, the variation of the symbol is started due to the operation of the operation lever, for example, due to the operation of the stop button or By the passage of time, the fluctuation of the symbol is stopped, and a special game for giving a predetermined game value to the player is generated as a necessary condition that the determined symbol at the time of the stop is a so-called jackpot symbol. Is a lot of balls being dispensed to the lower tray.

  Hereinafter, in addition to the gaming machine of the present invention, concepts of various inventions included in the various embodiments described above will be shown. A game machine comprising a main body, a door for opening and closing a front surface of the main body, and control means provided in a space formed by the door and the main body for controlling a game, the door for the main body When the door opening detection means detects the opening of the body and the door opening detection means detects the opening of the door, if in the initial state, the door by the operation from the initial state to the prescribed time The detection result by the door open detection means is outputted to the specific device based on the period adjustment means for outputting a signal which becomes a predetermined output period regardless of the open period of the above and the signal outputted by the period adjustment means An output means, a power supply means for supplying electric power to the output means and the period adjustment means to operate, the door open detection means initially detects the period adjustment means when the closing of the door is detected. The power supply means includes an off / off operation means for supplying power to operate the output means and the period adjustment means when the game machine is powered off. Gaming machine A1 characterized by

  According to the gaming machine A1, when the opening of the door is detected by the door opening detection means, the period adjusting means is predetermined by the operation from the initial state to the specified time regardless of the opening time of the door. Output a signal that will be an output period. Then, the output means outputs the detection result to the specific device based on the signal output from the period adjustment means. Here, the output period of the signal output by the period adjustment means is determined by the operation of the period adjustment means from the initial state to the specified time. In order to cause the period adjustment means to output a signal that is a predetermined output period regardless of the opening time of the door, the initialization means adjusts the period adjustment means when the door opening detection means detects the closing of the door. In the initial state. Therefore, the period adjusting means can always operate from the initial state when the door opening detecting means detects the opening of the door. Therefore, every time opening of the door is detected by the door opening detecting means, the period adjusting means is operated normally and stably from the initial state to the prescribed time, so that an output period predetermined for the period adjusting means is obtained. A signal can be output normally and stably, and a detection result can be output normally and stably from an output means to a specific apparatus.

  Further, according to the gaming machine A1, in addition to the state where the power supply of the gaming machine is turned on, the door opening detection means does not When the opening is detected, the off-operation means supplies power to the output means and the period adjustment means. Therefore, even if the power of the gaming machine is turned off and the control means is stopped, if the opening of the door is detected by the door open detection means, a signal which becomes an output period predetermined by the period adjustment means Is output, and the output means outputs the detection result to a specific device based on the output signal. Therefore, for example, even if the door is opened due to a fraudulent act by somebody after closing the store where all the game machines are turned off, it is possible to determine the gaming machine in which the door is opened by the specific device.

  The inside of the space formed by the door and the main body indicates the back or back side (including the back side of the main body) of the door which can not be touched when the door is closed. In addition, the detection result output from the output means provided for each of a plurality of gaming machines may be received by one specific device, or a specific device is provided for each gaming machine, and the specific device is distributed to each gaming machine. You may set it. When the specific device is disposed in each game machine, the box base and the box cover covering the opening of the box base are connected to each other, and the space formed by the box cover and the box base is specified. Store the device. Then, the box cover and the box base are unsealably connected by the sealing unit. Further, a seal seal is attached to the junction of the box cover and the box base over the box cover and the box base. Then, the specific device may be disposed on the back or back side of the door.

  In the gaming machine A1, the door opening detection means includes stop means for stopping the power supply to the period adjustment means by the power supply means when the closing of the door is detected. A2.

  According to the gaming machine A2, when the closing of the door is detected by the door open detection means, the stop means stops the power supply by the power source means to the period adjustment means. Therefore, in a state where the operation of the period adjusting means is stopped by the stopping means, the period adjusting means can be initialized by the initializing means. Therefore, the period adjustment means can be brought into the initial state normally and stably.

  In the gaming machine A1 or A2, the period adjusting means is configured using a storage means for storing charge, and the charge stored in the storage means by the power supplied from the initial state to the prescribed time by the power source means. A game machine A3 characterized by outputting a voltage generated along with the signal as a signal for the predetermined output period.

  According to the gaming machine A3, when power from the power supply means is supplied to the storage means constituting the period adjustment means from the initial state to the prescribed time, charges are stored in the storage means. The period adjustment means outputs the voltage generated with the charge stored in the storage means as a signal serving as a predetermined output period. As described above, by configuring the period adjustment unit by the storage unit, it is possible to output a signal for a predetermined output period with a simple configuration without using the period adjustment unit as a complicated circuit.

  In the gaming machine A3, when the closing of the door is detected by the door opening detection unit, the initialization unit discharges the charge stored in the storage unit constituting the period adjustment unit. A game machine A4 characterized by comprising discharge means for bringing the means into an initial state.

  According to the gaming machine A4, when the closing of the door is detected by the door opening detection unit, the discharging unit discharges the charge stored in the storage unit constituting the period adjusting unit. Therefore, the charge stored in the storage means when the door opening detection means detects the opening of the door is discharged by the discharging means to zero when the door opening detection means detects that the door is closed. can do. Thus, when the opening of the door is detected by the door opening detection unit, the period adjustment unit configured by the storage unit can always operate from the initial state. Therefore, every time opening of the door is detected by the door opening detecting means, the period adjusting means is operated normally and stably from the initial state to the prescribed time, so that an output period predetermined for the period adjusting means is obtained. A signal can be output normally and stably, and a detection result can be output normally and stably from an output means to a specific apparatus. In addition, as a discharge method of the storage means, it is exemplified that the storage means is short-circuited to the ground.

  In any one of game machines A2 to A4, the stopping means is a releasing means for releasing an electrical connection between the power supply means and the period adjusting means when the door opening detecting means detects the closing of the door. A game machine A5 characterized by comprising.

  According to the gaming machine A5, when the closing of the door is detected by the door open detection means, the electrical connection between the power supply means and the period adjustment means is released by the release means. Therefore, in the state where the power supply to the period adjustment means is stopped by the release means, the period adjustment means can be initialized by the initialization means or the discharge means. Therefore, the period adjustment means can be brought into the initial state normally and stably.

  In the gaming machine A5, the initialization means cancels a short circuit between the storage means forming the period adjustment means and the ground by the discharging means when the door opening detection means detects the opening of the door body. A discharge releasing means is provided, and the stopping means stops the release of the electrical connection between the power source means and the period adjusting means by the releasing means when the door opening detecting means detects the opening of the door. Power supply resuming means for resuming power supply to the period adjusting means by the power supply means, and when the door opening detecting means detects the opening of the door, the power supply resuming means After the short circuit by the discharging means of the storage means and the ground constituting the period adjusting means is released by the discharge releasing means, the electricity by the releasing means of the power source means and the period adjusting means The release of the connection is stopped, the power supply to the period adjustment means by the power supply means is resumed, and when the door open detection means detects the closing of the door, the discharge means is the power supply means The storage means constituting the period adjustment means is short-circuited to ground after the electrical connection between the device and the period adjustment means is released by the release means, and the charge stored in the storage means is discharged. Game machine A6.

  According to the gaming machine A6, when the opening of the door is detected by the door opening detection means, the power supply resuming means first uses the short circuit between the storage means and period grant means as the discharge canceling means. After the release, the power supply means resumes the power supply to the period adjustment means. On the other hand, when closing of the door is detected by the door open detection means, the discharge means first causes the release means to release the electrical connection between the power supply means and the period adjustment means, and then the period adjustment means is configured. The storage means to be connected is short-circuited to ground to discharge the charge stored in the storage means. Therefore, there is no possibility that the power supply means and the ground are short-circuited in either of the case where the door opening detection means detects opening of the door and the case where the door opening detection means detects closing of the door body. . Therefore, damage to the power supply means and the like due to a short circuit between the power supply means and the ground can be reliably prevented.

  In any one of the gaming machines A1 to A6, there is provided an output period limiting means for keeping one output period of the output means within a predetermined period, and the off-operation means is added to the output means and the period adjusting means. A game machine A7, characterized in that the output period limiting means is also supplied with power and operated.

  According to the gaming machine A7, one output period by the output means is kept within a predetermined period by the output period limiting means. Similarly to the output means and period adjustment means, the output period restriction means operates by receiving power from the operation means while the game machine is off, so that the operation period of the output means by one opening of the door. Can be suppressed within a predetermined period to suppress the consumption of the off-operation means during power-off of the gaming machine. Therefore, the number of times of operation of the output means can be increased, and the number of times of detection of the opening of the door can be increased.

  A gaming machine A8 according to any one of the gaming machines A1 to A7, wherein the off-operation means is configured to be chargeable by the power supplied from the power supply of the gaming machine.

  According to the gaming machine A8, the off-operation means is charged by the power supplied to the gaming machine while the gaming machine is on, so the gaming machine is turned on in accordance with the operating hours of the gaming arcade. Only when it is off can charge the operating means. Therefore, when the door is opened while the power of the gaming machine is closed after the store is closed, the output means and the period adjustment means (further, the output period restriction means) are operated by the off-operation means. And the detection result by the door open detection means can be notified to the specific device.

  In the gaming machine A7 or A8, the output means outputs a detection result to the specific device based on the output from the output period limiting means, and the output period limiting means causes the door opening detection means to detect the door. A game machine A9 characterized by performing output to the output means during the predetermined period when opening is detected.

  According to the gaming machine A9, the output means for outputting the detection result to the specific device based on the output from the output period limiting means, during the predetermined period when the door opening detection means detects the opening of the door body, Output is performed by the output period limiting means. Therefore, the output operation to the output means by the output period limiting means can be kept within a predetermined period per one opening of the door. Therefore, it is possible to suppress the consumption of the off-operation means during power-off of the gaming machine, and to increase the number of times the output means can be operated to increase the number of detections of the opening of the door.

  In the gaming machine A9, the output period limiting means stops the output to the output means when the door opening detecting means does not detect the opening of the door body.

  According to the gaming machine A10, the output of the output period limiting means to the output means for outputting the detection result to the specific device is stopped when the opening of the door is not detected by the door opening detection means. Therefore, when opening of the door is not detected by the door opening detection means, it is possible to suppress the power consumed along with the output operation of the output period limiting means. Therefore, it is possible to suppress the consumption of the off-operation means during power-off of the gaming machine, and to increase the number of times the output means can be operated to increase the number of detections of the opening of the door.

  In any one of game machines A7 to A10, the output period limiting means is configured using a monostable multivibrator, and an output period of a signal output by the period adjusting means to the monostable multivibrator is the door body. A game machine A11 characterized by being set to a period shorter than the predetermined period regardless of the open period.

  According to the gaming machine A11, the signal input to the output period limiting means using the monostable multivibrator is a predetermined output period by the output means by the period adjusting means regardless of the opening period of the door. Adjusted to be shorter than the period. Here, the monostable multivibrator continues to output the signal if the input period of the input signal is shorter than the output period of the output signal. Therefore, when a monostable multivibrator is used as the output period limiting means, it is input to the output period limiting means more than the output period of the signal to be output, that is, the predetermined period limited by the output period limiting means. The signal input period, ie, the opening period of the door, should be short. However, since it is completely unpredictable how long the door will be open, it is necessary to keep the door open period shorter than the predetermined period limited by the output period limiting means. It is necessary to set the period for a sufficient time. For example, if the opening period of the door body is predicted to be from several tens of seconds to several minutes, the predetermined period limited by the output period restriction means is set from several minutes to several tens of units with sufficient margin. Must. Then, during this predetermined period, power is continuously supplied to the output period limiting means and the output means from the off-time operation means, so that the wear of the off-time operation means becomes remarkable. Therefore, in order to suppress consumption of the operating means during off-state after using a monostable multivibrator as the output period limiting means, a special circuit configuration is required. However, according to the gaming machine A11, the period adjusting means can adjust the signal input to the output period limiting means to be shorter than the predetermined period regardless of the opening period of the door. Therefore, regardless of the opening period of the door, the output period limiting means can be operated normally, so that one output period by the output means can be kept within the predetermined period by the output period limiting means. As described above, according to the gaming machine A11, by providing the period adjusting means, the consumption of the operating means during off-state is suppressed, and the output period using the monostable multivibrator without adopting a special circuit configuration. A limiting measure can be realized.

  A game machine A12 according to any one of game machines A1 to A11, wherein the output means is mounted on a substrate different from the control means.

  In any one of game machines A1 to A12, the output means includes a photocoupler, and the detection result by the door open detection means is output to the specific device by an output of the photocoupler. Machine A13.

  In any one of the gaming machines A1 to A13, the output means and the period adjustment means (further, the output period limitation means) are configured to be operable even if the voltage is lower than the operating voltage of the control means. A game machine A14 to feature.

  According to the gaming machine A14, the output means and the period adjustment means (further, the output period limitation means) are configured to be operable even at a voltage lower than the operating voltage of the control means. Even if the charge amount decreases and the output voltage of the operating means during off-state becomes lower than the operating voltage of the control means, the output means and the period adjusting means (further, the output period limiting means) are operated to open the door Can be notified to specific devices. That is, the open detection of the door when the power of the gaming machine is turned off can be detected for a long time.

  In any one of the game machines A1 to A14, the output means and the period adjustment means (further, the output period restriction means) have an operable range voltage wider than an operable range voltage of the control means. A game machine A15 characterized by.

  According to the gaming machine A15, the operable means voltage of the output means and the period adjusting means (further, the output period limiting means) is wider than the operable range voltage of the control means. Therefore, when the power of the gaming machine is turned off, the output means and the period adjusting means (further, the output period limiting means) can be operated for a long time by the operating means during the off time. Can be detected for a long time.

  A gaming machine A16 according to any one of gaming machines A7 to A15, wherein the output period limiting means is configured to include a C-MOS semiconductor.

  According to the gaming machine A16, the output period limiting means is configured to include the C-MOS semiconductor. Here, the C-MOS semiconductor generally consumes less power during operation. Therefore, according to the gaming machine A16, it is possible to reduce the consumption of the operating means during the off time, and to perform the open detection of the door when the power of the gaming machine is turned off for a long time.

  A game machine A17 according to any one of game machines A1 to A16, wherein the period adjustment means is configured using an integration circuit.

  According to the gaming machine A17, since the period adjustment means is configured using the integration circuit, the signal inputted to the output period restriction means is adjusted to be shorter than the predetermined period without using a complicated circuit or signal processing. be able to. In addition, by adjusting the resistance value of the resistor and the capacitance value of the capacitor used in the integration circuit, the output period of the signal output by the period limiting means can be freely adjusted within a predetermined period.

  A gaming machine A18 according to any one of gaming machines A1 to A17, wherein the gaming machine is a pachinko gaming machine. Above all, the basic configuration of a pachinko gaming machine is provided with an operating handle, and in response to the operation of the operating handle, the ball is fired to a predetermined game area, and the ball is at an operating opening arranged at a predetermined position in the game area. As a prerequisite for winning (or passing through the operation opening), identification information dynamically displayed on the display device may be determined and stopped after a predetermined time. In addition, when the special game state occurs, the variable winning device (specific winning opening) disposed at a predetermined position in the gaming area is opened in a predetermined manner to enable the ball to be won, and the value according to the number of winnings There is a case where a value (including not only prize balls but also data etc. written to a magnetic card) is given.

  A gaming machine according to any one of gaming machines A1 to A17, wherein the gaming machine is a slot machine. Among them, as a basic configuration of the slot machine, “a variable display means for dynamically displaying an identification information sequence consisting of a plurality of identification information and subsequently displaying the identification information is provided. The dynamic display of the identification information is started as a result, and the dynamic display of the identification information is stopped due to the operation of the stop operation means (stop button) or when the predetermined time elapses. It is a gaming machine provided with a special gaming state generation means for generating a special gaming state advantageous to the player, as a necessary condition that the final identification information of is a specific identification information. In this case, the game medium may be a coin, a medal or the like as a representative example.

  A gaming machine A20 according to any one of gaming machines A1 to A17, wherein the gaming machine is a combination of a pachinko gaming machine and a slot machine. Among them, as a basic configuration of the integrated gaming machine, "a variable display means for dynamically displaying an identification information sequence consisting of a plurality of identification information and subsequently displaying identification information, and for starting operation means (for example, operation lever) Fluctuation of the identification information is started due to the operation of, and the dynamic display of the identification information is stopped due to the operation of the operation means for stop (for example, the stop button) or when a predetermined time elapses. A special game state generation means for generating a special game state advantageous to the player, provided that the finalized identification information upon stopping is the specific identification information, and using a ball as a game medium and the identification information In order to start the dynamic display of the game, a predetermined number of balls are required, and when a special gaming state occurs, a large number of balls are paid out.

  A game machine comprising a main body, a door for opening and closing a front surface of the main body, and control means provided in a space formed by the door and the main body for controlling a game, the door for the main body A door opening detection means for detecting the opening of the body, and an output means for outputting the detection result to the specific device when the opening of the door is detected by the door opening detection means, the output means comprising A game machine B1, which is configured to be able to output the detection result by the door opening detection means to the specific device when the power of the game machine is turned off and the control means is stopped.

  According to the gaming machine B1, even when the power of the gaming machine is turned off and the control means is stopped, when the door opening detection means detects the opening of the door, the detection result is specified by the output means It is output to the device. Therefore, for example, even if the door is opened due to a fraudulent act by somebody after closing the store where all the game machines are turned off, it is possible to determine the gaming machine in which the door is opened by the specific device.

  A game machine comprising a main body, a door for opening and closing a front surface of the main body, and control means provided in a space formed by the door and the main body for controlling a game, the door for the main body A door opening detection means for detecting the opening of the body, an output means for outputting the detection result to the specific device when the opening of the door body is detected by the door opening detection means, and one time by the output means A game comprising: output period limiting means for limiting an output period within a predetermined period; and off-off operating means for operating the output period limiting means and the output means while the power of the gaming machine is turned off. Machine B2.

  According to the gaming machine B2, when the opening of the door is detected by the door opening detection means, the detection result is output to the specific device by the output means. Since the output means receives power supply from the operating means during off-state while the power of the gaming machine is off, the door-opening detecting means detects the opening of the door even while the power of the gaming machine is off. The detection result can be output to a specific device. Therefore, for example, even if the door is opened due to a fraudulent act by somebody after closing the store where all the game machines are turned off, it is possible to determine the gaming machine in which the door is opened by the specific device.

  Moreover, one output period by the output means is limited within a predetermined period by the output period limiting means. Like the output means, the output period limiting means also operates while receiving power from the operating means while the gaming machine is off, so that the operating period of the output means by opening the door once is within a predetermined period. It is possible to suppress the consumption of the operating means during off-state during power-off of the gaming machine. Therefore, the number of times of operation of the output means can be increased, and the number of times of detection of the opening of the door can be increased.

  A game machine comprising a main body, a door for opening and closing a front surface of the main body, and control means provided in a space formed by the door and the main body for controlling a game, the door for the main body A door opening detection means for detecting the opening of the body, an output means for outputting the detection result to the specific device when the opening of the door body is detected by the door opening detection means, and one time by the output means An output period limiting means for limiting an output period within a predetermined period, and an off-period operating means for operating the output period limiting means and the output means while the power of the gaming machine is turned off, the output means comprises the output means The detection result is output to the specific device based on the output from the period limiting means, and the output period limiting means detects the opening of the door during the predetermined period when the door opening detection means detects the opening. output Gaming machine B3 which is characterized in that the output of the stage.

  According to the gaming machine B3, when the opening of the door is detected by the door opening detection means, the detection result is output to the specific device by the output means. Since the output means receives power supply from the operating means during off-state while the power of the gaming machine is off, the door-opening detecting means detects the opening of the door even while the power of the gaming machine is off. The detection result can be output to a specific device. Therefore, for example, even if the door is opened due to a fraudulent act by somebody after closing the store where all the game machines are turned off, it is possible to determine the gaming machine in which the door is opened by the specific device.

  Moreover, one output period by the output means is limited within a predetermined period by the output period limiting means. Like the output means, the output period limiting means also operates while receiving power from the operating means while the gaming machine is off, so that the operating period of the output means by opening the door once is within a predetermined period. It is possible to suppress the consumption of the operating means during off-state during power-off of the gaming machine. Therefore, the number of times of operation of the output means can be increased, and the number of times of detection of the opening of the door can be increased.

  Furthermore, to the output means for outputting the detection result to the specific device based on the output from the output period limiting means, the output period limiting means performs the predetermined period when the door opening detection means detects the opening of the door. Output is done. Therefore, the output operation to the output means by the output period limiting means can be kept within a predetermined period per one opening of the door. Therefore, it is possible to suppress the consumption of the off-operation means during power-off of the gaming machine, and to increase the number of times the output means can be operated to increase the number of detections of the opening of the door.

  A game machine comprising a main body, a door for opening and closing a front surface of the main body, and control means provided in a space formed by the door and the main body for controlling a game, the door for the main body A door opening detection means for detecting the opening of the body, an output means for outputting the detection result to the specific device when the opening of the door body is detected by the door opening detection means, and one time by the output means An output period limiting means for limiting an output period within a predetermined period, and an off-period operating means for operating the output period limiting means and the output means while the power of the gaming machine is turned off, the output means comprises the output means The detection result is output to the specific device based on the output from the period limiting means, and the output period limiting means outputs the output to the output means when the door open detection means does not detect the opening of the door body. Gaming machine B4, characterized in that the stop.

  According to the gaming machine B4, when the opening of the door is detected by the door opening detection means, the detection result is output to the specific device by the output means. Since the output means receives power supply from the operating means during off-state while the power of the gaming machine is off, the door-opening detecting means detects the opening of the door even while the power of the gaming machine is off. The detection result can be output to a specific device. Therefore, for example, even if the door is opened due to a fraudulent act by somebody after closing the store where all the game machines are turned off, it is possible to determine the gaming machine in which the door is opened by the specific device.

  Moreover, one output period by the output means is limited within a predetermined period by the output period limiting means. Like the output means, the output period limiting means also operates while receiving power from the operating means while the gaming machine is off, so that the operating period of the output means by opening the door once is within a predetermined period. It is possible to suppress the consumption of the operating means during off-state during power-off of the gaming machine. Therefore, the number of times of operation of the output means can be increased, and the number of times of detection of the opening of the door can be increased.

  Furthermore, the output of the output period limiting means to the output means for outputting the detection result to the specific device is stopped when the door opening detection means does not detect the opening of the door. Therefore, when opening of the door is not detected by the door opening detection means, it is possible to suppress the power consumed along with the output operation of the output period limiting means. Therefore, it is possible to suppress the consumption of the off-operation means during power-off of the gaming machine, and to increase the number of times the output means can be operated to increase the number of detections of the opening of the door.

  A game machine comprising a main body, a door for opening and closing a front surface of the main body, and control means provided in a space formed by the door and the main body for controlling a game, the door for the main body A door opening detection means for detecting the opening of the body, an output means for outputting the detection result to the specific device when the opening of the door body is detected by the door opening detection means, and one time by the output means The output period limiting means using a monostable multivibrator for keeping the output period within a predetermined period, and the output period limiting means connected to the output period limiting means, when the door opening detection means detects the opening of the door, the output Input period adjusting means for adjusting the signal inputted to the period limiting means to a period shorter than the predetermined period regardless of the opening period of the door, the output period limiting means and the output means Gaming machine B5, characterized in that it comprises a and off during operation means for operating during the off.

  According to the gaming machine B5, when the opening of the door is detected by the door opening detection means, the detection result is output to the specific device by the output means. Since the output means receives power supply from the operating means during off-state while the power of the gaming machine is off, the door-opening detecting means detects the opening of the door even while the power of the gaming machine is off. The detection result can be output to a specific device. Therefore, for example, even if the door is opened due to a fraudulent act by somebody after closing the store where all the game machines are turned off, it is possible to determine the gaming machine in which the door is opened by the specific device.

  Moreover, one output period by the output means is limited within a predetermined period by the output period limiting means. Like the output means, the output period limiting means also operates while receiving power from the operating means while the gaming machine is off, so that the operating period of the output means by opening the door once is within a predetermined period. It is possible to suppress the consumption of the operating means during off-state during power-off of the gaming machine. Therefore, the number of times of operation of the output means can be increased, and the number of times of detection of the opening of the door can be increased.

  Furthermore, the signal input to the output period limiting means using the monostable multivibrator is shorter than the predetermined period which is one output period by the output means by the input period adjusting means, regardless of the opening period of the door. Adjusted. Here, the monostable multivibrator continues to output the signal if the input period of the input signal is shorter than the output period of the output signal. Therefore, when a monostable multivibrator is used as the output period limiting means, it is input to the output period limiting means more than the output period of the signal to be output, that is, the predetermined period limited by the output period limiting means. The signal input period, ie, the opening period of the door, should be short. However, since it is completely unpredictable how long the door will be open, it is necessary to keep the door open period shorter than the predetermined period limited by the output period limiting means. It is necessary to set the period for a sufficient time. For example, if the opening period of the door body is predicted to be from several tens of seconds to several minutes, the predetermined period limited by the output period restriction means is set from several minutes to several tens of units with sufficient margin. Must. Then, during this predetermined period, power is continuously supplied to the output period limiting means and the output means from the off-time operation means, so that the wear of the off-time operation means becomes remarkable. Therefore, in order to suppress consumption of the operating means during off-state after using a monostable multivibrator as the output period limiting means, a special circuit configuration is required. However, according to the gaming machine B5, the signal inputted to the output period limiting means can be adjusted shorter than the predetermined period by the input period adjusting means, regardless of the opening period of the door. Therefore, regardless of the opening period of the door, the output period limiting means can be operated normally, so that one output period by the output means can be kept within the predetermined period by the output period limiting means. As described above, according to the gaming machine B5, by providing the input period adjusting means, consumption of the operating means during off-state can be suppressed and output using the monostable multivibrator without adopting a special circuit configuration. Means for limiting the period can be realized.

  In the gaming machine B5, the input period adjusting means is configured using an integrating circuit.

  According to the gaming machine B6, since the input period adjustment means is configured using the integration circuit, the signal input to the output period restriction means is adjusted to be shorter than the predetermined period without using a complicated circuit or signal processing. can do. Further, by adjusting the resistance value of the resistor and the capacitance value of the capacitor used in the integrating circuit, the input period of the signal input to the output period limiting means can be freely adjusted within a predetermined period.

  In the gaming machine B5 or B6, the input period adjusting means includes constant voltage means for fixing the maximum voltage of the signal input to the output period limiting means.

  According to the gaming machine B7, since the constant voltage means is provided, the maximum voltage of the signal input to the output period limiting means is made constant, the signal input to the output period limiting means is stabilized, and the output means is One output period can be stably held within a predetermined period.

  Also, in the case where the input period adjustment means is configured using an integration circuit, charges are stored in a capacitor used in the integration circuit, and a voltage due to this charge is superimposed on a signal input to the output period limitation means. There is a possibility that an overvoltage which may destroy the output period limiting means is applied to the output period limiting means. However, according to the gaming machine 7, since the maximum voltage of the signal input to the output period limiting means is made constant by the constant voltage means, the overvoltage which may destroy the output period limiting means is not applied to the output period limiting means . Therefore, destruction of the output period limiting means can be prevented.

  In the gaming machine B7, the constant voltage means is constituted by a Zener diode.

  According to the gaming machine B8, since the constant voltage means is constituted by the Zener diode, it is inputted to the output period limiting means with a simple configuration and at low cost as compared with a constant voltage circuit or the like constituted by complicated circuits. The maximum voltage of the signal can be made constant. Therefore, the signal input to the output period limiting means is stabilized using a simple configuration and inexpensive Zener diode, and the output period is limited while stably holding one output period by the output means within a predetermined period. It is possible to prevent an overvoltage which may destroy the means from being applied to the output period limiting means.

  In the gaming machines B1 to B8, the door includes an inner frame opened and closed with respect to the main body, and a transparent plate support door opened and closed with respect to the inner frame, and the door open detection means Are respectively provided on the inner frame and the transparent plate support door, and are connected in parallel to the output means, and the output means is at least one of the inner frame or the transparent plate support door by the door open detection means. When opening is detected, the detection result is output to the specific device. A game machine B9.

  According to the gaming machine B9, the door opening detection means is provided in each of the inner frame and the transparent plate support door and is connected in parallel to the output means. When at least one release is detected, the output means outputs the detection result to the specific device. Therefore, even if it is an opening of either the inner frame which constitutes a door, or a transparent plate support door, the opening can be notified to a specific device by one output means.

  In any one of the game machines B1 to B9, the door opening detection means is configured to be conductive when the door is open, and to be shut off when the door is closed. A game machine B10 characterized in that According to the gaming machine B10, the door opening detection means is conducted when the door is opened, and is shut off when the door is closed, so it is at the time of execution of a fraudulent act Power consumption can be reduced by operating the output means only while the door is open.

  In any one of the game machines B1 to B10, there is provided an off-operation means charged during power-on of the gaming machine, and the output means is operated by the charge or electric power charged to the operation means during the off-state. A game machine B11 characterized by According to the gaming machine B11, the off-operation means is charged by the power supplied to the gaming machine while the power of the gaming machine is on, so the gaming machine is turned on according to the business hours of the game arcade Only when it is off can charge the operating means. Therefore, when the door is opened while the power of the gaming machine after closing the game arcade is turned off, the output means (and the output period limiting means) is operated by the operating means during off, and the door is opened. The detection result by the open detection means can be notified to the specific device.

  In any one of the game machines B1 to B11, the control means includes main control means for performing main control of the game, and the output means is mounted on the main control means. .

  In any one of the game machines B1 to B11, a game machine B13 characterized in that the output means is mounted on a substrate different from the control means.

  In any one of game machines B1 to B13, the output means includes a photocoupler, and the detection result by the door open detection means is output to the specific device by an output of the photocoupler. Machine B14.

  In any one of the game machines B2 to B14, the output period limiting means and the output means are configured to be operable even if the voltage is lower than the operating voltage of the control means. . According to the gaming machine B15, since the output period limiting means and the output means are configured to be operable even at a voltage lower than the operating voltage of the control means, the charge amount of the operating means during off is reduced, Even when the output voltage of the operating means is lower than the operating voltage of the control means, the output period limiting means and the output means can be operated to notify the specific device of the opening of the door. That is, the open detection of the door when the power of the gaming machine is turned off can be detected for a long time.

  In any one of the game machines B2 to B15, the output period limiting means and the output means are characterized in that the operable range voltage is wider than the operable range voltage of the control means. B16. According to the gaming machine B16, the operable range voltage of the output period limiting means and the output means is wider than the operable range voltage of the control means. Therefore, when the game machine is powered off, the output period limiting means and the output means can be operated for a long time by the off-operation means, so that the door body is detected for a long time when the game machine is powered off. Can.

  In any one of the game machines B2 to B16, the output period limiting means is configured to include a C-MOS semiconductor. A game machine B17 characterized by comprising. According to the gaming machine B17, the output period limiting means is configured to include the C-MOS semiconductor. Here, the C-MOS semiconductor generally consumes less power during operation. Therefore, according to the gaming machine B17, it is possible to reduce the consumption of the operating means during the off time, and to perform the open detection of the door when the power of the gaming machine is turned off for a long time.

  A gaming machine B18 according to any one of gaming machines B1 to B17, wherein the gaming machine is a pachinko gaming machine.

  A gaming machine according to any one of gaming machines B1 to B17, wherein the gaming machine is a slot machine.

  A gaming machine B20 according to any one of gaming machines B1 to B17, wherein the gaming machine is a combination of a pachinko gaming machine and a slot machine.

  A main body, a door for opening and closing the front of the main body, control means provided in the space formed by the door and the main body for controlling the game, and notification means for notifying by control of the control means A door opening detection means for detecting the opening of the door body with respect to the main body, and the control means for detecting the detection result when the door opening detection means detects the opening of the door body And the output means for outputting the detection result to the specific device, and the output means is controlled by the control means when the game machine is turned on. If the door open detection means outputs the detection result to the specific device and the game machine is powered off and control by the control means is not performed, the door open detection hand is detected. Gaming machine C1, characterized in that the detection result and to output to the specific device according to.

  According to the gaming machine C1, when the power of the gaming machine is turned on and the control means is controlled, when the door opening detection means detects the opening of the door, the detection result is controlled by the output means The information is output to the means, and notification by the notification means is executed, and the detection result is output to the specific device by the output means. Therefore, for example, when the door is opened by an unauthorized person during the opening of the store where the power of the gaming machine is turned on, it is possible to determine the gaming machine in which the door is opened by notification by the notification means. At the same time, the game machine whose door is opened can also be determined by the specific device. On the other hand, when the power supply of the gaming machine is turned off, the control of the control means is stopped, but also in this case, when the opening of the door is detected by the door opening detection means, the detection result is output It is outputted to the specific device by means. Therefore, even if the door is opened due to an unauthorized action by somebody after closing the store where all the game machines are turned off, it is possible to determine the game machine in which the door is opened by the specific device. Therefore, regardless of the on / off state of the power supply of the gaming machine, when the door is opened due to a fraudulent act by somebody, the detection result is output to the specific device by one output means, and the game for which the door is opened Machine can be identified by a specific device.

  In the gaming machine C1, power supply means for supplying power to the output means to operate when the power supply of the gaming machine is turned on, and the power supply means are provided separately, and the power supply of the gaming machine is turned off. The control means is provided with an operation means for supplying power to the output means to operate when it is out, the output means being operated by the power supplied by the power supply means and detecting the detection result by the door open detection means The control output means for outputting to the control means, and the specification output means for operating with the power supplied by the power supply means or the operation means during off and outputting the detection result by the door open detection means to the specific device A game machine C2 characterized by

  According to the gaming machine C2, when the power of the gaming machine is turned on, the power is supplied to the control output means and the identification output means by the power means. Thus, when the door opening detection means detects the opening of the door, the detection result is output to the control means by the control output means, and the notification by the notification means is executed, and the detection result is the specification output It is outputted to the specific device by means. Therefore, for example, when the door is opened by an unauthorized person during the opening of the store where the power of the gaming machine is turned on, it is possible to determine the gaming machine in which the door is opened by notification by the notification means. At the same time, the game machine whose door is opened can also be determined by the specific device. On the other hand, when the power of the gaming machine is turned off, the power is supplied to the output means for identification by the operating means during off. Thus, when the door open detection means detects the opening of the door, the detection result is output to the specific device by the output means for specification. Therefore, even if the door is opened due to an unauthorized action by somebody after closing the store where all the game machines are turned off, it is possible to determine the game machine in which the door is opened by the specific device. Therefore, regardless of the on / off state of the power supply of the gaming machine, when the door is opened due to a wrongdoing by somebody, the output means for specification outputs the detection result to the specific device, and the game of which the door is opened Machine can be identified by a specific device.

  The gaming machine C2 includes output period limiting means for limiting one output period by the output means for identification within a predetermined period, and the off-time operation means includes the output period limiting means in addition to the output means for identification. A game machine C3 characterized in that it is also configured to supply power and operate.

  According to the gaming machine C3, one output period by the output means for specification is kept within a predetermined period by the output period limiting means. Like the output means for output, the output period restricting means also operates by receiving power supplied from the operating means during off while the power of the game machine is turned off. Therefore, the operation period of the output means for output by opening the door once. Can be suppressed within a predetermined period to suppress the consumption of the off-operation means during power-off of the gaming machine. Therefore, the number of times of operation of the output means for specification can be increased, and the number of times of detection of opening of the door can be increased.

  In the gaming machine C2 or C3, the off-operation means is configured to be chargeable by the power supplied from the power supply of the gaming machine.

  According to the gaming machine C4, the off-operation means is charged by the power supplied to the gaming machine while the power of the gaming machine is on, so the gaming machine is turned on according to the business hours of the game arcade. Only when it is off can charge the operating means. Therefore, if there is an opening of the door while the power of the gaming machine after the closing of the game arcade is turned off, the output means for output and the output period limiting means are operated by the operating means during off, and the door is opened. The detection result by the open detection means can be notified to the specific device.

  One of the gaming machines C2 to C4 includes a diode that allows current supplied from the power supply means to flow in one direction, and the off-operation means is configured using a capacitor or a secondary battery, and the door open detection means Is conducted when the door is open, and is shut off when the door is closed, and the power supply means is connected to the anode terminal of the diode. The cathode terminal of the diode is connected to one end of the operating means during off-state, the other end of the operating means during off-state is grounded, and the control output means is the power-supply means And the anode terminal of the diode and the door open detection means, and the output means for identification is a cathode terminal of the diode and one end of the operation means during off-state Gaming machine C5, characterized in that it is connected through the door opening detection means.

  According to the gaming machine C5, since the control output means is connected to the power supply means and the anode terminal of the diode, the door open detection means when the door is opened when the power of the game machine is turned on. Becomes conductive, power is supplied from the power supply means to the control output means, and an operation state is established. On the other hand, when the power supply of the gaming machine is turned off, the supply of power by the power supply means is stopped, so even if the door is opened and the door open detection means is conducted, the control output means is The power is not supplied from the power supply means, and the apparatus is stopped. On the other hand, since the output means for specification is connected to the operation means during off and the cathode terminal of the diode, the door open detection means is opened when the door is opened when the power of the game machine is turned on. The power is supplied from the power supply means to the output means for identification and becomes operative. When the power supply of the gaming machine is turned off, the power supply by the power supply means to the output means for specification is stopped, but when the door is opened and the door open detection means is conducted, the operating means is turned off during the off Since the power is supplied to the output means, the output means for identification is in an operating state. Here, when the power of the gaming machine is turned off and power is supplied from the operating means during off-state to the output means for specification, the power supply to the output means for control can be cut off by the diode. As a result, it is possible to suppress the consumption of the off-operation means during power-off of the gaming machine. Therefore, the number of times of operation of the output means for specification can be increased, and the number of times of detection of opening of the door can be increased.

  In any one of the gaming machines C1 to C5, the door includes an inner frame opened and closed with respect to the main body, and a transparent plate support door opened and closed with respect to the inner frame, and the door open detection means An inner frame door opening detection means provided in the inner frame; and a transparent plate door opening detection means provided in the transparent plate support door, and the output means includes the inner frame door opening detection means. When the opening of the inner frame is detected, the detection result is output to the control means, and notification by the notification means is executed, and the first output means for outputting the detection result to the specific device, and the transparent plate When the opening of the transparent plate support door is detected by the door opening detection means, the detection result is output to the control means to execute notification by the notification means and the detection result is output to the specific device. Equipped with a second output means Gaming machine C6, characterized by that.

  According to the gaming machine C6, when the opening of the inner frame is detected by the inner frame door opening detecting means when the power of the gaming machine is turned on and the control means is controlled, the detection result is The first output means outputs the information to the control means, and the notification means performs notification, and the first output means outputs the detection result to the specific device. Similarly, when the opening of the transparent plate support door is detected by the transparent plate door open detection means while the game machine is turned on, the detection result is output to the control means by the second output means. The notification by the notification means is executed, and the detection result is output to the specific device by the second output means. On the other hand, when the power of the gaming machine is turned off, the control of the control means is stopped, but also in this case, when the opening of the inner frame is detected by the inner frame door opening detecting means, the detection is performed. The result is output to the specific device by the first output means. Similarly, when the opening of the transparent plate support door is detected by the transparent plate door open detection means when the game machine is powered off, the detection result is output to the specific device by the second output means. . Thus, the first output means for outputting the detection result when the inner frame is opened and the second output means for outputting the detection result when the transparent plate support door is opened are separately provided. Therefore, when either or both of the inner frame and the transparent plate support door are opened, it can be determined by the notification by the notification means and the specific device which opening has occurred.

  In any one of the game machines C3 to C6, the output means for specification outputs a detection result to the specific device based on the output from the output period restriction means, and the output period restriction means is the door open detection means A game machine C7 characterized by performing output to the output means for specification during said predetermined period, when opening of said door is detected by this.

  According to the gaming machine C7, when the opening of the door is detected by the door opening detection means, the detection result is output to the specific device by the output means for specification. Since the output means for specification receives power supply from the operating means while the power of the gaming machine is off, the door opening detection means detects the opening of the door even while the power of the gaming machine is off. Then, the detection result can be output to a specific device. Therefore, for example, even if the door is opened due to a fraudulent act by somebody after closing the store where all the game machines are turned off, it is possible to determine the gaming machine in which the door is opened by the specific device.

  Moreover, one output period by the output means for specification is limited within a predetermined period by the output period limiting means. Like the output means for output, the output period restricting means also operates by receiving power supplied from the operating means during off while the power of the game machine is turned off. Therefore, the operation period of the output means for output by opening the door once. Can be suppressed within a predetermined period to suppress the consumption of the off-operation means during power-off of the gaming machine. Therefore, the number of times of operation of the output means for specification can be increased, and the number of times of detection of opening of the door can be increased.

  Furthermore, to the specific output means for outputting the detection result to the specific device based on the output from the output period limiting means, the output period is limited during a predetermined period when the door opening detection means detects the opening of the door. Output is performed by means. Therefore, the output operation to the output means for specification by the output period limiting means can be held within a predetermined period for one opening of the door. Therefore, the consumption of the operating means during off-state during power-off of the gaming machine can be suppressed, and the number of operable times of the output means for specification can be increased to increase the number of detectable times of opening of the door.

  In the gaming machine C7, the output period limiting means stops the output to the output means for specification when the opening of the door is not detected by the door opening detecting means.

  According to the gaming machine C8, the output of the output period limiting means to the specific output means for outputting the detection result to the specific device is stopped when the opening of the door is not detected by the door opening detection means. Therefore, when opening of the door is not detected by the door opening detection means, it is possible to suppress the power consumed along with the output operation of the output period limiting means. Therefore, the consumption of the operating means during off-state during power-off of the gaming machine can be suppressed, and the number of operable times of the output means for specification can be increased to increase the number of detectable times of opening of the door.

  In any one of the gaming machines C3 to C8, the output period limiting means is configured using a monostable multivibrator, connected to the monostable multivibrator, and the door opening detection means opens the door. The game is characterized by further comprising input period adjusting means for adjusting a signal input to the monostable multivibrator to a period shorter than the predetermined period regardless of the opening time of the door when a Machine C9.

  According to the gaming machine C9, the signal inputted to the output period limiting means using the monostable multivibrator is the output period by the output means for specification by the input period adjusting means regardless of the opening period of the door. It is adjusted shorter than the predetermined period which is. Here, the monostable multivibrator continues to output the signal if the input period of the input signal is shorter than the output period of the output signal. Therefore, when a monostable multivibrator is used as the output period limiting means, it is input to the output period limiting means more than the output period of the signal to be output, that is, the predetermined period limited by the output period limiting means. The signal input period, ie, the opening period of the door, should be short. However, since it is completely unpredictable how long the door will be open, it is necessary to keep the door open period shorter than the predetermined period limited by the output period limiting means. It is necessary to set the period for a sufficient time. For example, if the opening period of the door body is predicted to be from several tens of seconds to several minutes, the predetermined period limited by the output period restriction means is set from several minutes to several tens of units with sufficient margin. Must. Then, during this predetermined period, power is continuously supplied to the output period limiting means and the output means for identification from the operating means during off, so the consumption of the operating means during off becomes significant. Therefore, in order to suppress consumption of the operating means during off-state after using a monostable multivibrator as the output period limiting means, a special circuit configuration is required. However, according to the gaming machine C9, the signal inputted to the output period limiting means can be adjusted to be shorter than the predetermined period by the input period adjusting means, regardless of the opening period of the door. Therefore, regardless of the opening period of the door, the output period limiting means can be operated normally, so that one output period by the output means for specification can be kept within a predetermined period by the output period limiting means. As described above, according to the gaming machine C9, by providing the input period adjusting means, consumption of the operating means during off-state is suppressed, and output using the monostable multivibrator without adopting a special circuit configuration. Means for limiting the period can be realized.

  In any one of the game machines C1 to C9, the control means includes main control means for performing main control of the game, and the output means is mounted on the main control means. .

  In any one of the game machines C1 to C10, the output means is mounted on a substrate different from the control means.

  In any one of the game machines C1 to C11, the output means includes a photo coupler, and the detection result by the door open detection means is output to the control means and the specific device by the output of the photo coupler. A gaming machine C12.

  In any one of the gaming machines C3 to C12, the output period limiting means and the output means for specification are configured to be operable even if the voltage is lower than the operating voltage of the control means. Machine C13.

  According to the gaming machine C13, since the output period limiting means and the output means for specification are configured to be operable even at a voltage lower than the operating voltage of the control means, the charge amount of the operating means during off decreases. Even when the output voltage of the operating means is lower than the operating voltage of the control means, the output period limiting means and the specific output means can be operated to notify the specific device of the opening of the door. That is, the open detection of the door when the power of the gaming machine is turned off can be detected for a long time.

  In any one of the gaming machines C3 to C13, the output period limiting means and the output means for specification are characterized in that the operable range voltage is wider than the operable range voltage of the control means. Gaming machine C14.

  According to the gaming machine C14, the operable range voltage of the output period limiting means and the output means for specification is wider than the operable range voltage of the control means. Therefore, when the power of the gaming machine is turned off, the output period limiting means and the output means for identification can be operated for a long time by the operating means during the off time. It can be carried out.

  In any one of the gaming machines C3 to C14, the output period limiting means is configured to include a C-MOS semiconductor.

  According to the gaming machine C15, the output period limiting means is configured to include the C-MOS semiconductor. Here, the C-MOS semiconductor generally consumes less power during operation. Therefore, according to the gaming machine C15, it is possible to reduce the consumption of the operating means during the off-state, and to perform the open detection of the door when the power of the gaming machine is turned off for a long time.

  In any one of the game machines C9 to C15, the input period adjusting means is configured using an integration circuit.

  According to the gaming machine C16, since the input period adjusting means is configured using the integrating circuit, the signal inputted to the output period limiting means is adjusted shorter than the predetermined period without using a complicated circuit or signal processing. can do. Further, by adjusting the resistance value of the resistor and the capacitance value of the capacitor used in the integrating circuit, the input period of the signal input to the output period limiting means can be freely adjusted within a predetermined period.

  In any one of the game machines C9 to C16, the input period adjusting means includes constant voltage means for fixing the maximum voltage of the signal input to the monostable multivibrator which is the output period limiting means. Game machine C17.

  According to the gaming machine C17, since the constant voltage means is provided, the maximum voltage of the signal input to the output period limiting means is made constant, the signal input to the output period limiting means is stabilized, and the output for specifying One output period by means can be kept stable within a predetermined period.

  Also, in the case where the input period adjustment means is configured using an integration circuit, charges are stored in a capacitor used in the integration circuit, and a voltage due to this charge is superimposed on a signal input to the output period limitation means. There is a possibility that an overvoltage which may destroy the output period limiting means is applied to the output period limiting means. However, according to the gaming machine C17, since the maximum voltage of the signal input to the output period limiting means is made constant by the constant voltage means, the overvoltage which may destroy the output period limiting means is not applied to the output period limiting means . Therefore, destruction of the output period limiting means can be prevented.

  In the gaming machine C17, the constant voltage means comprises a Zener diode.

  According to the gaming machine C18, since the constant voltage means is constituted by the Zener diode, it is inputted to the output period limiting means with a simple configuration and at low cost as compared with a constant voltage circuit or the like constituted by complicated circuits. The maximum voltage of the signal can be made constant. Therefore, using a simple configuration and inexpensive Zener diode, the signal input to the output period limiting means is stabilized, and while the output period by the specific output means is stably held within a predetermined period, the output It is possible to prevent an overvoltage that may destroy the period limiting means from being applied to the output period limiting means.

  A gaming machine C19 according to any one of gaming machines C1 to C18, wherein the gaming machine is a pachinko gaming machine.

  A gaming machine C20 according to any of gaming machines C1 to C18, wherein the gaming machine is a slot machine.

  A gaming machine C21 according to any one of gaming machines C1 to C18, wherein the gaming machine is a combination of a pachinko gaming machine and a slot machine.

  A game machine comprising a main body, a door for opening and closing a front surface of the main body, and control means provided in a space formed by the door and the main body for controlling a game, the door for the main body The apparatus includes a door opening detection unit that detects the opening of the body, and an output unit that outputs the detection result to a specific device when the opening of the door is detected by the door opening detection unit. When the power of the game machine is turned on and the control by the control means is performed, the detection result by the door open detection means is output to the specific device, and the power of the game machine is turned off and the control means is A game machine C22 configured to output a detection result by the door opening detection means to the specific device even when control is not performed.

  According to the gaming machine C22, when the power of the gaming machine is turned on and the control means is controlled, when the door opening detection means detects the opening of the door, the detection result is specified by the output means It is output to the device. Therefore, for example, when the door is opened by an unauthorized person during the opening of the store where the power of the gaming machine is turned on, it is possible to determine the gaming machine in which the door is opened by the specific device. On the other hand, when the power supply of the gaming machine is turned off, the control of the control means is stopped, but also in this case, when the opening of the door is detected by the door opening detection means, the detection result is output It is outputted to the specific device by means. Therefore, even if the door is opened due to an unauthorized action by somebody after closing the store where all the game machines are turned off, it is possible to determine the game machine in which the door is opened by the specific device. Therefore, regardless of the on / off state of the power supply of the gaming machine, when the door is opened due to a fraudulent act by somebody, the detection result is output to the specific device by one output means, and the game for which the door is opened Machine can be identified by a specific device.

  In any one of the gaming machines C1, C6, C10 to C12 or C19 to C22, generation means for generating a signal to be output as the detection result from the output means, and the generation means for the game machine via a specific location A game machine C23 comprising: an on-supply means for supplying power during power-on; and an off-supply means for supplying power to the specific part during power-off of the game machine.

  According to the gaming machine C23, while the power of the gaming machine is on, power is supplied from the supplying means to the specific part of the generating means while the power of the gaming machine is off, the specific part of the generating means is supplied off. Power is supplied from the means. That is, power is supplied to the generation means regardless of the power on / off state of the gaming machine. Therefore, the generation means can generate the signal outputted as the detection result from the output means regardless of the on / off state of the power supply of the gaming machine.

10 Pachinko machines (game machines)
11 Outer frame (body)
12 Inner frame (part of the door)
14 Front frame (part of the door)
110 Main controller (part of control means)
281 Integration circuit (period adjustment means)
300 Frame open detection circuit for inner frame (part of output means)
300a Terminal board output circuit for inner frame (part of output means)
291 External output terminal board for inner frame (part of output means)
302 Front frame open frame detection circuit (part of output means)
302a Front frame terminal board output circuit (part of the output means)
293 Front panel external output terminal board (part of the output means)
CD1 capacitor (part of power supply means, operating means during off)
D1 Diode DC1 DC power supply (part of power supply means)
IC1 timer (output period limiting means)
PR1 Photocoupler (part of output means)
SW3A switch (part of door open detection means, part of stop means, part of release means, part of power supply resumption means, part of initialization means, part of discharge means, part of discharge release means )
SW3-1 switch (part of stop means, part of release means, part of power supply restart means)
SW3-3 switch (part of initialization means, part of discharge means, part of discharge release means)
SW4A switch (part of door open detection means, part of stop means, part of release means, part of power supply restart means, part of initialization means, part of discharge means, part of discharge release means )
SW4-1 switch (part of stop means, part of release means, part of power supply restart means)
SW 4-3 Switch (part of initialization means, part of discharge means, part of discharge release means)

  The present invention relates to a gaming machine represented by a pachinko machine, a drum-type game machine (for example, a slot machine), or a drum-type game machine using a game ball.

In a pachinko machine, when a ball driven into a game area enters a symbol operation opening, a lottery is performed at the timing of the ball entering. In the case of a coin-operated game machine using a slot machine or a game ball, when the start lever is operated, a lottery is performed at the operated timing. A result of the lottery, comes to the person have enough For example, a capable state payout of prize balls and coins. The control for determining the lottery and or those are performed by the main controller, the main controller is liable to be subject to fraud.

Specific fraud, for example, the main control unit, or replaced by illegal that those have enough occurs frequently, or connect the invalid substrate (e.g., "hanging board") to the main controller, an equivalent or there is illegal to those to be generated. In the case of a pachinko machine, for example, there is also an injustice or the like which makes it easy for a ball to easily enter a winning opening or a symbol operation opening by illegally bending a nail driven on a game board surface.
For pachinko machine, when the fraud who's spamming game board and the main control device or the like, it is necessary to release the inner frame or glass frame, the inner frame or glass frame is opened In this case, the opening is detected by the sensor and a predetermined notification is given, so that it is possible to grasp the fraudulent act.

JP, 2001-198332, A

However, for example, midnight, etc. after closing of the game arcade, fraudster may enter, if the intruder was fraud by opening the inner frame or glass frame or the like, the power of the pachinko machine is sectional in the time and which, since pachinko machine is stopped, there is an inner frame or a problem that the de Ki such have it open for detecting the glass frame.
In addition, such problems, that is, the problem that it is not possible to grasp the door when the door is opened while the power of the gaming machine is turned off, are not only pachinko machines, but also arena splits, ball, slots It may also occur in various types of gaming machines such as gaming machines in which machines, so-called pachinko machines and slot machines are integrated.

  The present invention has been made to solve the above-described problems and the like, and in the case where the door is opened while the power of the game machine is turned off, it is possible to grasp the opening. The purpose is to provide a gaming machine that can

Gaming machine of claim 1, wherein in order to achieve this purpose a body, a door body openable and closable with respect to the main body, in a gaming machine and a control means for controlling Yu technique, before Kitobiratai When the opening of the door is detected by the door opening detecting means for detecting the opening of the door and the door opening detecting means, if it is in the initial state, the operation of the door from the initial state to the prescribed time An output that outputs a detection result by the door open detection unit to a specific device based on a period adjustment unit that outputs a signal that is a predetermined output period regardless of the open period, and a signal that is output by the period adjustment unit Means, power supply means for supplying electric power to the output means and the period adjustment means for operation, and stop for stopping the power supply to the period adjustment means by the power supply means when the closing of the door is detected Bei and means The door open detection means includes an initialization means for setting the period adjustment means to an initial state when the closing of the door is detected, and the power supply means is configured to turn off the game machine. An off-off operation means is provided which operates by supplying power to the output means and the period adjustment means.

According to the present invention, when the door is opened while the power of the gaming machine is turned off, the opening can be grasped.

It is a front view of a pachinko machine. It is a front view of a game board of a pachinko machine. It is a rear view of a pachinko machine. It is a perspective view of a pachinko machine in the state where an inner frame, a front frame, and a lower tray unit were opened. It is a figure showing structure of a switch. It is a block diagram which shows the electric constitution of a pachinko machine. It is the block diagram which showed the electric constitution of the frame open detection circuit and the external output terminal board. It is the timing chart which showed the relationship of the state of an inner frame, the state of a front frame, the TRG terminal voltage of a timer, the OUT terminal voltage of a timer, and the output of an external output terminal board. (A) is a figure which showed typically area | region division setting and effective line setting of a display screen, (b) is a figure which illustrated the actual display screen. It is a figure which shows the outline | summary of various counters. 5 is a flowchart showing a start-up process performed by the MPU 201 in the main control device 110. It is a flowchart which shows the main processing performed by MPU in a main control apparatus. It is a flowchart which shows the fluctuation | variation process performed in main processing. It is the flowchart which showed the fluctuation start processing which is executed inside fluctuation processing. It is a flowchart which shows timer interruption processing. It is a flowchart which shows the starting winning a prize process performed in timer interruption processing. It is a flowchart which shows NMI interruption processing. It is the block diagram which showed the electric constitution of the frame open detection circuit of 2nd Embodiment. It is the timing chart which showed the relation of the state of inner frame 12, the state of front frame 14, the voltage of A of the frame open detection circuit of a 2nd embodiment, and the output of an external output terminal board. It is the block diagram which showed the electric constitution of the frame open detection circuit of 3rd Embodiment. It is the timing chart which showed the relationship of the state of an inner frame, the state of a front frame, the TRG terminal voltage of the timer of 3rd Embodiment, the OUT terminal voltage of the timer of 3rd Embodiment, and the output of an external output terminal board. It is a perspective view of a pachinko machine of a 4th embodiment in the state where an inner frame, a front frame, and a lower tray unit were opened. It is sectional drawing of switch SW3 used for the pachinko machine of 4th Embodiment. It is a block diagram which shows the electric constitution of the pachinko machine of 4th Embodiment. It is the block diagram which showed the electric constitution of the frame open detection circuit for inner frames, and the external output terminal board for inner frames. The state of the power supply of the pachinko machine of the fourth embodiment, the states of the switches SW3-1 and SW3-2, the TRG terminal voltage of the timer, the OUT terminal voltage of the timer, the output of the external output terminal plate for the inner frame, and for the inner frame It is the timing chart which showed the relation of the output of the input output port output circuit. It is the flowchart which showed the main processing performed by MPU in the main control apparatus of 4th Embodiment. It is the flowchart which showed the timer interruption processing which is executed by MPU inside the main control unit of 4th execution form. It is the flowchart which showed the starting process performed by MPU in the audio | voice lamp control apparatus of 4th Embodiment. It is the flowchart which showed the main processing performed by MPU in the voice lamp control device of a 4th embodiment. It is the flowchart which showed the door opening alerting | reporting process performed by MPU in the audio | voice lamp control apparatus of 4th Embodiment. It is the flowchart which showed the main processing performed by MPU in the display control apparatus of 4th Embodiment. It is the flowchart which showed the external interruption processing performed by MPU in the display control apparatus of 4th Embodiment. It is sectional drawing of switch SW3A used for the pachinko machine of 5th Embodiment. It is the block diagram which showed the electric constitution of the frame open detection circuit for inner frames used for the pachinko machine of 5th Embodiment, and the external output terminal board for inner frames. The state of the power supply of the pachinko machine of the fifth embodiment, the state of the inner frame, the state of the switch SW3-3, the state of the switch SW3-1 and the switch SW3-2, the voltage applied to the capacitor CD7, the voltage at the TRG terminal of the timer, It is the timing chart which showed the relationship between the OUT terminal voltage of a timer, the output of the external output terminal board for inner frames, and the output of the input / output port output circuit for inner frames.

  Hereinafter, an embodiment of a pachinko gaming machine (hereinafter simply referred to as a "pachinko machine") will be described based on the drawings. FIG. 1 is a front view of the pachinko machine 10, FIG. 2 is a front view of the game board 13 of the pachinko machine 10, and FIG. 3 is a rear view of the pachinko machine 10. As shown in FIG.

  As shown in FIG. 1, the pachinko machine 10 has an outer frame 11 in which an outer shell is formed by a substantially rectangular combination of wooden frames, and an outer frame 11 having substantially the same outer shape as the outer frame 11. And an inner frame 12 supported so as to be openable and closable. In the outer frame 11, metal hinges 18 are attached to upper and lower two places on the left side in front view (see FIG. 1) to support the inner frame 12, and the side on which the hinge 18 is provided is used as an opening / closing axis A frame 12 is supported so as to be openable and closable to the front side.

  In the inner frame 12, the game board 13 (see FIG. 2) having a large number of nails and winning openings 63, 64 and the like is detachably mounted from the back side. Balls are played by balls flowing down the front of the game board 13. In the inner frame 12, a ball emitting unit 112a (see FIG. 5) for emitting balls to the front area of the game board 13 and a ball for guiding balls emitted from the ball emitting unit 112a to the front area of the game board 13 Rails (not shown) and the like are attached.

  On the front side of the inner frame 12, a front frame 14 covering the upper front side and a lower tray unit 15 covering the lower side are provided. In order to support the front frame 14 and the lower tray unit 15, metal hinges 19 are attached to upper and lower two places on the left side in front view (see FIG. 1), and the side on which the hinge 19 is provided is an open / close shaft. The lower tray unit 14 and the lower tray unit 15 are supported so as to be able to open and close to the front side. The locking of the inner frame 12 and the locking of the front frame 14 are released by inserting a dedicated key into the key hole 21 of the cylinder lock 20 and performing a predetermined operation.

  The front frame 14 is an assembly of a resin part for decoration, an electric part, and the like, and a window portion 14 c having an opening formed in a substantially elliptical shape is provided at a substantially central portion thereof. A glass unit 16 having two glass sheets is disposed on the back side of the front frame 14, and the front of the game board 13 can be viewed on the front side of the pachinko machine 10 through the glass unit 16. In the front frame 14, an upper plate 17 for storing balls is formed in a substantially box-like shape with the upper surface opened and protruding upward, and prize balls, lending balls, etc. are discharged to the upper plate 17. The bottom surface of the upper plate 17 is formed to be inclined downward to the right as viewed from the front (see FIG. 1), and the inclination causes the ball inserted into the upper plate 17 to be guided to the ball firing unit 112a. Further, a frame button 22 is provided on the upper surface of the upper plate 17. The frame button 22 is operated by the player, for example, when changing the effect pattern of the variable display displayed on the third symbol display device 81 or changing the content of the effect at the time of the reach effect.

  In addition, the front frame 14 is provided with light emitting means such as various lamps around its periphery (for example, a corner portion). These light emitting means are controlled to change the light emission mode by lighting up or flashing according to the change in the gaming state at the time of a big hit, a predetermined reach time, etc., and play a role of enhancing the rendering effect during the game. The electric decoration parts 29-33 which incorporated light emission means, such as LED, are provided in the periphery of the window part 14c. In the pachinko machine 10, these electric decoration parts 29 to 33 function as effect lamps such as a big hit lamp, and at the time of big hit or reach production etc., each electric decoration part 29 to 33 is lit by lighting and blinking of the built-in LED. Alternatively, it blinks to notify that it is in the middle of a jackpot, or that it is in reach before the jackpot.

  Further, at the upper left portion of the front surface frame 14 in a front view (see FIG. 1), a light emitting means such as an LED is incorporated and provided with a display lamp 34 capable of displaying a payout ball and an error occurrence time. A small window 35 is formed on the lower side of the right side of the electric decoration 32 so that a transparent resin is attached from the back side so that the back side of the front frame 14 can be seen. 2), and the like can be viewed from the front of the pachinko machine 10. In addition, in the pachinko machine 10, a plating member 36 made of ABS resin plated with chromium is attached to the area around the electric decoration parts 29 to 33 in order to create more refreshingness.

  Under the window portion 14c, a ball rental operation unit 40 is disposed. The rental ball operation unit 40 is provided with a frequency display unit 41, a ball rental button 42, and a return button 43. When the rental ball operation unit 40 is operated with a bill, a card, etc. being inserted into a card unit (ball lending unit) (not shown) arranged on the side of the pachinko machine 10, the ball is A loan will be made. Specifically, the frequency display unit 41 is an area in which the remaining amount information of a card or the like is displayed, and the built-in LED lights up and the remaining amount is displayed as a number as remaining amount information. The ball lending button 42 is operated to obtain a lending ball based on the information recorded in the card etc. (recording medium), and the lending ball supplies the upper plate 17 as long as the remaining amount is present in the card etc. Be done. The return button 43 is operated when it is requested to return a card or the like inserted in the card unit. In the case of a pachinko machine in which a ball is lent directly to the upper plate 17 from a ball lending device or the like without passing through a card unit, a so-called cash machine does not require the ball operating unit 40. In this case, the ball operating unit 40 is used. A decorative seal or the like may be added to the installation part of to make the part configuration common. A pachinko machine using a card unit and a cash machine can be shared.

  In the lower tray unit 15 located below the upper tray 17, a lower tray 50 for storing the balls that can not be stored in the upper tray 17 is formed in a substantially box shape whose upper surface is opened at the central portion thereof There is. On the right side of the lower plate 50, an operation handle 51 operated by a player for driving a ball into the front of the game board 13 is disposed, and driving of the ball launch unit 112a is permitted inside the operation handle 51. Sensor 51a, a push-button stop switch 51b for stopping the firing of the ball during the pressing operation, and a variable resistor for detecting the amount of rotational operation of the operation handle 51 based on a change in electric resistance (Not shown) is built in. When the operation handle 51 is turned clockwise by the player, the touch sensor is turned on and the resistance value of the variable resistor changes in accordance with the amount of operation, and the amount of rotation operation of the operation handle 51 changes. A ball is fired at a strength corresponding to the changing resistance value of the variable resistor, whereby the ball is struck to the front of the game board 13 with a flying amount corresponding to the operation of the player. Further, in a state where the operation handle 51 is not operated by the player, the touch sensor 51a and the stop switch 51b are off.

  At the front lower portion of the lower plate 50, a ball removing lever 52 for operating when discharging the balls stored in the lower plate 50 downward is provided. The ball release lever 52 is always urged in the right direction, and by sliding it in the left direction against the urging, the bottom surface opening formed on the bottom surface of the lower plate 50 is opened. A ball falls naturally from the bottom opening and is discharged. The operation of the ball release lever 52 is usually performed with a box (generally referred to as a "two-and-a-box") for receiving the ball discharged from the lower plate 50 below the lower plate 50. The operating handle 51 is disposed on the right side of the lower plate 50 as described above, and the ashtray 53 is attached on the left side of the lower plate 50.

  As shown in FIG. 2, the gaming board 13 has a wooden base plate 60 cut into a substantially square shape in a front view, a large number of nails for guiding balls, a windmill and rails 61, 62, a general winning opening 63, a first The ball entrance 64, the variable winning device 65, the variable display device unit 80 and the like are assembled, and the peripheral edge portion is attached to the back surface side of the inner frame 12. The general winning opening 63, the first ball entrance 64, the variable winning device 65, and the variable display unit 80 are disposed in through holes formed in the base plate 60 by router processing, and a wood screw from the front side of the game board 13 It is fixed by etc. The front center portion of the game board 13 can be viewed from the front side of the inner frame 13 through the window portion 14c (see FIG. 1) of the front frame 14. The configuration of the game board 13 will be described below.

  An outer rail 62 formed by bending a belt-like metal plate into a substantially arc shape is planted on the front of the game board 13, and at the inside position of the outer rail 62, a belt-like metal plate like the outer rail 62 is formed. The arc-shaped inner rail 61 formed in the above is planted. The front outer periphery of the game board 13 is surrounded by the inner rails 61 and the outer rails 62, and the front and back are surrounded by the game board 13 and the glass unit 16 (see FIG. 1). A game area in which a game is played is formed by the behavior of the game. The game area is a front surface of the game board 13 and is formed by dividing two rails 61 and 62 and the arc member 70 into a substantially circular area (a winning opening etc. is disposed, and a shot ball is (Flowing down area).

  The two rails 61 and 62 are provided to guide the ball fired from the ball launch unit 112 a to the top of the game board 13. A return ball preventing member 68 is attached to the end portion (upper left part in FIG. 2) of the inner rail 61, and the situation in which the ball guided to the upper part of the game board 13 once comes back into the ball guide passage is prevented. Be done. At the end of the outer rail 62 (the upper right part in FIG. 2), the rubber return 69 is attached to a position corresponding to the largest flying portion of the ball, and the ball fired with a predetermined momentum strikes the rubber return 69 Is bounced toward the central part while being attenuated. In addition, a resin-made arc member 70 formed by providing an arc connecting the rails on the inner surface between the lower right end of the inner rail 61 and the upper right end of the outer rail 62 is a base. It is driven in and fixed to the plate 60.

  A first symbol display device 37 provided with a plurality of LEDs 37a as light emitting means and a 7-segment display 37b is disposed on the upper right side of the game area (the upper right side in FIG. 2). The first symbol display device 37 displays information according to each control performed by the main control device 110, and mainly displays the gaming state of the pachinko machine 10. The plurality of LEDs 37a indicate whether the pachinko machine 10 is in a definite variation, a time-short or a normal, by a lighting condition, indicate whether or not it is in a variation by a lighting condition, and a symbol corresponding to a definite variation hit of the stop symbol It indicates whether or not the symbol corresponding to the normal jackpot or the off symbol is displayed by the lighting state, or indicates the number of holding balls by the lighting state. The 7-segment display device 37b displays the number of rounds in a big hit and an error display. In addition, LED37a is comprised so that the luminescent color (for example, red, green, blue) of each LED may differ, and can suggest the various game states of the pachinko machine 10 with few LED by the combination of the luminescent color. .

  It should be noted that, while the pachinko machine 10 described above is in a definite variation, the jackpot probability is increased, and it is a gaming state where it is easy to shift to a special gaming state. Furthermore, during the definite change in the present embodiment, the probability of hitting the second symbol is increased, and it is a game state in which the ball is easy to enter the first ball entrance 64. Further, the pachinko machine 10 being in a short time is a gaming state in which the ball is likely to enter the first ball entrance 64 while the jackpot probability remains the same and only the hit probability of the second symbol is increased. In addition, the pachinko machine 10 being in the middle is the state of the game which is not a definite change or a time saving (the state that neither the jackpot probability nor the hit probability of the second symbol is increased). In addition, according to the game state of the pachinko machine 10, the time when the electric role (not shown) attached to the first ball entrance 64 opens and the number of times the electric role opens per hit are changed It is good also as a thing.

  Further, in the game area, there are provided a plurality of general winning openings 63 in which five to fifteen balls are paid out as winning balls by winning balls. Further, a variable display device unit 80 is disposed in the central portion of the game area. A third symbol display device 81 configured of a liquid crystal display (hereinafter simply referred to as a “display device”) that variably displays the third symbol on the variable display device unit 80 using a prize winning on the first entrance 64 as a trigger. And a second symbol display device 82 configured of a light emitting diode (hereinafter referred to as "LED") for fluctuating display of the second symbol triggered by passage of a ball of the second entry hole 67 as a trigger. .

  The display content of the third symbol display device 81 is controlled by a display control device 114 described later, and, for example, three symbol rows of left, middle and right are displayed. Each symbol row is constituted by a plurality of symbols, and these symbols are vertically scrolled for each symbol row, and the third symbol is variably displayed on the display screen of the third symbol display device 81. Further, in the present embodiment, the third symbol display device 81 is constituted by a large liquid crystal display of 8-inch size, and the variable display unit 80 is provided with a center frame so as to surround the outer periphery of the third symbol display device 81. 86 are provided. In the third symbol display device 81 of the present embodiment, the display of the gaming state accompanied by the control of the main control device 110 is performed by the first symbol display device 37, while the display of the first symbol display device 37 The display is decorative according to the Note that, instead of the display device, for example, the third symbol display device 81 may be configured using a reel or the like.

  In addition, when the ball enters the first ball entrance 64 until the stop symbol (one of the probability hit symbol, the normal hit symbol and the detached symbol) is displayed on the first symbol display device 37 The number of times of ball entry is suspended up to four times, and the number of times of suspension is indicated by the first symbol display device 37 and also indicated by the number of lights of the suspension lamp 85. The holding lamps 85 are provided for four for the maximum holding number, and are arranged symmetrically above the third symbol display device 81. In the present embodiment, the winning at the first entry slot 64 is configured to be held up to four times at maximum, but the maximum number of times of holding is not limited to four times, and is three times or less Alternatively, it may be set to five or more times (for example, eight times). In addition, the reserve lamp 85 is deleted, and the number of times of suspension of the variable display based on the winning on the first entrance 64 is reserved in a part of the third symbol display device 81 by a number or an area divided into four. It may be displayed in an aspect (for example, color or lighting pattern) different by the number of times. Further, since the number of holding times is indicated by the first symbol display device 37, it is possible not to perform lighting display by the holding lamp 85.

  The second symbol display device 82 has the display portion 83 of the second symbol and the holding lamp 84, and as the display symbol 83 (second symbol) in the display portion 83 every time the ball passes through the second entrance hole 67. The symbol of "o" and the symbol of "x" are alternately lit to perform variable display, and the variable display is stopped at a predetermined symbol (in the present embodiment, the symbol of "o"). (1) The ball inlet 64 is configured to be activated (opened) for a predetermined time. The number of times of passage of the second ball entrance 67 is suspended up to four times, and the number of times of suspension is displayed by the above-described first symbol display device 37 and also displayed on the suspension lamp 84 as well. In addition, as the variable display of the second symbol is performed by switching on and off the plurality of lamps in the display unit 83 as in the present embodiment, the first symbol display device 37 and the third symbol display device It may be performed using a part of 81. Similarly, the hold lamp 84 may be lighted by part of the third symbol display device 81. Further, the passage of the second ball entry port 67 is not limited to four times the maximum number of times of holding, similarly to the first ball entry port 64, and is three times or less, or five times or more (for example, It may be set to 8 times). Further, since the number of holding times is indicated by the first symbol display device 37, it is possible not to perform lighting display by the holding lamp 84.

  Below the variable display unit 80, a first ball entry port 64 through which a ball can enter is disposed. When the ball enters the first entrance 64, the first entrance switch (not shown) provided on the back side of the game board 13 is turned on, and the first entrance switch is turned on. The main controller 110 draws a jackpot and the display corresponding to the result of the drawing is shown by the LED 37 a of the first symbol display device 37. In addition, the first ball entry port 64 is also one of the winning openings in which five balls are paid out as winning balls when the balls enter.

  Below the first ball entrance 64, a variable winning device 65 is disposed, and at a substantially central portion thereof, a horizontally-long rectangular specified winning opening (large opening) 65a is provided. In the pachinko machine 10, when the lottery with the main control device 110 is a big hit, the LED 37a of the first symbol display device 37 is turned on so as to be a big hit stop symbol after a predetermined time (variation time) has passed. A stop symbol corresponding to the jackpot is displayed on the third symbol display device 81, and the occurrence of the jackpot is indicated. Thereafter, the gaming state transitions to a special gaming state (big hit) in which the ball is easy to win. In this special game state, the special winning opening 65a which is normally closed is opened for a predetermined time (for example, until 30 seconds have elapsed or 10 balls have been won).

  The specific winning hole 65a is closed when a predetermined time passes, and after the closing, the specific winning hole 65a is opened again for a predetermined time. The opening and closing operation of the specific winning hole 65a can be repeated, for example, 16 times (16 rounds) at the maximum. The state in which the opening and closing operation is being performed is a form of special gaming state advantageous to the player, and the player is paid out a larger amount of prize balls than usual as the provision of the gaming value (game value). Is done.

  Specifically, the variable winning device 65 is a horizontally long rectangular opening / closing plate covering the specific winning opening 65a, and a large opening solenoid (not shown) for driving to open / close forward about the lower side of the opening / closing plate. And have. The specific winning opening 65a is normally in a closed state in which the ball can not win or is difficult to win. In the case of a big hit, the large open port solenoid is driven to tilt the opening / closing plate to the lower front side, temporarily forming an open state in which the ball is easy to win in the specified winning port 65a. Operates to repeat the state and the state alternately.

  In addition, the special gaming state is not limited to the above-mentioned form. A large opening is provided in the game area which is opened and closed separately from the specific winning opening 65a, and when the LED 37a corresponding to the big hit is lit in the first symbol display device 37, the specific winning opening 65a is opened for a predetermined time, and the specific winning A game state in which a large opening provided separately from the specific winning opening 65a is opened for a predetermined time for a predetermined number of times as a special gaming state is triggered by the ball winning into the specific winning opening 65a while the opening 65a is open. It may be formed.

  In the left and right corners of the lower side of the game board 13, adhesive spaces K1 and K2 for attaching a certificate, an identification label and the like are provided, and the certificate paper and the like affixed to the adhesive space K1 is a front frame 14 Can be viewed through the small window 35 (see FIG. 1).

  Further, the game board 13 is provided with an out port 66. A ball which has not entered any of the winning openings 63, 64, 65a is guided to an unshown ball discharge path through the out port 66. A large number of nails are implanted in the game board 13 in order to appropriately disperse and adjust the falling direction of the ball, and various members (features) such as a windmill are disposed.

  As shown in FIG. 3, control board units 90 and 91 and a back pack unit 94 are mainly provided on the back side of the pachinko machine 10. The control board unit 90 is integrated with a main board (main controller 110), an audio lamp control board (audio lamp control apparatus 113), and a display control board (display control apparatus 114). In the control board unit 91, a delivery control board (delivery control device 111), a emission control board (firing control device 112), a power supply board (power supply device 115), and a card unit connection board 116 are mounted and unitized.

  In the back pack unit 94, a back pack 92 forming a protective cover and a dispensing unit 93 are unitized. In addition, each control board is used as an MPU as a one-chip microcomputer that controls each control, a port to communicate with various devices, a random number generator used in various lottery, time counting and synchronization etc. Clock pulse generation circuits etc. are mounted as needed.

  The main control unit 110, the audio lamp control unit 113 and the display control unit 114, the payout control unit 111 and the emission control unit 112, the power supply unit 115, and the card unit connection board 116 are accommodated in the substrate boxes 100 to 104, respectively. . The substrate boxes 100 to 104 each include a box base and a box cover that covers the opening of the box base. The box base and the box cover are connected to each other to accommodate the control devices and the respective substrates.

  In addition, the substrate box 100 (main controller 110) and the substrate box 102 (dispensing controller 111 and firing controller 112) connect the box base and the box cover unsealably (sealing structure) by a sealing unit (not shown) Consolidated). Further, a seal seal (not shown) is pasted over the box base and the box cover at the connection portion between the box base and the box cover. The sealing seal is made of a brittle material, and if it is attempted to peel off the sealing seal to open the substrate box 100 or 102, or if the substrate box 100 or 102 is to be opened forcibly, the box base side and the box cover It is cut to the side. Therefore, by confirming the sealing unit or the sealing seal, it can be known whether or not the substrate box 100, 102 has been opened.

  Dispensing unit 93 is located at the top of back pack unit 94 and opens upward, tank 130, tank rail 131 connected to the lower side of tank 130 and gently inclined toward the downstream side, and downstream of tank rail 131. A case rail 132 vertically connected to the side, and a dispensing device 133 provided at the most downstream portion of the case rail 132 and dispensing balls by a predetermined electrical configuration of the dispensing motor 216 (see FIG. 5) ing. The balls supplied from the island facility of the game hall are successively replenished to the tank 130, and the required number of balls are paid out by the payout device 133 as appropriate. The tank rail 131 is attached with a vibrator 134 for applying vibration to the tank rail 131.

  In addition, the payout control device 111 is provided with the state recovery switch 120, the emission control device 112 is provided with the operation knob 121 of the variable resistor, and the power supply device 115 is provided with the RAM erase switch 122. The state recovery switch 120 is operated to eliminate the ball clogging (return to the normal state) when a dispensing error occurs, such as a ball clogging of the dispensing motor 216 (see FIG. 4) portion, for example. The operation knob 121 is operated to adjust the launch force of the launch solenoid. The RAM erase switch 122 is operated when the power is turned on in order to return the pachinko machine 10 to the initial state.

  Next, with reference to FIG. 4, an internal configuration of the pachinko machine 10 will be described. FIG. 4 is a perspective view of the pachinko machine 10 with the inner frame 12, the front frame 14 and the lower tray unit 15 opened.

  The pachinko machine 10 is provided with an outer frame 11 forming an outer shell thereof, and the inner frame 12 is supported by the outer frame 11 so as to be able to open and close. In the game arcade, the outer peripheral surface of the outer frame 11 is fixed to an installation location called an island of the game arcade. The inner frame 12, the front frame 14 and the lower tray unit 15 are configured to be openable to the front side with respect to the outer frame 11, so the back side and the inside that can not be touched from the front side of the pachinko machine 10 Inspection and adjustment are performed by opening the inner frame 12 and the like to the front side with respect to the outer frame 11.

  In order to support the inner frame 12, metal upper hinges (not shown) and lower hinges (not shown) are attached to the outer frame 11 at two upper and lower positions on the left side of the front view. The inner frame 12 is supported openably and closably with the side provided with the upper hinge and the lower hinge as an opening and closing axis.

  The inner frame 12 is mainly formed of an inner frame base 55 made of ABS resin formed in a rectangular shape, and a substantially circular central window 55 a is formed at the center of the inner frame base 55. A mounting portion for the game board 13 is provided on the back side of the inner frame base 55, and the game board 13 is detachably mounted.

  The lower side of the central window 55a of the inner frame base 55 is formed in a concave shape in which the front side is open, and a flat mounting surface 52b is formed on the back side. On the mounting surface 52b, a firing unit 140 for firing a ball to the front of the game board 13, a passage forming member 54 for forming a passage for discharging the ball to the upper plate 17 and the lower plate 50, and the like are attached.

  A switch SW1 (SW1a, SW1b) for detecting the opening and closing of the inner frame 12 is provided between the outer frame 11 and the inner frame 12, and a front surface is provided between the inner frame 12 and the front frame 14 A switch SW2 (SW2a, SW2b) for detecting the opening and closing of the frame 14 is provided. The switch SW1 includes a female switch SW1a disposed on the surface of the outer frame 11 facing the inner frame 12 and a male switch SW1b disposed on the surface of the inner frame 12 facing the outer frame 11 Ru. Further, the switch SW2 includes a female switch SW2a disposed on the surface of the inner frame 12 facing the front frame 14 and a male switch SW2b disposed on the surface of the front frame 14 facing the inner frame 12 Configured

  Here, the structures of the switch SW1 and the switch SW2 will be described with reference to FIG. Since the switch SW1 and the switch SW2 have the same structure, the structure of the switch SW1 will be described, and the description of the switch SW2 will be omitted.

  FIG. 5 is a diagram showing the structure of the switch SW1. FIG. 5A is a view showing a state (cutoff state) of the switch SW1 in a state in which the inner frame 12 is closed. FIG. 5B is a diagram showing a state (conductive state) of the switch SW1 in a state in which the inner frame 12 is opened.

  As shown in FIG. 5A, the female switch SW1a disposed on the surface of the outer frame 11 facing the inner frame 12 incorporates a pair of terminal pairs SW1c made of metal which is a conductive member. ing. When the inner frame 12 is closed, the female switch SW1a disposed on the surface of the outer frame 11 opposed to the inner frame 12 is a male switch disposed on the surface opposed to the outer frame 11 of the inner frame 12. The mold switch SW1b is inserted, and the contact between the terminal pair SW1c is prevented. Therefore, in the state where the inner frame 12 is closed, the switch SW1 is in the state where the conduction is interrupted.

  On the other hand, as shown in FIG. 5 (b), when the inner frame 12 is opened, the female switch SW1a disposed on the surface of the outer frame 11 facing the inner frame 12 The male switch SW1b disposed on the surface facing the frame 11 is pulled out. Since the terminal pair SW1c contained in the female switch SW1a has a structure in which biasing force is generated in the direction opposite to each other, the terminal pair SW1c contacts each other when the male switch SW1b is pulled out from the female switch SW1a. Do. Therefore, in the state where the inner frame 12 is opened, the switch SW1 is in the conductive state.

  As described above, the switch SW1 is in the disconnection state when the inner frame 12 is closed, and is in the conduction state when the inner frame 12 is open. However, the structure of the switch SW1 is not limited to the shape described in FIG. 5, and in the state where the inner frame 12 is closed, the switch SW1 is in the blocking state, and in the state where the inner frame 12 is open, It is sufficient if the switch SW1 is in a conductive state. The same applies to the structure of the switch SW2.

  Next, the electrical configuration of the pachinko machine 10 will be described with reference to FIG. FIG. 6 is a block diagram showing the electrical configuration of the pachinko machine 10.

  The main controller 110 is mounted with an MPU 201 as a one-chip microcomputer which is an arithmetic device. The MPU 201 is a ROM 202 storing various control programs to be executed by the MPU 201 and fixed value data, and a memory for temporarily storing various data etc. when the control program stored in the ROM 202 is executed. A certain RAM 203 and various circuits such as an interrupt circuit, a timer circuit, and a data transmission / reception circuit are incorporated. Although various commands are transmitted from the main control unit 110 to the sub control unit by the data transmission / reception circuit in order to instruct the sub control units such as the payout control unit 111 and the audio lamp control unit 113 to operate. Such command is transmitted from the main control unit 110 to the sub control unit in one direction only.

  The RAM 203 is a stack area in which the contents of the internal registers of the MPU 201 and the return address of the control program executed by the MPU 201 are stored, and a work area in which various flags, counters, values of I / O, etc. Region). The RAM 203 is configured such that a backup voltage can be supplied from the power supply device 115 even after the power of the pachinko machine 10 is shut off to hold (back up) data, and all data stored in the RAM 203 is backed up.

  When the power is shut off due to the occurrence of a power failure or the like, the stack pointer at the time of the power shutoff (including the time of the power failure, the same applies hereinafter) and the value of each register are stored in the RAM 203. On the other hand, when the power is turned on (including the power on after the power failure is eliminated, the same applies hereinafter), the state of the pachinko machine 10 is restored to the state before the power is shut off based on the information stored in the RAM 203. Writing to the RAM 203 is executed when the power is shut off by the main processing (see FIG. 12), and restoration of each value written to the RAM 203 is executed in the start-up process (see FIG. 11) when the power is turned on. The power failure signal SG1 from the power failure monitoring circuit 252 is input to the NMI terminal (non-maskable interrupt terminal) of the MPU 201 at the time of power interruption due to the occurrence of a power failure or the like. When it is input, NMI interrupt processing (see FIG. 17) as power failure processing is immediately executed.

  An input / output port 205 is connected to the MPU 201 of the main control unit 110 via a bus line 204 configured by an address bus and a data bus. The input / output port 205 includes a payout control device 111, an audio lamp control device 113, a first symbol display device 37, a second symbol display device 82, various switches 208 including switches and sensors (not shown), and specific winnings. A solenoid 209 is connected, which is a large opening solenoid for opening and closing on the front side with the lower side of the opening and closing plate of the mouth 65a as an axis, and a solenoid for driving an electric part.

  The main control unit 110 is provided with a frame open detection circuit 260 that detects the opening of the inner frame 12 when the switch SW1 conducts and detects the opening of the front frame 14 when the switch SW2 conducts. There is. Connected to the frame opening detection circuit 260 are a switch SW1 for detecting the opening of the inner frame 12, a switch SW2 for detecting the opening of the front frame 14, and an external output terminal plate 261 configured to be connectable to the hall computer 262. It is done. An input / output unit (input / output port 205 and an input / output port 205) that inputs / outputs signals for connection between switch SW1 and switch SW2 and frame open detection circuit 260 and connection between frame open detection circuit 260 and external output terminal plate 261. The connection is made via different input / output ports (not shown). When the switch SW1 conducts to detect the opening of the inner frame 12 or the switch SW2 conducts to detect the opening of the front frame 14, the frame open detection circuit 260 transmits the external output terminal plate 261 to the hall computer 262, It outputs a pulse signal with a pulse width of 10 ms. The pulse signal output from the external output terminal plate 261 is stored in the hall computer 262. Therefore, by analyzing the pulse signal stored in the hall computer 262, the opening of the inner frame 12 or the front frame 14 can be detected.

  The frame open detection circuit 260 is not connected to the MPU 201 and the input / output port 205 (input / output port of the MPU 201) of the main control apparatus 110. Therefore, the frame open detection circuit 260 may be configured to be mounted on a device (circuit board) other than the main control device 110. For example, it may be mounted on a device (circuit board) on which no arithmetic device such as MPU or CPU is mounted, or a dedicated substrate for the frame open detection circuit 260 may be provided and mounted there. Even better, like the main control unit 110, the delivery control unit 111 and the emission control unit 112, the frame opening detection circuit 260 is housed in the substrate box, and the box base and the box cover provided on the substrate box are sealed unit Unopenable connection (connection by caulking) by (not shown). Then, a sealing seal (not shown) may be attached to the connecting portion between the box base and the box cover over the box cover and the box base.

  The payout control device 111 drives the payout motor 216 to control the payout of the winning balls and the lending balls. The MPU 211, which is an arithmetic device, has a ROM 212 storing a control program to be executed by the MPU 211, fixed value data and the like, and a RAM 213 used as a work memory or the like.

  The RAM 213 of the payout control device 111 is, like the RAM 203 of the main control device 110, a stack area where the contents of the internal registers of the MPU 211 and the return address of the control program executed by the MPU 211 are stored, various flags and counters , I / O, etc. are stored in the work area (work area). The RAM 213 is configured to be able to receive a backup voltage from the power supply device 115 even after the pachinko machine 10 is turned off and to hold (back up) data, and all data stored in the RAM 213 is backed up. Similar to the MPU 201 of the main control unit 110, the NMI terminal of the MPU 211 is configured to receive the power failure signal SG1 from the power failure monitoring circuit 252 at the time of power interruption due to the occurrence of a power failure or the like. When input to the MPU 211, NMI interrupt processing (see FIG. 17) as processing upon power failure is immediately executed.

  An input / output port 215 is connected to the MPU 211 of the payout control device 111 via a bus line 214 configured by an address bus and a data bus. The main controller 110, the payout motor 216, the emission control device 112, and the like are connected to the input / output port 215, respectively. Further, although not shown, the payout control device 111 is connected with a prize ball detection switch for detecting a prize ball paid out. The prize ball detection switch is connected to the payout control device 111 but not connected to the main control device 110.

  The emission control device 112 controls the ball emission unit 112 a so that the ball launch strength according to the amount of rotational operation of the operation handle 51 is obtained when the main controller 110 instructs the ball emission. The ball launch unit 112a includes a launch solenoid and an electromagnet (not shown), and the launch solenoid and the electromagnet are permitted to be driven when predetermined conditions are met. Specifically, the touch sensor 51a detects that the player is touching the operation handle 51, and the operation stop handle 51b for stopping the firing of the ball is off (condition that it is not operated), the operation handle The firing solenoid is excited corresponding to the amount of rotation of 51, and the ball is fired with a strength corresponding to the amount of operation of the operation handle 51.

  The audio lamp control device 113 is an output of sound in an audio output device (speaker etc. not shown) 226, an output of lighting and extinguishing in a lamp display device (such as illumination parts 29 to 33 and a display lamp 34), and a display control device 114. The setting of the display mode of the third symbol display device 81 to be performed is controlled. The MPU 221, which is an arithmetic device, has a ROM 222 storing a control program executed by the MPU 221, fixed value data, and the like, and a RAM 223 used as a work memory or the like.

  An input / output port 225 is connected to the MPU 221 of the audio lamp control device 113 via a bus line 224 configured by an address bus and a data bus. The main control unit 110, the display control unit 114, the audio output unit 226, the lamp display unit 227, etc. are connected to the input / output port 225, respectively.

  The display control device 114 controls the variable display of the third symbol in the third symbol display device (LCD) 81. The display control device 114 includes an MPU 231, a ROM (program ROM) 232, a work RAM 233, a video RAM 234, a character ROM 235, an image controller 236, an input port 237, an output port 238, and bus lines 239 and 240. have. The output side of the audio lamp control device 113 is connected to the input side of the input port 237, and the MPU 231, the ROM 232, the work RAM 233, and the image controller 236 are connected to the output side of the input port 237. A video RAM 234 and a character ROM 235 are connected to the image controller 236, and an output port 238 is connected via a bus line 240. The third symbol display device 81 is connected to the output side of the output port 238. In addition, even if the pachinko machine 10 is another model in which the jackpot lottery probability and the number of prize balls to be paid out in one jackpot are different models, the model of the specification with exactly the same symbol configuration displayed on the third symbol display device 81 Since the display control device 114 is a common part, cost reduction is achieved.

  The MPU 231 of the display control device 114 controls the display content of the third symbol display device 81 based on the symbol display command input from the audio lamp control device 113. The ROM 232 is a memory for storing various control programs executed by the MPU 231 and fixed value data. The work RAM 233 is a memory for temporarily storing work data and flags used when the MPU 231 executes various programs. The character ROM 235 is a memory storing data for effect such as a symbol (a background symbol or a third symbol) displayed on the third symbol display device 81. The video RAM 234 is a memory for storing effect data to be displayed on the third symbol display device 81, and the display content of the third symbol display device 81 is changed by rewriting the content of the video RAM 234.

  The image controller 236 adjusts the timing of each of the MPU 231, the video RAM 234, and the output port 238 to intervene reading and writing of data, and reads the display data stored in the video RAM 234 at a predetermined timing to display the third symbol display device 81. It is displayed on the

  The power supply unit 115 includes a power supply unit 251 for supplying power to each part of the pachinko machine 10, a power failure monitoring circuit 252 for monitoring power interruption due to a power failure, and a RAM provided with a RAM erase switch 122 (see FIG. 3). And an erase switch circuit 253. The power supply unit 251 is a device that supplies necessary operating voltages to the control devices 110 to 114 and the like through a power supply path (not shown). As a summary, the power supply unit 251 takes in a voltage of 24 volts AC supplied from the outside, 12 volts voltage for driving various switches such as various switches 208, solenoids such as solenoid 209, motor, etc. A voltage of 5 volts for logic, a backup voltage for RAM backup, and the like are generated, and these 12 volts, 5 volts and a backup voltage are supplied to the respective control devices 110 to 114 and the like.

  The power failure monitoring circuit 252 is a circuit for outputting the power failure signal SG1 to each NMI terminal of the MPU 201 of the main control device 110 and the MPU 211 of the payout control device 111 when the power is shut off due to the occurrence of a power failure or the like. The power failure monitoring circuit 252 monitors the voltage of the stable DC voltage of 24 volts, which is the maximum voltage output from the power supply unit 251, and determines that a power failure (power loss, power loss) occurs when this voltage becomes less than 22 volts. Then, the blackout signal SG1 is outputted to the main control unit 110 and the payout control unit 111. By the output of the power failure signal SG1, the main controller 110 and the payout control device 111 recognize the occurrence of the power failure, and execute the NMI interrupt process. The power supply unit 251 outputs a 5-volt voltage, which is a driving voltage of the control system, for a time sufficient for execution of the NMI interrupt processing even after the voltage of the DC stable 24 volts becomes less than 22 volts. Is configured to maintain a normal value. Therefore, the main control unit 110 and the payout control unit 111 can execute and complete the NMI interrupt processing (see FIG. 17) normally.

  The RAM erase switch circuit 253 is a circuit for outputting a RAM erase signal SG2 for clearing the backup data to the main control unit 110 when the RAM erase switch 122 is pressed. The main control device 110 and the payout control device 111 clear the backup data and clear the backup data in the payout control device 111 when the RAM erase signal SG2 is input when the pachinko machine 10 is powered on. A payout initialization command is sent to the payout control device 111.

  Next, referring to FIG. 7, the frame open detection circuit 260 and the external output terminal plate 261 will be described. FIG. 7 is a block diagram showing an electrical configuration of the frame open detection circuit 260 and the external output terminal plate 261. As shown in FIG. In FIG. 7, the frame open detection circuit 260 will be described first, and then the external output terminal plate 261 will be described.

  A frame open detection circuit 260 for detecting the open of the inner frame 12 or the open of the front frame 14 includes a DC power supply DC1 for supplying a DC voltage of 12 volts, a diode D1, capacitors CD1 to CD5, and resistors R1 to R4. It mainly includes a timer IC1 (LMC 555 manufactured by National Semiconductor Company), which is a C-MOS timer, and a transistor TR1 provided with an internal resistor R5 and an internal resistor R6.

  In order to detect the opening of the inner frame 12 by conducting the switch SW1 and to detect the opening of the front frame 14 by conducting the switch SW2, the above-mentioned parts of the frame open detection circuit 260 are shown in FIG. Connected according to the block diagram. Since the switch SW1 and the switch SW2 are connected in parallel and connected to the frame open detection circuit 260, the frame open detection circuit 260 detects the inner frame 12 or the front frame if either switch is conductive. The release of 14 can be detected.

  The DC power supply DC1 is a power supply that supplies a DC voltage of 12 volts to the frame open detection circuit 260 and the external output terminal plate 261. Power (power supply) to the DC power supply DC1 is supplied from a power supply unit 251 provided in the power supply device 115 through a power supply path (not shown). The DC power source DC1 is connected to the anode terminal of the diode D1. The cathode terminal of the diode D1 is connected to one end of a 0.1 F (farad) capacitor CD1. The other end of the capacitor CD1 is grounded. Further, one end of the capacitor CD1 is connected to one end of the switch SW1, one end of the switch SW2, and the VDD terminal and the RES terminal of the timer IC1.

  Capacitor CD1 is charged to supply DC voltage to frame open detection circuit 260 and external output terminal plate 261 when power supply to pachinko machine 10 is shut off and DC voltage of 12 volts is not supplied from DC power supply DC1. It is a part that demonstrates the function of a battery.

  This is because when the capacitor CD1 is supplied with power to the pachinko machine 10 and a DC voltage of 12 volts is supplied from the DC power supply DC1, the capacitor 0.1F (farad) of the capacitor CD1 and the capacitor CD1 are used. The charge is stored as a product of the applied DC voltage (about 11.3 volts minus 12 volts supplied from the DC power source DC1 minus about 0.7 volts at the diode D1).

  On the other hand, for example, the capacitor CD1 is stored in the capacitor CD1 when the operation time of the game arcade is ended and the power supply to the pachinko machine 10 is cut off and the DC voltage of 12 volts is not supplied from the DC power supply DC1. A DC voltage (about 11.3 volts) based on the stored charge is supplied to the frame open detection circuit 260 and the external output terminal plate 261.

  Therefore, the frame open detection circuit 260 naturally operates when power is supplied to the pachinko machine 10 and a DC voltage of 12 volts is supplied from the DC power supply DC1, and further, for example, sales of a game arcade Even when the power supply to the pachinko machine 10 is cut off and power supply to the pachinko machine 10 is cut off and the DC voltage of 12 volts is not supplied from the DC power supply DC1, it operates by the DC voltage supplied by the capacitor CD1, The opening of the frame 12 and the opening of the front frame 14 can be detected. In the present embodiment, the capacitor CD1 is used as a component for supplying a DC voltage to the frame open detection circuit 260 and the external output terminal plate 261 when a DC voltage of 12 volts is not supplied from the DC power supply DC1. . However, the present invention is not limited to this, and the capacitor CD1 may be a secondary battery (rechargeable battery) with a higher storage capacity or a primary battery that does not need to be charged.

  Further, the cathode terminal of the diode D1 is connected to one end of the capacitor CD1, and since the diode D1 functions to prevent the backflow of current, DC to the frame open detection circuit 260 and the external output terminal plate 261 from the capacitor CD1. Even when a voltage (about 11.3 volts) is supplied, the DC voltage is not applied to the DC power supply DC1, and the DC power supply DC1 is not damaged.

  The timer IC1 is a C-MOS timer and detects the opening of the inner frame 12 or the opening of the front frame 14 by connection of the 100 kΩ resistors R1 to R2 and the 0.1 μF capacitors CD3 to CD5, and the external output terminal It functions as a circuit for energizing the photocoupler PR1 of the plate 261 for about 10 ms.

  The operating voltage range of this timer IC 1 is the MPU 201 mounted on the main control unit 110, the MPU 211 mounted on the payout control unit 111, the MPU 221 mounted on the audio lamp control unit 113, and the MPU 231 mounted on the display control unit 114. It is set wider than each operating voltage range. Specifically, while the operating voltage range of timer IC 1 is about 1.5 volts to about 12.0 volts, each operating voltage range of MPUs 201, 211, 221 and 231 is about 4.5 volts It is about 5.5 volts (note that each operating voltage in this embodiment is about 5.0 volts). Therefore, the timer IC 1 can operate at a voltage lower than the respective operating voltages of the MPUs 201, 211, 221 and 231. Accordingly, even if the charge stored in the capacitor CD1 is reduced and the voltage supplied by the capacitor CD1 drops below about 4.5 volts, the timer IC1 can operate sufficiently. Further, for example, when the operating time of the game arcade is ended and the power supply to the pachinko machine 10 is cut off and the DC voltage of 12 volts is not supplied from the DC power supply DC1, that is, DC Power is supplied to the pachinko machine 10 when a voltage is supplied, and a DC voltage of 12 volts is supplied from a DC power supply DC1. Therefore, naturally, the timer IC 1 can operate at a DC voltage of 12 volts or less supplied to the frame open detection circuit 260 when power is supplied to the pachinko machine 10. Furthermore, since the timer IC1 is a timer composed of a C-MOS semiconductor, power consumption during operation can be suppressed, and a long operation can be performed.

  The VDD terminal of the timer IC1 is a terminal for inputting the DC voltage supplied to the timer IC1, and is connected to one end of the capacitor CD1. The VDD terminal of the timer IC1 is connected to one end of a 0.1 μF capacitor CD4, and the other end of the capacitor CD4 is connected to the GND terminal of the timer IC1 which is grounded. The capacitor CD4 reduces noise generated on the VDD terminal of the timer IC1 when the switch SW1 and the switch SW2 are turned on or off (when the inner frame 12 and the front frame 14 are opened or closed). .

  The RES terminal of the timer IC1 is a terminal for operating a reset function for forcibly setting the voltage output from the OUT terminal to the output stop state (zero volt) when the pulse signal is input to the RES terminal. However, in the present frame open detection circuit 260, since this reset function is not used, the RES terminal of the timer IC1 is connected to one end of the capacitor CD1 so that the reset function does not operate. Since the VDD terminal of timer IC1 and the RES terminal of timer IC1 are connected to one end of capacitor CD1 as described above, a DC voltage of about 11.3 volts is applied to the VDD terminal and RES terminal of timer IC1. Applied.

  When the switch SW1 and the switch SW2 are shut off (when the inner frame 12 and the front frame 14 are closed), the TRG terminal of the timer IC1 outputs approximately the voltage output from the OUT terminal of the timer IC1. When the voltage is set to 10.6 volts and either switch SW1 or switch SW2, or both switch SW1 and switch SW2 are turned on (either inner frame 12 or front frame 14; Or when both the inner frame 12 and the front frame 14 are in an open state), a terminal for setting the voltage output from the OUT terminal of the timer IC 1 to about 10.6 volts to zero volts in about 10 ms. . The TRG terminal of the timer IC1 is connected to one end of the resistor R2, one end of the capacitor CD5, the other end of the switch SW1, the other end of the switch SW2, one end of the resistor R1, and one end of the resistor R7 of the external output terminal plate 261. The other end of the resistor R2 and the other end of the capacitor CD5 are grounded.

  The resistor R2 connected to the TRG terminal of the timer IC1 is a timer when the inner frame 12 and the front frame 14 are in the open state and the switch SW1 and the switch SW2 are in the conductive state (see FIG. 5B). It is a resistor for applying a DC voltage (about 11.3 volts) to the TRG terminal of IC1. Further, the capacitor CD5 is a capacitor for reducing noise generated in the resistor R2 when the switch SW1 and the switch SW2 are turned on or off (when the inner frame 12 and the front frame 14 are opened or closed). It is.

  According to the above connection, when the switch SW1 and the switch SW2 are in the cut off state (when the inner frame 12 and the front frame 14 are in the closed state), no voltage is supplied to the resistor R2 and the capacitor CD5. The applied voltage (voltage applied to the TRG terminal of the timer IC1) is zero volts. At this time, the voltage output from the OUT terminal of the timer IC1 is approximately 10.6 volts.

  On the other hand, when either switch SW1 or switch SW2 or both switch SW1 and switch SW2 are in a conducting state (either inner frame 12 or front frame 14 or both inner frame 12 and front frame 14 When in the open state, voltage is supplied to the resistor R2 and the capacitor CD5, so the voltage applied to the resistor R2 and the capacitor CD5 (voltage applied to the TRG terminal of the timer IC1) is at one end of the capacitor CD1. It will be about 11.3 volts, the same as the applied voltage. At this time, the voltage output from the OUT terminal of the timer IC1 is about 10.6 volts for about 10 ms after either the switch SW1 or the switch SW2 or both the switch SW1 and the switch SW2 become conductive. And then zero volts.

  Thus, the voltage applied to the TRG terminal of the timer IC1 can set the voltage output from the OUT terminal of the timer IC1 to either approximately 10.6 volts or zero volts. The voltage applied to the TRG terminal of the timer IC1 (voltage applied to the resistor R2) becomes zero volts to about 11.3 volts when the switch SW1 or the switch SW2 becomes conductive (the inner frame 12 or the front frame 14 is opened). As described above, the voltage of about 10.6 volts output from the OUT terminal of the timer IC1 falls to zero volts, about 10 ms later than the rise of the voltage. The time difference between the rise of the voltage applied to the TRG terminal of the timer IC1 (voltage applied to the resistor R2) and the fall of the voltage output from the OUT terminal of the timer IC1 will be described later in detail. By approximately 10 ms, current is supplied to one end of the resistor R7 of the external output terminal plate 261 for approximately 10 ms, and the photocoupler PR1 of the external output terminal plate 261 is energized for approximately 10 ms.

  When the switch SW1 and the switch SW2 are shut off (the inner frame 12 and the front frame 14 are closed) and the voltage applied to the TRG terminal of the timer IC1 becomes zero volts, the voltage of about 10.6 volts is output to the OUT terminal of the timer IC1. While the switch SW1 or the switch SW2 is turned on (the inner frame 12 or the front frame 14 is opened), and the voltage applied to the TRG terminal of the timer IC1 rises to about 11.3 volts. It is a terminal that sets a voltage of about 10.6 volts being output to zero volts with a delay of about 10 ms. The OUT terminal is connected to one end of a 10 kΩ resistor R3. The other end of the resistor R3 is connected to one end of a capacitor CD2 and one end of a 10 kΩ resistor R4, and the other end of the capacitor CD2 and the other end of the resistor R4 are grounded.

  The resistors R3 and R4 are voltage dividing resistors for dividing the voltage output from the OUT terminal of the timer IC1. Therefore, the voltage output from the OUT terminal of the timer IC1 is divided into the resistor R3 and the resistor R4 according to the ratio of the resistance value of the resistor R3 to the resistance value of the resistor R4. Since both the resistors R3 and R4 are 10 kΩ, the voltage of about 10.6 volts output from the OUT terminal of the timer IC1 is divided by the resistors R3 and R4 to a maximum value of about 5.3 volts each. Be pressed.

  A 10 μF capacitor CD2 connected in parallel to the resistor R4 is a capacitor for stabilizing the voltage applied to the resistor R4. One end of the capacitor CD2 is connected to one end of the resistor R4, and the other end of the capacitor CD2 is connected to the other end of the resistor R4 and is grounded. By stabilizing the voltage applied to the resistor R4 with the capacitor CD2, the bias voltage applied between the base terminal b of the transistor TR1 and the emitter terminal e of the transistor TR1 is stabilized, and the voltage of the transistor TR1 is reduced. The operation can be stabilized.

  The transistor TR1 is a switching element that switches between the terminal of the collector terminal c of the transistor TR1 and the terminal of the emitter terminal e of the transistor TR1 to either conduction or cutoff based on the voltage applied to the resistor R4. The transistor TR1 is provided with an internal resistor R5 of 10 kΩ. One end of the resistor R4 is connected to one end of the internal resistor R5, and a base terminal b is connected to the other end of the internal resistor R5. The transistor TR1 is provided with an internal resistor R6 of 10 kΩ. The other end of the internal resistance R5 is connected to one end of the internal resistance R6, and the emitter terminal e is connected to the other end of the internal resistance R6.

  Therefore, when a voltage of about 10.6 volts is output from the OUT terminal of timer IC 1 (when inner frame 12 and front frame 14 are closed, and inner frame 12 or front frame 14 is opened) Voltage is divided by the resistors R3 and R4 and the voltage applied to the resistor R4 (about 5.3 volts) is equal to one end of the internal resistor R5 of the transistor TR1. It is applied between it and the emitter terminal e of the transistor TR1. As a result, the terminals of the collector terminal c of the transistor TR1 and the emitter terminal e of the transistor TR1 are conducted. At this time, if switch SW1 or switch SW2 is in a conductive state (inner frame 12 or front frame 14 is open), the voltage of about 10.6 volts output from the OUT terminal of timer IC1 is switched to zero volts. That is, a current is supplied to one end of the resistor R7 of the external output terminal plate 261 for about 10 ms after the inner frame 12 or the front frame 14 is opened. If current is supplied to one end of the resistor R7, the photocoupler PR1 of the external output terminal plate 261 can be energized for about 10 ms, and a pulse signal with a pulse width of about 10 ms can be output to the hall computer 262. However, when the inner frame 12 and the front frame 14 are closed and the switch SW1 and the switch SW2 are cut off, the connection between one end of the capacitor CD1 and the resistor R7 provided on the external output terminal plate 261 is cut off. Therefore, no current is supplied to one end of the resistor R7 of the external output terminal plate 261. Therefore, the photocoupler PR1 of the external output terminal plate 261 is not energized, and a pulse signal is not output to the hall computer 262.

  On the other hand, when the voltage at the OUT terminal of the timer IC1 is zero volts (about 10 ms after the inner frame 12 or the front frame 14 is opened), no voltage is applied to the resistor R4, so the internal resistor R5 of the transistor TR1 is Also, no voltage is applied between one end of the transistor TR1 and the emitter terminal e of the transistor TR1. As a result, the terminals of the collector terminal c of the transistor TR1 and the emitter terminal e of the transistor TR1 are cut off. Therefore, even if the switch SW1 or the switch SW2 is in the conductive state (the inner frame 12 or the front frame 14 is in the open state), the current is not supplied to one end of the resistor R7 of the external output terminal plate 261. Therefore, the photocoupler PR1 of the external output terminal plate 261 is not energized, and a pulse signal is not output to the hall computer 262.

  Thus, when the inner frame 12 or the front frame 14 is in the open state, the photocoupler PR1 of the external output terminal plate 261 can be energized for only about 10 ms. Therefore, when the inner frame 12 or the front frame 14 is in the open state, it is possible to output a pulse signal having a pulse width of about 10 ms from the external output terminal plate 261 to the hall computer 262.

  The TH terminal of the timer IC1 is a terminal for measuring the voltage applied to the TH terminal, and is connected to the other end of the resistor R1, one end of the capacitor CD3, and the DCH terminal of the timer IC1. The voltage applied to the TH terminal of timer IC1 is 2/3 the voltage (about 7.5 volts) of the DC voltage (about 11.3 volts) input to the VDD terminal of timer IC1. In this case, the impedance of the DCH terminal is switched from an infinite state to a zero state. When the impedance of the DCH terminal becomes zero (ground state), a voltage can not be applied to the capacitor CD3. On the other hand, when the impedance of the DCH terminal becomes infinite, a voltage can be applied to the capacitor CD3.

  Resistor R1 and capacitor CD3 connected to the TH terminal of timer IC1 and the DCH terminal of timer IC1 open inner frame 12 or front frame 14 based on the time constant which is the product of the resistance value of resistor R1 and capacitor CD3. In this case, it is a component for determining a period until switching the voltage of about 10.6 volts output from the OUT terminal of the timer IC1 to zero volts to about 10 ms. One end of the resistor R1 is connected to the other end of the switch SW1, the other end of the switch SW2, and one end of the resistor R7 of the external output terminal plate 261. The other end of the resistor R1 is connected to the TH terminal of the timer IC1, the DCH terminal of the timer IC1, and one end of the capacitor CD3. The other end of the capacitor CD3 is grounded.

  Here, the resistor R1 and the capacitor CD3 will be described together with the TRG terminal of the timer IC1, the TH terminal of the timer IC1, the DCH terminal of the timer IC1, and the OUT terminal of the timer IC1.

  When the inner frame 12 and the front frame 14 are closed (when the switches SW1 and SW2 are off), no voltage is supplied to the resistor R1, so the voltage applied to the TH terminal of the timer IC1 is zero volts (approximately 7.5 volts). And the DCH terminal of the timer IC1 is set to an infinite impedance state. Therefore, a voltage can be applied to the capacitor CD3, and the capacitor CD3 is in a chargeable state (a state in which charge can be stored). However, when the switch SW1 and the switch SW2 are cut off, since the connection between one end of the capacitor CD1 and the resistor R1 is cut off, no voltage is applied to the capacitor CD3 and the voltage applied to the capacitor CD3 is zero volts. It becomes. As described above, although the capacitor CD3 is in the chargeable state, the charge is not performed. At this time, the voltage at the OUT terminal of the timer IC1 is about 10.6 volts, and the collector terminal c and the emitter terminal e of the transistor TR1 are conductive. However, since the switch SW1 and the switch SW2 are in the cutoff state, no current is supplied to one end of the resistor R7 of the external output terminal plate 261. Therefore, the photocoupler PR1 of the external output terminal plate 261 is not energized, and no pulse signal is output from the external output terminal plate 261 to the hall computer 262.

  Next, when the inner frame 12 or the front frame 14 is opened (see FIG. 5B) and the switch SW1 or switch SW2 is turned on, the voltage applied to the TRG terminal of the timer IC1 (resistance R7) The applied voltage switches from zero volts to about 11.3 volts. At this time, the voltage at the OUT terminal of the timer IC1 is about 10.6 volts, and the collector terminal c and the emitter terminal e of the transistor TR1 are conductive. Therefore, current supply to one end of the resistor R7 is started, and the photocoupler PR1 of the external output terminal plate 261 is energized. Thus, the signal output to the hall computer 262 is started.

  At the same time as the voltage applied to the TRG terminal of the timer IC1 (voltage applied to the resistor R7) switches from zero volts to about 11.3 volts, a voltage is applied to the capacitor CD3 to charge the capacitor CD3. It is started. At this time, the voltage applied to the TH terminal of the timer IC1 starts to rise.

  The voltage at the OUT terminal of the timer IC1 is 2 / (the voltage applied to the TH terminal of the timer IC1 (the voltage applied to the capacitor CD3) is 2 / the voltage (approximately 11.3 volts) input to the VDD terminal of the timer IC1. Continue to hold approximately 10.6 volts until it is equal to a voltage of 3 or approximately 7.5 volts. When the voltage applied to the TH terminal of the timer IC1 (voltage applied to the capacitor CD2) rises and becomes equal to about 7.5 volts, the impedance of the DCH terminal of the timer IC1 changes from an infinite state to a zero state (ground Switch to the Then, the voltage applied to the capacitor CD3 becomes zero volts, and the charge stored in the capacitor CD3 is discharged. As a result, the voltage applied to the TH terminal of the timer IC1 switches from about 7.5 volts to zero volts. By switching the voltage applied to the TH terminal of the timer IC1, the voltage at the OUT terminal of the timer IC1 switches from about 10.6 volts to zero volts. Then, the conduction between the collector terminal c and the emitter terminal e of the transistor TR1 is cut off, and the current supply to one end of the resistor R7 is stopped. As a result, the energization of the photocoupler PR1 of the external output terminal plate 261 is stopped, and the output of the signal to the hall computer 262 is stopped.

  Thus, when the inner frame 12 or the front frame 14 is in the open state and the switch SW1 or the switch SW2 is in the conductive state (see FIG. 5B), the signal is output from the OUT terminal of the timer IC1. The period until the voltage of about 10.6 volts is switched to zero volts, that is, the period until the voltage applied to the TH terminal of timer IC1 (voltage applied to capacitor CD3) changes from zero volts to about 7.5 volts The time is determined to be about 10 ms based on the time constant which is the product of the resistance value of the resistor R1 and the capacitance of the capacitor CD3. Then, when the inner frame 12 or the front frame 14 is in the open state, the supply of current to one end of the resistor R7 of the photocoupler PR1 of the external output terminal plate 261 is started. Then, about 10 ms after the start of supply of current to one end of the resistor R7, the voltage of about 10.6 volts output from the OUT terminal of the timer IC1 switches to zero volts, and the collector terminal c and the emitter terminal of the transistor TR1 The conduction with e is interrupted and the current supply to one end of the resistor R7 is stopped. Thus, when the inner frame 12 or the front frame 14 is in the open state, current is supplied to one end of the resistor R7 of the external output terminal plate 261 for about 10 ms, and the photocoupler PR1 of the external output terminal plate 261 is about 10 ms. It can be energized only during the Therefore, when the inner frame 12 or the front frame 14 is in the open state, it is possible to output a pulse signal having a pulse width of about 10 ms from the external output terminal plate 261 to the hall computer 262.

  When the inner frame 12 and the front frame 14 change from the open state to the closed state (the switch SW1 and the switch SW2 change from the conductive state to the cut off state), that is, the voltage applied to the TRG terminal of the timer IC1 (applied to the resistor R7) When the voltage (V) switches from about 11.3 volts to zero volts, the voltage at the OUT terminal of the timer IC1 switches from zero volts to about 10.6 volts. In this state, as described above, the collector terminal c and the emitter terminal e of the transistor TR1 are conductive, but since the switch SW1 and the switch SW2 are in the cut off state, one end of the resistor R7 of the external output terminal plate 261 is No current is supplied. Therefore, the photocoupler PR1 of the external output terminal plate 261 is not energized, and a pulse signal is not output from the external output terminal plate 261 to the hall computer 262.

  As described above, when the inner frame 12 or the front frame 14 is in the open state, one end of the resistor R7 of the external output terminal plate 261 is based on the time constant which is the product of the resistance value of the resistor R1 and the capacitor CD3. The current is supplied for about 10 ms, and the photocoupler PR1 of the external output terminal plate 261 can be energized for about 10 ms. As a result, when the inner frame 12 or the front frame 14 is in the open state, it is possible to output a pulse signal with a pulse width of about 10 ms from the external output terminal plate 261 to the hall computer 262.

  It returns to the explanation of FIG. The CNT terminal of the timer IC1 is a terminal that adjusts the output period of the voltage output from the OUT terminal of the timer IC1 by the signal input to the CNT terminal. However, this frame open detection circuit 260 does not adjust the output period of the voltage output from the OUT terminal of the timer IC1 (the output period of the voltage output from the OUT terminal of the timer IC1 is fixed to 10 ms). The CNT terminal is not connected to any part of the frame open detection circuit 260 and the external output terminal plate 261 and is open.

  As described above, when the inner frame 12 or the front frame 14 is in the open state and the switch SW1 or the switch SW2 is in the conductive state (see FIG. 5B), the frame open detection circuit 260 detects the external output terminal plate 261. Start supplying current to one end of the resistor R7 of On the other hand, when about 10 ms elapses after the inner frame 12 or the front frame 14 is opened, the frame open detection circuit 260 cuts off the conduction between the collector terminal c of the transistor TR1 and the emitter terminal e of the transistor TR1. Switching to the state, the current supply to one end of the resistor R7 of the external output terminal plate 261 is stopped. As a result, the photocoupler PR1 of the external output terminal plate 261 is energized for about 10 ms, and a pulse signal with a pulse width of about 10 ms is output from the external output terminal plate 261 to the hall computer 262.

  Although the door open detection circuit 260 detects the open of the inner frame 12 or the open of the front frame 14 by using the LMC 555 in the timer IC1, the circuit for energizing the photocoupler PR1 for about 10 ms is realized. It is not limited. That is, a circuit that generates a pulse signal for one opening of the inner frame 12 or one opening of the front frame 14 is realized using another integrated circuit or the like for the timer IC 1, part 1 It is sufficient if the photocoupler PR1 is energized for a predetermined period based on the pulse signal.

  Next, the external output terminal plate 261 connected to the frame open detection circuit 260 and connected to the hall computer 262 will be described. The external output terminal plate 261 has a function of outputting a pulse signal with a pulse width of about 10 ms to the hole computer 262, and is mainly configured of a 1 kΩ resistor R7 and a photocoupler PR1.

  The resistor R7 is a resistor for limiting the current supplied to the photocoupler PR1, and one end of the resistor R7 is connected to one end of the resistor R1 of the frame open detection circuit 260, the other end of the switch SW1, and the other end of the switch SW2. The other end of the resistor R7 is connected to the primary side of the photocoupler PR1 (anode terminal of the light emitting diode). The photocoupler PR1 is a current switch including a light emitting diode and a light receiving element (phototransistor) that receives light emitted by the light emitting diode. As described above, the light emitting diode on the primary side of the photocoupler PR1 has an anode terminal connected to one end of the resistor R7, and a cathode terminal connected to the collector terminal c of the transistor TR1 of the frame open detection circuit 260. A light receiving element (phototransistor) on the secondary side of the photocoupler PR1 is connected to the hole computer 262.

  Thus, for about 10 ms after the inner frame 12 or the front frame 14 is in the open state (the switch SW1 or the switch SW2 is in the conductive state), the terminal between the collector terminal c of the transistor TR1 and the emitter terminal e of the transistor TR1 is conductive Then, the light emitting diode on the primary side of the photocoupler PR1 is supplied with current through the resistor R7, and the light emitting diode emits light for about 10 ms. Then, the light receiving element (phototransistor) on the secondary side of the photocoupler PR1 receives the emitted light, converts the received light of about 10 ms into a pulse signal (electric signal) having a pulse width of about 10 ms, and The pulse signal is output to the hall computer 262. The hole computer 262 can store the pulse signal output from the light receiving element (phototransistor) on the secondary side of the photocoupler PR1. Thus, the hole computer 262 can store the fact that the inner frame 12 has been opened or the front frame 14 has been opened.

  On the other hand, when the inner frame 12 and the front frame 14 are closed (when the switch SW1 and the switch SW2 are shut off), no voltage is supplied to one end of the resistor R7, so the light emitting diode is the primary side of the photocoupler PR1. No current is supplied to the Therefore, no pulse signal is output from the light receiving element (phototransistor) on the secondary side of the photocoupler PR1 to the hole computer 262.

  Here, an advantage of using the photocoupler PR1 for the external output terminal plate 261 for outputting a pulse signal to the hall computer 262 will be described. The photocoupler PR1 converts the current supplied to the light emitting diode on the primary side into light, causes the light receiving element (phototransistor) on the secondary side to receive the light, and outputs a pulse signal (electric signal) (light emission A configuration in which a signal is transmitted in one direction from the diode to the light receiving element). Therefore, an electrical signal such as a pulse signal can not be transmitted from the light receiving element (phototransistor) on the secondary side to the light emitting diode on the primary side. As a result, the frame open detection circuit 260 is connected to the light emitting diode on the primary side of the photocoupler PR1, and the hole computer 262 is connected to the light receiving element (phototransistor) on the secondary side of the photocoupler PR1. Can not be transmitted to the main controller 110 or the like provided with the frame opening detection circuit 260 or the frame opening detection circuit 260. Therefore, by using the photocoupler PR1, while the transmission of an electrical signal such as an incorrect pulse signal from the hole computer 262 to the frame open detection circuit 260 or the main controller 110 etc. is prevented, the hole computer from the external output terminal plate 261 is used. 262 has the advantage of being able to transmit pulse signals.

  Furthermore, in the photocoupler PR1, the light emitting diode on the primary side and the light receiving element (phototransistor) on the secondary side are electrically isolated. Therefore, for example, even if the current supplied to the light emitting diode of the photocoupler PR1 includes electrical noise, the electrical noise is not transmitted to the phototransistor on the secondary side. Therefore, the use of the photocoupler PR1 has the advantage that the external output terminal plate 261 can output an accurate pulse signal to the hall computer 262.

  As described above, since the frame open detection circuit 260 is provided with the 0.1 F capacitor CD1, the frame open detection circuit 260 is supplied with power to the pachinko machine 10, and the DC power supply DC1 to 12 volts is used. When the DC voltage is supplied, it operates naturally, and further, for example, the operating time of the game arcade is finished, the power supply to the pachinko machine 10 is cut off, and the DC power source DC1 supplies a DC voltage of 12 volts from DC1. Even if not, the opening of the inner frame 12 and the opening of the front frame 14 can be detected. Then, when the opening of the inner frame 12 or the opening of the front frame 14 is detected by the frame open detection circuit 260, a pulse signal having a pulse width of about 10 ms can be output from the external output terminal plate 261 to the hall computer 262. The pulse signal output from the external output terminal plate 261 to the hall computer 262 is stored in the hall computer 262 which continues operating for 24 hours.

  Here, in general, the game arcade has a security contract with a private security company, and when there is an intruder to the game arcade, a security guard of the security company rushes to the game arcade. However, since cheating is conducted in a short time, in most cases when the security guard comes in, the intruder has already escaped from the game arcade, and it is impossible to determine which pachinko machine 10 cheating has taken place. There was a problem of that. Pachinko machine 10 for which cheating has been made must be restored to its normal state, but if it is not known which pachinko machine 10 cheating has been done, inner frame 12 and front frame 14 of all pachinko machines 10 It must be opened and inspected one by one, and performing this work in a game arcade where a large number of pachinko machines 10 are installed has been a considerable labor.

  However, according to the pachinko machine 10 of the present embodiment, when the opening of the inner frame 12 or the opening of the front frame 14 is detected by the frame opening detection circuit 260, the pulse width of about 63 seconds from the external output terminal plate 261 to the hole computer 262. Output a pulse signal of 10 ms. Then, the output pulse signal is stored in the hall computer 262. Therefore, by the pulse signal stored in the hall computer 262, it is possible to specify the pachinko machine 10 in which the inner frame 12 or the front frame 14 has been opened. Furthermore, the open time of the inner frame 12 of the specified pachinko machine 10 or the open time of the specified pachinko machine 10 is stored by storing the output time of the output pulse signal together with the output of the pulse signal from the external output terminal plate 261 to the hall computer 262. The opening time of the front frame 14 can be detected.

  For example, when the operating time of the game arcade is over and power supply to pachinko machine 10 is cut off and DC voltage is supplied from capacitor CD1 to frame open detection circuit 260 and external output terminal board 261, When the total supply period of the current from the capacitor CD1 to the photocoupler PR1 along with the opening of the frame 12 or the front frame 14 is extended or the number of times of detection of the opening of the inner frame 12 or the front frame 14 is increased The capacity of the CD1 may be increased (for example, the capacity of the capacitor CD1 may be 1 F) or the capacitor CD1 may be changed to a secondary battery with a large storage capacity.

  Next, referring to FIG. 8, the TRG terminal voltage (external output terminal plate) of timer IC1 changes according to the state of switch SW1 (the state of inner frame 12) and the state of switch SW2 (the state of front frame 14). The relationship between the voltage applied to one end of the resistor R7 261, the OUT terminal voltage of the timer IC1, and the output of the external output terminal plate 261 (input of the hall computer 262) will be described. 8 shows the state of the switch SW1 (the state of the inner frame 12), the state of the switch SW2 (the state of the front frame 14), the voltage at the TRG terminal of the timer IC1 (the voltage applied to one end of the resistor R7 of the external output terminal plate 261) ), A timing chart showing the relationship between the OUT terminal voltage of the timer IC1 and the output of the external output terminal plate 261 (input of the hall computer 262).

  As shown in FIG. 8A, when the switch SW1 becomes conductive (the inner frame 12 is opened) at t1, as shown in FIG. 8C, the TRG terminal voltage of the timer IC1 (external output terminal plate The voltage applied to one end of the resistor R7 of 261 switches from zero volt to about 11.3 volts at t1. At this time, as shown in FIG. 8D, the timer IC1 continues to output a voltage of about 10.6 volts from the OUT terminal until about 10 ms elapses from t1. Thereby, current supply is started (at t1) to the light emitting diode on the primary side of the photocoupler PR1 of the external output terminal plate 261 (see FIG. 7). Then, as shown in FIG. 8E, the output of the light receiving element (phototransistor) on the secondary side of the photocoupler PR1, that is, the output of the external output terminal plate 261 is cut from the low state to the high state at t1. It changes. As a result, output of a pulse signal indicating opening of the inner frame 12 or the front frame 14 to the hole computer 262 is started.

  Then, when about 10 ms elapses from t1, as shown in FIG. 8D, the timer IC1 switches the voltage of the OUT terminal from about 10.6 volts to zero volts. Then, the current supply to one end of the resistor R7 of the external output terminal plate 261 is stopped. Therefore, the output of the external output terminal plate 261 switches from the high state to the low state when 10 ms elapses from t1. Thus, by switching the output of the external output terminal plate 261, the pulse width of the pulse signal output from the external output terminal plate 261 to the hall computer 262 can be limited to about 10 ms.

  As shown in FIG. 8A, when the switch SW1 is in the cut off state (the inner frame 12 is in the closed state) at time t2, as shown in FIG. 8C, the TRG terminal voltage of the timer IC1 (external output The voltage applied to one end of the resistor R7 of the terminal plate 261 switches from about 11.3 volts to zero volts, and the OUT terminal voltage of the timer IC1 switches from zero volts to about 10.6 volts (at time t2). As a result, the frame open detection circuit 260 is again set to a state in which the inner frame 12 and the front frame 14 can be detected.

  Next, as shown in FIG. 8A, when the switch SW2 becomes conductive (the front frame 14 is opened) at time t3, as shown in FIG. 8C, the TRG terminal voltage of the timer IC1 (external The voltage applied to one end of the resistor R7 of the output terminal plate 261 switches from zero volt to about 11.3 volts at t3. At this time, as shown in FIG. 8D, the timer IC1 continues to output a voltage of about 10.6 volts from the OUT terminal until about 10 ms elapses from t3. Thereby, current supply is started (at t3) to the light emitting diode on the primary side of the photocoupler PR1 of the external output terminal plate 261 (see FIG. 7). Then, as shown in FIG. 8E, the output of the light receiving element (phototransistor) on the secondary side of the photocoupler PR1, that is, the output of the external output terminal plate 261 is cut from low to high at t3. It changes. As a result, output of a pulse signal indicating opening of the inner frame 12 or the front frame 14 to the hole computer 262 is started.

  Then, when about 10 ms has elapsed from t3 time, as shown in FIG. 8 (d), the timer IC1 switches the voltage of the OUT terminal from about 10.6 volts to zero volts. Then, the current supply to one end of the resistor R7 of the external output terminal plate 261 is stopped. Therefore, the output of the external output terminal plate 261 switches from the high state to the low state when 10 ms elapses from t3. Thus, by switching the output of the external output terminal plate 261, the pulse width of the pulse signal output from the external output terminal plate 261 to the hall computer 262 can be limited to about 10 ms.

  As shown in FIG. 8A, when the switch SW2 is in the closed state (the front frame 14 is closed), as shown in FIG. 8C, the TRG terminal voltage of the timer IC1 (external output terminal plate 261 The voltage applied to one end of the resistor R7 switches from about 11.3 volts to zero volts, and the OUT terminal voltage of the timer IC1 switches from zero volts to about 10.6 volts (at time t4). As a result, the frame open detection circuit 260 is again set to a state in which the inner frame 12 and the front frame 14 can be detected.

  Finally, the case where the switch SW2 is in the conductive state (the front frame 14 is in the open state) when the switch SW1 is in the conductive state (the inner frame 12 is in the open state) will be described. As shown in FIG. 8A, at time t5, the switch SW1 becomes conductive (the inner frame 12 is open), and as shown in FIG. 8B, the switch SW2 is conductive at time t6 (front surface) When the frame 14 is in the open state, as shown in FIG. 8C, the voltage at the TRG terminal of the timer IC1 (voltage applied to one end of the resistor R7 of the external output terminal plate 261) Switch to 11.3 volts. At this time, as shown in FIG. 8D, the timer IC 1 continues to output a voltage of about 10.6 volts from the OUT terminal until about 10 ms elapses from t5. Thereby, current supply is started (at t5) to the light emitting diode on the primary side of the photocoupler PR1 of the external output terminal plate 261 (see FIG. 7). Then, as shown in FIG. 8E, the output of the light receiving element (phototransistor) on the secondary side of the photocoupler PR1, that is, the output of the external output terminal plate 261 is cut from the low state to the high state at t5. It changes. As a result, output of a pulse signal indicating opening of the inner frame 12 or the front frame 14 to the hole computer 262 is started.

  Then, when about 10 ms elapses from t5, as shown in FIG. 8 (d), the timer IC1 switches the voltage of the OUT terminal from about 10.6 volts to zero volts. Then, the current supply to one end of the resistor R7 of the external output terminal plate 261 is stopped. Therefore, the output of the external output terminal plate 261 switches from the high state to the low state when 10 ms elapses from t5. Thus, by switching the output of the external output terminal plate 261, the pulse width of the pulse signal output from the external output terminal plate 261 to the hall computer 262 can be limited to about 10 ms.

  As shown in FIG. 8A, the switch SW1 is in the cut off state (the inner frame 12 is in the closed state) at t7, and the switch SW2 is in the cut off state at t8 as shown in FIG. When the front frame 14 is closed, as shown in FIG. 8C, the TRG terminal voltage of the timer IC1 (voltage applied to one end of the resistor R7 of the external output terminal plate 261) is approximately 11.3 volts. At the same time, the OUT terminal voltage of the timer IC1 switches from zero volt to about 10.6 volt (at t8). As a result, the frame open detection circuit 260 is again set to a state in which the inner frame 12 and the front frame 14 can be detected.

  As described above, even when the switch SW2 is in the conductive state (the front frame 14 is in the open state) when the switch SW1 is in the conductive state (the inner frame 12 is in the open state), the timer IC1 performs the conduction period of the switch SW1. Regardless of the length of the open period of the inner frame 12 and the length of the conductive period of the switch SW2 (the open period of the front frame 14), either one of the switch SW1 or the switch SW2 is in the conductive state When about 10 ms elapses from the time when (one of the inner frame 12 and the front frame 14 is opened), the voltage at the OUT terminal is switched from about 10.6 volts to zero volts. Thus, the supply period of the current supplied to the photocoupler PR1 of the external output terminal plate 261 is approximately 10 ms.

  Therefore, for example, when the operating time of the game arcade is ended and the power supply to the pachinko machine 10 is cut off, and the DC voltage of 12 volts is not supplied from the DC power supply DC1 to the frame open detection circuit 260 and the external output terminal board 261, That is, when the DC voltage of about 11.3 volts is supplied from the capacitor CD1 to the frame open detection circuit 260 and the external output terminal plate 261, the supply period of the current supplied from the capacitor CD1 to the photocoupler PR1 is the inner frame About 12 ms can be held for one opening of the front frame 14. Therefore, the power consumption due to the opening of the inner frame 12 or the front frame 14 can be reduced.

  Here, since the capacity of the capacitor CD1 is 0.1 F and the voltage applied to the capacitor CD1 is about 11.3 volts, the charge stored in the capacitor CD1 is the capacity of the capacitor CD1 and the voltage applied to the capacitor CD1. It becomes approximately 1.13 C (coulomb) from the product of The electric charge of about 1.13 C stored in the capacitor CD1 corresponds to about 500 times of current supply when the supply period of the current supplied from the capacitor CD1 to the photocoupler PR1 is about 10 ms. Do. Therefore, for example, when the operating time of the game arcade is ended and the power supply to the pachinko machine 10 is cut off and the DC voltage of 12 volts is not supplied from the DC power supply DC1, the inner frame 12 is opened (switch SW1 Even when the conduction or the opening of the front frame 14 (the conduction of the switch SW2) is performed many times, the frame opening detection circuit 260 opens the inner frame 12 or opens the front frame 14 (activation of the switch SW1 or The conduction of the switch SW2 can be reliably detected each time up to about 500 times, and a pulse signal can be output from the external output terminal plate 261 to the hall computer 262. At this time, when the opening of the inner frame 12 or the opening of the front frame 14 reaches about 500 times, the charge stored in the capacitor CD1 decreases and the value of the current supplied from the capacitor CD1 to the photocoupler PR1 decreases. The pulse signal can be stored in the hole computer 262 by increasing the detection sensitivity of the pulse signal of the computer 262 (by lowering the threshold for the amplitude of the pulse signal).

  In the present embodiment, when the inner frame 12 or the front frame 14 is opened and the switch SW1 or the switch SW2 is conductive, a pulse signal is output from the external output terminal plate 261 to the hall computer 262, It is not limited to this. That is, when the connection of each part of the main frame opening detection circuit 260 is changed, the inner frame 12 or the front frame 14 is opened, and the opened inner frame 12 or the front frame 14 is closed, A current may be supplied for about 10 ms to output a pulse signal from the external output terminal plate 261 to the hall computer 262.

  However, in the frame open detection circuit 260 of this embodiment, when the inner frame 12 or the front frame 14 is open and the switch SW1 or the switch SW2 is conductive, a pulse signal from the external output terminal plate 261 to the hall computer 262 Can be detected quickly, so that the opening of the inner frame 12 or the front frame 14 can be detected quickly. Thus, the opening of the inner frame 12 or the front frame 14 can be detected before the inner frame 12 or the front frame 14 is opened and the main control device 110 or the game board 13 is tampered with. Therefore, it is possible to prevent an abnormal operation due to the fraudulent action that occurs when the power is supplied to the pachinko machine 10.

  The pulse signal output from the external output terminal plate 261 to the hall computer 262 is stored in the hall computer 262 which continues operating for 24 hours. Therefore, by the pulse signal stored in the hall computer 262, it is possible to specify the pachinko machine 10 in which the inner frame 12 or the front frame 14 has been opened. Furthermore, the open time of the inner frame 12 of the specified pachinko machine 10 or the open time of the specified pachinko machine 10 is stored by storing the output time of the output pulse signal together with the output of the pulse signal from the external output terminal plate 261 to the hall computer 262. The opening time of the front frame 14 can be detected.

  Further, when the inner frame 12 and the front frame 14 are closed (when the switch SW1 and the switch SW2 are shut off), the OUT terminal voltage of the timer IC 1 is about 10.6 volts, so the frame open detection circuit 260 The terminals of the collector terminal c of the transistor TR1 and the emitter terminal e (see FIG. 7) of the transistor TR1 become conductive. However, at this time, the current flowing through the transistor TR1 is only the base current. The resistors R3 and R5 which determine the current value of the base current both have a resistance value of 10 kΩ, which is sufficiently larger than the resistance value (1 kΩ) of the resistor R7 which limits the current supplied to the photocoupler PR1. Therefore, the current value of the base current can be limited to about 100 μA (note that when the switch SW1 and the switch SW2 are conducted, the current value supplied to the photocoupler PR1 is about 11.3 mA). Therefore, the consumption of the charge stored in the capacitor CD1 due to the conduction state of the transistor TR1 can be stopped only slightly.

  Also, when the inner frame 12 and the front frame 14 are closed (when the switch SW1 and the switch SW2 are shut off), the OUT terminal voltage of the timer IC1 is about 10.6 volts, so the OUT terminal of the timer IC1 is The current is consumed via the resistors R3 and R4 connected in series between Q and ground. However, both of the resistors R3 and R4 have a resistance value of 10 kΩ, which is sufficiently larger than the resistance value (1 kΩ) of the resistor R7 that limits the current supplied to the photocoupler PR1. Therefore, when the inner frame 12 and the front frame 14 are closed, the value of the current flowing from the OUT terminal of the timer IC 1 to the ground can be limited to about 530 μA through the resistors R3 and R4. Therefore, consumption of the charge stored in the capacitor CD1 by the resistors R3 and R4 can be stopped only slightly.

  When inner frame 12 and front frame 14 are closed (when switch SW1 and switch SW2 are cut off), consumption of charge stored in capacitor CD1 by the base current of transistor TR1 and resistance R3 and If it is desired to further suppress the consumption of the charge stored in the capacitor CD1 by the resistor R4, the resistance values of the resistors R3, R4 and R5 may be made larger than 10 kΩ.

  Furthermore, when the inner frame 12 and the front frame 14 are closed and the switch SW1 and the switch SW2 are shut off, consumption of the charge stored in the capacitor CD1 by the base current of the transistor TR1 and the capacitor CD1 by the resistor R3 and the resistor R4 If it is desired to make the consumption of the charge stored in the memory be zero, the following configuration may be adopted. A male switch SW1b and a male switch SW2b are further provided in the switch SW1 and the switch SW2, respectively, and two male switches SW1b and two male switches SW2b disposed in the switch SW1 and the switch SW2, respectively. Corresponding to this, the female switch SW1a and the female switch SW2a are further provided in the switch SW1 and the switch SW2, respectively, and the female switch SW1a and the female switch SW2a disposed in the switch SW1 and the switch SW2 are respectively Do each one. Thereby, one new combination of the male switch SW1b and the female switch SW1a is added to the switch SW1. Similarly to the switch SW1, the combination of the male switch SW2b and the female switch SW2a is newly added to the switch SW2. Then, the connection between the OUT terminal of the timer IC1 in the frame open detection circuit 260 and one end of the resistor R3 is cut off, and is incorporated in the newly added female switch SW1a to the OUT terminal of the timer IC1 after the connection cut. One end of a pair of terminal pairs SW1c is connected. Then, the other end of the pair of terminals SW1c incorporated in the newly added female switch SW1a is connected to one end of the resistor R3 after disconnection. Similarly, one end of a pair of terminal pairs SW2c built in the newly added female switch SW2a is connected to the OUT terminal of the timer IC1 after disconnection. Then, the other end of the pair of terminals SW2c incorporated in the newly added female switch SW2a is connected to one end of the resistor R3 after disconnection. With this configuration, when the inner frame 12 and the front frame 14 are closed and the switch SW1 and the switch SW2 are shut off, the resistance R3 is approximately 10.6 volts which is the OUT terminal voltage of the timer IC1. The consumption of the charge stored in the capacitor CD1 by the base current of the transistor TR1 and the consumption of the charge stored in the capacitor CD1 by the resistor R4 by the base current of the transistor TR1 are zeroed without being applied to the resistors R4 and R5 it can. On the contrary, when one of the inner frame 12 or the front frame 14 or both the inner frame 12 and the front frame 14 is open (one of the switch SW1 or the switch SW2, or both the switch SW1 and the switch SW2 Of the timer IC1 is divided and applied to the resistor R3, the resistor R4, the resistor R5, the resistor R6, and the capacitor CD2 to supply the current to the photocoupler PR1. It can be done normally via resistor R7.

  The place where the connection with the OUT terminal of the timer IC1 is disconnected and the connection between the terminal pair SW1c and the terminal pair SW2c is not limited to the above. For example, the other end of the resistor R3 is disconnected from the other end of the resistor R4, the resistor R5, and one end of the capacitor CD2, and the pair is incorporated in the newly added female switch SW1a at the other end of the resistor R3 after disconnection. One end of the terminal pair SW1c of Then, the other end of the pair of terminals SW1c incorporated in the newly added female switch SW1a is connected to one end of the resistor R4, the resistor R5 and the capacitor CD2 after disconnection. Similarly, one end of a pair of terminal pairs SW2c built in the newly added female switch SW2a is connected to the other end of the resistor R3 after disconnection. Then, the other end of the pair of terminal pair SW2c built in the newly added female switch SW2a may be connected to one end of the resistor R4, the resistor R5 and the capacitor CD2 after disconnection. That is, when the inner frame 12 and the front frame 14 are closed by the newly added male switch SW1b and female switch SW1a and the newly added male switch SW2b and female switch SW2a, (When the switch SW1 and the switch SW2 are cut off), the conduction between the OUT terminal of the timer IC1 and the ground is cut off, and either the inner frame 12 or the front frame 14 or the inner frame 12 and the front frame 14 Resistor R3, resistor R4, resistor R5, resistor R6 and resistor R6 if both of them are open (if either switch SW1 or switch SW2 or both switch SW1 and switch SW2 are conducting). The voltage at the OUT terminal of the timer IC1 may be divided and applied to the capacitor CD2

  When it is desired to separately store in the hole computer 262 which one of the inner frame 12 and the front frame 14 is opened, the following configuration may be employed. First, one frame opening detection circuit 260 and one external output terminal plate 261 used in this embodiment are newly provided, the switch SW2 connected in parallel to the switch SW1 is disconnected, and the disconnected switch SW2 is newly added. It may be connected to the provided frame open detection circuit 260. Specifically, one end of the disconnected switch SW2 is connected to one end of the capacitor CD1 of the newly provided frame open detection circuit 260, the VDD terminal of the timer IC1, one end of the capacitor CD4, and the RES terminal of the timer IC1 and disconnected. The other end of the switch SW2 may be connected to one end of the capacitor CD5 of the newly provided frame open detection circuit 260, one end of the resistor R1, and one end of the resistor R7 of the external output terminal board 261. Thus, the frame open detection circuit 260 and the external output terminal plate 261 are newly provided, and only the switch SW2 is connected to the newly provided frame open detection circuit 260, and the existing frame open detection circuit 260 is a switch. By connecting only SW1, when the switch SW1 is conductive (the inner frame 12 is open), the pulse signal output from the existing external output terminal plate 261 and the switch SW2 are conductive (the front frame 14 is open) And the pulse signal output from the newly provided external output terminal plate 261 can be separately output to the hall computer 262. Here, the hall computer 262 has an input terminal for a pulse signal output from the existing external output terminal plate 261 (for detecting the continuity of the switch SW1 (for detecting the opening of the inner frame 12)) and an external output terminal newly provided. The input terminal of the pulse signal output from the plate 261 (for detecting the continuity of the switch SW2 (for detecting the opening of the front frame 14)) and the input terminal of the pulse signal are separately set. According to this configuration, conduction of the switch SW1 (opening of the inner frame 12) and conduction of the switch SW2 (opening of the front frame 14) can be distinguished and stored in the hall computer 262. Therefore, according to the pulse signal stored in the hall computer 262, there is conduction of the switch SW1 (opening of the inner frame 12), conduction of the switch SW2 (opening of the front frame 14), or both. Can accurately detect the

  Furthermore, when power is supplied to the pachinko machine 10, which one of the inner frame 12 and the front frame 14 is opened is stored separately in the hall computer 262, and the inner frame 12 and the front frame 14 If it is desired to notify the pachinko machine 10 when either one is open, the following configuration may be adopted. First, one frame opening detection circuit 260 and one external output terminal plate 261 used in this embodiment are newly provided, the switch SW2 connected in parallel to the switch SW1 is disconnected, and the disconnected switch SW2 is newly added. It connects to the provided frame open detection circuit 260. Next, male switches SW1b and SW2b and female switches SW1a and SW2a are respectively newly provided in the switch SW1 and the switch SW2. Then, when the inner frame 12 or the front frame 14 is opened and the switch SW1 or the switch SW2 is turned on by using the newly provided male switch SW1 b, SW2 b and the female switch SW1 a, SW2 a, a signal is sent to the MPU 201. It may be configured to be input.

  Specifically, one end of the disconnected switch SW2 is connected to one end of the capacitor CD1 of the newly provided frame open detection circuit 260, the VDD terminal of the timer IC1, one end of the capacitor CD4, and the RES terminal of the timer IC1 and disconnected. The other end of the switch SW2 may be connected to one end of the capacitor CD5 of the newly provided frame open detection circuit 260, one end of the resistor R1, and one end of the resistor R7 of the external output terminal board 261. Thus, the frame open detection circuit 260 and the external output terminal plate 261 are newly provided, and only the switch SW2 is connected to the newly provided frame open detection circuit 260, and the existing frame open detection circuit 260 is a switch. By connecting only SW1, when the switch SW1 is conductive (the inner frame 12 is open), the pulse signal output from the existing external output terminal plate 261 and the switch SW2 are conductive (the front frame 14 is open) And the pulse signal output from the newly provided external output terminal plate 261 can be separately output to the hall computer 262.

  Next, a male switch SW1b and a male switch SW2b are further provided in the switch SW1 and the switch SW2, respectively, and two male switches SW1b and two male switches SW2b disposed in the switch SW1 and the switch SW2, respectively. Do. Corresponding to this, the female switch SW1a and the female switch SW2a are further provided in the switch SW1 and the switch SW2, respectively, and the female switch SW1a and the female switch SW2a disposed in the switch SW1 and the switch SW2 are respectively Do each one. Thus, one combination of the male switch SW1b and the female switch SW1a is newly added to the switch SW1. Further, similarly to the switch SW1, one combination of the male switch SW2b and the female switch SW2a is newly added to the switch SW2. Then, one end of a pair of terminal pair SW1c built in the newly added female switch SW1a is connected to the DC power supply DC1 of the existing frame open detection circuit 260 and built in the newly added female switch SW1a The other end of the pair of terminals SW1c is connected to the input / output port 205 of the MPU 201 via a voltage dividing circuit configured by a resistor. Similarly, one end of a pair of terminal pair SW2c incorporated in the newly added female switch SW2a is connected to the DC power source DC1 of the newly provided frame open detection circuit 260, and the newly added female type The other end of the pair of terminal pair SW2c built in the switch SW2a is connected to the input / output port 205 of the MPU 201 via a voltage dividing circuit configured by a resistor, and a port different from the other end of the terminal pair SW1c. Furthermore, in the MPU 201, the inner frame 12 or the front frame 14 is opened, the switch SW1 or the switch SW2 is conducted, and a voltage of 5 volts (supplied from the DC power source DC1 by the voltage dividing circuit) to detect opening of the inner frame 12. Voltage is reduced to 5 volts) or 5 volts to detect the opening of the inner frame 14 (the voltage dividing circuit reduces the voltage of 12 volts supplied from the DC power supply DC1 to 5 volts) ) Is input to the input / output port 205, a command indicating that the opening of the inner frame 12 or the front frame 14 has been detected is transmitted to the audio lamp control device 113 or the display control device 114. At this time, the command transmitted from the MPU 201 is a command when the release of the inner frame 12 is detected (hereinafter referred to as “inner frame command”) and a command when the front frame 14 is released (hereinafter “the command Separate with the front frame command. Then, the voice lamp control device 113 that has received each command performs notification in different modes depending on when the inner frame command is received and when the front frame command is received. For example, a different warning sound may be emitted from the audio output device 226, or the lighting mode of the lamp display device 227 may be made different. In addition, the display control device 114 that has received each of these commands performs display in different modes depending on when the inner frame command is received and when the front frame command is received. For example, when the display control device 114 receives the inner frame command, the third symbol display device 81 displays "The inner frame is open" or the display control device 114 receives the front frame command. In order to display the third symbol display device 81, "the front frame is open" may be displayed.

  Thus, one combination of male switch SW1b and female switch SW1a is newly added to switch SW1, and the combination of male switch SW2b and female switch SW2a is newly added to switch SW2 as well as switch SW1. If one of the switches SW1 is turned on (when the inner frame 12 is opened), the MPU 201 sends an inner frame command to the audio lamp control device 113 or the display control device 114. Configure to send. Further, when the switch SW2 is turned on (when the front frame 14 is opened), the MPU 201 is configured to transmit a front frame command to the audio lamp control device 113 or the display control device 114. By configuring in this manner, notification of different modes is performed using the voice lamp control device 113 or the display control device 114 when the inner frame 12 is opened and when the front frame 14 is opened. Can. Thereby, using the pachinko machine 10, it is accurately determined whether the switch SW1 has been turned on (the opening of the inner frame 12), the switch SW2 has been turned on (the opening of the front frame 14), or both. Can be detected.

  Further, a frame opening detection circuit 260 and an external output terminal plate 261 are newly provided, and only the switch SW2 is connected to the newly provided frame opening detection circuit 260, and the existing frame opening detection circuit 260 is a switch SW1. The pulse signal output from the existing external output terminal plate 261 and the conduction of the switch SW2 (the opening of the front frame 14) when there is the conduction of the switch SW1 (the opening of the inner frame 12). When there is a problem, the pulse signal output from the newly provided external output terminal plate 261 can be separately output to the hall computer 262. Therefore, according to the pulse signal stored in the hall computer 262, there is conduction of the switch SW1 (opening of the inner frame 12), conduction of the switch SW2 (opening of the front frame 14), or both. Can accurately detect the

  In the present embodiment, the pulse signal output from the external output terminal plate 261 is output to the hall computer 262 where the installation place is different from that of the pachinko machine 10, but the present invention is not limited to this. A dedicated storage device having the function of the hall computer 262 may be provided for each pachinko machine 10, and the dedicated storage device may be provided on the back side of each pachinko machine 10 provided with the main control device 110 and the like. In this case, more specifically, a dedicated storage device such as the main control unit 110, the payout control unit 111 and the emission control unit 112 is housed in the substrate box, and the box base and the box cover provided on the substrate box And unsealably connected by a sealing unit (not shown) (connection by caulking structure). Then, a seal seal (not shown) is attached to the connection portion between the box base and the box cover over the box cover and the box base.

  Next, the display contents of the third symbol display device 81 will be described with reference to FIG. FIG. 9 is a drawing for explaining the display screen of the third symbol display device 81, and FIG. 9 (a) is a view schematically showing area division setting and effective line setting of the display screen, FIG. 9B is a diagram illustrating an actual display screen.

  The third pattern is composed of ten types of main designs with numbers “0” to “9” and one type of sub-patterns of petal shape formed smaller than the main designs. Each main symbol is configured by attaching numbers from "0" to "9" on the rear symbol consisting of a wooden box, and the main symbol with an odd number (1, 3, 5, 7, 9) is The front of the wooden box is almost fully filled with large numbers. On the other hand, the main design with an even number (0, 2, 4, 6, 8) protects almost the front of the wooden box almost completely, and additional patterns imitating characters such as bath cloth and helmet are added. An even number is small in green on the lower right side of the attached symbol and is added so as to be displayed on the front side of the attached symbol.

  Further, in the pachinko machine 10 of the present embodiment, when the lottery result by the main control unit 110 is a big hit, a variation display in which the same main symbol is aligned is performed, and a big hit occurs after the variation display is finished. It is configured to In the case of shifting to a high probability state (probability state) after the end of the jackpot, variable display is performed in which the main symbols (corresponding to “high probability symbols”) to which odd numbers are added are aligned. On the other hand, when transitioning to the low probability state after the big hit ends, the variable display in which the main symbols (corresponding to the "low probability symbols") to which the even number is added is aligned is performed. Here, the high probability state refers to a state in which the subsequent jackpot probability is increased as added value after the end of the jackpot, that is, the time of so-called probability fluctuation (probability variation). Further, the normal state (low probability state) refers to a time when the probability change is not positive, and refers to a state where the jackpot probability is normal, that is, a state where the jackpot probability is lower than that of the probability change.

  As shown in FIG. 9A, the display screen of the third symbol display device 81 is largely divided into two vertically, and the lower 2/3 is a main display area Dm in which the third symbol is variably displayed, and others The upper 1/3 of the sub-display area Ds is for displaying a notice effect or a character.

  In the main display area Dm, three left, middle, and right symbol rows Z1, Z2, and Z3 are displayed. In each of the symbol rows Z1 to Z3, the above-described third symbol is displayed in a prescribed order. That is, in each of the symbol rows Z1 to Z3, the main symbols are arranged in ascending or descending order of the numbers, and one sub symbol is arranged between the respective main symbols. Therefore, a total of 20 third symbols of 10 main symbols and 10 sub-symbols are set in each symbol row, and scroll from top to bottom with periodicity for each symbol row Z1 to Z3. Variable display is performed. In particular, the numbers of the main symbols are arranged in descending order in the left symbol row Z1, and the numbers of the main symbols are arranged in ascending order in the middle symbol row Z2 and the right symbol row Z3.

  Further, in the main display area Dm, the third symbol is displayed on the upper, middle, and lower three stages for each symbol row Z1 to Z3. Therefore, a total of nine third symbols in three rows and three columns are displayed on the third symbol display device 81. In the main display area Dm, five effective lines, that is, an upper line L1, a middle line L2, a lower line L3, an upper right line L4, and an upper left line L5 are set. Then, at each game, the variation display is stopped in the order of left symbol row Z1 → right symbol row Z3 → middle symbol row Z2, and a combination of big hit symbols on any effective line at the time of the stop (in this embodiment, If it is aligned with the same combination of the main symbols, the jackpot animation is displayed as a jackpot.

  The sub display area Ds is provided horizontally above the main display area Dm, and is equally divided into three notice areas Ds1 to Ds3 in the left-right direction. Here, the left and right notice areas Ds1 and Ds3 are usually covered with a double-opening opaque door electrically opened and closed by a solenoid (not shown), and sometimes the solenoid is excited and the door is on the near side. By being opened, the display area becomes visible to the player. The central notice area Ds2 is a display area that is always visible without being covered by the door.

  As shown in FIG. 9B, on the actual display screen, a total of nine main symbols and sub-symbols of the third symbol are displayed in the main display area Dm. In the sub display area Ds, the left and right doors are closed, and the left and right notice areas Ds1 and Ds3 are covered and the display screen can not be viewed. When one or both of the left and right doors are opened in the middle of the variable display, a moving image is displayed in the left and right notice areas Ds1 and Ds3 and the player is more likely to transition to the jackpot than usual It is suggested. In the central notice area Ds2, normally, a predetermined character (a boy with a hachimaki in this embodiment) performs a predetermined movement, sometimes performs a special movement other than the predetermined movement, or another character An announcement effect is performed by making it appear. Although the display screen of the third symbol display device 81 is divided into upper and lower display areas Dm and Ds in principle, the third symbol and characters etc. are displayed more largely across the display areas Dm and Ds. Display effects can be performed.

  Next, with reference to FIG. 10, a counter and the like provided in the RAM 203 of the main control device 110 will be described. These counters and the like are used by the MPU 201 of the main control device 110 in order to perform a jackpot lottery, setting of display of the first symbol display device 37, lottery of display results of the second symbol display device 82, and the like.

  For the setting of the display of the big hit lottery and the first symbol display device 37, the first hit random number counter C1 used for the big hit lottery, the first hit type symbol counter C2 used for selecting the big hit symbol, and the stop pattern selection counter C3, a first initial value random number counter CINI1 used to set the initial value of the first random number counter C1, and fluctuation type counters CS1, CS2, and CS3 used for fluctuation pattern selection are used. The second random number counter C4 is used for lottery of the second symbol display device 82, and the second initial value random number counter CINI2 is used for setting the initial value of the second random number counter C4. Each of these counters is a loop counter in which 1 is added to the previous value each time updating is performed, and the value returns to 0 after reaching the maximum value.

  Each counter is updated at an interval of 4 ms which is an execution interval of the main processing (see FIG. 12) or at an interval of 2 ms which is an execution interval of the timer interrupt process It is suitably stored in the counter buffer for The RAM 203 is provided with a storage ball storage area consisting of one execution area and four storage areas (storage first to fourth areas), and each of these areas is connected to the first entrance 64. The values of the first random number counter C1, the first collision type counter C2 and the stop pattern selection counter C3 are respectively stored according to the winning timing of the ball.

  Each counter will be described in detail. For example, the first random number counter C1 is sequentially incremented by one within the range of 0 to 738, and returns to 0 after reaching the maximum value (that is, 738). In particular, when the first random number counter C1 makes one revolution, the value of the first initial value random number counter CINI1 at that time is read as the initial value of the first random number counter C1. Further, the first initial value random number counter CINI1 is configured as a loop counter updated in the same range as the first random number counter C1 (value = 0 to 738), and each time timer interrupt processing (see FIG. 15) is executed. It is updated once and repeatedly updated within the remaining time of the main processing (see FIG. 12). The value of the first random number counter C1 is, for example, periodically (in the present embodiment, updated once in each timer interrupt processing), and the holding ball is stored in the RAM 203 at the timing when the ball wins the first entrance 64. It is stored in the area. There are two types of jackpot random number values for low probability and high probability, and the number of jackpot random numbers at low probability is 2 and the value is “373, 727”. The number of random numbers that will be jackpots when there is a high probability is 14, and the values are "59, 109, 163, 211, 263, 317, 367, 421, 479, 523, 631, 683, 733".

  The first hit type counter C2 determines the display mode of the first symbol display device 37 in the case of a big hit, and in the present embodiment, 1 is sequentially added within the range of 0 to 4, and the maximum value (maximum value ( In other words, it is configured to return to 0 after reaching 4). The value of the first hit type counter C2 is, for example, periodically (in the present embodiment, updated once in each timer interrupt processing), the holding ball storage of the RAM 203 at the timing when the ball wins the first entrance 64 It is stored in the area. In addition, the value of the random number that is in the high probability state after the big hit is "1, 2, 3", the value of the random number that is in the low probability state after the big hit is "0, 4", and two types of hit types are determined Ru. Therefore, the display mode corresponding to the stop symbol displayed on the first symbol display device 37 is a display mode corresponding to two types of jackpots of the high probability state and the low probability state, and one type of display mode corresponding to the off One of the three display modes in total is selected.

  The stop pattern selection counter C3 is configured to be sequentially incremented by one within the range of 0 to 238, for example, and return to 0 after reaching the maximum value (i.e., 238). In the present embodiment, the pattern of the effect displayed on the third symbol display device 81 is selected by the stop pattern selection counter C3, and after the reach is generated, the final stop symbol is shifted by only one before and after the reach symbol. With "stop before and after out of reach" (for example, in the range of 0 to 8), and with the same reach, the final stop design stops at other than before and after reach with "reach other than out of back and forth" (for example, in the range of 9 to 38) Three stop (rendering) patterns are selected: “complete out” (for example, a range of 39 to 238) in which the reach does not occur. The value of the stop pattern selection counter C3 is, for example, periodically updated (once in each timer interrupt processing in the present embodiment), and the holding ball storage area of the RAM 203 at the timing when the ball wins the first entrance 64. Stored in

  The stop pattern selection counter C3 is provided with a plurality of tables having different ranges of random numbers for which a stop pattern is selected. This depends on whether the current state of the pachinko machine 10 is in the high probability state or in the low probability state, or in which area of the holding ball storage area each random number value is stored (ie, the number of holdings), etc. This is to change the selection ratio of the stop pattern.

  For example, in a high probability state, a table with a wide range of random values from 10 to 238 corresponding to the stop pattern of "completely out" is selected, so that reach effects are not selected more than necessary because jackpots are easily generated. It becomes easy to be selected as "complete removal". In this table, "longitudinal outreach" narrows to 0 to 5 and "non back and forth out of reach" also narrows to 6 to 9, making it difficult to select "back and forth out of reach" and "reach other than back and forth". In addition, if each random number value is not stored in the holding ball storage area in the low probability state, the disturbance corresponding to the “perfectly out” stopping pattern in order to secure the ball entering time to the first entrance 64 A table with a narrow numerical value range of 51 to 238 is selected, and it becomes difficult to select "complete out". In this table, the range of random number values corresponding to the stop pattern of "reach other than back and forth deviation" is as wide as 9 to 50, and "reach other than back and forth deviation" is easily selected. Therefore, in the low probability state, since the ball entering time of the ball to the first ball entrance 64 can be secured, the fluctuation display by the third symbol display device 81 can be easily continued.

  Of the two variation type counters CS1 and CS2, one variation type counter CS1 is sequentially incremented by one within the range of 0 to 198, for example, and returns to 0 after reaching the maximum value (that is, 198). The other variation type counter CS2 is configured to be sequentially incremented by one within a range of 0 to 240, for example, and returned to 0 after reaching the maximum value (i.e., 240). In the following description, CS1 is also referred to as "first variation type counter" and CS2 is also referred to as "second variation type counter".

  A rough display mode such as so-called normal reach, super reach, premium reach, etc. is determined by the first variation type counter CS1. Specifically, the determination of the display mode is the determination of the variation time of the symbol variation. Further, the second fluctuation type counter CS2 determines a fluctuation time (in other words, the number of fluctuation symbols) until the final stop symbol (in the present embodiment, the middle symbol) stops after the reach occurrence. Based on the fluctuation time determined by the fluctuation type counters CS1 and CS2, the display control device 114 determines the reach type and the fine symbol fluctuation mode of the third symbol displayed on the third display device 81. Therefore, by combining these fluctuation type counters CS1 and CS2, various diversification of fluctuation patterns can be easily realized. Further, it is also possible to determine the symbol variation mode only by the first variation type counter CS1, or to determine the symbol variation mode similarly by the combination of the first variation type counter CS1 and the stop symbol. The values of the variation type counters CS1 and CS2 are updated once each time the main process (see FIG. 12) to be described later is executed once, and are repeatedly updated even within the remaining time in the main process.

  For example, the value of the fluctuation type counter CS3 is sequentially incremented by one within the range of 0 to 162, and returns to 0 after reaching the maximum value (that is, 162). In the following description, CS3 is also referred to as a "third variation type counter". The third symbol display device 81 of the present embodiment performs decorative effects according to the display mode of the first symbol display device 37, and in addition to the variation of the symbols, it is possible to slide the changing symbols A notice effect such as passing a notice character for giving notice of occurrence of reach effect is performed. The effect pattern of the advance effect is selected by the fluctuation type counter CS3. Specifically, the time required for the advance notice effect is added to the fluctuation time, and on the other hand, the fluctuation time is subtracted to shorten the time in which the fluctuation display is performed, and the effect pattern not to add or subtract the fluctuation time is selected . As in the case of the stop pattern selection counter C3, the fluctuation type counter CS3 is provided with a plurality of tables having different ranges of random numbers for which the effect pattern is selected, and is the current state of the pachinko machine 10 high probability state? The selection ratio of each effect pattern is configured to be different depending on whether it is in the low probability state or in which area of the holding ball storage area each random number value is stored.

  As described above, the fluctuation time of the symbol fluctuation is determined by the fluctuation type counters CS1 and CS2, and the time to be added / subtracted to / from the fluctuation time is determined by the fluctuation type counter CS3. Therefore, the final change time until the final stop symbol stops is determined by the change type counters CS1, CS2, and CS3.

  The second random number counter C4 is configured, for example, as a loop counter that is sequentially incremented by one within the range of 0 to 250, and returns to 0 after reaching the maximum value (that is, 250). In the present embodiment, the value of the second random number counter C4 is updated, for example, periodically at each timer interrupt processing, and the ball passes either the left or right second entrance (through gate) 67. It is acquired when it is detected. The number of random numbers to be won is 149, and the range is “5 to 153”. The second initial value random number counter CINI2 is configured as a loop counter that is updated in the same range as the second random number counter C4 (value = 0 to 250), and is once for each timer interrupt process (see FIG. 15) As well as being updated, it is repeatedly updated within the remaining time of the main process (see FIG. 12).

  Next, each control process executed by the MPU 201 in the main control apparatus 110 will be described with reference to the flowcharts of FIGS. The processing of the MPU 201 is roughly classified into a start-up process activated upon power-on, a main process executed after the start-up process, and a timer activated periodically (in a 2 ms cycle in this embodiment) There are interrupt processing and NMI interrupt processing activated by the input of the power failure signal SG1 to the NMI terminal. For convenience of explanation, timer interrupt processing and NMI interrupt processing will be described first, and then start processing and The main processing will be described.

  FIG. 15 is a flowchart showing timer interrupt processing. The timer interrupt process is executed by the MPU 201 of the main control unit 110, for example, every 2 ms. In the timer interrupt process, first, read processing of various winning switches is executed (S501). That is, while reading the states of various switches connected to the main control device 110, the state of the switches is determined to store detection information (winning detection information).

  Next, the first initial value random number counter CINI1 and the second initial value random number counter CINI2 are updated (S502). Specifically, the first initial value random number counter CINI1 is incremented by 1 and cleared to 0 when the counter value reaches the maximum value (738 in the present embodiment). Then, the updated value of the first initial value random number counter CINI1 is stored in the corresponding buffer area of the RAM 203. Similarly, the second initial value random number counter CINI2 is incremented by 1, and when the counter value reaches the maximum value (250 in the present embodiment), it is cleared to 0, and the second initial value random number counter CINI2 is updated The value is stored in the corresponding buffer area of the RAM 203.

  Further, the first random number counter C1, the first collision type counter C2, the stop pattern selection counter C3 and the second random number counter C4 are updated (S503). Specifically, the first random number counter C1, the first collision type counter C2, the stop pattern selection counter C3 and the second random number counter C4 are respectively incremented by 1, and their counter values are maximum values (this embodiment). Then, when 738, 4, 238, 250) are reached, they are cleared to 0 respectively. Then, the updated values of the counters C1 to C4 are stored in the corresponding buffer area of the RAM 203.

  Thereafter, the start winning process (see FIG. 16) accompanying the winning on the first ball entrance 64 is executed (S504), the launch control process is executed (S505), and the timer interrupt process is ended. In the firing control process, the touch sensor 51a detects that the player is touching the operation handle 51, and the firing of the ball is turned on, provided that the strike stop switch 51b for stopping the firing is not operated. It is a process of deciding on / off. The main controller 110 instructs the launch controller 112 to launch the ball when the launch of the ball is on.

  Here, the start winning process executed in the process of S504 will be described with reference to the flowchart of FIG. FIG. 16 is a flowchart showing the start winning process (S504) executed in the timer interrupt process (see FIG. 15).

  When the start winning process is executed, first, it is determined whether or not the ball has won the first ball entrance 64 (start winning) (S601). If it is determined that the ball has won the first ball entrance 64 (S601: Yes), whether or not the number N of operation pending balls of the first symbol display device 37 is less than the upper limit (4 in the present embodiment) It is determined (S602). If there is a winning on the first ball entrance 64 and the number of operation holding balls N <4 (S602: Yes), the number of operation holding balls N is incremented by 1 (S603), and further updated in step S503. The respective values of the first random number counter C1, the first collision type counter C2 and the stop pattern selection counter C3 are stored in the first of the vacant holding areas of the holding ball storage area of the RAM 203 (S604). On the other hand, if there is no winning at the first entrance 64 (S601: No), or if there is a winning at the first entrance 64, it is not the number of operation holding balls N <4 (S602: No) , S603 and S604 are skipped, the start winning process is ended, and the process returns to the timer interrupt process.

  FIG. 17 is a flowchart showing NMI interrupt processing. The NMI interrupt process is a process executed by the MPU 201 of the main control device 110 when the power of the pachinko machine 10 is shut off due to the occurrence of a power failure or the like. By this NMI interrupt processing, the occurrence information of the power-off is stored in the RAM 203. That is, when the power of the pachinko machine 10 is shut off due to the occurrence of a blackout or the like, the blackout signal SG1 is output from the blackout monitoring circuit 252 to the NMI terminal of the MPU 201 in the main control unit 110. Then, the MPU 201 interrupts the control under execution and starts the NMI interrupt processing, stores the power-off occurrence information in the RAM 203 as the setting of the power-off occurrence information (S 651), and ends the NMI interrupt processing Do.

  The above-described NMI interrupt processing is also executed by the payout and emission control device 111 in the same manner, and the power disconnection occurrence information is stored in the RAM 213 by the NMI interrupt processing. That is, when the power of the pachinko machine 10 is shut off due to the occurrence of a blackout etc., the blackout signal SG1 is outputted from the blackout monitoring circuit 252 to the NMI terminal of the MPU 211 in the payout launch control device 111, and the MPU 211 interrupts the control under execution. Then, NMI interrupt processing is started.

  Next, with reference to FIG. 11, the start-up process when the main controller 110 is powered on will be described. FIG. 11 is a flowchart showing the start-up process executed by the MPU 201 in the main control device 110. This start-up process is started by the reset upon power-on. In the start-up process, first, an initial setting process associated with power on is executed (S101). Specifically, a predetermined value determined in advance is set in the stack pointer, and the sub-side control device (peripheral control devices such as the audio lamp control device 113 and the payout control device 111) becomes operable. In order to wait, wait processing (one second in the present embodiment) is executed. Next, access to the RAM 203 is permitted (S103).

  Thereafter, it is determined whether or not the RAM erase switch 122 (see FIG. 3) provided in the power supply 115 is turned on (S104), and if it is turned on (S104: Yes), the process proceeds to S110. On the other hand, if the RAM erase switch 122 is not turned on (S104: No), it is further determined whether or not the occurrence information of power-off is stored in the RAM 203 (S105). If not stored (S105: No) Since there is a possibility that the process at the time of the previous power-off did not end normally, the process proceeds to S110 also in this case.

  If the occurrence information of the power failure is stored in the RAM 203 (S105: Yes), the RAM determination value is calculated (S106), and if the calculated RAM determination value is not normal (S107: No), that is, the calculated RAM If the determination value does not match the RAM determination value stored at the time of power-off, the backed up data is destroyed, so the process also proceeds to S110. The RAM determination value is, for example, a checksum value at a work area address of the RAM 203, as described later in the process of S213 of FIG. Instead of the RAM determination value, the validity of the backup may be determined based on whether or not the keyword written in the predetermined area of the RAM 203 is correctly stored.

  In the process of S111, a payout initialization command is transmitted to initialize the payout control device 111 to be the control device on the sub side (peripheral control device) (S111). When receiving the payout initialization command, the payout control device 111 clears the area (work area) other than the stack area of the RAM 213, sets an initial value, and can start the payout control of the gaming ball. After transmitting the payout initialization command, main controller 110 executes initialization processing (S112, S113) of RAM 203.

  As described above, in the pachinko machine 10, the power is turned on while pressing the RAM erase switch 122 when initializing the RAM data at the time of power on, for example, at the time of opening of a hall. Therefore, if the RAM erase switch 122 is pressed when the start-up process is executed, the RAM initialization process (S112, S113) is executed. In addition, the initialization process (S112, S113) of the RAM 203 is also executed similarly when the occurrence of the power-off is not set or when the backup abnormality is confirmed by the RAM determination value (checksum value etc.). . In the initialization process of the RAM (S112, S113), the use area of the RAM 203 is cleared to 0 (S112), and then the initial value of the RAM 203 is set (S113). After execution of the initialization process of the RAM 203, the process proceeds to the process of S110.

  On the other hand, if the RAM erase switch 122 is not turned on (S104: No), occurrence information of the power failure is stored (S105: Yes), and if the RAM determination value (checksum value etc.) is normal ( S107: Yes), while holding the backed up data in the RAM 203, clear the power-off occurrence information (S108). Next, a payout recovery command at the time of power recovery for transmitting the control device (peripheral control device) on the sub side back to the gaming state at the time of driving power supply interruption is transmitted (S109), and the process proceeds to S110. When the payout control device 111 receives this payout recovery command, it holds the data stored in the RAM 213, and can start the payout control of the gaming balls. In the process of S110, an interrupt is permitted, and the process proceeds to the main process described later.

  Next, with reference to FIG. 12, the main processing to be executed after the above-described start-up processing will be described. FIG. 12 is a flowchart showing main processing executed by the MPU 201 in the main control apparatus 110. In this main processing, main processing of the game is executed. As an outline thereof, each processing of S201 to S206 is executed as periodic processing of 4 ms cycle, and the counter updating processing of S209 and S210 is executed with the remaining time.

  In the main process, first, output data such as a command updated in the previous process is transmitted to each control device (peripheral control device) on the sub side (S201). Specifically, the presence or absence of the winning detection information detected in the switch reading process of S501 is determined, and if there is the winning detection information, a prize ball command corresponding to the acquired ball number is transmitted to the payout control device 111. Further, by this external output processing, the variation pattern command necessary for the variation display of the third symbol by the third symbol display device 81, the stop symbol command, the stop command, the rendering time addition command and the like are transmitted to the voice lamp control device 113. Furthermore, when firing a ball, a ball launch signal is sent to the launch controller 112.

  Next, the values of the fluctuation type counters CS1, CS2, and CS3 are updated (S202). Specifically, the variation type counters CS1, CS2, and CS3 are incremented by one, and when the counter values reach the maximum values (198, 240, and 162 in the present embodiment), they are cleared to zero. Then, the updated values of the variation type counters CS1, CS2, and CS3 are stored in the corresponding buffer area of the RAM 203.

  When the variation type counters CS1, CS2 and CS3 have been updated, the prize ball counting signal and the payout abnormality signal received from the payout control device 111 are read (S203), and the processing and the first pattern display device 37 are performed. A variation process of setting a variation pattern or the like of the third symbol by the three symbol display device 81 is executed (S204). The details of the variation process will be described later with reference to FIG.

  After the end of the variation process, a large opening opening / closing process is performed to open or close the specific winning opening (large opening) 65a of the variable winning device 65 in the big hit state (S205). That is, the specific winning opening 65a is opened for each round of the jackpot state, and it is determined whether the maximum opening time of the specific winning opening 65a has passed or whether the specified winning opening 65a has a prescribed number of balls. Then, when any one of these conditions is established, the specific winning hole 65a is closed. The opening and closing of the specific winning hole 65a is repeated for a predetermined number of rounds.

  Next, display control processing of a second symbol (for example, a symbol of “o” or “x”) by the second symbol display device 82 is executed (S206). Simply stated, on the condition that the ball has passed through the second entrance (through gate) 67, the value of the second random number counter C4 is acquired at the timing when it passes and the second symbol display device 82 The variable display of the second symbol is carried out on the display unit 83 of the above. Then, the second lottery is conducted based on the value of the second random number counter C4, and when the second symbol is hit, the electrically operated combination attached to the first ball entrance 64 is opened for a predetermined time.

  After that, it is determined whether or not the occurrence information of the power failure is stored in the RAM 203 (S207), and if the occurrence information of the power failure is not stored in the RAM 203 (S207: No), the power failure signal from the power failure monitoring circuit 252 SG1 is not output and the power is not shut off. Therefore, in such a case, it is determined whether or not the execution timing of the next main processing has arrived, that is, whether or not a predetermined time (4 ms in the present embodiment) has elapsed since the start of the previous main processing (S208) If the predetermined time has already passed (S208: Yes), the process proceeds to S201, and the above-described processes from S201 are repeated.

  On the other hand, if the predetermined time has not yet elapsed from the start of the previous main processing (S208: No), the first main processing is performed until the predetermined time is reached, that is, within the remaining time until the next main processing execution timing is reached. (1) The update of the initial value random number counter CINI1, the second initial value random number counter CINI2 and the variation type counters CS1, CS2, CS3 is repeatedly executed (S209, S210).

  First, the first initial random number counter CINI1 and the second initial random number counter CINI2 are updated (S209). Specifically, the first initial value random number counter CINI1 and the second initial value random number counter CINI2 are incremented by 1, and cleared to 0 when the counter value reaches the maximum value (738, 250 in the present embodiment). Do. Then, the updated values of the first initial value random number counter CINI1 and the second initial value random number counter CINI2 are stored in the corresponding buffer areas of the RAM 203, respectively.

  Next, the variation type counters CS1, CS2, and CS3 are updated (S210). Specifically, the variation type counters CS1, CS2, and CS3 are incremented by one, and when the counter values reach the maximum values (198, 240, and 162 in the present embodiment), they are cleared to zero. Then, the updated values of the variation type counters CS1, CS2, and CS3 are stored in the corresponding buffer areas of the RAM 203, respectively.

  Here, since the execution time of each process of S201-S206 changes according to the state of a game, the remaining time until it reaches the execution timing of the next main process is not constant but fluctuates. Therefore, by repeatedly executing the update of the first initial value random number counter CINI1 and the second initial value random number counter CINI2 using such remaining time, the first initial value random number counter CINI1 and the second initial value random number counter CINI2 (ie, The initial value of the first random number counter C1 and the initial value of the second random number counter C4 can be randomly updated, and the variation type counters CS1, CS2, and CS3 can also be randomly updated.

  Further, in the process of S207, if the occurrence information of the power failure is stored in the RAM 203 (S207: Yes), the power is shut off due to the occurrence of the power failure or the power off, and the power failure monitoring circuit 252 outputs the power failure signal SG1. As a result, it means that the NMI interrupt process of FIG. 17 has been executed, so that the process at the time of the power-off after S211 is executed. First, the occurrence of each interrupt processing is prohibited (S211), and a power-off command indicating that the power is shut off is sent to another control device (peripheral control devices such as the payout control device 111 and the audio lamp control device 113). And transmit (S212). Then, the RAM determination value is calculated, the value is stored (S213), the access to the RAM 203 is inhibited (S214), and the infinite loop is continued until the power is completely shut off and the processing can not be performed. Here, the RAM determination value is, for example, a checksum value in a stack area and a work area backed up in the RAM 203.

  The processing of S207 is at the end of a series of processing corresponding to the change in the state of the game performed in S201 to S206, or at the end of one cycle of the processing of S209 and S210 performed within the remaining time. It is running. Therefore, in the main process of main controller 110, since the occurrence information of the power-off is confirmed at the timing when each setting is finished, when returning from the power-off state, the process is performed after the end of the start-up process. It can start from the process of S201. That is, as in the case of being initialized in the start-up process, the process can be started from the process of S201. Therefore, in the process at the time of power shutoff, even if the contents of each register used by the MPU 201 are saved to the stack area or the value of the stack pointer is not saved, the stack pointer By setting to a predetermined value (initial value), it is possible to start from the process of S201. Therefore, the control load on the main control device 110 can be reduced, and accurate control can be performed without the main control device 110 malfunctioning or runaway.

  Next, the fluctuation process (S204) will be described with reference to FIG. FIG. 13 is a flowchart showing the variation process (S204) executed in the main process (see FIG. 12). In this variation processing, first, it is determined whether or not a jackpot is currently occurring (S301). The jackpot includes the middle of a jackpot game displayed on the third symbol display device 81 and the first symbol display device 37 at the time of the jackpot and the middle of a predetermined time after the jackpot game is over. If the result of the determination is that the jackpot is in progress (S301: Yes), the present processing ends.

  If the jackpot is not inside (S301: No), it is determined whether or not the display mode of the first symbol display device 37 is changing (S302), and the display mode of the first symbol display device 37 is not changing (S302: No), it is determined whether the number of operation pending balls N is larger than 0 (S303). If the operation pending ball number N is 0 (S303: No), this processing ends. If the operation holding ball number N> 0 (S303: Yes), the operation holding ball number N is decremented by 1 (S304), and the data stored in the holding ball storage area is shifted (S305). This data shift process is a process of sequentially shifting data stored in the pending first to fourth areas of the pending ball storage area toward the execution area, and the first pending area → the execution area, the second pending area → The data in each area is shifted in such a way as the first holding area, the third holding area, the second holding area, the fourth holding area, and the third holding area. After the data shift process, the variation start process of the first symbol display device 37 is executed (S306). The change start process will be described later with reference to FIG.

  If it is determined in the process of S302 that the display mode of the first symbol display device 37 is changing (S302: Yes), it is determined whether a changing time has elapsed (S307). The display time during fluctuation of the first symbol display device 37 is determined according to the fluctuation pattern selected by the fluctuation type counters CS1 and CS2 and the addition time selected by the fluctuation type counter CS3, and this fluctuation time is If it has not elapsed (S307: No), the display of the first symbol display device 37 is updated (S308).

  In the present embodiment, of the LEDs 37a of the first symbol display device 37, for example, if the currently lit LED is red until the fluctuation time has elapsed, the red LED is selected. Turn off the green LED and turn on the green LED, turn off the green LED and turn on the blue LED, and turn on the blue LED if it is on. A display mode is set to turn off the light and turn on the red LED.

  The variation process is executed every 4 ms, but if the illumination color of the LED is changed each time the variation process is executed, the player can not confirm the change of the illumination color of the LED. Therefore, each time the variation process is performed, a counter (not shown) is counted by one so that the player can check the change in the lighting color of the LED, and the LED reaches 100 when the counter reaches 100. Change the lighting color of. That is, the lighting color of the LED is changed every 0.4 s. The value of the counter is reset to 0 when the lighting color of the LED is changed.

  On the other hand, if the fluctuation time of the first symbol display device 37 has elapsed (S307: Yes), a display mode corresponding to the stop symbol of the first symbol display device 37 is set (S309). The setting of the stop symbol is determined whether it is a big hit according to the value of the first random number counter C1 and if it is a big hit, it will be a high probability state after the big hit by the value of the first hit type counter C2. Whether it is a low probability state symbol or not is determined. In the present embodiment, the red LED is turned on in the high probability state after a big hit, the green LED is turned on in the low probability state, and the blue LED is turned on if it is off. . In addition, although the display of each LED is cancelled | released, when the next fluctuation | variation display is started, it is good also as what makes it light only for several seconds after the stop of a fluctuation | variation.

  When the display mode of the first symbol display device 37 corresponding to the stop symbol is set in the process of S309, the variation stop of the third symbol display device 81 is stopped to synchronize with the lighting of the LED in the first symbol display device 37 A command is set (S310). When receiving the stop command, the audio lamp control unit 113 instructs the display control unit 114 to stop. The third symbol display device 81 stops the variation when the variation time has elapsed, and upon receiving the stop command, the variation effect of 1 in the third symbol display device 81 ends.

  Next, the fluctuation start process will be described with reference to FIG. FIG. 14 is a flowchart showing the fluctuation start process (S306) executed in the fluctuation process (see FIG. 13). In the variation start process (S306), first, it is determined whether or not a big hit based on the value of the first random number counter C1 stored in the execution area of the holding ball storage area (S401). Whether or not the jackpot is determined is determined based on the relationship between the value of the first random number counter C1 and the mode at each time. As described above, "373, 727" is the winning value among the numbers 0 to 738 of the first random number counter C1 at the normal low probability, and at the high probability, "59, 109, 163, 211, 263, 317, 367, 421, 479, 523, 631, 683, 733 "is the hit value.

  When it is determined that it is a big hit (S401: Yes), the value of the first hit type counter C2 stored in the execution area of the holding ball storage area is confirmed, and the display mode at the big hit is set (S402) ). In the process of S402, whether to shift to the high probability state or to the low probability state is set after the big hit based on the value of the first hit type counter C2. When the transition state after the big hit is set, the display mode of the first symbol display device 37 (the lighting state of the LED 37a) is set. In addition, based on the transition state after the big hit, the stop symbol of the big hit to be stopped and displayed by the third symbol display device 81 is set by the sound lamp control device 113 and the display control device 114. That is, the stop symbol in the third symbol display device 81 is set by setting the transition state after the big hit by the process of S402. In the case of "0, 4" among the numbers 0 to 4 of the first type counter C2, thereafter, transition to the low probability state is made, and in the case of "1, 2, 3", transition to the high probability state .

  Next, a fluctuation pattern at the time of jackpot is determined (S403). When the variation pattern is set in the process of S403, the display time of the first symbol display device 37 is set, and the variation time of the third symbol until stopping with the big hit symbol in the third symbol display device 81 is determined. Ru. At this time, check the values of the variation type counters CS1 and CS2 stored in the counter buffer of the RAM 203, and based on the value of the first variation type counter CS1, of rough symbol variation such as normal reach, super reach, premium reach The fluctuation time (in other words, the number of fluctuation symbols) until the final stop symbol (in this embodiment, the middle symbol Z2) stops after reaching is determined based on the value of the second fluctuation type counter CS2 while determining the fluctuation time. decide.

  The relationship between the value of the first variation type counter CS1 and the variation time, and the relationship between the value of the second variation type counter CS2 and the variation time are prescribed in advance by a table or the like. However, the fluctuation time may be set using only the value of the first fluctuation type counter CS1 without using the value of the second fluctuation type counter CS2, and may be set by only the value of the first fluctuation type counter CS1. Depending on the value of the first variation type counter CS1 and the game conditions, etc., each time whether to set or to set with both values of both variation type counters CS1 and CS2 is determined.

  If it is determined that the jackpot is not a jackpot in the process of S401 (S401: No), a display mode at the time of disconnection is set (S404). In the process of S404, the display mode of the first symbol display device 37 is set off to a display mode corresponding to the symbol, and based on the value of the stop pattern selection counter C3 stored in the execution area of the holding ball storage area The effect to be displayed on the third symbol display device 81 is set as to whether it is a front or back reach, a reach other than the front or back, or a complete out. In the present embodiment, as described above, the range of values corresponding to each stop pattern of the stop pattern selection counter C3 is in accordance with whether the state is the high probability state or the low probability state and the operation suspension number N. The table is set to be different.

  Next, the fluctuation pattern at the time of detachment is determined (S405), the display time of the first symbol display device 37 is set, and the fluctuation time of the third symbol until it stops at the third symbol display device 81 at the disappointing symbol Is determined. At this time, as in the process of S403, the values of the fluctuation type counters CS1 and CS2 stored in the counter buffer of the RAM 203 are confirmed, and the normal reach, super reach, and premium reach based on the value of the first fluctuation type counter CS1. And so on while determining the rough fluctuation time of the symbol fluctuation and the fluctuation time until the final stop symbol (in this embodiment, the middle symbol Z2) is stopped after the reach occurrence based on the value of the second fluctuation type counter CS2. For example, the number of fluctuation symbols is determined.

  When the process of S403 or the process of S405 is finished, an effect time to be added to or subtracted from the fluctuation time determined by the first and second type counters CS1 and CS2 is determined (S406). At this time, addition / subtraction of the rendering time is determined based on the value of the third type counter CS3 stored in the counter buffer of the RAM 203, the display time of the first symbol display device 37 is set, and the third symbol display The fluctuation time of the device 81 is set. In the present embodiment, according to the value of the third variation type counter CS3, the addition / subtraction of the presentation time is determined not to change the time of the variation display and when 1 second is added to the variation display time, the variation display time is 2 In the case of adding seconds, four types of added values are determined in the case of subtracting the variation display time by one second.

  In addition, when the fluctuation display time is added / subtracted, the advance notice effect that the expectation value of the big hit becomes high in the third symbol display device 81 (for example, the slip effect effect or the like which makes the fluctuation time of the fluctuation symbol longer than usual and slips An effect of displaying the advance notice character, an effect of shortening the fluctuation time of the fluctuation symbol of 1 than usual and immediately stopping it, etc. are performed. Also, if the value of the random number counter C1 per win is a big hit, the probability that the additional value of 2 seconds is selected is set high, so the player should expect a big hit by confirming the notice effect. Can.

  Next, the variation pattern command is set according to the variation pattern (variation time) determined in the process of S403 or S405 (S407), and the stop symbol command is set according to the stop symbol set in the process of S402 or S404. (S408). Then, a rendering time addition command is set according to the addition value of the rendering time determined in the process of S406 (S409), and the process returns to the variation process.

  As described above, according to the pachinko machine 10, when the inner frame 12 or the front frame 14 is in the open state and the switch SW1 or the switch SW2 is in the conductive state (see FIG. 5B), the frame open detection is performed. The circuit 260 supplies a current to one end of the resistor R7 of the external output terminal plate 261 until about 10 ms elapses (about 10 ms) after the inner frame 12 or the front frame 14 is opened. Then, current is supplied to the light emitting diode on the primary side of the photocoupler PR1 provided on the external output terminal plate 261 via the resistor R7, and the light emitting diode emits light for about 10 ms. When the light receiving element (phototransistor) on the secondary side of the photocoupler PR1 receives the light from the light emitting diode, the light receiving element (phototransistor) on the secondary side of the photocoupler PR1 has a pulse width of about 10 ms. Converts it into a pulse signal (electrical signal) of about 10 ms and outputs the pulse signal to the hall computer 262. The output pulse signal is stored in the hall computer 262. Therefore, by using the frame opening detection circuit 260 and the external output terminal plate 261, the hole computer 262 can store the fact that the inner frame 12 has been opened or the front frame 14 has been opened. The hall computer 262 is kept operating for 24 hours. Therefore, the open frame detection circuit 260 outputs the pulse signal from the external output terminal plate 261 and also the time when the pulse signal is output, that is, the open time of the inner frame 12 and the open time of the front frame 14 as well. It can be stored in 262.

  Further, since the frame open detection circuit 260 is provided with a 0.1 F capacitor CD1, the frame open detection circuit 260 is supplied with power to the pachinko machine 10, and a DC voltage of DC voltage 12 to 12 volts is applied. When it is supplied, it naturally operates, and furthermore, for example, the business hours of the game are over, the power supply to the pachinko machine 10 is cut off, and a DC voltage of 12 volts is supplied from the DC power supply DC1 Even if not, the opening of the inner frame 12 and the opening of the front frame 14 can be detected. Therefore, for example, even when the operating time of the game arcade is over and the power supply to the pachinko machine 10 is cut off, a pulse signal with a pulse width of about 10 ms is output from the external output terminal board 261 to the hall computer 262 can do.

  Next, a pachinko machine according to a second embodiment will be described with reference to FIGS. 18 and 19. The pachinko machine of the second embodiment is obtained by changing the frame open detection circuit 260 of the pachinko machine 10 of the first embodiment to a frame open detection circuit 270 which is another configuration. The frame open detection circuit 270 of the second embodiment is simpler in circuit configuration than the frame open detection circuit 260 of the first embodiment. Specifically, the frame open detection circuit 270 of the second embodiment removes the timer IC1, the resistors R1 to R3 and the capacitors CD3 to CD5 from the frame open detection circuit 260 of the first embodiment, and the capacitors CD1 have different capacities. The circuit configuration is simplified by changing to the capacitor CD6 and changing the connection of each component.

  According to the frame open detection circuit 270 of the second embodiment, a high signal whose output period fluctuates according to the open period of the inner frame 12 or the front frame 14 can be output to the hall computer 262. Alternatively, in addition to the fact that the opening of the front frame 14 can be detected, the opening period of the inner frame 12 or the front frame 14 can also be detected.

  FIG. 18 is a block diagram showing the electrical configuration of the frame open detection circuit 270 of the second embodiment. The same parts as those of the frame open detection circuit 260 according to the first embodiment described above with reference to FIG. 7 will be assigned the same reference numerals and descriptions thereof will be omitted, and only different parts will be described.

  The capacitor CD6 is obtained by changing the capacity of the capacitor CD1 used in the frame open detection circuit 260 of the first embodiment from 0.1 F (farad) to 1 F (farad). The capacitor CD6 is a component that functions as a rechargeable battery as the capacitor CD1 of the frame open detection circuit 260 of the first embodiment, one end of the capacitor CD6 is connected to the cathode of the diode D1, and the other end of the capacitor CD6 is grounded. There is.

  As in the case of the above-described capacitor CD1 (see FIG. 7), the capacitor CD6 is supplied with power to the pachinko machine of the second embodiment, and is supplied with a DC voltage of 12 volts from the DC power supply DC1. It is determined by the product of the capacitance 1F of the capacitor CD6 and the DC voltage applied to the capacitor CD6 (about 11.3 volts obtained by subtracting 0.7 volt of the voltage drop at the diode D1 from 12 volts supplied from the DC power supply DC1) Store the charge.

  On the other hand, for example, when the operating time of the game arcade is over, the power supply to the pachinko machine of the second embodiment is cut off, and the DC voltage of 12 volts is not supplied from the DC power supply DC1, the capacitor CD6 A DC voltage (about 11.3 volts) based on the charge stored in the capacitor CD 6 is supplied to the frame open detection circuit 270 and the external output terminal plate 261.

  Specifically, since the capacitor CD6 has a capacitance of 1F (farad) and the voltage applied to the capacitor CD6 is about 11.3 volts, the charge stored in the capacitor CD6 is the capacitance of the capacitor CD6 and that of the capacitor CD6. It becomes about 11.3 C (coulomb) from the product of applied voltage. The charge of about 11.3 C stored in the capacitor CD 6 is about 10 minutes in the output period of the high signal outputted from the external output terminal plate 261 to the hall computer 262. Therefore, for example, even if the operating time of the game arcade is over, the power supply to the pachinko machine of the second embodiment is cut off, and a DC voltage of 12 volts is not supplied from the DC power supply DC1, the external The frame opening detection circuit 270 can detect the opening of the inner frame 12 or the front frame 14 until the total output period of the high signal output from the output terminal plate 261 becomes about 10 minutes. The frame open detection circuit 270 can also detect the open period of the inner frame 12 or the front frame 14. When the total output period of opening the inner frame 12 or opening the front frame 14 approaches approximately 10 minutes, the charge stored in the capacitor CD6 decreases, and the value of the current supplied from the capacitor CD6 to the photocoupler PR1 decreases. However, the high signal can be stored in the hole computer 262 by increasing the detection sensitivity of the high signal of the hole computer 262 (by lowering the threshold for the amplitude of the high signal).

  As described above, when the power supply to the pachinko machine of the second embodiment is performed and a DC voltage of 12 volts is supplied from the DC power supply DC1, it naturally operates. Further, for example, the business hours of the game arcade When the power supply to the pachinko machine of the second embodiment is cut off and the DC voltage of 12 volts is not supplied from the DC power supply DC1, the frame open detection circuit 270 is not Since the farad) capacitor CD6 is provided, the frame opening detection circuit 270 can detect the opening of the inner frame 12 and the opening of the front frame 14. The cathode terminal of the diode D1 is connected to one end of the capacitor CD6, and the diode D1 functions to prevent the backflow of current, so the capacitor CD6 transmits a direct current to the frame open detection circuit 270 and the external output terminal plate 261. Even when a voltage (about 11.3 volts) is supplied, the DC voltage is not applied to the DC power supply DC1, and the DC power supply DC1 is not damaged. In the present embodiment, the capacitor CD6 is used as a component for supplying a DC voltage to the frame open detection circuit 270 and the external output terminal plate 261 when a DC voltage of 12 volts is not supplied from the DC power supply DC1. . However, the present invention is not limited to this, and the capacitor CD6 may be a secondary battery (rechargeable battery) with a higher storage capacity or a primary battery that does not need to be charged.

  One end of the capacitor CD6 is connected to one end of the switch SW1 and one end of the switch SW2, and is connected to one end of the resistor R7 of the external output terminal plate 261. One end of a resistor R9 is connected to the other ends of the switch SW1 and the switch SW2. The other end of the resistor R9 is connected to one end of the capacitor CD2, one end of the resistor R4, and one end of the internal resistor R5 of the transistor TR1.

  By this connection, one of the switch SW1 or the switch SW2 (one of the inner frame 12 or the front frame 14), or both of the switch SW1 and the switch SW2 are in a conductive state (both the inner frame 12 and the front frame 14 are open) During the period, since the direct current voltage is supplied to the resistor R4, the terminal of the collector terminal c of the transistor TR1 and the terminal of the emitter terminal e of the transistor TR1 are conducted. Then, during this period, current is supplied to the light emitting diode on the primary side of the photocoupler PR1 via the resistor R7 of the external output terminal plate 261. Thereby, one of the switch SW1 or the switch SW2 (one of the inner frame 12 or the front frame 14), or both of the switch SW1 and the switch SW2 are in a conductive state (both the inner frame 12 and the front frame 14 are in an open state). During the period, a high signal is output from the light receiving element (phototransistor) on the secondary side of the photocoupler PR1 to the hole computer 262. Therefore, according to the frame open detection circuit 270 of the second embodiment, since the 1F (farad) capacitor CD6 is provided in the frame open detection circuit 270, power is supplied to the pachinko machine of the second embodiment. Even when a DC voltage of 12 volts is not supplied from the DC power supply DC1, a high signal whose output period fluctuates according to the open period of the inner frame 12 or the front frame 14 is shut off. Can be output to the hall computer 262. Therefore, in addition to the fact that the opening of the inner frame 12 or the front frame 14 can be detected, the opening period of the inner frame 12 or the front frame 14 can also be detected. The hall computer 262 is kept operating for 24 hours. Therefore, the frame open detection circuit 270 outputs the high signal from the external output terminal plate 261 and the time when the high signal is output, that is, the open time of the inner frame 12 and the open time of the front frame 14 as well. It can be stored in 262.

  Furthermore, for example, when the operating time of the game arcade is over and the power supply to the pachinko machine 10 is cut off, and the DC voltage of 12 volts is not supplied from the DC power supply DC1 to the frame open detection circuit 270 and the external output terminal board 261 That is, when the DC voltage of about 11.3 volts is supplied from the capacitor CD6 to the frame open detection circuit 270 and the external output terminal plate 261, the supply period of the current supplied from the capacitor CD6 to the photocoupler PR1 is the inner frame 12 or the period in which the front frame 14 is open. Therefore, the power consumption by opening the inner frame 12 or the front frame 14 can be suppressed small.

  For example, when the operating time of the game arcade is over and the power supply to the pachinko machine is cut off, and the DC voltage is supplied from the capacitor CD6 to the frame open detection circuit 270 and the external output terminal board 261, the inner frame When the total supply period of the current from the capacitor CD6 to the photocoupler PR1 along with the opening of the front frame 14 or 12 is extended or the number of times of detection of the opening of the inner frame 12 or the front frame 14 is increased, the capacitor CD6 The capacity of the capacitor CD6 may be increased (for example, the capacity of the capacitor CD6 may be 10 F), or the capacitor CD6 may be changed to a secondary battery with a large storage capacity.

  Next, referring to FIG. 19, the voltage A of frame open detection circuit 270 changes according to the state of switch SW1 (the state of inner frame 12) and the state of switch SW2 (the state of front frame 14) (FIG. 18) and the output of the external output terminal plate 261 (input of the hall computer 262) will be described. 19 shows the state of the switch SW1 (the state of the inner frame 12), the state of the switch SW2 (the state of the front frame 14), the voltage A of the frame open detection circuit 270 and the output of the external output terminal plate 261 (the state of the hall computer 262 3 is a timing chart showing the relationship of input). Each time from t1 to t8 described in FIG. 19 is the same as each time from t1 to t8 described in the timing chart of the frame open detection circuit 260 according to the first embodiment shown in FIG. is there.

  As shown in FIG. 19 (a), when the switch SW1 becomes conductive (the inner frame 12 is in the open state) at time t1, the frame open detection circuit 270 is followed as shown in FIG. 19 (c). The voltage at A (see FIG. 18) switches from zero volts to about 11.3 volts (at t1). Then, as shown in FIG. 19D, the output of the light receiving element (phototransistor) on the secondary side of the photocoupler PR1, that is, the output of the external output terminal plate 261 switches from the low state to the high state (t1 Time). Thereby, the output of a high signal indicating opening of the inner frame 12 or the front frame 14 to the hall computer 262 is started.

  Then, as shown in FIG. 19 (a), when the switch SW1 is in the cut off state (the inner frame 12 is in the closed state) at t2, as shown in FIG. 19 (c), the voltage of A of the frame open detection circuit 270 Switches from about 11.3 volts to zero volts (at t2). Then, following this, as shown in FIG. 19 (d), the output of the external output terminal plate 261 switches from the high state to the low state (at time t2).

  The switching of the output of the external output terminal plate 261 becomes a high signal, and the high signal is output from the external output terminal plate 261 to the hall computer 262 during t1 to t2. That is, a high signal whose pulse width is an output period from t1 to t2 is output from the external output terminal plate 261 to the hall computer 262.

  Next, as shown in FIG. 19 (a), when the switch SW1 becomes conductive (the inner frame 12 is in the open state) at time t3, the frame is opened following this, as shown in FIG. 19 (c). The voltage at A of the detection circuit 270 (see FIG. 18) switches from zero volt to about 11.3 volts (at time t3). Then, as shown in FIG. 19D, the output of the light receiving element (phototransistor) on the secondary side of the photocoupler PR1, that is, the output of the external output terminal plate 261 switches from low to high (t3). Time). Thereby, the output of a high signal indicating opening of the inner frame 12 or the front frame 14 to the hall computer 262 is started.

  Then, as shown in FIG. 19A, when the switch SW1 is in the cut off state (the inner frame 12 is in the closed state) at time t4, as shown in FIG. 19C, the voltage of A of the frame open detection circuit 270 Switches from about 11.3 volts to zero volts (t4). Then, following this, as shown in FIG. 19 (d), the output of the external output terminal plate 261 switches from the high state to the low state (at t4).

  The switching of the output of the external output terminal plate 261 is a high signal, and the high signal is output from the external output terminal plate 261 to the hall computer 262 during t3 to t4. That is, a high signal which is an output period of pulse width from t3 to t4 is output from the external output terminal plate 261 to the hall computer 262.

  Finally, the case where the switch SW2 is in the conductive state (the front frame 14 is in the open state) when the switch SW1 is in the conductive state (the inner frame 12 is in the open state) will be described. As shown in FIG. 19 (a), the switch SW1 becomes conductive (the inner frame 12 is open) at t5, and as shown in FIG. 19 (b), the switch SW2 is conductive (front) at t6. When the frame 14 is in the open state), as shown in FIG. 19C, the voltage A (see FIG. 18) of the frame open detection circuit 270 switches from zero volt to about 11.3 volts at t5. Then, following this, as shown in FIG. 19D, as shown in FIG. 19D, the output of the external output terminal plate 261 switches from the low state to the high state (at time t5). Thereby, the output of a high signal indicating opening of the inner frame 12 or the front frame 14 to the hall computer 262 is started.

  Then, as shown in FIG. 19A, at time t7, the switch SW1 is in the closed state (the inner frame 12 is closed), and as shown in FIG. 19B, the switch SW2 is in the closed state at t8. When (the front frame 14 is closed), as shown in FIG. 19C, the voltage of A of the frame open detection circuit 270 switches from zero volt to about 11.3 volts at t8. Then, following this, as shown in FIG. 19 (d), the output of the external output terminal plate 261 switches from the high state to the low state (at t8).

  The switching of the output of the external output terminal plate 261 becomes a high signal, and the high signal is output from the external output terminal plate 261 to the hall computer 262 during t5 to t8. That is, a high signal which is an output period of pulse width from t5 to t8 is output from the external output terminal plate 261 to the hall computer 262.

  Thus, when the switch SW1 and the switch SW2 are in the conductive state (the inner frame 12 and the front frame 14 are in the open state), in the frame open detection circuit 270, either one of the switch SW1 or the switch SW2 is in the conductive state (the inner frame 12 or the front frame 14 from the open state) until both the switch SW1 and the switch SW2 are in the closed state (both the inner frame 12 and the front frame 14 are closed) A high signal can be output from the output terminal plate 261 to the hall computer 262. Therefore, in addition to the fact that the opening of the inner frame 12 or the front frame 14 can be detected, when either one of the inner frame 12 or the front frame 14 is in the open state, both the inner frame 12 and the front frame 14 can be detected. It is possible to detect the open period until the closed state.

  As described above, according to the pachinko machine of the second embodiment, since the frame open detection circuit 270 is provided with the 1F (farad) capacitor CD6, the power supply to the pachinko machine of the second embodiment is interrupted. Even when a DC voltage of 12 volts is not supplied from the DC power supply DC1, the frame open detection circuit 270 outputs a high signal whose output period fluctuates according to the open period of the inner frame 12 or the front frame 14. It can be output to the hall computer 262. Then, the hall computer 262 outputs the high signal from the external output terminal plate 261 and stores the output period of the outputted high signal, thereby detecting the opening of the inner frame 12 or the front frame 14. In addition to what can be done, the opening period of the inner frame 12 or the front frame 14 can also be detected. In addition, the high signal output from the external output terminal plate 261 to the hall computer 262 is stored in the hall computer 262 which continues operating for 24 hours. Therefore, by the high signal stored in the hall computer 262, it is possible to specify the pachinko machine in which the inner frame 12 or the front frame 14 has been opened. Furthermore, the hall computer 262 outputs the high signal from the external output terminal plate 261 and stores the output time of the outputted high signal, so that the open time or front face of the inner frame 12 of the specified pachinko machine is stored. The opening time of the frame 14 can also be detected.

  Next, a pachinko machine of a third embodiment will be described with reference to FIGS. 20 and 21. FIG. The pachinko machine of the third embodiment is obtained by changing the frame opening detection circuit 260 of the pachinko machine 10 of the first embodiment to a frame opening detection circuit 280 which is another configuration. The frame opening detection circuit 280 according to the third embodiment simplifies the circuit configuration of the frame opening detection circuit 260 according to the first embodiment. Specifically, the frame open detection circuit 280 of the third embodiment removes the resistor R2 and the capacitors CD4 and CD5 from the frame open detection circuit 260 of the first embodiment, and removes the resistor R1, the capacitor CD3, the resistor R7 and the switch SW1. And the switch SW2 are changed, the timer IC1 is made to function as a monostable multivibrator, and an integration circuit 281 composed of the resistor 10 and the capacitor CD7 is connected in front of the TRG terminal of the timer IC1. Is a simplified version of Then, with respect to the frame open detection circuit 260 of the first embodiment, the frame open detection circuit 280 of the third embodiment is output from the form of the voltage applied to the TRG terminal of the timer IC1 and the OUT terminal of the timer IC1. The aspect of the voltage is changed.

  According to the frame open detection circuit 280 of the third embodiment, the integration circuit 281 makes the falling period of the voltage applied to the TRG terminal of the timer IC 1 constant regardless of the open period of the inner frame 12 or the front frame 14 By setting the period (about 2 ms), the falling period of the voltage applied to the TRG terminal of timer IC1 is longer than the period (about 10 ms) in which a voltage of about 9.6 volts is output from the OUT terminal of timer IC1. It can be adjusted short. Therefore, regardless of the open period of the inner frame 12 or the front frame 14, the supply period of the current supplied from the capacitor CD1 to the photocoupler PR1 is limited to about 10 ms per one open of the inner frame 12 or the front frame 14. be able to. Therefore, the frame open detection circuit 280 can simplify the circuit configuration as compared with the frame open detection circuit 260, and keep the period in which a voltage of about 9.6 volts is outputted from the OUT terminal of the timer IC1 to about 10 ms. Thus, the power consumption due to the opening of the inner frame 12 or the front frame 14 can be suppressed to be smaller than that of the frame opening detection circuit 260.

  FIG. 20 is a block diagram showing the electrical configuration of the frame open detection circuit 280 of the third embodiment. The same parts as those of the frame open detection circuit 260 according to the first embodiment described above with reference to FIG. 7 will be assigned the same reference numerals and descriptions thereof will be omitted, and only different parts will be described.

  When the power supply to the pachinko machine is shut off and the DC voltage from DC power source DC1 is not supplied to 12 volts, one end of the capacitor CD1 that supplies the DC voltage to the frame open detection circuit 280 and the external output terminal plate 261 is It is connected to one end of a 100 kΩ resistor R10, and is connected to the VDD terminal of the timer IC1, one end of a 100 kΩ resistor R1a, the RES terminal of the timer IC1, and one end of a 1 kΩ resistor R7a.

  The other end of the resistor R1a is connected to one end of a 0.1 μF capacitor CD3a, and is connected to the DCH terminal of the timer IC1 and the TH terminal of the timer IC1. The other end of the capacitor CD3a is grounded. By the connection between the capacitor CD3a and the resistor R1a, the timer IC1 opens the inner frame 12 or the front frame 14 and thereby the switch SW1 or the switch SW2 becomes conductive, and the voltage applied to the TRG terminal of the timer IC1 is When it falls to zero volts, it functions as a monostable multivibrator that raises the voltage of the OUT terminal of the timer IC1 from zero volt to about 9.6 volts for about 10 ms. Note that about 10 ms, which is a period for raising the voltage at the OUT terminal of timer IC1 from zero volt to about 9.6 volts, is the product of the resistance value (100 kΩ) of resistor R1a and the capacitance value (0.1 μF) of capacitor CD3a. It is determined by a certain time constant.

  The resistor R10 is a resistor that stabilizes a voltage applied to the TRG terminal of the timer IC1, and is a resistor that configures an integration circuit 281 with the capacitor CD7. The other end of the resistor R10 is connected to the anode terminal of the diode D2, and the cathode terminal of the diode D2 is connected to the TRG terminal of the timer IC1, and a Zener having a limiting voltage (Zener voltage) of about 10.5 volts. The cathode terminal of the diode D3 is connected to one end of each of the switch SW1 and the switch SW2 connected in parallel. Therefore, when the inner frame 12 and the front frame 14 are closed and the switch SW1 and the switch SW2 are shut off, the voltage applied to the TRG terminal of the timer IC1 is about 11.3 volts supplied from the capacitor CD1. Of the voltage drop across resistor R10 and about 0.7 volts of the voltage drop across diode D2 are approximately 10.3 volts.

  The 0.02 μF capacitor CD7 is a capacitor that forms an integration circuit 281 with the resistor R10 and controls the voltage applied to the TRG terminal of the timer IC1. The other end of each of the switch SW1 and the switch SW2 is connected to one end of the capacitor CD7, and the other end of the capacitor CD7 is grounded. Integral circuit 281 formed of capacitor CD7 and resistor R10 is applied to the TRG terminal of timer IC1 when switch SW1 or switch SW2 becomes conductive as inner frame 12 or front frame 14 is opened. The voltage of about 10.3 volts is dropped to zero volts, and the voltage of the TRG terminal of the timer IC 1 is returned to about 10.3 volts again about 2 ms after the drop.

  Specifically, when the inner frame 12 or the front frame 14 is opened and the switch SW1 or switch SW2 is turned on in response to the opening, a voltage of about 10.3 volts supplied from the capacitor CD1 is applied to the capacitor CD7. The application of voltage is started to start charging of the capacitor CD7. At the start of this charging, the voltage applied to the capacitor CD7 instantaneously becomes zero volts, so that the voltage applied to the TRG terminal of the timer IC1 instantaneously becomes zero volts. Then, as the capacitor CD7 is charged, the capacitor CD7 raises the voltage applied to the TRG terminal of the timer IC1, and finally controls the voltage applied to the TRG terminal of the timer IC1 to about 10.3 volts. It is

  During the period until the capacitor CD7 is completely charged, that is, the voltage of about 10.3 volts applied to the TRG terminal of the timer IC1 falls to zero volts, and from that fall, the voltage of the TRG terminal of the timer IC1 becomes Again, the time to return to about 10.3 volts, about 2 ms, is determined by the time constant, which is the product of the resistance (100 k.OMEGA.) Of resistor R10 and the capacitance (0.02 .mu.F) of capacitor CD7.

  As described above, during the period (about 2 ms) from when the voltage applied to the TRG terminal of the timer IC1 falls and the voltage at the TRG terminal of the timer IC1 returns to about 10.3 volts again (about 2 ms). Thus, regardless of the open periods of the inner frame 12 and the front frame 14, the voltage at the OUT terminal of the timer IC1 is adjusted to a period shorter than the period (about 10 ms) rising from zero volts to about 9.6 volts. Note that after the voltage applied to the TRG terminal of the timer IC1 falls by changing the resistance value of the resistor R10 and the capacitance value of the capacitor CD7, the voltage of the TRG terminal of the timer IC1 is about 10.3 volts It is possible to freely change the period until it returns to 0 ° within about 10 ms, which is the period until the voltage at the OUT terminal of the timer IC1 rises from zero volt to about 9.6 volts.

  Here, in the monostable multivibrator, the signal is not normally output from the output terminal unless the input period of the signal input to the input terminal is shorter than the output period of the signal output from the output terminal (from the output terminal The signal continues to be output). Therefore, when the timer IC1 is made to function as a monostable multivibrator without using the integration circuit 281, the timer IC1 is shorter than the period in which the voltage at the OUT terminal of the timer IC1 rises from zero volts to about 9.6 volts. The period of time until the voltage at the TRG terminal returns to about 10.3 volts again from zero volt, that is, the open period of the inner frame 12 and the front frame 14 (the conduction period of the switches SW1 and SW2) should be short. However, since the open period of the inner frame 12 and the front frame 14 can not be predicted at all, the inner frame 12 and the voltage of the OUT terminal of the timer IC 1 rise more than the period when rising from zero volts to about 9.6 volts. In order to always shorten the open period of the front frame 14, it is necessary to set a period in which the voltage at the OUT terminal of the timer IC1 rises from zero volt to about 9.6 volt as a sufficiently long period. For example, if the open period of the inner frame 12 and the front frame 14 is predicted to be from several tens of seconds to several minutes, the period during which the voltage at the OUT terminal of the timer IC1 rises from zero volts to about 9.6 volts is sufficient margin. You have to set from several minutes to several tens of minutes. Then, during this set period, the DC voltage is continuously supplied from the capacitor CD1 to the frame open detection circuit 280 and the external output terminal plate 261, so that the consumption of the capacitor CD1 becomes remarkable. Therefore, a special circuit configuration is necessary in order to suppress consumption of the charge stored in capacitor CD1 after functioning timer IC1 as a monostable multivibrator without using integration circuit 281. there were.

  However, when the inner frame 12 or the front frame 14 is opened by providing the integration circuit 281 in the previous stage of the TRG terminal of the timer IC1, the timer IC1 is opened regardless of the open period (the conduction period of the switch SW1 and the switch SW2). Adjust the period from when the voltage applied to the TRG terminal of the IC falls to zero volts and returns again to about 10.3 volts, shorter than the period when the voltage at the OUT terminal of the timer IC1 rises from zero volt to about 9.6 volts can do. As described above, the timer IC1 can be normally operated by setting the falling period of the TRG terminal voltage of the timer IC1 to a fixed period (about 2 ms) regardless of the open periods of the inner frame 12 and the front frame 14 by the integration circuit 281. It is possible to operate and keep the period in which the voltage at the OUT terminal of the timer IC1 rises from zero volts to about 9.6 volts to about 10 ms.

  Then, when the voltage at the OUT terminal of the timer IC1 rises from zero volt to about 9.6 volts for about 10 ms, the collector terminal and the emitter terminal of the transistor TR1 conduct for about 10 ms, and via the resistor R7a Current is supplied from the capacitor CD1 to the photocoupler PR1 for about 10 ms. As a result, a pulse signal with a pulse width of about 10 ms is output from the external output terminal plate 261 to the hole computer 262 for one opening of the inner frame 12 or the front frame 14. As described above, even if the timer IC1 is made to function as a monostable multivibrator, the integration circuit 281 is provided before the TRG terminal of the timer IC1, thereby suppressing consumption of the charge stored in the capacitor CD1, The output period of the pulse signal output from the external output terminal plate 261 to the hall computer 262 can be limited to about 10 ms without adopting a circuit configuration as described above.

  The cathode terminal of the zener diode D3 whose limiting voltage (zener voltage) is about 10.5 volts is connected to the TRG terminal of the timer IC1, and the anode terminal of the zener diode D3 is connected to the ground. In the Zener diode D3, when the inner frame 12 or the front frame 14 is opened and the switch SW1 or the switch SW2 is turned on, the charge stored in the capacitor CD7 and the voltage supplied from the capacitor CD1 are superimposed. This is an element that prevents an overvoltage (for example, a voltage of 12.3 volts) that is generated due to the above to destroy the timer IC1 from being applied to the TRG terminal of the timer IC1. Specifically, the inner frame 12 or the front frame 14 is opened, the switch SW1 or the switch SW2 is turned on, and the charge stored in the capacitor CD7 is again transmitted within the relatively short time. When the switch SW1 or the switch SW2 is turned on, the other end side of the switch SW1 or the switch SW2 is discharged from the other end side to the one end side. A voltage of about 10.3 volts discharged from capacitor CD7 and a voltage of about 10.3 volts supplied from capacitor CD1 are superimposed, and an overvoltage of the magnitude that destroys timer IC1 is applied to the TRG terminal of timer IC1. It can be applied. However, since a Zener diode D3 having a limited voltage (zener voltage) of about 10.5 volts is connected between the TRG terminal of timer IC1 and the ground, the voltage applied to the TRG terminal of timer IC1 is The maximum value is about 10.5 volts, and an overvoltage of magnitude that destroys the timer IC1 is not applied to the TRG terminal of the timer IC1. Thus, using a simple configuration and inexpensive Zener diode D3, it is possible to prevent an overvoltage having a magnitude that destroys the timer IC1 from being applied to the TRG terminal of the timer IC1, and to prevent damage to the timer IC1. it can.

  As described above, since the limited pressure reduction (zener voltage) of the Zener diode D3 is about 10.5 volts, the inner frame 12 and the front frame 14 are closed, and the switch SW1 and the switch SW2 are shut off. In this case, the current supplied from the capacitor CD1 does not flow to the ground via the Zener diode D3, and the charge of the capacitor CD1 is not consumed. Further, the cathode terminal of the diode D2 is connected to one end of the switch SW1 and the switch SW2, and the diode D2 exhibits the function of preventing the backflow of current, so a voltage of about 10.3 volts discharged from the capacitor CD7 However, they are not damaged by being applied to the capacitor CD1 and the VDD terminal of the timer IC1.

  As described above, in the timer IC1 of the frame open detection circuit 280, the inner frame 12 or the front frame 14 is opened, the switch SW1 or the switch SW2 is conducted, and the voltage applied to the TRG terminal of the timer IC1 falls to zero volts. Also, for about 10 ms from this fall, the voltage of the OUT terminal of the timer IC1 functions as a monostable multi-vibrator that raises it from zero volt to about 9.6 volt. Then, by providing the integration circuit 281 in the front stage of the TRG terminal of the timer IC1, when the inner frame 12 or the front frame 14 is opened, the timer IC1 is turned on regardless of the open period of the inner frame 12 and the front frame 14. Adjust the period until the voltage applied to the TRG terminal returns to about 10.3 volts after falling to zero volts, shorter than the period when the voltage at the OUT terminal of the timer IC1 rises from zero volts to about 9.6 volts Can. Thus, as the monostable multivibrator, the integration circuit 281 sets the falling period of the TRG terminal voltage of the timer IC 1 to a fixed period (about 2 ms) regardless of the open periods of the inner frame 12 and the front frame 14. The functioning timer IC1 can be operated normally, and the period in which the voltage at the OUT terminal of the timer IC1 rises from zero volts to about 9.6 volts can be limited to about 10 ms. Thus, the period in which current is supplied from the capacitor CD1 to the photocoupler PR1 can be limited to about 10 ms, and the output period of the pulse signal output from the external output terminal plate 261 to the hall computer 262 can be limited to about 10 ms. it can.

  Further, since the frame open detection circuit 280 is provided with the 0.1 F capacitor CD1, the frame open detection circuit 280 is supplied with power to the pachinko machine, and a DC voltage of 12 volts from the DC power source DC1 is When supplied, it naturally operates, and for example, when the operating time of the game arcade is over, the power supply to the pachinko machine is cut off, and a DC voltage of 12 volts from the DC power source DC1 is not supplied. Even in this case, the opening of the inner frame 12 and the opening of the front frame 14 can be detected. Then, when the opening of the inner frame 12 or the opening of the front frame 14 is detected by the frame open detection circuit 280, a pulse signal with a pulse width of about 10 ms is sent from the external output terminal plate 261 to the hole computer 262 for one detection. Can be output. The pulse signal output from the external output terminal plate 261 to the hall computer 262 is stored in the hall computer 262 which continues operating for 24 hours. Therefore, by the pulse signal stored in the hall computer 262, it is possible to identify the pachinko machine in which the inner frame 12 or the front frame 14 has been opened. Furthermore, the opening time or the front surface of the inner frame 12 of the specified pachinko machine is stored by storing the output time of the output pulse signal as well as the output of the pulse signal from the external output terminal plate 261 to the hall computer 262. The opening time of the frame 14 can be detected.

  Although the door open detection circuit 280 detects the open of the inner frame 12 or the open of the front frame 14 by using the LMC 555 for the timer IC1, the circuit for energizing the photocoupler PR1 for about 10 ms is realized. It is not limited. That is, a circuit that generates a pulse signal for one opening of the inner frame 12 or one opening of the front frame 14 is realized using another integrated circuit or the like for the timer IC 1, part 1 It is sufficient if the photocoupler PR1 is energized for a predetermined period based on the pulse signal.

  Also, for example, when the operating time of the game arcade is over and the power supply to the pachinko machine is cut off, and the DC voltage is supplied from the capacitor CD1 to the frame open detection circuit 280 and the external output terminal board 261, When the total supply period of the current from the capacitor CD1 to the photocoupler PR1 along with the opening of the front frame 14 or 12 is extended or the number of times of detection of the opening of the inner frame 12 or the front frame 14 is increased, The capacity of the capacitor CD1 may be increased (for example, the capacity of the capacitor CD1 may be 1 F), or the capacitor CD1 may be changed to a secondary battery with a large storage capacity.

  Next, referring to FIG. 21, the TRG terminal voltage of timer IC1 changes according to the state of switch SW1 (the state of inner frame 12) and the state of switch SW2 (the state of front frame 14) The relationship between the OUT terminal voltage and the output of the external output terminal plate 261 (input of the hall computer 262) will be described. 21 shows the state of the switch SW1 (the state of the inner frame 12), the state of the switch SW2 (the state of the front frame 14), the TRG terminal voltage of the timer IC1, the OUT terminal voltage of the timer IC1, and the output of the external output terminal plate 261 (FIG. 7 is a timing chart showing the relationship of the input of the hole computer 262). Note that each time from t1 to t8 described in FIG. 21 is the same as each time from t1 to t8 described in the timing chart of the frame open detection circuit 260 of the first embodiment shown in FIG. is there.

  As shown in FIG. 21A, when the switch SW1 becomes conductive (the inner frame 12 is opened) at t1, charging of the capacitor CD7 is started, and as shown in FIG. 21C, the timer IC1 is turned on. The TRG terminal voltage falls from about 10.3 volts to zero volts (at t1). Then, following this, as shown in FIG. 21D, the OUT terminal voltage of the timer IC1 rises from zero volt to about 9.6 volts (at t1). Thereby, the collector terminal and the emitter terminal of the transistor TR1 of the frame opening detection circuit 280 are conducted, and current supply is started to the light emitting diode on the primary side of the photocoupler PR1 of the external output terminal plate 261 (see FIG. 20). (At t1). Then, as shown in FIG. 21E, the output of the light receiving element (phototransistor) on the secondary side of the photocoupler PR1, that is, the output of the external output terminal plate 261 is cut from the low state to the high state at t1. It changes. As a result, output of a pulse signal indicating opening of the inner frame 12 or the front frame 14 to the hole computer 262 is started.

  Next, as shown in FIG. 21C, when about 2 ms elapses from time t1, the charging of the capacitor CD7 is completed, and the voltage at the TRG terminal of the timer IC1 returns from zero volt to about 10.3 volts again. However, since about 10 ms has not elapsed since the voltage at the OUT terminal of timer IC1 rose from zero volts to about 9.6 volts, the OUT terminal voltage of timer IC1 is about 9.6 volts. It is maintaining the state.

  After that, when about 10 ms elapses from t1, as shown in FIG. 21D, the timer IC1 switches the voltage of the OUT terminal from about 9.6 volts to zero volts. Then, the collector terminal and the emitter terminal of the transistor TR1 of the frame opening detection circuit 280 are disconnected, and the current supply to one end of the resistor R7a of the external output terminal plate 261 is stopped. Therefore, as shown in FIG. 21E, the output of the external output terminal plate 261 switches from the high state to the low state when about 10 ms has elapsed from t1. As a result, the output of the pulse signal output to the hall computer 262 is stopped. Thus, by switching the output of the external output terminal plate 261, the pulse width of the pulse signal output from the external output terminal plate 261 to the hall computer 262 can be limited to about 10 ms.

  As shown in FIG. 21A, when the switch SW1 is in the closed state (the inner frame 12 is closed) at time t2, the frame open detection circuit 280 detects the inner frame 12 and the front frame 14 again. It is set to the possible state.

  Next, as shown in FIG. 21B, when the switch SW2 becomes conductive (the front frame 14 is opened) at t3, charging of the capacitor CD7 is started, and as shown in FIG. 21C, The TRG terminal voltage of the timer IC1 falls from about 10.3 volts to zero volts (at time t3). Then, following this, as shown in FIG. 21D, the OUT terminal voltage of the timer IC1 rises from zero volt to about 9.6 volts (at time t3). Thereby, the collector terminal and the emitter terminal of the transistor TR1 of the frame opening detection circuit 280 are conducted, and current supply is started to the light emitting diode on the primary side of the photocoupler PR1 of the external output terminal plate 261 (see FIG. 20). (T3). Then, as shown in FIG. 21E, the output of the light receiving element (phototransistor) on the secondary side of the photocoupler PR1, that is, the output of the external output terminal plate 261 is cut from low to high at t3. It changes. As a result, output of a pulse signal indicating opening of the inner frame 12 or the front frame 14 to the hole computer 262 is started.

  The charge stored in the capacitor CD7 between t1 and t2 is instantaneously completed through the zener diode D3 at t3. Since the discharge period of the capacitor CD7 is a very small period from about 2 ms in which the voltage at the TRG terminal of the timer IC1 changes from about 10.3 volts to zero volts and becomes about 10.3 volts again, the TRG of the timer IC1 is It does not significantly affect the voltage applied to the terminals. Furthermore, in addition to the discharge, the charge stored in the capacitor CD7 from t1 to t2 is also discharged by the self discharge of the capacitor CD7.

  At time t3, the voltage of about 10.3 volts supplied from the capacitor CD1 and the voltage of about 10.3 volts associated with the charge stored in the capacitor CD7 are superimposed on the TRG terminal of the timer IC1. An overvoltage having a magnitude that destroys the timer IC1 may be applied. However, since the Zener diode D3 whose limiting voltage (Zener voltage) is approximately 10.5 volts is connected to the front stage of the TRG terminal of the timer IC1, the maximum value of the voltage applied to the TRG terminal of the timer IC1 is The overvoltage which is about 10.5 volts and which destroys the timer IC1 is not applied to the TRG terminal of the timer IC1.

  Next, as shown in FIG. 21C, when about 2 ms elapses from t3, charging of the capacitor CD7 is completed, and the voltage at the TRG terminal of the timer IC1 returns from zero volt to about 10.3 volts again. However, since about 10 ms has not elapsed since the voltage at the OUT terminal of timer IC1 has risen from zero volts to about 9.6 volts, the OUT terminal voltage of timer IC1 is about 9.6 volts. It is maintaining the state.

  Thereafter, when about 10 ms has elapsed from t3 time, as shown in FIG. 21D, the timer IC1 switches the voltage of the OUT terminal from about 9.6 volts to zero volts. Then, the collector terminal and the emitter terminal of the transistor TR1 of the frame opening detection circuit 280 are disconnected, and the current supply to one end of the resistor R7a of the external output terminal plate 261 is stopped. Therefore, the output of the external output terminal plate 261 switches from the high state to the low state as shown in FIG. 21 (e) when about 10 ms has elapsed from t3. As a result, the output of the pulse signal output to the hall computer 262 is stopped. Thus, by switching the output of the external output terminal plate 261, the pulse width of the pulse signal output from the external output terminal plate 261 to the hall computer 262 can be limited to about 10 ms.

  As shown in FIG. 21B, when the switch SW2 is in the closed state (the front frame 14 is closed) at t4, the frame open detection circuit 280 detects the inner frame 12 and the front frame 14 again. It is set to the possible state.

  Finally, the case where the switch SW2 is in the conductive state (the front frame 14 is in the open state) when the switch SW1 is in the conductive state (the inner frame 12 is in the open state) will be described. As shown in FIG. 21 (a), the switch SW1 becomes conductive (the inner frame 12 is open) at t5, and as shown in FIG. 21 (b), the switch SW2 is conductive (front) at t6. When the frame 14 is opened, charging of the capacitor CD7 is started at t5, and as shown in FIG. 21C, the voltage at the TRG terminal of the timer IC1 falls from about 10.3 volts to zero volts (t5). Time). Then, following this, as shown in FIG. 21D, the OUT terminal voltage of the timer IC1 rises from zero volt to about 9.6 volts (at t5). Thereby, the collector terminal and the emitter terminal of the transistor TR1 of the frame opening detection circuit 280 are conducted, and current supply is started to the light emitting diode on the primary side of the photocoupler PR1 of the external output terminal plate 261 (see FIG. 20). (At 5 o'clock). Then, as shown in FIG. 21E, the output of the light receiving element (phototransistor) on the secondary side of the photocoupler PR1, that is, the output of the external output terminal plate 261 is cut from low to high at t5. It changes. As a result, output of a pulse signal indicating opening of the inner frame 12 or the front frame 14 to the hole computer 262 is started.

  Since the charge stored in the capacitor CD7 between t3 and t4 is instantaneously completed through the zener diode D3 at t5, it significantly affects the voltage applied to the TRG terminal of the timer IC1. is not. Furthermore, in addition to this discharge, the charge stored in the capacitor CD7 from t3 to t4 is also discharged by the self discharge of the capacitor CD7.

  At time t5, the voltage of about 10.3 volts supplied from capacitor CD1 and the voltage of about 10.3 volts associated with the charge stored in capacitor CD7 are superimposed on the TRG terminal of timer IC1. An overvoltage having a magnitude that destroys the timer IC1 may be applied. However, since the maximum value of the voltage applied to the TRG terminal of the timer IC1 is about 10.5 volts by the Zener diode D3, an overvoltage having a magnitude that destroys the timer IC1 is applied to the TRG terminal of the timer IC1. There is no.

  Next, as shown in FIG. 21C, when about 2 ms elapses from t5, charging of the capacitor CD7 is completed, and the voltage at the TRG terminal of the timer IC1 returns from zero volt to about 10.3 volts again. However, since about 10 ms has not elapsed since the voltage at the OUT terminal of timer IC1 has risen from zero volts to about 9.6 volts, the OUT terminal voltage of timer IC1 is about 9.6 volts. It is maintaining the state.

  After that, when about 10 ms elapses from t5, as shown in FIG. 21D, the timer IC1 switches the voltage of the OUT terminal from about 9.6 volts to zero volts. Then, the collector terminal and the emitter terminal of the transistor TR1 of the frame opening detection circuit 280 are disconnected, and the current supply to one end of the resistor R7a of the external output terminal plate 261 is stopped. Therefore, as shown in FIG. 21E, the output of the external output terminal plate 261 switches from the high state to the low state when about 10 ms elapses from t5. As a result, the output of the pulse signal output to the hall computer 262 is stopped. Thus, by switching the output of the external output terminal plate 261, the pulse width of the pulse signal output from the external output terminal plate 261 to the hall computer 262 can be limited to about 10 ms.

  As shown in FIG. 21 (a), the switch SW1 is in the shutoff state (the inner frame 12 is in the closed state) at t7, and the switch SW2 is in the shutoff state at t8 as shown in FIG. 21 (b). When (the front frame 14 is in a closed state), the frame open detection circuit 280 is again set to a state in which the inner frame 12 and the front frame 14 can be detected.

  As described above, even when the switch SW2 is in the conductive state (the front frame 14 is in the open state) when the switch SW1 is in the conductive state (the inner frame 12 is in the open state), the timer IC1 performs the conduction period of the switch SW1. Regardless of (the open period of the inner frame 12) and the conduction period of the switch SW2 (the open period of the front frame 14), either one of the switch SW1 or the switch SW2 is in the conductive state (either the inner frame 12 or the front frame 14 Becomes open, and the voltage at the OUT terminal of the timer IC1 is switched from about 9.6 volts to zero volts when about 10 ms elapses after the voltage at the TRG terminal of the timer IC1 falls from about 10.3 volts to zero volts. Thus, the supply period of the current supplied to the photocoupler PR1 of the external output terminal plate 261 is approximately 10 ms.

  Therefore, for example, when the operating time of the game arcade is over and the power supply to the pachinko machine is cut off and the DC voltage of 12 volts is not supplied from the DC power supply DC1 to the frame open detection circuit 280 and the external output terminal board 261, ie When the DC voltage of about 10.3 volts is supplied from the capacitor CD1 to the frame open detection circuit 280 and the external output terminal plate 261, the supply period of the current supplied from the capacitor CD1 to the photocoupler PR1 is the inner frame 12 Or it can be fixed to about 10 ms per one opening of the front frame 14. Therefore, the power consumption due to the opening of the inner frame 12 or the front frame 14 can be reduced.

  Here, since the capacity of the capacitor CD1 is 0.1 F and the voltage applied to the capacitor CD1 is about 11.3 volts, the charge stored in the capacitor CD1 is the capacity of the capacitor CD1 and the voltage applied to the capacitor CD1. It becomes approximately 1.13 C (coulomb) from the product of The electric charge of about 1.13 C stored in the capacitor CD1 corresponds to about 500 times of current supply when the supply period of the current supplied from the capacitor CD1 to the photocoupler PR1 is about 10 ms. Do. Therefore, for example, when the operating time of the game arcade is over and the power supply to the pachinko machine is cut off, and the DC voltage of 12 volts is not supplied from the DC power supply DC1, opening of the inner frame 12 (conduction of switch SW1 Or, even when the opening of the front frame 14 (the conduction of the switch SW2) is performed many times, the frame opening detection circuit 280 opens the inner frame 12 or opens the front frame 14 (the conduction of the switch SW1 or the switch The conduction of the switch SW2 can be reliably detected each time up to about 500 times, and a pulse signal can be output from the external output terminal plate 261 to the hall computer 262. At this time, when the opening of the inner frame 12 or the opening of the front frame 14 reaches about 500 times, the charge stored in the capacitor CD1 decreases and the value of the current supplied from the capacitor CD1 to the photocoupler PR1 decreases. The pulse signal can be stored in the hole computer 262 by increasing the detection sensitivity of the pulse signal of the computer 262 (by lowering the threshold for the amplitude of the pulse signal).

  As described above, according to the pachinko machine of the third embodiment, when the inner frame 12 or the front frame 14 is in the open state and the switch SW1 or the switch SW2 is in the conductive state, the integrating circuit 281 causes the inner frame The fall period of the voltage applied to the TRG terminal of the timer IC 1 is set to a fixed period (about 2 ms) regardless of the open period of the front frame 14 or 12. Then, the timer IC1 functioning as a monostable multivibrator operates normally, and the voltage at the OUT terminal of the timer IC1 is approximately 0 volts from the zero volt until approximately 10 ms elapses after the voltage at the TRG terminal of the timer IC1 falls to zero volts. Start up to 9.6 volts. Thus, current is supplied to the light emitting diode on the primary side of the photocoupler PR1 provided on the external output terminal plate 261 through the resistor R7a, and the light emitting diode emits light for about 10 ms. When the light receiving element (phototransistor) on the secondary side of the photocoupler PR1 receives the light from the light emitting diode, the light receiving element (phototransistor) on the secondary side of the photocoupler PR1 has a pulse width of about 10 ms. Converts it into a pulse signal (electrical signal) of about 10 ms and outputs the pulse signal to the hall computer 262. The output pulse signal is stored in the hall computer 262. Therefore, by using the frame open detection circuit 280 provided with the integration circuit 281 and the external output terminal plate 261, it is stored in the hall computer 262 that the inner frame 12 has been opened or the front frame 14 has been opened. it can. The hall computer 262 is kept operating for 24 hours. Therefore, the open frame detection circuit 280 outputs the pulse signal from the external output terminal plate 261 and also the time when the pulse signal is output, that is, the open time of the inner frame 12 and the open time of the front frame 14 as well. It can be stored in 262.

  Further, since the frame open detection circuit 280 is provided with the 0.1 F capacitor CD1, the frame open detection circuit 280 is supplied with power to the pachinko machine, and a DC voltage of 12 volts from the DC power source DC1 is When supplied, it naturally operates, and for example, when the operating time of the game arcade is over, the power supply to the pachinko machine is cut off, and a DC voltage of 12 volts from the DC power source DC1 is not supplied. Even in this case, the opening of the inner frame 12 and the opening of the front frame 14 can be detected. Therefore, for example, even when the operating time of the game arcade is over and the power supply to the pachinko machine is cut off, a pulse signal with a pulse width of about 10 ms is output from the external output terminal plate 261 to the hall computer 262 be able to.

  In the present embodiment, when the inner frame 12 or the front frame 14 is opened and the switch SW1 or the switch SW2 is conductive, a pulse signal is output from the external output terminal plate 261 to the hall computer 262, It is not limited to this. That is, when the connection of each part of the main frame opening detection circuit 280 is changed, the inner frame 12 or the front frame 14 is opened, and the opened inner frame 12 or the front frame 14 is closed, A current may be supplied for about 10 ms to output a pulse signal from the external output terminal plate 261 to the hall computer 262.

  However, in the frame open detection circuit 280 of the present embodiment, when the inner frame 12 or the front frame 14 is open and the switch SW1 or the switch SW2 is conductive, a pulse signal from the external output terminal plate 261 to the hall computer 262 Can be detected quickly, so that the opening of the inner frame 12 or the front frame 14 can be detected quickly. Thus, the opening of the inner frame 12 or the front frame 14 can be detected before the inner frame 12 or the front frame 14 is opened and the main control device 110 or the game board 13 is tampered with. Therefore, it is possible to prevent an abnormal operation due to the fraudulent action that occurs when power is supplied to the pachinko machine.

  Next, a pachinko machine 500 of a fourth embodiment will be described with reference to FIGS. In the pachinko machine 500 of the fourth embodiment, when power is supplied to the pachinko machine 500 and a DC voltage of 12 volts is supplied from the DC power supply DC1, either the inner frame 12 or the front frame 14 is When released, the pachinko machine 500 is used to separately notify which one has been released, and separately which one is released is output to the hall computer 262. On the other hand, in the pachinko machine 500 of the fourth embodiment, for example, when the operating time of the game arcade is over and the power supply to the pachinko machine is shut off and the DC voltage of 12 volts is not supplied from the DC power supply DC1. Even if the control of the main control unit 110 is stopped, when either the inner frame 12 or the front frame 14 is opened, which one is opened is separately output to the hall computer 262.

  Therefore, according to the pachinko machine 500 of the fourth embodiment, when any of the inner frame 12 and the front frame 14 is opened when a DC voltage of 12 volts is supplied from the DC power supply DC1, the inner frame The pachinko machine 500 can be used to separately notify whether there is an opening 12, an opening of the front frame 14, or both openings. Furthermore, according to the pachinko machine 500 of the fourth embodiment, in addition to the case where a DC voltage of 12 volts is supplied from the DC power supply DC1, the case where a DC voltage of 12 volts is not supplied from the DC power supply DC1. Also, when either the inner frame 12 or the front frame 14 is opened, pulse signals can be separately output to the hall computer 262. Therefore, the pulse signal stored in the hall computer 262 can identify whether the inner frame 12 has been opened, the front frame 14 has been opened, or both have been opened.

  The internal configuration of a pachinko machine 500 according to the fourth embodiment will be described with reference to FIG. FIG. 22 is a perspective view of the pachinko machine 500 with the inner frame 12, the front frame 14 and the lower tray unit 15 opened. In the pachinko machine 500 of the fourth embodiment, the switches SW1 (SW1a and SW1b) and the switches SW2 (SW2a and SW2b) provided in the pachinko machine 10 of the first embodiment described above with reference to FIG. ) Is changed to switch SW3 and switch SW4. Therefore, the same parts as those of the pachinko machine 10 described above with reference to FIG. 4 are assigned the same reference numerals and descriptions thereof will be omitted, and only different parts will be described.

  Between the outer frame 11 and the inner frame 12, a switch SW3 for detecting the opening and closing of the inner frame 12 is provided. Between the inner frame 12 and the front frame 14, the front frame 14 is opened and A switch SW4 for detecting closure is provided. The opening and closing of the inner frame 12 and the opening and closing of the front frame 14 can be separately detected by the switch SW3 and the switch SW4.

  Next, with reference to FIG. 23, the structures of the switch SW3 and the switch SW4 will be described. Since the switch SW3 and the switch SW4 have the same structure, the structure of the switch SW3 will be described, and the description of the switch SW4 will be omitted.

  FIG. 23 is a cross-sectional view of the switch SW3. FIG. 23A is a cross-sectional view showing the state (cutoff state) of the switch SW3 in a state in which the inner frame 12 is closed. FIG. 23B is a cross-sectional view showing the state (conductive state) of the switch SW3 in the state where the inner frame 12 is opened.

  As shown in FIG. 23A, the switch SW3 disposed on the surface of the outer frame 11 facing the inner frame 12 includes a movable shaft SW3a that abuts the closed state of the inner frame 12 and its movable shaft Conductor plates SW3-1a and SW3-2a made of metal which is a conductive member disposed in SW3a, and metals provided at opposing positions of the conductor plates SW3-1a and SW3-2a Support plates SW3-1c and SW3-2c for arranging the pair of terminal plates SW3-1b and SW3-2b and the pair of terminal plates SW3-1b and SW3-2b in the casing SW3b, and the conductor plate SW3 -2a is disposed on the surface opposite to the surface facing the pair of terminal boards SW3-2b, and generates a biasing force in a direction toward the pair of terminal boards SW3-2b with respect to the conductor board SW3-2a Spring SW3c and It is provided. The switch SW3-1 is configured by the conductor plate SW3-1a and the pair of terminal plates SW3-1b, and the switch SW3-2 is configured by the conductor plate SW3-2a and the pair of terminal plates SW3-2b. Thus, the switch SW3 incorporates two switches, the switch SW3-1 and the switch SW3-2.

  As shown in FIG. 23A, when the inner frame 12 is closed, the movable shaft SW3a is in contact with the inner frame 12, and the movable shaft SW3a is pushed into the housing SW3b. Accordingly, the contact between the conductor plate SW3-1a and the pair of terminal plates SW3-1b is prevented, and the contact between the conductor plate SW3-2a and the pair of terminal plates SW3-2b is prevented. Therefore, in the state where the inner frame 12 is closed, the switches SW3-1 and SW3-2 both become in a state in which the conduction is cut off.

  On the other hand, as shown in FIG. 23 (b), when the inner frame 12 is open, the contact between the movable shaft SW3a and the inner frame 12 is released, so the biasing force of the pair of springs SW3c The plate SW3-1a is in contact with the pair of terminal plates SW3-1b, and the conductor plate SW3-2a is in contact with the pair of terminal plates SW3-2b. Therefore, in the state in which the inner frame 12 is open, both the switch SW3-1 and the switch SW3-2 are in the conductive state.

  As described above, while the switch SW3-1 and the switch SW3-2 incorporated in the case SW3b are both in the closed state when the inner frame 12 is closed, the conductive state is obtained when the inner frame 12 is opened. It becomes. That is, the switch SW3-1 and the switch SW3-2 have a structure in which the conduction state and the interruption state operate in conjunction with each other. However, the structure of the switch SW3 is not limited to the shape described in FIG. 23, and in the state where the inner frame 12 is closed, the switch SW3-1 and the switch SW3-2 are cut off, while the inner frame 12 is closed. In the open state, the switch SW3-1 and the switch SW3-2 may be in a conductive state. The same applies to the structure of the switch SW4.

  Next, an electrical configuration of the pachinko machine 500 will be described with reference to FIG. FIG. 24 is a block diagram showing an electrical configuration of the pachinko machine 500. As shown in FIG. In the pachinko machine 500 of the fourth embodiment, the circuit configuration of the frame opening detection circuit 260 provided in the main control device 110 of the pachinko machine 10 of the first embodiment described above with reference to FIG. It is changed to the frame open detection circuit 290, and the electrical connection of the inner frame frame open detection circuit 290 is changed. And the pachinko machine 500 of 4th Embodiment changes the external output terminal board 261 mentioned above in FIG. 6 into the external output terminal board 291 for inner frames. In addition to this, in the pachinko machine 500 of the fourth embodiment, a front frame open detection circuit 292 is newly provided in the main control device 110 of the pachinko machine 10 of the first embodiment described above with reference to FIG. is there. In the pachinko machine 500 of the fourth embodiment, a front frame external output terminal plate 293 is newly provided corresponding to the front frame frame opening detection circuit 292 newly provided in the main control device 110. It is. Therefore, the same parts as those of the pachinko machine 10 described above with reference to FIG. 6 will be assigned the same reference numerals and descriptions thereof will be omitted, and only different parts will be described.

  The main control device 110 is provided with an inner frame opening detection circuit 290 that detects the opening of the inner frame 12 when the switch SW3 (the switch SW3-1 and the switch SW3-2) conducts. The inner frame opening detection circuit 290 is an input / output port 205 which is an input / output port of the MPU 201, a switch SW3 for detecting opening of the inner frame 12, and an outer output for the inner frame configured to be connectable to the hall computer 262. The terminal board 291 is connected. An input / output unit (input / output unit) that performs signal input / output for connection between the switch SW3 and the inner frame open detection circuit 290 and connection between the inner open frame detection circuit 290 and the outer output terminal board for inner frame 291 The connection is made via an input / output port different from the input / output port 205 (not shown).

  When the power supply to the pachinko machine 500 is performed and the DC voltage of 12 volts is supplied from the DC power supply DC1, the inner frame frame open detection circuit 290 switches SW3 (switches SW3-1 and SW3-2). When it is detected that the inner frame 12 is open, a signal of 5 volts DC is output to the input / output port 205. When this signal is input to the input / output port 205, the pachinko machine 500 turns on an inner frame open flag 203a described later, and an inner frame open command indicating the opening of the inner frame 12 is input via the input / output port 205. It is output to the audio lamp control device 113. Then, the voice lamp control device 113 that has received this inner frame open command turns on an inner frame open command reception flag 223a described later, and outputs an inner frame open command to the display control device 114. The lamp display device 227 is used to notify that the inner frame 12 is open. In addition, the display control device 114 that has received the inner frame open command output from the audio lamp control device 113 turns on a display inner frame open command reception flag 233c described later, and displays a message indicating opening of the inner frame 12 3 Display on the symbol display device 81. In addition to this, when the switch SW3 (the switch SW3-1 and the switch SW3-2) becomes conductive to detect the opening of the inner frame 12, the inner frame frame open detection circuit 290 detects a hole from the inner frame external output terminal plate 291. A pulse signal having a pulse width of 10 ms is output to the computer 262.

  On the other hand, when the operating time of the game arcade is ended and the power supply to the pachinko machine 500 is cut off and the DC voltage of 12 volts is not supplied from the DC power supply DC1, for example, When the switch SW3 (the switch SW3-1 and the switch SW3-2) is turned on to detect the opening of the inner frame 12, no signal is output to the input port 205, and a hole is formed from the inner frame external output terminal plate 291. A pulse signal having a pulse width of 10 ms is output to the computer 262. The pulse signal output from the inner frame external output terminal plate 291 is stored in the hall computer 262. Therefore, by analyzing the pulse signal stored in the hall computer 262, the opening of the inner frame 12 can be detected.

  Further, the main control device 110 is provided with a front frame opening detection circuit 292 that detects the opening of the front frame 14 when the switch SW4 (the switch SW4-1 and the switch SW4-2) becomes conductive. The front frame frame open detection circuit 292 is an input / output port 205 which is an input / output port of the MPU 201, a switch SW4 for detecting the opening of the front frame 14, and an external output for front frame configured to be connectable to the hall computer 262. The terminal board 293 is connected. An input / output unit (input / output unit) for inputting / outputting signals for connection between the switch SW4 and the front frame frame open detection circuit 292 and connection between the front frame frame open detection circuit 292 and the front frame external output terminal plate 293 The connection is made via an input / output port different from the port 205 (not shown).

  The front frame opening detection circuit 292 has the same function as the inner frame opening detection circuit 290 described above. That is, when the power supply to the pachinko machine 500 is performed and the DC voltage of 12 volts is supplied from the DC power supply DC1, the switch SW4 (the switch SW4-1 and the switch SW4-2) becomes conductive and the front frame 14 When it detects the open state, it outputs a signal of 5 volts DC to the input / output port 205. When this signal is input to the input / output port 205, the pachinko machine 500 turns on the front frame open flag 203b described later, and the front frame open command indicating the open of the front frame 14 is input via the input / output port 205. It is output to the audio lamp control device 113. Then, the voice lamp control device 113 that has received this front frame open command turns on the front frame open command reception flag 223b described later, and outputs the front frame open command to the display control device 114. The lamp display device 227 is used to notify that the front frame 14 is open. In addition, the display control device 114 that has received the front frame open command output from the audio lamp control device 113 turns on the display front frame open command reception flag 233 d and displays a message indicating the open of the front frame 14 with the third symbol It is displayed on the display device 81. In addition to this, when the switch SW4 (the switch SW4-1 and the switch SW4-2) conducts to detect the opening of the front frame 14, the front frame frame open detection circuit 292 detects a hole from the front frame external output terminal plate 293. A pulse signal having a pulse width of 10 ms is output to the computer 262.

  On the other hand, in the front frame opening detection circuit 292, for example, the power supply to the pachinko machine 500 is shut off after the business hours of the game arcade have ended and the DC voltage of 12 volts is not supplied from the DC power supply DC1. When the switch SW4 (the switch SW4-1 and the switch SW4-2) is turned on to detect the opening of the front frame 14, no signal is output to the input port 205, and a hole is formed from the front frame external output terminal plate 293. A pulse signal having a pulse width of 10 ms is output to the computer 262. The pulse signal output from the front frame external output terminal plate 293 is stored in the hall computer 262. Therefore, by analyzing the pulse signal stored in the hall computer 262, the opening of the front frame 14 can be detected.

  Here, the front frame opening detection circuit 292 and the inner frame opening detection circuit 290 are respectively connected to different input ports of the input / output port 205. Therefore, the signal output from the front frame opening detection circuit 292 and the signal output from the inner frame opening detection circuit 290 are separately input to the input / output port 205. Therefore, the MPU 201 mounted on the main control unit 110 outputs the signal input to the input / output port 205 as the signal output from the front frame opening detection circuit 292 or the inner frame opening detection circuit 290. Can be determined.

  The front frame external output terminal plate 293 and the inner frame external output terminal plate 291 are connected to different input terminals of the hall computer 262, respectively. Therefore, the pulse signal output from the front frame external output terminal plate 293 and the pulse signal output from the inner frame external output terminal plate 291 are separately input to the hall computer 262. Thus, the pulse signal output from the front frame external output terminal plate 293 and the pulse signal output from the inner frame external output terminal plate 291 can be stored separately in the hall computer 262. Therefore, by analyzing the pulse signals stored individually in the hall computer 262, it is possible to detect whether the inner frame 12 has been opened or the front frame 14 has been opened.

  As described above, the main control unit 110 includes the inner frame opening detection circuit 290 that operates when the inner frame 12 is opened and the front opening detection circuit 292 that operates when the front frame 14 is opened. Provided separately. Therefore, when either or both of the inner frame 12 and the front frame 14 are opened, in addition to being able to determine which opening has occurred by the notification performed by the pachinko machine 500, the hall computer It can also be determined by the pulse signal stored in 262.

  The RAM 203 of the main control unit 110 is provided with an inner frame open flag 203a and a front frame open flag 203b. The inner frame open flag 203 a is a flag indicating the open state or the closed state of the inner frame 12. As described above, when the power supply to the pachinko machine 500 is performed and the DC voltage of 12 volts is supplied from the DC power supply DC1, the inner frame 12 is opened, and the switch SW3 (the switch SW3-1 and the switch SW3 When -2) conducts, a signal of 5 volts DC is output from the inner frame opening detection circuit 290 to the input / output port 205. When the 5-volt signal is detected by the MPU 201 through the input / output port 205, the inner frame open flag 203a is turned on. When the inner frame open flag 203a is turned on, the MPU 201 transmits, to the sound lamp control device 113, an inner frame open command notifying that the inner frame 12 has been opened.

  On the other hand, when the power supply to the pachinko machine 500 is performed and the DC voltage of 12 volts is supplied from the DC power supply DC1, the inner frame 12 is closed, and the switch SW3 (switch SW3-1 and switch SW3-2 Signal is stopped from the inner frame opening detection circuit 290 to the input / output port 205 (the output from the inner frame opening detection circuit 290 to the input / output port 205 is zero volts). ). When the stop of the signal output is detected by the MPU 201 through the input / output port 205, the inner frame open flag 203a is turned off. When the inner frame opening flag 203a is turned off, the MPU 201 transmits, to the sound lamp control device 113, an inner frame closing command notifying that the inner frame 12 is closed. As described above, when the inner frame 12 is opened, the inner frame open flag 203a is turned on, and when the inner frame 12 is closed, the inner frame open flag 203a is turned off.

  The front frame open flag 203b is a flag indicating the open state or the closed state of the front frame 14. When power is supplied to the pachinko machine 500 and a DC voltage of 12 volts is supplied from the DC power supply DC1, the front frame 14 is opened, and the switch SW4 (the switch SW4-1 and the switch SW4-2) When turned on, a signal of 5 volts DC is outputted from the front frame opening detection circuit 292 to the input / output port 205. When the 5-volt signal is detected by the MPU 201 through the input / output port 205, the front frame open flag 203b is turned on. When the front frame open flag 203b is turned on, the MPU 201 transmits, to the sound lamp control device 113, a front frame open command for notifying that the front frame 14 has been opened.

  On the other hand, when power is supplied to the pachinko machine 500 and a DC voltage of 12 volts is supplied from the DC power supply DC1, the front frame 14 is closed, and the switch SW4 (the switch SW4-1 and the switch SW4-2 Signal is stopped from the front frame opening detection circuit 292 to the input / output port 205 (the output from the front opening detection circuit 292 to the input / output port 205 is zero volts). ). When the stop of the signal output is detected by the MPU 201 through the input / output port 205, the front frame open flag 203b is turned off. When the front frame opening flag 203b is turned off, the MPU 201 transmits, to the sound lamp control device 113, a front frame closing command notifying that the front frame 14 has been closed. Thus, when the front frame 14 is opened, the front frame open flag 203b is turned on, and when the front frame 14 is closed, the front frame open flag 203b is turned off.

  The RAM 223 of the voice lamp control device 113 is provided with an inner frame open command reception flag 223a and a front frame open command reception flag 223b. The inner frame open command reception flag 223a is a flag indicating whether the command received by the voice lamp control device 113 is an inner frame open command or an inner frame close command. As described above, when power is supplied to the pachinko machine 500 and a DC voltage of 12 volts is supplied from the DC power supply DC1, the inner frame open flag 203a is turned on when the inner frame 12 is opened. The MPU 201 transmits an inner frame open command to the sound lamp control device 113. When the inner frame open command is detected by the MPU 221 through the input / output port 225, the inner frame open command reception flag 223a is turned on. When the inner frame open command reception flag 223a is turned on, the MPU 221 transmits, to the display control device 114, an inner frame open command notifying that the inner frame 12 has been opened. Further, the MPU 221 uses an audio output device 226 and a lamp display device 227 to notify that the inner frame 12 is open.

  On the other hand, when the power supply to the pachinko machine 500 is performed and the DC voltage of 12 volts is supplied from the DC power supply DC1, when the inner frame 12 is closed, the inner frame open flag 203a is turned off and the voice is An inner frame closing command is transmitted to the lamp control device 113 by the MPU 201. When the inner frame closing command is detected by the MPU 221 through the input / output port 225, the inner frame open command reception flag 223a is turned off. When the inner frame open command reception flag 223a is turned off, the MPU 221 transmits, to the display control device 114, an inner frame closing command notifying that the inner frame 12 is closed. Further, the MPU 221 stops the notification performed using the audio output device 226 and the lamp display device 227. Thus, when the inner frame 12 is released and the inner frame open command is detected by the MPU 221, the inner frame open command reception flag 223a is turned on, while the inner frame 12 is closed and the inner frame closed command is sent to the MPU 221. When detected, the inner frame release command reception flag 223a is turned off.

  The front frame open command reception flag 223b is a flag indicating whether the command received by the voice lamp control device 113 is a front frame open command or a front frame close command. When power is supplied to the pachinko machine 500 and a DC voltage of 12 volts is supplied from the DC power supply DC1, when the front frame 14 is opened, the front frame open flag 203b is turned on to control the audio lamp The front frame open command is transmitted to the device 113 by the MPU 201. When the front frame open command is detected by the MPU 221 through the input / output port 225, the front frame open command reception flag 223b is turned on. When the front frame open command reception flag 223b is turned on, the MPU 221 transmits, to the display control device 114, a front frame open command notifying that the front frame 14 has been opened. Further, the MPU 221 uses an audio output device 226 and a lamp display device 227 to notify that the front frame 14 is open.

  On the other hand, when power is supplied to the pachinko machine 500 and a DC voltage of 12 volts is supplied from the DC power supply DC1, when the front frame 14 is closed, the front frame open flag 203b is turned off and the voice is The front frame closing command is transmitted to the lamp control device 113 by the MPU 201. When the front frame closing command is detected by the MPU 221 through the input / output port 225, the front frame open command reception flag 223b is turned off. When the front frame open command reception flag 223b is turned off, the MPU 221 transmits, to the display control device 114, a front frame closing command for notifying that the front frame 14 is closed. Further, the MPU 221 stops the notification performed using the audio output device 226 and the lamp display device 227. Thus, when the front frame 14 is opened and the front frame open command is detected by the MPU 221, the front frame open command reception flag 223b is turned on, while the front frame 14 is closed and the front frame closed command is sent to the MPU 221. When it is detected, the front frame open command reception flag 223b is turned off.

  The RAM 233 of the display control device 114 is provided with a rendering permission flag 233a, a variation start flag 233b, a display inner frame opening command reception flag 233c, and a display front frame opening command reception flag 233d. The effect permission flag 233a is a flag for permitting the start of the display of the third symbol display device 81, and the effect permission command transmitted after the processing of the initial setting of the main control device 110 is performed via the voice lamp control device 113 When the display control device 114 receives (when the effect permission command is detected by the MPU 231 via the input port 237), it is turned on. Once the effect permission flag 233a is turned on, the on state is continued.

  The fluctuation start flag 233b is a flag for permitting the start of the fluctuation display in the third symbol display device 81, and the display control device 114 changes the fluctuation pattern command output from the main control device 110 to the voice lamp control device 113. It is turned on (when the MPU 231 detects the fluctuation pattern command output from the main control unit 110 via the input port 237) when it is received via the communication port 237. The fluctuation start flag 233b is turned off when the fluctuation display is started in the third symbol display device 81. Here, the reason that the fluctuation start flag 233b is turned off is that, in the present embodiment, the fluctuation display is started in the third symbol display device 81 when the fluctuation start flag 233b is turned on, If the change start flag 233b is not turned off, the process of the change start described later (the process of S1010 in FIG. 31) is repeatedly performed, and the normal process is not performed.

  Next, the display inner frame release command reception flag 233c will be described. The display inner frame open command reception flag 233c is a flag indicating whether the command received by the display control device 114 is an inner frame open command or an inner frame close command. As described above, when power is supplied to the pachinko machine 500 and a DC voltage of 12 volts is supplied from the DC power supply DC1, when the inner frame 12 is opened, the main controller 110 controls the audio lamp controller An inner frame open command is transmitted to the display control device 114 via the link 113, informing that the inner frame 12 has been opened. When the inner frame open command is detected by the MPU 231 through the input port 237, the display inner frame open command reception flag 233c is turned on. When the display inner frame release command reception flag 233c is turned on, the MPU 231 displays a message indicating the release of the inner frame 12 on the third symbol display device 81.

  On the other hand, when power is supplied to the pachinko machine 500 and a DC voltage of 12 volts is supplied from the DC power supply DC1, when the inner frame 12 is closed, the main controller 110 controls the sound lamp controller 113. An inner frame closing command is transmitted to the display control device 114 to notify that the inner frame 12 has been closed. When the inner frame closing command is detected by the MPU 231 through the input port 237, the display inner frame open command reception flag 233c is turned off. When the display inner frame release command reception flag 233c is turned off, the MPU 231 deletes the message indicating the release of the inner frame 12 displayed on the third symbol display device 81.

  Finally, the display front frame open command reception flag 233d will be described. The display front frame open command reception flag 233 d is a flag indicating whether the command received by the display control device 114 is a front frame open command or a front frame close command. When power is supplied to the pachinko machine 500 and a DC voltage of 12 volts is supplied from the DC power supply DC1, when the front frame 14 is opened, the main control unit 110 via the audio lamp control unit 113 , And sends a display frame open command to the display control device 114 to notify that the front frame 14 has been opened. When the front frame open command is detected by the MPU 231 through the input port 237, the display front frame open command reception flag 233d is turned on. When the display front frame open command reception flag 233 d is turned on, the MPU 231 displays a message indicating the opening of the front frame 14 on the third symbol display device 81.

  On the other hand, when the power supply to the pachinko machine 500 is performed and the DC voltage of 12 volts is supplied from the DC power supply DC1, when the front frame 14 is closed, the main controller 110 controls the audio lamp controller 113. A front frame closing command is transmitted to the display control device 114 to notify that the front frame 14 has been closed. When the front frame closing command is detected by the MPU 231 via the input port 237, the display front frame opening command reception flag 233d is turned off. When the display front frame open command reception flag 233 d is turned off, the MPU 231 erases the message indicating the opening of the front frame 14 displayed on the third symbol display device 81.

  Next, with reference to FIG. 25, the inner frame opening detection circuit 290 and the inner output output terminal plate 291 used in the pachinko machine 500 of the fourth embodiment will be described. FIG. 25 is a block diagram showing an electrical configuration of the inner frame opening detection circuit 290 and the outer output terminal plate 291 for the inner frame. Note that the inner frame opening detection circuit 290 removes the switch SW2 connected in parallel to the switch SW1 of the opening detection circuit 280 of the third embodiment described above with reference to FIG. 20, and switches the switch SW1 to the switch SW3-1. It is comprised from the terminal board output circuit 290a for inner frames which changed, and the input / output port output circuit 290b for inner frames which has switch SW3-2 which operate | moves interlockingly with switch SW3-1. The inner frame terminal plate output circuit 290a has the same configuration as the frame open detection circuit 280 of the third embodiment described above with reference to FIG. 20 except that the switch SW2 is removed and the switch SW1 is changed to the switch SW3-1. It is. The inner frame external output terminal plate 291 has the same configuration as the external output terminal plate 261 of the third embodiment described above with reference to FIG. Therefore, for the inner frame opening detection circuit 290 and the inner outer output terminal board 291, the same parts as those of the frame open detection circuit 280 and the outer output terminal board 261 described above with reference to FIG. The explanation will be omitted and only the different parts will be explained.

  Further, the front frame frame open detection circuit 292 has a front frame terminal plate output circuit 292a (not shown) and a front frame input / output port output circuit 292b, similarly to the configuration of the inner frame frame open detection circuit 290. And (not shown). Front frame terminal plate output circuit 292a differs from inner frame terminal plate output circuit 290a only in that the switch to be connected is changed from switch SW3-1 to switch SW4-1; The configuration is the same as that of the frame terminal board output circuit 290a. That is, the front frame terminal board output circuit 292 a differs from the inner frame frame open detection circuit 290 only in the switch connected thereto, and has the same function as the inner frame frame open detection circuit 290. Similarly, front frame input / output port output circuit 292b differs from inner frame input / output port output circuit 290b only in that the switch connected is changed from switch SW3-2 to switch SW4-2. , And others have the same configuration as the inner frame input / output port output circuit 290b. That is, the front frame input / output port output circuit 292b differs from the inner frame input / output port output circuit 290b only in the switch connected thereto, and has the same function as the inner frame input / output port output circuit 290b. The front frame external output terminal plate 293 has the same configuration as the inner frame external output terminal plate 291, that is, the same configuration as the external output terminal plate 261 of the third embodiment described above with reference to FIG. is there. Therefore, the description of the front frame opening detection circuit 292 (front frame terminal plate output circuit 292a and front frame input / output port output circuit 292b) and the front frame external output terminal plate 293 will be omitted.

  As shown in FIG. 25, in the switch SW3-2 used for the inner frame input / output port output circuit 290b, one end of the switch SW3-2 (one end of the terminal plate 3-2b) is the DC power source DC1 and the anode of the diode D1. The other end of the switch SW3-2 (the other end of the terminal plate 3-2b) is connected to one end of a resistor R11 having a resistance value of 140 kΩ.

  The other end of the resistor R11 is connected to one end of a resistor R12 having a resistance value of 100 kΩ and the input / output port 205, and the other end of the resistor R12 is grounded. The resistor R11 and the resistor R12 constitute a voltage dividing circuit that divides the DC voltage of 12 volts supplied from the DC power supply DC1. Therefore, when power is supplied to the pachinko machine 500 and a DC voltage of 12 volts is supplied from the DC power supply DC1, when the inner frame 12 is opened and the switch SW3-2 is turned on, the DC power supply DC1 is The 12 volt DC voltage supplied is divided by the resistors R11 and R12. At this time, the DC voltage applied to the resistor R12 is about 5 volts. Therefore, when the inner frame 12 is opened and the switch SW3-2 is turned on, a signal of 5 volts is input from the inner frame input / output port output circuit 290b to the input / output port 205. When power is supplied to the pachinko machine 500 and a DC voltage of 12 volts is supplied from the DC power supply DC1, the inner frame 12 is opened and provided in the inner frame terminal plate output circuit 290a. When the switch SW3-1 becomes conductive, the inner frame terminal plate output circuit 290a performs the same operation as the operation described in the frame opening detection circuit 280 of the third embodiment in FIG. And a pulse signal of 10 ms in pulse width are output to the hall computer 262.

  On the other hand, when power is supplied to the pachinko machine 500 and a DC voltage of 12 volts is supplied from the DC power supply DC1, the inner frame 12 is closed and provided in the inner frame input / output port output circuit 290b. When the switch SW3-2 is turned off, no DC voltage is applied to the resistors R11 and R12. Therefore, when the switch SW3 shuts off and the switch SW3-2 shuts off, no signal is input from the inner frame input / output port output circuit 290b to the input / output port 205 (input / output from the inner frame input / output port output circuit 290b) The DC voltage input to the port 205 is zero volts). When power is supplied to the pachinko machine 500 and a DC voltage of 12 volts is supplied from the DC power supply DC1, the inner frame 12 is closed and provided in the inner frame terminal plate output circuit 290a. When the switch SW3-1 turns off, the inner frame terminal plate output circuit 290a performs the same operation as the operation described in the frame open detection circuit 280 of the third embodiment in FIG. 20, and detection of the inner frame 12 is performed again. It is set to the possible state.

  For example, when the operating time of the game arcade is over and the power supply to the pachinko machine 500 is cut off, the DC voltage of 12 volts is not supplied from the DC power supply DC1, so the switch SW3-2 is conducted. Also, no signal is input from the inner frame input / output port output circuit 290b to the input / output port 205 (the DC voltage input from the inner frame input / output port output circuit 290b to the input / output port 205 is zero volts).

  However, power is supplied to the inner frame terminal plate output circuit 290a from the capacitor CD1 as described in the frame opening detection circuit 280 of the third embodiment of FIG. Therefore, for example, even when the operating hours of the game arcade are over and the power supply to the pachinko machine 500 is shut off, the inner frame 12 is opened and provided in the inner frame terminal board output circuit 290a. When the switch SW3-1 becomes conductive, the inner frame terminal plate output circuit 290a outputs a pulse signal having a pulse width of 10 ms to the hole computer 262 from the inner frame external output terminal plate 291.

  As described above, when power is supplied to the pachinko machine 500 and the DC voltage of 12 volts is supplied from the DC power supply DC1, the inner frame 12 is opened, and the input / output port output circuit for inner frame 290b is performed. When the provided switch SW3-2 conducts, a signal of 5 volts is input from the inner frame input / output port output circuit 290b to the input / output port 205. When a signal of 5 volts is input to the input / output port 205, the pachinko machine 500 uses an audio output device 226 and a lamp display device 227 to notify that the inner frame 12 is open. In addition, the pachinko machine 500 displays a message indicating the opening of the inner frame 12 on the third symbol display device 81. Furthermore, when the inner frame 12 is opened and the switch SW3-1 provided in the inner frame terminal plate output circuit 290a conducts, the inner frame terminal plate output circuit 290a is turned to the hole from the inner frame external output terminal plate 291. A pulse signal having a pulse width of 10 ms is output to the computer 262.

  On the other hand, for example, when the operating time of the game arcade is over and the power supply to the pachinko machine 500 is cut off, the inner frame 12 is opened since the DC voltage of 12 volts is not supplied from the DC power supply DC1. Even when the switch SW3-2 provided in the inner frame input / output port output circuit 290b conducts, no signal is input from the inner frame input / output port output circuit 290b to the input / output port 205 (inner frame input / output The DC voltage input from the port output circuit 290b to the input / output port 205 is zero volts). However, even if, for example, the operating time of the game arcade is over and the power supply to the pachinko machine 500 is cut off, the power is supplied from the capacitor CD1 to the inner frame terminal board output circuit 290a. Therefore, when the inner frame 12 is opened and the switch SW3-1 provided in the inner frame terminal plate output circuit 290a conducts, the inner frame terminal plate output circuit 290a outputs the signal from the inner frame external output terminal plate 291. A pulse signal having a pulse width of 10 ms is output to the hall computer 262.

  The pulse signal output from the inner frame external output terminal plate 291 is stored in the hall computer 262 which keeps operating for 24 hours. Therefore, by the pulse signal stored in the hall computer 262, the pachinko machine in which the inner frame 12 has been opened can be identified. Furthermore, the hall computer 262 outputs the pulse signal from the inner frame external output terminal plate 291 and stores the output time of the output pulse signal so that the inner frame 12 of the specified pachinko machine is opened. Time can be detected.

  Thus, when the inner frame 12 is opened when power is supplied to the pachinko machine 500, the function of outputting a pulse signal to the hall computer 262 and the power supply to the pachinko machine 500 are cut off. When the inner frame 12 is open, the function of outputting a pulse signal to the hall computer 262 can be exhibited by the inner frame terminal plate output circuit 290 a which is one circuit.

  Further, one end of the switch SW3-2 of the inner frame input / output port output circuit 290b is connected to the DC power supply DC1 and the anode terminal of the diode D1. Therefore, when the inner frame 12 is opened when the pachinko machine 500 is powered on, the switch SW3-2 is turned on to supply power from the DC power supply DC1 to the inner frame input / output port output circuit 290b. Thus, the inner frame input / output port output circuit 290b is in an operating state. On the other hand, when the pachinko machine 500 is powered off, no power is supplied from the DC power supply DC1 to the inner frame input / output port output circuit 290b, so the inner frame 12 is opened and the switch SW3-2 is opened. Even in this case, the inner frame input / output port output circuit 290b is in the stop state.

  On the other hand, one end of the switch SW3-1 of the inner frame terminal plate output circuit 290a is connected to one end of the capacitor CD1 via the diode D2 and the resistor R10. Therefore, when the inner frame 12 is opened when the power of the pachinko machine 500 is turned on, the switch SW3-1 becomes conductive, and power is supplied from the DC power supply DC1 to the inner frame terminal plate output circuit 290a. The inner frame terminal board output circuit 290a is in an operating state. On the other hand, when the pachinko machine 500 is powered off, the power supply from the DC power supply DC1 to the inner frame terminal plate output circuit 290a is stopped, but the inner frame 12 is opened and the switch SW3-1 is turned on. Then, since power is supplied from the capacitor CD1 to the inner frame terminal plate output circuit 290a, the inner frame terminal plate output circuit 290a is in an operating state. Here, when the pachinko machine 500 is powered off and power is supplied from the capacitor CD1 to the inner frame terminal plate output circuit 290a, power is supplied to the inner frame input / output port output circuit 290b. It can be cut off by the diode D1 that exerts a backflow prevention function. Therefore, when the power of the pachinko machine 500 is turned off, the number of times the inner frame terminal plate output circuit 290a can be operated can be increased, and the number of times the open of the inner frame 12 can be detected can be increased.

  In the timer IC1 of the inner frame terminal plate output circuit 290a, when the inner frame 12 is opened, the switch SW3-1 is turned on, and the voltage applied to the TRG terminal of the timer IC1 falls to zero volts, this rising occurs. It functions as a monostable multivibrator that raises the voltage of the OUT terminal of the timer IC1 from zero volt to about 9.6 volts for about 10 ms from the fall. Then, by providing the integrating circuit 281 in the previous stage of the TRG terminal of the timer IC1, when the inner frame 12 is opened, the voltage applied to the TRG terminal of the timer IC1 is regardless of the open period of the inner frame 12. After falling to zero volts, the period until it returns to about 10.3 volts can be adjusted to be shorter than the period when the voltage at the OUT terminal of timer IC1 rises from zero volts to about 9.6 volts. As described above, the timer IC1 functions as a monostable multivibrator by setting the falling period of the TRG terminal voltage of the timer IC1 to a fixed period (about 2 ms) regardless of the open period of the inner frame 12 by the integration circuit 281. Can be normally operated, and the period in which the voltage at the OUT terminal of the timer IC1 rises from zero volts to about 9.6 volts can be kept to about 10 ms. Thus, the period in which current is supplied from the capacitor CD1 to the photocoupler PR1 can be limited to about 10 ms, and the output period of the pulse signal output from the inner frame external output terminal plate 291 to the hole computer 262 is about 10 ms. You can fasten it.

  Next, referring to FIG. 26, regardless of the on / off state of the power supply of pachinko machine 500, the terminal board output for the inner frame changes according to the conduction / non-connection state of switch SW3-1 (open / close state of inner frame 12). Pachinko machine 500, TRG terminal voltage of timer IC1 of circuit 290a, OUT terminal voltage of timer IC1 of terminal board output circuit 290a for inner frame, output of inner frame external output terminal board 291 (input of hall computer 262) A description will be given of the relationship with the output of the inner frame input / output port output circuit 290b, which changes in accordance with the ON / OFF state (open / close state of the inner frame 12) of the switch SW3-2 when the power supply of the power source is turned on. FIG. 26 shows the on / off state of the power supply of the pachinko machine 500 (the state of the DC voltage supplied by the DC power supply DC1), and the conduction interruption state (the open / closed state of the inner frame 12) of the switch SW3-1 and the switch SW3-2. TRG terminal voltage of timer IC1 of inner frame terminal plate output circuit 290a, OUT terminal voltage of timer IC1 of inner frame terminal plate output circuit 290a, output of inner frame external output terminal plate 291 (input of hall computer 262 And the output of the inner frame input / output port output circuit 290b.

  As described above, the front frame terminal board output circuit 292a provided in the front frame frame open detection circuit 292 differs from the inner frame terminal board output circuit 290a in that the switches connected are from the switch SW3-1. Only the switch SW 4-1 is changed, and the other configuration is the same as that of the inner frame terminal board output circuit 290 a. Therefore, the operation of the front frame terminal plate output circuit 292a is the same as the operation of the inner frame terminal plate output circuit 290a. Further, the front frame input / output port output circuit 292b differs from the inner frame input / output port output circuit 290b only in that the switch connected is changed from the switch SW3-2 to the switch SW4-2, The other configuration is the same as that of the inner frame input / output port output circuit 290b. Therefore, the operation of the front frame input / output port output circuit 292b is the same as the operation of the inner frame input / output port output circuit 290b. Furthermore, since the front frame external output terminal plate 293 has the same configuration as the inner frame external output terminal plate 291, the operation of the front frame external output terminal plate 293 is the same as the inner frame external output terminal plate 291. It is. Therefore, the description of the operation of the front frame terminal plate output circuit 292a, the front frame input / output port output circuit 292b, and the front frame external output terminal plate 293 is omitted.

  As shown in FIG. 26A, the power supply of the pachinko machine 500 is in the on state until t11 o'clock (the DC voltage supplied by the DC power supply DC1 is in the 12 volt state until t11 o'clock); The power supply of the machine 500 is turned off (the DC voltage supplied by the DC power supply DC1 is zero volts). Therefore, power from the DC power supply DC1 is supplied to the inner frame terminal plate output circuit 290a and the inner frame input / output port output circuit 290b until t11: 00. Then, after t11, supply of power by the DC power supply DC1 to the inner frame terminal plate output circuit 290a and the inner frame input / output port output circuit 290b is stopped. However, since the capacitor CD1 is provided in the inner frame terminal plate output circuit 290a, after t11, power is supplied from the capacitor CD1 to the inner frame terminal plate output circuit 290a. Therefore, the inner frame terminal board output circuit 290a is in an operable state also after time t11.

  As shown in FIG. 26 (b), when the switch SW3-1 becomes conductive (the inner frame 12 is open) at t9, charging of the capacitor CD7 is started, and as shown in FIG. 26 (c), the timer The TRG terminal voltage of IC1 falls from about 10.3 volts to zero volts (at t9). Then, following this, as shown in FIG. 26D, the OUT terminal voltage of the timer IC1 rises from zero volt to about 9.6 volt (at t9). Thereby, the collector terminal and the emitter terminal of the transistor TR1 of the inner frame terminal plate output circuit 290a are conducted, and the light emitting diode on the primary side of the photocoupler PR1 of the inner frame external output terminal plate 291 (see FIG. 25) The current supply is started (at t9). Then, as shown in FIG. 26E, the output of the light receiving element (phototransistor) on the secondary side of the photocoupler PR1, that is, the output of the inner frame external output terminal plate 291 is high from the low state at t9. Switch to the state. Thereby, the output of a pulse signal indicating opening of the inner frame 12 to the hole computer 262 is started. Further, as shown in FIG. 26B, when the switch SW3-2 becomes conductive (the inner frame 12 is opened) at time t9, the resistors R11 and R12 of the inner frame input / output port output circuit 290b are DC Power from the power supply DC1 is supplied, and the voltage applied to the resistor R12 becomes 5 volts (at t9). Therefore, as shown in FIG. 26F, a signal with a DC voltage of 5 volts is output from the inner frame input / output port output circuit 290b to the input / output port 205 (at t9).

  Next, as shown in FIG. 26C, when about 2 ms elapses from t9, the charging of the capacitor CD7 is completed, and the voltage at the TRG terminal of the timer IC1 returns from zero volt to about 10.3 volts again. However, since about 10 ms has not elapsed since the voltage at the OUT terminal of timer IC1 has risen from zero volts to about 9.6 volts, the OUT terminal voltage of timer IC1 is about 9.6 volts. It is maintaining the state.

  Thereafter, when about 10 ms elapses from t9, as shown in FIG. 26 (d), the timer IC1 switches the voltage of the OUT terminal from about 9.6 volts to zero volts. Then, the collector terminal and the emitter terminal of the transistor TR1 of the inner frame terminal plate output circuit 290a are disconnected, and the current supply to one end of the resistor R7a of the inner frame external output terminal plate 291 is stopped. Therefore, the output of the inner frame external output terminal plate 291 switches from the high state to the low state as shown in FIG. As a result, the output of the pulse signal output to the hall computer 262 is stopped. Thus, by switching the output of the inner frame external output terminal plate 291, the pulse width of the pulse signal output from the inner frame external output terminal plate 291 to the hole computer 262 can be limited to about 10 ms.

  As shown in FIG. 26 (b), when the switch SW3-1 is in the closed state (the inner frame 12 is closed) at t10, the inner frame terminal plate output circuit 290a detects the inner frame 12 again. Is set to a possible state. Further, as shown in FIG. 26B, when the switch SW3-2 is in the cut off state (the inner frame 12 is closed) at t10, the resistance R11 and the resistance R12 of the inner frame input / output port output circuit 290b are output. The power supply from the DC power supply DC1 is stopped, and the voltage applied to the resistor R12 becomes zero volt (at t10). Therefore, as shown in FIG. 26 (f), the signal of 5 volts DC output from the inner frame input / output port output circuit 290b to the input / output port 205 is stopped at t10 (input for the inner frame). The output from the output port output circuit 290b to the input / output port 205 becomes zero volts at t10).

  As shown in FIG. 26 (a), when the power of the pachinko machine 500 is turned off after t11 (when the DC voltage supplied by the DC power supply DC1 becomes zero volts), the inner frame terminal plate output circuit 290a and the inner frame The supply of power by the DC power supply DC1 to the input / output port output circuit 290b is stopped. However, even if the power of the pachinko machine 500 is in the OFF state, the power from the capacitor CD1 is supplied to the inner frame terminal plate output circuit 290a. Therefore, as shown in FIG. 26 (b), when the switch SW3-1 becomes conductive (the inner frame 12 is opened) at t12, charging of the capacitor CD7 is started, as shown in FIG. 26 (c). The TRG terminal voltage of the timer IC1 falls from about 10.3 volts to zero volts (at t12). Then, following this, as shown in FIG. 26 (d), the OUT terminal voltage of the timer IC1 rises from zero volt to about 9.6 volt (at t12). Thereby, the collector terminal and the emitter terminal of the transistor TR1 of the inner frame terminal plate output circuit 290a are conducted, and the light emitting diode on the primary side of the photocoupler PR1 of the inner frame external output terminal plate 291 (see FIG. 25) The current supply is started (at t12). Then, as shown in FIG. 26E, the output of the light receiving element (phototransistor) on the secondary side of the photocoupler PR1, that is, the output of the inner frame external output terminal plate 291 is high from the low state at t12. Switch to the state. Thereby, the output of a pulse signal indicating opening of the inner frame 12 to the hole computer 262 is started. On the other hand, as shown in FIG. 26B, even if the switch SW3-2 becomes conductive (the inner frame 12 is opened) at time t12, the resistors R11 and R12 of the inner frame input / output port output circuit 290b Since the power from the DC power supply DC1 is not supplied to that (because the DC voltage supplied by the DC power supply DC1 is zero volts), the voltage applied to the resistor R12 is zero volts (at t12). Therefore, as shown in FIG. 26 (f), the signal output from the inner frame input / output port output circuit 290b to the input / output port 205 maintains the stopped state (input from the inner frame input / output port output circuit 290b). The output to the output port 205 maintains zero volts).

  The charge stored in the capacitor CD7 of the inner frame terminal plate output circuit 290a between t9 and t10 is instantaneously completed through the Zener diode D3 of the inner frame terminal plate output circuit 290a at t12. . Since the discharge period of the capacitor CD7 is a very small period from about 2 ms in which the voltage at the TRG terminal of the timer IC1 changes from about 10.3 volts to zero volts and becomes about 10.3 volts again, the TRG of the timer IC1 is It does not significantly affect the voltage applied to the terminals. Furthermore, in addition to the discharge, the charge stored in the capacitor CD7 from t9 to t10 is also discharged by the self discharge of the capacitor CD7.

  Further, at time t12, the TRG terminal of the timer IC1 of the inner frame terminal plate output circuit 290a stores the voltage of about 10.3 volts supplied from the capacitor CD1 and the capacitor CD7 of the inner frame terminal plate output circuit 290a. A voltage of about 10.3 volts associated with the stored charge may be superimposed to apply an overvoltage that is sized to destroy timer IC1. However, since the Zener diode D3 whose limiting voltage (Zener voltage) is approximately 10.5 volts is connected to the front stage of the TRG terminal of the timer IC1, the maximum value of the voltage applied to the TRG terminal of the timer IC1 is The overvoltage which is about 10.5 volts and which destroys the timer IC1 is not applied to the TRG terminal of the timer IC1.

  Next, as shown in FIG. 26C, when about 2 ms elapses from t12, the charging of the capacitor CD7 of the inner frame terminal plate output circuit 290a is completed, and the TRG terminal voltage of the timer IC1 starts again from zero volts. Return to about 10.3 volts. However, since about 10 ms has not elapsed since the voltage at the OUT terminal of timer IC1 has risen from zero volts to about 9.6 volts (time t12), the OUT terminal voltage of timer IC1 is about 9.6 volts. It is maintaining the state.

  Thereafter, when about 10 ms elapses from t12, as shown in FIG. 26 (d), the timer IC1 switches the voltage of the OUT terminal from about 9.6 volts to zero volts. Then, the collector terminal and the emitter terminal of the transistor TR1 of the inner frame terminal plate output circuit 290a are disconnected, and the current supply to one end of the resistor R7a of the inner frame external output terminal plate 291 is stopped. Therefore, as shown in FIG. 26E, the output of the inner frame external output terminal plate 291 switches from the high state to the low state when about 10 ms has elapsed from t12. As a result, the output of the pulse signal output to the hall computer 262 is stopped. Thus, by switching the output of the inner frame external output terminal plate 291, the pulse width of the pulse signal output from the inner frame external output terminal plate 291 to the hole computer 262 can be limited to about 10 ms.

  As shown in FIG. 26 (b), when the switch SW3-1 is in the closed state (the inner frame 12 is closed) at t13, the inner frame terminal plate output circuit 290a detects the inner frame 12 again. Is set to a possible state. Similarly, as shown in FIG. 26B, when the switch SW3-2 is in the shutoff state (the inner frame 12 is in the closed state) at t13, the inner frame input / output port output circuit 290b supplies power to the pachinko machine 500. Is set to a state in which the inner frame 12 can be detected.

  As described above, when the power supply to the pachinko machine 500 is performed and the DC voltage of 12 volts is supplied from the DC power supply DC1 (at the time of t11), the inner frame 12 is opened and the inner frame is opened. When the switch SW3-1 provided in the terminal board output circuit 290a is turned on, the inner frame terminal board output circuit 290a outputs a pulse signal with a pulse width of 10 ms to the hall computer 262 from the inner frame external output terminal board 291. Do. Furthermore, when the inner frame 12 is opened and the switch SW3-2 provided in the inner frame input / output port output circuit 290b conducts, a signal of 5 volts from the inner frame input / output port output circuit 290b to the input / output port 205 Is input.

  In addition, for example, even when the power supply to the pachinko machine 500 is shut off after the business hours of the game arcade have ended (even after t11), the inner frame terminal board output circuit 290a Since the power is supplied from the capacitor CD1, when the inner frame 12 is opened and the switch SW3-1 provided in the inner frame terminal plate output circuit 290a conducts, the inner frame terminal plate output circuit 290a A pulse signal having a pulse width of 10 ms is output from the inner frame external output terminal plate 291 to the hall computer 262. However, for example, when the operating time of the game arcade is over and the power supply to the pachinko machine 500 is cut off (in the case of after t11), the DC voltage of DC power from DC1 to DC 12 volts is within the inner frame Since it is not supplied to the input / output port output circuit 290b, even if the inner frame 12 is opened and the switch SW3-2 provided in the inner frame input / output port output circuit 290b conducts, the input / output for the inner frame A signal is not output from port output circuit 290 b to input / output port 205 (DC voltage output from inner frame input / output port output circuit 290 b to input / output port 205 is zero volts).

  Thus, when power is supplied to the pachinko machine 500, the function of outputting a signal to the input / output port 205 and the function of outputting a pulse signal to the hall computer 262 when the inner frame 12 is opened, And the function of outputting a pulse signal to the hall computer 262 when the inner frame 12 is opened when the power supply to the pachinko machine 500 is interrupted, the inner frame opening detection circuit 290 being one circuit. Can be demonstrated.

  Further, when the switch SW3-1 and the switch SW3-2 become conductive (the inner frame 12 is open), the timer IC1 of the inner frame terminal plate output circuit 290a performs the on period of the switch SW3-1 (in the inner frame 12). Regardless of the open period), when the switch SW3-1 becomes conductive (the inner frame 12 is open) and about 10 ms elapses after the voltage at the TRG terminal of the timer IC1 falls from about 10.3 volts to zero volts, the timer IC1 Switch the voltage at the OUT terminal of the switch from about 9.6 volts to zero volts. Thus, the supply period of the current supplied to the photocoupler PR1 of the inner frame external output terminal plate 291 is approximately 10 ms.

  Therefore, for example, the operating time of the game arcade is finished, the power supply to the pachinko machine is cut off, and to the inner frame terminal board output circuit 290a and the inner frame external output terminal board 291. Is supplied from the capacitor CD1 to the photocoupler PR1 when the DC voltage of about 10.3 volts is supplied from the capacitor CD1 to the inner frame terminal plate output circuit 290a and the inner frame external output terminal plate 291. The supply period of the supplied current can be limited to about 10 ms per one opening of the inner frame 12. Therefore, the power consumption due to the opening of the inner frame 12 can be reduced.

  Next, each control process executed by the MPU 201 in the main control device 110 of the pachinko machine 500 of the fourth embodiment will be described with reference to the flowcharts of FIGS. 27 and 28. Note that each control process executed by the main control device 110 of the pachinko machine 500 of the fourth embodiment is a main process among the control processes executed by the main control device 110 of the pachinko machine 10 of the first embodiment ( 12) and timer interrupt processing (see FIG. 15) are modified, and the other control processing is the same as each control processing executed by the main control device 110 of the pachinko machine 10 of the first embodiment. It is. Therefore, in the pachinko machine 500 of the fourth embodiment, the main process shown in FIG. 27 and the timer interrupt process shown in FIG. 28 will be described, and the descriptions of the other control processes will be omitted. For convenience of explanation, the timer interrupt process (FIG. 28) will be described first, and then the main process (FIG. 27) will be described.

  The timer interrupt process executed by the main control device 110 of the pachinko machine 500 of the fourth embodiment will be described with reference to FIG. FIG. 28 is a flowchart showing timer interrupt processing executed by the MPU 201 in the main control device 110. The timer interrupt process is executed by the MPU 201 of the main control unit 110, for example, every 2 ms. The timer interrupt process executed by the main control device 110 of the pachinko machine 500 of the fourth embodiment shown in FIG. 28 is the timer interrupt process executed by the main control device 110 of the pachinko machine 10 of the first embodiment. A process of setting the inner frame opening flag 203a and the front frame opening flag 203b on or off (the process of S506 to S513) is added between the processes of S501 and S502 (see FIG. 15). Therefore, the same parts as those of the timer interrupt process of the pachinko machine 10 according to the first embodiment described above with reference to FIG. 15 will be assigned the same reference numerals and descriptions thereof will be omitted, and only different parts will be described.

  In the timer interrupt process, first, read processing of various winning switches is executed (S501). That is, while reading the states of various switches connected to the main control device 110, the state of the switches is determined to store detection information (winning detection information).

  Next, the output reading process of the inner frame input / output port output circuit 290b is executed (S506). That is, the voltage value of the signal output from the inner frame input / output port output circuit 290 b to the input / output port 205 is read. Then, it is judged whether or not the output (signal) of the inner frame input / output port output circuit 290b read is 5 volts (S507). If the output (signal) of the inner frame input / output port output circuit 290b read is 5 volts (S507: Yes), the inner frame 12 is opened, so the inner frame open flag 203a is turned on (S508) . On the other hand, if the output (signal) of the inner frame input / output port output circuit 290b read is zero volts (S507: No), the inner frame open flag 203a is turned off since the inner frame 12 is closed (S509). ).

  After the processing of S508 or S509, the output reading processing of the front frame input / output port output circuit 292b is executed (S510). That is, the voltage value of the signal output from the front frame input / output port output circuit 292 b to the input / output port 205 is read. Then, it is judged whether or not the output (signal) of the front frame input / output port output circuit 292b read is 5 volts (S511). If the output (signal) of the front frame input / output port output circuit 292b read is 5 volts (S511: Yes), the front frame 14 is opened, so the front frame open flag 203b is turned on (S512) . On the other hand, if the output (signal) of the front frame input / output port output circuit 292b read is zero volts (S511: No), the front frame open flag 203b is turned off since the front frame 14 is closed (S513) ). After the processing of S512 or S513, update of the first initial value random number counter CINI1 and the second initial value random number counter CINI2 is executed (S502).

  As described above, when the output (signal) of the inner frame input / output port output circuit 290b read is 5 volts, the main controller 110 turns on the inner frame open flag 203a because the inner frame 12 is opened. Make it On the other hand, if the output (signal) of the inner frame input / output port output circuit 290b read is zero volts, the inner frame 12 is closed, so the inner frame open flag 203a is turned off. Further, when the output (signal) of the front frame input / output port output circuit 292b read is 5 volts, the main control unit 110 turns on the front frame open flag 203b because the front frame 14 is opened. . On the other hand, if the output (signal) of the front frame input / output port output circuit 292b read is zero volts, the front frame open flag 203b is turned off since the front frame 14 is closed.

  Next, with reference to FIG. 27, the main processing executed by the main control device 110 of the pachinko machine 500 of the fourth embodiment will be described. FIG. 27 is a flowchart showing main processing executed by the MPU 201 in the main control apparatus 110. In this main processing, main processing of the game is executed. As a summary, each process of S201 to S206 and S215 to S220 is executed as a periodic process of 4 ms cycle, and the counter update process of S209 and S210 is executed with the remaining time.

  The main processing performed by the main control device 110 of the pachinko machine 500 of the fourth embodiment shown in FIG. 27 is the main processing performed by the main control device 110 of the pachinko machine 10 of the first embodiment (see FIG. 12). Between S201 and S202), sending either an inner frame open command or an inner frame close command, or a front frame open command or a front frame close command to the voice lamp control device 113 (S215 to Processing of S220 is added. Therefore, the same parts as those of the main processing of the pachinko machine 10 according to the first embodiment described above with reference to FIG. 12 will be assigned the same reference numerals and descriptions thereof will be omitted, and only different parts will be described.

  In the main process executed by the main control device 110 of the pachinko machine 10 of the fourth embodiment, an external output for transmitting output data such as a command updated in the previous process to each control device (peripheral control device) on the sub side After the process (S201) is performed, it is determined whether the inner frame open flag 203a is on (S215). If the inner frame open flag 203a is on (S215: Yes), that is, if the inner frame 12 is open, an inner frame open command is transmitted to the voice lamp control device 113 (S216). On the other hand, if the inner frame opening flag 203a is off (S215: No), that is, if the inner frame 12 is closed, an inner frame closing command is transmitted to the voice lamp control device 113 (S217). After the processing of S216 or S217, it is determined whether the front frame opening flag 203b is on (S218). If the front frame open flag 203b is on (S218: Yes), that is, if the front frame 14 is open, a front frame open command is transmitted to the voice lamp control device 113 (S219). On the other hand, if the front frame opening flag 203b is off (S218: No), that is, if the front frame 14 is closed, a front frame closing command is transmitted to the voice lamp control device 113 (S220). After the processing of S219 or S220, the variation type counters CS1, CS2, CS3 are updated (S202).

  As described above, when the inner frame open flag 203a is on, that is, the inner frame 12 is opened, the main control device 110 repeatedly transmits the inner frame open command to the voice lamp control device 113. On the other hand, if the inner frame open flag 203a is off, that is, the inner frame 12 is closed, an inner frame closing command is repeatedly transmitted to the voice lamp control device 113. Further, when the front frame opening flag 203b is on, that is, the front frame 14 is opened, the main control device 110 repeatedly transmits the front frame opening command to the sound lamp control device 113. On the other hand, if the front frame opening flag 203b is off, that is, the front frame 14 is closed, the front frame closing command is repeatedly transmitted to the voice lamp control device 113.

  The command transmission of the main control device 110 may be performed as follows. For example, when the inner frame 12 is opened and the inner frame open flag 203a is turned on, the main control device 110 transmits an inner frame open command once to the voice lamp control device 113, and the inner frame 12 is closed. When the inner frame opening flag 203a is turned off, the inner frame closing command may be transmitted to the sound lamp control device 113 once. Similarly, when the front frame 14 is opened and the front frame open flag 203b is turned on, the main control unit 110 transmits a front frame open command to the voice lamp control unit 113 once, and the front frame 14 is closed. When the front frame opening flag 203b is turned off, the front frame closing command may be transmitted to the sound lamp control device 113 once.

  Next, with reference to FIGS. 29 to 31, the process performed by the audio lamp control device 113 will be described. FIG. 29 is a flowchart showing the start-up process executed by the MPU 221 in the audio lamp control device 113. This start-up process is started when the power is turned on.

  When the start-up process is executed, first, an initial setting process is performed upon power-on (S701). Specifically, a predetermined value determined in advance is set in the stack pointer. After that, depending on whether the power-off process flag is on or not, the current start-up process is a power-down process in S816 (see FIG. 30) due to a momentary voltage drop (a momentary power failure, so-called "temporary stoppage"). It is determined whether or not it is started during the execution of (S702). As described later with reference to FIG. 30, when the power-off command is received from the main control device 110 (see S812 in FIG. 30), the audio lamp control device 113 executes the power-off processing in S816. The power-off processing flag is turned on before the power-off processing is performed, and the power-off processing flag is turned off after the power-off processing is completed. Therefore, whether or not the power-off process in step S815 is being executed can be determined based on the state of the power-off process flag.

  If the power-off process flag is off (S702: No), the current start-up process is started after the power is completely shut off, or after a momentary power failure occurs and the power-off of S816 occurs. It was started after completing execution of the process, or was started after reset (only without receiving a power-off command from the main control unit 110) by resetting only the MPU 221 of the audio lamp control unit 113 due to noise or the like. is there. Therefore, in these cases, it is checked whether the data in the RAM 223 is destroyed (S703).

  Confirmation of data corruption in the RAM 223 is performed as follows. That is, in the specific area of the RAM 223, data as a keyword of "55AAh" is written by the process of S706. Therefore, the data stored in the specific area is checked, and if the data is "55 AAh", there is no data destruction of the RAM 223, and conversely, if "55 AAh", the data destruction of the RAM 223 can be confirmed. If data corruption in the RAM 223 is confirmed (S703: Yes), the process proceeds to S704 and initialization of the RAM 223 is started. On the other hand, if the data destruction of the RAM 223 is not confirmed (S703: No), the process proceeds to S708.

  In addition, since the keyword of "55AAh" is not memorize | stored in the specific area | region of RAM223 when the start-up process this time is started after the power supply was cut off completely (The memory of RAM223 is lost by power-off. (From S703), it is determined that the data in the RAM 223 is destroyed (S703: Yes), and the process proceeds to S704. On the other hand, the current start-up process is started after completing the execution of the power-off process of S816 after an instantaneous power failure occurs, or is reset only to the MPU 221 of the audio lamp control device 113 due to noise or the like. If the start of the program is started, since the keyword "55AAh" is stored in the specific area of the RAM 223, the data of the RAM 223 is determined to be normal (S703: No), and the process proceeds to S708.

  If the power-off process flag is on (S702: Yes), the current start-up process is after a momentary power failure has occurred, and during the execution of the power-off process of S816, the voice lamp control device 113 The MPU 221 is reset and started. In such a case, since the power-off process is being executed, the storage state of the RAM 223 is not necessarily correct. Therefore, since the control can not be continued in such a case, the process proceeds to S704 and initialization of the RAM 223 is started.

  In the process of S704, the storage area of the entire range of the RAM 223 is checked (S704). As a check method, first, “0FFh” is written for each byte, and it is read for each byte to check whether it is “0FFh”, and if “0FFh”, it is determined that it is normal. The writing and confirmation for each byte is performed in the order of “55h”, “0AAh”, and “00h” next to “0FFh”. By the read / write check of the RAM 223, all storage areas of the RAM 223 are cleared to zero.

  If it is determined that the read / write check is normal for all the storage areas of the RAM 223 (S 705: Yes), the keyword “55 AAh” is written in the specific area of the RAM 223 to set RAM destruction check data (S 706). By checking the keyword "55AAh" written in this specific area, it is checked whether there is data corruption in the RAM 223 or not. On the other hand, if an abnormality in the read / write check is detected in any storage area of the RAM 223 (S 705: No), the abnormality of the RAM 223 is notified (S 707), and an infinite loop is performed until the power is shut off. The abnormality of the RAM 223 is notified by the display lamp 34. The voice output device 226 may output a voice to notify the abnormality of the RAM 223.

  In the process of S708, it is determined whether the power-off flag is on (S708). The power-off flag is turned on when the power-off process of S816 is performed (see S815 in FIG. 30), so the power-off flag is turned on by the process of S815 as described later with reference to FIG. That is, since the power-off flag is turned on before the power-off process of S816 is performed, it is instantaneous that the current start-up process is instantaneous when the power-off flag is turned on until the process of S708 is performed. This is the case where the process is started after the power failure has occurred and the execution of the power-off process in S816 has not been completed. Therefore, in such a case (S708: Yes), the work area of the RAM is cleared to initialize each processing of the audio lamp control device 113 (S709), and the initial value of the RAM 223 is set (S710). The permission is set (S711) to shift to the main processing. The work area of the RAM 223 is an area other than the area for storing a command or the like received from the main control device 110.

  On the other hand, the reason for reaching the processing of S708 in the state where the power-off flag is turned off is that, for example, the current startup processing is started after the power is completely shut off, and the processing of S708 through S706 is performed. It is a case where the processing is reached or the MPU 221 of the audio lamp control device 113 is reset only (without receiving a power-off command from the main control device 110) due to noise or the like. Therefore, in such a case (S 708: No), S 709, which is a process of clearing the work area of the RAM 223, is skipped, the process proceeds to S 710, and the initial value of the RAM 223 is set (S 710). Then (S711), it shifts to the main processing.

  The reason for skipping the clearing process of S709 is that, when the process of S708 is reached through the processes of S704 to S706, all the storage areas of the RAM 223 have already been cleared by the process of S704. If the MPU 221 of the audio lamp control device 113 is reset only due to noise or the like and the start-up process is started, the data of the work area of the RAM 223 is saved without being cleared, and the audio lamp control device 113 is stored. It is because control of can be continued.

  Next, with reference to FIG. 30, the main process executed after the start-up process of the audio lamp control device 113 will be described. FIG. 30 is a flow chart showing main processing executed by the MPU 221 of the audio lamp control device 113. When the main process is executed, it is first determined whether 1 ms or more has elapsed since the main process was started (S801), and if 1 ms or more has not elapsed (S801: No), the processes of S802 to S809 And the process proceeds to S810. In the process of S801, it is the process related to display (effect) in S802 to S809 to determine whether or not 1 ms has elapsed, and while it is not necessary to edit in a short cycle (within 1 ms), each of S810 This is because it is preferable to execute the counter update processing and the command reception processing in step S811 in a short cycle. This makes it possible to prevent reception omission of the command transmitted from the main control device 110.

  If 1 ms or more has passed in the process of S801 (S801: Yes), the setting of the lighting mode of the display lamp 34 or the output mode of each lamp is set to be the lighting mode of the lamp edited in the process of S807 described later After that, the power on notification process is executed (S803). The power on notification process is to notify that the power is turned on for a predetermined time (for example, 30 seconds) when the power is turned on, and the notification is made by the voice output device 226 or the lamp display device 227. It will be. Further, a command may be transmitted to the display control device 114 so as to notify that power is supplied on the screen of the third symbol display device 81. If the power is not turned on, the process proceeds to step S804 without performing notification by the power on notification process.

  In the process of S804, the customer waiting effect is executed, and thereafter, the number-of-helds display update process is executed (S805). In the customer waiting effect, when the pachinko machine 500 is not played by the player for a predetermined time, a setting is made to switch the display of the third symbol display device 81 to the title screen, and the setting is displayed as a command. It is sent to 114. In the pending number display updating process, a process of lighting the pending lamp 85 according to the operation pending ball N is performed.

  Thereafter, the frame button input monitoring and rendering process is executed (S806). In this frame button input monitoring and effect processing, the input whether or not the frame button 22 operated by the player has been pressed in order to enhance the effect is monitored, and the input of the frame button 22 is confirmed. It is a process set to perform an effect. For example, when the advance notice character appears at the start of the variable display, pressing the frame button 22 displays the expected value of the jackpot due to the current fluctuation, or pressing the frame button 22 during reach production produces an expectation for the jackpot. Alternatively, it may be a decision button for changing to an effect that can be possessed or selecting one reach effect among a plurality of reach effects. If the frame button 22 is not provided, the process of S806 is omitted.

  When the frame button input monitoring / rendering process is finished, the lamp editing process is executed (S807), and then the sound editing / output process is executed (S808). In the lamp editing process, lighting patterns and the like of the electric decoration portions 29 to 33 are set to correspond to the display performed by the third symbol display device 81. In the sound editing / output processing, the output pattern of the audio output device 226 is set to correspond to the display performed by the third symbol display device 81, and the sound is output from the audio output device 226 according to the setting.

  Thereafter, the liquid crystal effect execution management process is executed (S809), and the process proceeds to the process of S810. In the liquid crystal effect execution management process, a time synchronized with the time required for the fluctuation display performed by the third symbol display device 81 is set based on the fluctuation pattern command and the presentation time addition command transmitted from the main control device 110. Based on the time set in the liquid crystal effect execution monitoring process, the effect time of the lamp editing process of S807 and the sound editing / output process of S808 is set.

  In the process of S810, the variation display process of the third symbol display device 81 is executed. In this variation display process, a plurality of counters (a counter for setting a stop symbol for big hit, a counter for selecting a stop symbol for removal, etc.) installed in the voice lamp control device 113 are updated, and the value of the counter and the main Set the symbol to be stopped and displayed on the third symbol display device 81 based on the fluctuation pattern command and stop symbol command transmitted from the control device 110, or change the display pattern of fluctuation display (reach before and after reach, reach other than back and forth, complete miss) Etc. are set. The stop symbol and the variation pattern are transmitted to the display control device 114 as a command.

  In the process of S810, for example, when the command of the variation pattern transmitted from the main control device 110 is "completely out", the completely out A pattern is selected from the plurality of patterns corresponding to the complete out, and the third symbol display A command is transmitted to the display control device 110 so that the effect of the completely out A pattern is performed in the device 81. Therefore, since the detailed change pattern displayed on the third symbol display device 81 is determined by the sound lamp control device 113 with respect to one change pattern determined by the main control device 110, the control of the main control device 110 is performed. The burden can be reduced. Furthermore, since the pattern of each effect determined in the main control device 110 can be reduced, the storage capacity of the ROM 202 can be reduced, and cost reduction can be achieved.

  Then, a command from the main control device 110 is received (S811). When a command from the main control unit 110 is received, if it is a command used by the audio lamp control unit 113 according to the command, processing corresponding to the command is performed, the processing result is stored in the RAM 233 and used by the display control unit 114 If it is a command, the command is sent to the display control device 114.

  When the process of S811 is completed, it is determined whether or not the occurrence information of the power-off is stored in the work RAM 233 (S812). The power-off occurrence information is stored when a power-off command is received from the main control device 110. If the power-off occurrence information is stored in the process of S812 (S812: Yes), both the power-off flag and the power-off process flag are turned on (S815), and the power-off process is executed (S816). After the power-off process is executed, the power-off process flag is turned off (S817), and then the process is looped endlessly. In the power-off process, the occurrence of the interrupt process is inhibited, and each output port is turned off, and the outputs from the audio output device 226 and the lamp display device 227 are turned off. In addition, the storage of the occurrence information of the power-off is also erased.

  On the other hand, if the power failure occurrence information is not stored in the process of S812 (S812: No), either the inner frame 12 or the front frame 14 is opened, or both the inner frame 12 and the front frame 14 are opened. If there is a door open notification process (S813) to notify using the voice output device 226 and the lamp display device 227.

  Here, the door open notification processing will be described with reference to FIG. FIG. 31 is a flow chart showing a door opening notification process executed by the MPU 221 of the audio lamp control device 113. This door open notification processing determines whether the voice lamp control device 113 has received four commands of the inner frame open command, the front frame open command, the inner frame close command, and the front frame close command, and according to the determination Is a process of executing notification.

  In the door open notification process, first, in the process of S811 (see FIG. 30), it is determined whether an inner frame open command indicating that the inner frame 12 is open has been received (S901). If the inner frame open command is received (S901: Yes), it is determined whether the inner frame open command reception flag 223a is on (S902). If the inner frame open command reception flag 223a is not on (S902: No), the inner frame open notification process, which is the process of S905 described later, has not been started yet, so to start the inner frame open notification process, S903. Move to the subsequent processing. First, the inner frame open command reception flag 223a is turned on to indicate that the inner frame open command has been received (S903), and the inner frame open command is transmitted to the display control device 114 (S904). Then, an inner frame opening notification process of notifying that the inner frame 12 is opened using the voice output device 226 and the lamp display device 227 is started (S905). In this inner frame opening notification process, for example, the inner frame 12 is opened using a voice output device 226 with an electronic sound, such as “the inner frame is open”, or using the lamp display device 227. To indicate, for example, 4 blinks per second. This makes it possible to notify an unspecified number of persons that the inner frame 12 has been opened.

  The main control device 110 repeatedly transmits an inner frame open command to the voice lamp control device 113 while the inner frame 12 is open. Therefore, when the inner frame open command has already been received and the processes of S903 to S905 have been executed, if the inner frame open command is received again (S901: Yes), the inner frame open command reception flag 223a Is determined to be on (S902: Yes), and the internal frame opening notification process (S905) that has already been started is continuously executed (S906). Thereby, while the inner frame 12 is open, the inner frame opening notification process (S905) is continuously executed. When the inner frame opening command is not received in the process of S811 (S901: No), the process of S903 to S906 is skipped.

  Next, in the process of S811 (see FIG. 30), it is determined whether a front frame opening command indicating that the front frame 14 is open has been received (S907). If the front frame open command is received (S907: Yes), it is determined whether the front frame open command reception flag 223b is on (S908). If the front frame opening command reception flag 223b is not on (S908: No), the front frame opening notification processing, which is the processing of S911 described later, has not yet been started, so to start the front frame opening notification processing, S909. Move to the subsequent processing. First, the front frame open command reception flag 223b is turned on to indicate that the front frame open command has been received (S909), and the front frame open command is transmitted to the display control device 114 (S910). Then, a front frame opening notification process of notifying that the front frame 14 is opened using the voice output device 226 and the lamp display device 227 is started (S911). In this front frame opening notification processing, for example, the sound output device 226 is used to notify by "electronic noise" that "the front frame is open", or the front frame 14 is opened using the lamp display device 227. To indicate, for example, blinking once a second. This makes it possible to notify an unspecified number of persons that the front frame 14 has been opened.

  The main control unit 110 repeatedly transmits the front frame opening command to the voice lamp control unit 113 while the front frame 14 is open. Therefore, when the front frame open command has already been received and the processes of S909 to S911 have been executed, if the front frame open command is received again (S907: Yes), the front frame open command reception flag 223b Is determined to be on (S908: Yes), and the front frame opening notification process (S911), which has already been started, is continuously executed (S912). As a result, while the front frame 14 is open, the front frame opening notification process (S911) is continuously executed. When the front frame open command is not received in the process of S811 (S907: No), the process of S909 to S912 is skipped.

  Next, in the process of S811 (see FIG. 30), it is determined whether an inner frame closing command indicating that the inner frame 12 is closed has been received (S913). If the inner frame closing command has been received (S913: Yes), it is determined whether the inner frame open command reception flag 223a is on (S914). If the inner frame open command reception flag 223a is on (S914: Yes), although the inner frame open notification process (S905) is started, the process (S917) to end the inner frame open notification process described later is still executed. Since the process is not performed, the process proceeds to the process after S915 to execute the process of ending the inner frame opening notification process. First, the inner frame open command reception flag 223a is turned off to indicate that the inner frame close command has been received (S915), and the inner frame close command is transmitted to the display control device 114 (S916). Then, the inner frame opening notification process which has been executed using the voice output device 226 and the lamp display device 227 is ended (S917). Thus, the notification indicating the opening of the inner frame 12 which has been performed using the audio output device 226 or the lamp display device 227 can be ended.

  The main control device 110 repeatedly transmits an inner frame closing command to the voice lamp control device 113 while the inner frame 12 is closed. Therefore, when the inner frame closing command has already been received and the processes of S915 to S917 have been executed, if the inner frame closing command is received again (S913: Yes), the inner frame open command reception flag 223a Is determined to be off (S914: No), and the processing of S915 to S917 is skipped. Further, even if the inner frame closing command is not received in the process of S811 (S913: No), the process of S915 to S917 is skipped.

  Next, in the process of S811 (see FIG. 30), it is determined whether a front frame closing command indicating that the front frame 14 is closed has been received (S918). If the front frame closing command has been received (S918: Yes), it is determined whether the front frame open command reception flag 223b is on (S919). If the front frame open command reception flag 223b is on (S919: Yes), although the front frame open notification process (S911) is started, the process (S922) to end the front frame open notification process described later is still executed. Since the process is not performed, the process proceeds to the process of S920 and subsequent steps in order to execute the process of ending the front frame opening notification process. First, the front frame open command reception flag 223b is turned off to indicate that the front frame close command has been received (S920), and the front frame close command is transmitted to the display control device 114 (S921). Then, the front frame opening informing process which has been executed using the voice output device 226 and the lamp display device 227 is ended (S922). Thereby, the notification which shows opening of the front frame 14 performed using the audio | voice output device 226 or the lamp | ramp display apparatus 227 can be complete | finished.

  The main controller 110 repeatedly transmits the front frame closing command to the voice lamp control device 113 while the front frame 14 is closed. Therefore, when the front frame closing command has already been received and the processing of S920 to S922 has been executed, if the front frame closing command is received again (S918: Yes), the front frame open command reception flag 223a Is determined to be off (S919: No), and the processing of S920 to S922 is skipped. Further, even when the front frame closing command is not received in the process of S811 (S918: No), the process of S920 to S922 is skipped.

  As described above, the voice lamp control device 113 indicates that the inner frame open command reception flag 223a is received when the inner frame open command is received in the process of S811 (see FIG. 30). After turning on (S903), an inner frame open command is transmitted to the display control unit 114 (S904), and an inner frame open notification process is started (S905). Since the inner frame opening notification process (S905) is continuously performed until the inner frame 12 is closed, it is possible to notify an unspecified number of persons that the inner frame 12 is open. Similarly, when the voice lamp control device 113 receives the front frame open command in the process of S811 (see FIG. 30), the voice lamp control device 113 turns on the front frame open command reception flag 223b to indicate that the front frame open command is received. (S909), transmits a front frame open command to the display control device 114 (S910), and starts front frame open notification processing (S911). This front frame opening notification process (S911) is continuously performed until the front frame 14 is closed, so that it can be notified to an unspecified number of persons that the front frame 14 is open.

  When the inner lamp closing command is received in the process of S811 (see FIG. 30) and the inner frame opening notification process (S905) is already performed, the voice lamp control device 113 receives the inner frame opening command reception flag. 223a is turned off to indicate that the inner frame closing command has been received (S915), the inner frame closing command is transmitted to the display control device 114 (S916), and the inner frame opening notification process is ended (S917). Similarly, when the front frame closing command is received in the process of S811 (see FIG. 30), the front frame opening command reception flag 223b is closed when the front frame opening notification process (S911) is already performed. It is turned off to indicate that the command has been received (S920), a front frame closing command is transmitted to the display control device 114 (S921), and the front frame opening notification processing is ended (S922).

  It returns to the explanation of FIG. After execution of the door opening notification process (S813), whether or not the RAM 223 is destroyed is determined based on the keyword stored in the RAM 223 (S814), and if the RAM 223 is not destroyed (S814: No), S801 Returning to the process, the main process is repeatedly executed. On the other hand, if the RAM 223 is destroyed (S 814: Yes), the processing is looped endlessly to stop the execution of the subsequent processing. Here, since it is determined that the RAM is destroyed and the main processing is not executed when the loop is infinite, the display by the third symbol display device 81 does not change thereafter. Therefore, the player can know that an abnormality has occurred, and can call a clerk or the like in the hall to ask for repair of the pachinko machine 500 or the like. Further, when it is confirmed that the RAM 223 is destroyed, notification of the destruction of the RAM may be performed by the audio output device 226 or the lamp display device 227.

  Next, processing performed by the display control device 114 will be described with reference to FIGS. 32 and 33. For the convenience of description, the external interrupt process of FIG. 33 will be described first, and then the main process of FIG. 32 will be described.

  FIG. 33 is a flowchart showing the external interrupt process executed by the MPU 231 in the display control unit 114, which is executed when a command is received from the audio lamp control unit 113. When the external interrupt processing is executed, the received command is determined by the processing of S1101 to S1106. If the received command is a rendering permission command (S1101: Yes), the rendering permission flag 233a of the work RAM 233 is turned on (S1108), and the external interrupt processing is ended. If the received command is a fluctuation pattern command (S1101: No, S1102: Yes), the fluctuation start flag 233b of the work RAM 233 is turned on (S1109), and the external interrupt processing is ended.

  Next, if the received command is the inner frame open command (S1101: No, S1102: No, S1103: Yes), the display inner frame open command reception flag 233c of the work RAM 233 receives the inner frame open command. The display is turned on (S1110), and the display of "The inner frame is open" is started on the third symbol display device 81 (S1111). Thereafter, the external interrupt processing is ended. By the start of display on the third symbol display device 81, it can be notified to an unspecified number of persons that the inner frame 12 is open. In addition, the character of "the inner frame is open | released" displayed on the 3rd symbol display apparatus 81 is superimposed on the effect display currently displayed on the 3rd symbol display apparatus 81, and is displayed. In addition, the character "The inner frame is open" is closed while the inner frame 12 is open, that is, the inner frame 12 is closed and the display inner frame open command reception flag 233c is turned off, which will be described later. It is displayed on the third symbol display device 81 continuously until the process of S1115 is performed.

  Next, if the received command is the front frame open command (S1101: No, S1102: No, S1103: No, S1104: Yes), the display front frame open command reception flag 233d of the work RAM 233 is set to the front frame open command. It is turned on to indicate that it has been received (S1112), and the display of "the front frame is open" is started on the third symbol display device 81 (S1113). Thereafter, the external interrupt processing is ended. By the start of display on the third symbol display device 81, it can be informed to an unspecified number of persons that the front frame 14 is open. In addition, the character of "the front frame is open | released" displayed on the 3rd symbol display apparatus 81 is superimposed on the effect display currently displayed on the 3rd symbol display apparatus 81, and is displayed. In addition, the character "front frame is open" indicates that the front frame 14 is closed while the front frame 14 is open, that is, the display front frame open command reception flag 233d is turned off, which will be described later. It is continuously displayed on the third symbol display device 81 until the processing of S1117 is performed.

  Next, if the received command is the inner frame closing command (S1101: No, S1102: No, S1103: No, S1104: No, S1105: Yes), the display inner frame open command reception flag 233c of the work RAM 233 is It is turned off to indicate that the inner frame closing command has been received (S1114), and the display of "the inner frame is open" of the third symbol display device 81 is erased (S1115). Thereafter, the external interrupt processing is ended.

  Next, if the received command is the front frame closing command (S1101: No, S1102: No, S1103: No, S1104: No, S1105: No, S1106: Yes), the display front frame open command of the work RAM 233 is received The flag 233d is turned off to indicate that the front frame closing command has been received (S1116), and the display of "the front frame is open" of the third symbol display device 81 is erased (S1117). Thereafter, the external interrupt processing is ended.

  Finally, if the received command is none of a production permission command, a variation pattern command, an inner frame open command, a front frame open command, an inner frame close command or a front frame close command (S1101: No, S1102: No, S1103: No, S1104: No, S1105: No, S1106: No) A process corresponding to the other received command is executed (S1107), and the external interrupt process is ended. For example, if the received command is a stop command, processing for stopping the change being performed by the third symbol display device 81 is executed.

  As described above, when the display control device 114 receives the inner frame open command, the display inner frame open command reception flag 233c of the work RAM 233 is turned on to indicate that the inner frame open command has been received (S1110). 3 The display starts as "The inner frame is open" on the symbol display device 81 (S1111). By the start of display on the third symbol display device 81, it can be notified to an unspecified number of persons that the inner frame 12 is open. Similarly, when the display control device 114 receives the front frame open command, the display front frame open command reception flag 233 d of the work RAM 233 is turned on to indicate that the front frame open command has been received (S 1112). The display of "the front frame is open" is started on the symbol display device 81 (S1113). By the start of display on the third symbol display device 81, it can be informed to an unspecified number of persons that the front frame 14 is open.

  Then, when the display control device 114 starts displaying “the inner frame is open” in the third symbol display device 81, when the inner frame closing command is received, the display inner frame open command for the work RAM 233 The reception flag 233c is turned off to indicate that the inner frame closing command has been received (S1114), and the display of "the inner frame is open" of the third symbol display device 81 is erased (S1115). Similarly, when the display control device 114 starts displaying "the front frame is open" on the third symbol display device 81, when the front frame closing command is received, the display front frame of the work RAM 233 is opened. The command reception flag 233d is turned off to indicate that the front frame closing command is received (S1116), and the display of "the front frame is open" of the third symbol display device 81 is erased (S1117).

  Next, main processing executed by the display control device 114 will be described with reference to FIG. FIG. 32 is a flowchart showing the main process executed by the MPU 231 in the display control device 114, and this main process is started when the power is turned on. First, an initial setting process associated with power on is executed (S1001). Specifically, the MPU 231 is initialized, and processing of clearing the storage of the work RAM 233 and the video RAM 234 is performed. Thereafter, the compressed character information stored in the character ROM 235 is read (S1002), the read character information is decompressed, and the decompressed character information is stored in the video RAM 234 (S1003). Furthermore, in order to display the initial screen, information corresponding to the initial screen is extracted from the character information written in the video RAM 234, and the video RAM 234 different from the area in the video RAM 234 storing the character information decompressed in the process of S1003. The extracted character information is written in the area in (S1004).

  Next, in order to determine whether the rendering permission command transmitted from the main control device 110 has been received, it is determined whether the rendering permission flag 233a is turned on (S1005), and the rendering permission flag 233a is not on. (S1005: No), processing of S1006 and subsequent steps is awaited until the rendering permission command is transmitted from the main control device 110, that is, until the rendering permission flag 233a is turned on.

  As a result of the determination in S1005, if the rendering permission flag 233a is turned on (S1005: Yes), the character information extracted in the process of S1004 is displayed on the third symbol display device 81. Then, the process proceeds to S1006 and subsequent steps.

  In the process of S1006, it is determined whether or not the display being executed by the third symbol display device 81 is in a big hit (S1006), and if it is not in a big hit (S1006: No), in the third symbol display device 81 It is judged whether or not the fluctuation start flag 233b for permitting the start of the fluctuation display is turned on (S1007). As a result, if the fluctuation start flag 233b is turned on (S1007: Yes), the fluctuation start flag 233b is turned off (S1008), and the fluctuation corresponding to the fluctuation pattern command is started on the display screen of the third symbol display device 81. (S1009). Here, in the process of S1008, the fluctuation start flag 233b is turned off in the pachinko machine 500 of the present embodiment, when the fluctuation start flag 233b is turned on, the fluctuation display is started in the third symbol display device 81. (S1007: Yes to S1009), if the fluctuation start flag 233b is not turned off, the fluctuation start process (S1009) is repeatedly executed, and the normal process is not executed.

  On the other hand, as a result of the discrimination in the process of S1007, when the fluctuation start flag 233b is off (S1007: No) or when the fluctuation is started in the process of S1009, the fluctuation effect process is performed (S1010). In the fluctuation presentation process, when the fluctuation display is continuously performed, the character information and the presentation pattern information are updated and set (new extraction of character information from the video RAM 234 and the extracted video information of the character information to the video RAM 234) Writing) and the variable display is not performed, the process proceeds to the process of S1011 without performing any process. Here, in the process of S1011, in order to execute the process (S1006 to S1010) for performing effects in the third symbol display device 81 every 20 ms, whether 20 ms or more has elapsed since the process of S1006 was started If it is not confirmed, the process waits until 20 ms or more elapses (S1011: No), and if 20 ms or more has elapsed (S1011: Yes), the process proceeds to S1006.

  If the result of the process of S1006 shows that the jackpot is in progress (S1006: Yes), the jackpot effect process is executed (S1012). In the jackpot effect processing, the number of rounds is updated, the number of prize balls is updated, the background image is updated for each round, etc. (new extraction of character information from video RAM 234 and video RAM 234 for extracted character information Write to). After the end of the jackpot effect process (S1012), the process proceeds to the process of S1011.

  As described above, according to the pachinko machine 500 of the fourth embodiment, the inner frame input / output port output circuit 290b of the inner frame open frame detection circuit 290 supplies power to the pachinko machine 500, When a DC voltage of 12 volts is supplied from the DC power supply DC1 and the switch SW3-2 is turned on to detect the opening of the inner frame 12, a signal of a DC voltage of 5 volts is output to the input / output port 205. When this signal is input to the input / output port 205, the pachinko machine 500 transmits an inner frame open command to the audio lamp control device 113, and the audio output device 226 and the lamp display device 227 are used to Report the release. Further, the pachinko machine 500 transmits an inner frame open command to the display control device 114 via the audio lamp control device 113, and displays a message indicating the open of the inner frame 12 on the third symbol display device 81. Therefore, it is possible to clearly notify an unspecified number of people that the inner frame 12 is open.

  Similarly, according to the pachinko machine 500 of the fourth embodiment, the front frame input / output port output circuit 292b of the front frame frame opening detection circuit 292 is supplied with power to the pachinko machine 500, and from the DC power supply DC1. When the DC voltage of 12 volts is supplied, when the switch SW4-2 is turned on to detect the opening of the front frame 14, a signal of the DC voltage of 5 volts is output to the input / output port 205. When this signal is input to the input / output port 205, the pachinko machine 500 transmits a front frame open command to the audio lamp control device 113, and the audio output device 226 and the lamp display device 227 are used to Report the release. Further, the pachinko machine 500 transmits a front frame opening command to the display control device 114 via the audio lamp control device 113, and displays a message indicating the opening of the front frame 14 on the third symbol display device 81. Therefore, it is possible to clearly notify an unspecified number of persons that the front frame 14 is open.

  On the other hand, according to the pachinko machine 500 of the fourth embodiment, the inner frame terminal board output circuit 290a of the inner frame frame open detection circuit 290 is added in the case where a DC voltage of 12 volts is supplied from the DC power supply DC1. For example, even if the operating time of the game arcade is over and the power supply to the pachinko machine 500 is cut off and the DC voltage of 12 volts is not supplied from the DC power supply DC1 (the main control device 110 is stopped Even when the switch SW3-1 is turned on to detect the opening of the inner frame 12, a pulse signal with a pulse width of 10 ms is output from the inner frame external output terminal plate 291 to the hall computer 262. The pulse signal output from the inner frame external output terminal plate 291 is stored in the hall computer 262. Therefore, by analyzing the pulse signal stored in the hall computer 262, for example, even if the operating time of the game arcade is over and the power supply to the pachinko machine 500 is shut off, An open can be detected.

  Similarly, according to the pachinko machine 500 of the fourth embodiment, the front frame terminal plate output circuit 292a of the front frame frame open detection circuit 292 is supplied with a DC voltage of 12 volts from the DC power supply DC1. In addition, for example, even if the operating time of the game arcade is over and the power supply to the pachinko machine 500 is cut off and the DC voltage of 12 volts is not supplied from the DC power supply DC1 (the main control device 110 is stopped And when the switch SW4-1 is turned on to detect the opening of the front frame 14, a pulse signal with a pulse width of 10 ms is output from the front frame external output terminal plate 293 to the hall computer 262. . The pulse signal output from the front frame external output terminal plate 293 is stored in the hall computer 262. Therefore, by analyzing the pulse signal stored in the hall computer 262, for example, even if the power supply to the pachinko machine 500 is shut off after the business hours of the game arcade have ended, An open can be detected.

  Thus, when the inner frame 12 is opened when power is supplied to the pachinko machine 500, the function of outputting a pulse signal to the hall computer 262 and the power supply to the pachinko machine 500 are cut off. When the inner frame 12 is open, the function of outputting a pulse signal to the hall computer 262 can be exhibited by the inner frame terminal plate output circuit 290 a which is one circuit.

  Also, the function of outputting a pulse signal to the hall computer 262 when the front frame 14 is opened while power is supplied to the pachinko machine 500, and the power supply to the pachinko machine 500 is interrupted. When the front frame 14 is opened, the function of outputting a pulse signal to the hall computer 262 can be exhibited by the front frame terminal plate output circuit 292 a which is one circuit.

  The hall computer 262 is kept operating for 24 hours. Therefore, in the inner frame terminal board output circuit 290a, the pulse signal is output from the inner frame external output terminal board 291, and the time when the pulse signal is output, that is, the open time of the inner frame 12 is also a hall computer. It can be stored in 262. Similarly, in the front frame terminal plate output circuit 292a, the pulse signal is output from the front frame external output terminal plate 293, and the time when the pulse signal is output, that is, the open time of the front frame 14 is also a hole. It can be stored in the computer 262.

  In the fourth embodiment, the pachinko machine 500 separately reports the opening of the inner frame 12 and the opening of the front frame 14 using the audio output device 226 and the lamp display device 227. Further, the pachinko machine 500 separately displays the opening of the inner frame 12 and the opening of the front frame 14 using the third symbol display device 81. However, the present invention is not limited to this, and the opening of the inner frame 12 and the opening of the front frame 14 may be performed in the same notification mode and display mode. Specifically, the notification performed using the audio output device 226 and the lamp display device 227 may be the same between the case where the inner frame 12 is opened and the case where the front frame 14 is opened. Similarly, the display performed using the third symbol display device 81 may be the same between the case where the inner frame 12 is opened and the case where the front frame 14 is opened. In this case, when either one or both of the inner frame 12 and the front frame 14 are opened, the third symbol display device 81 may display "the door is open".

  In the fourth embodiment, the pachinko machine 500 performs notification using the audio output device 226 and the lamp display device 227 when the inner frame 12 is opened or the front frame 14 is opened, and The display was performed using the symbol display device 81. However, the present invention is not limited to this, and either of notification using the audio output device 226 and the lamp display device 227 or display using the third symbol display device 81 may be performed.

  Next, with reference to FIGS. 34 to 36, a pachinko machine 600 of the fifth embodiment will be described. The pachinko machine 600 of the fifth embodiment includes three switches SW3-1, SW3-2, and SW3-3, which are switches SW3 connected to the inner frame opening detection circuit 290 of the pachinko machine 500 of the fourth embodiment. It is changed to switch SW3A in which the switch is incorporated, and switch SW4 connected to the front frame opening detection circuit 292 of the pachinko machine 500 of the fourth embodiment is a switch SW4-1, SW4-2, 3 of SW4-3. The zener diode D3 used in the inner frame opening detection circuit 290 and the front frame opening detection circuit 292 of the pachinko machine 500 of the fourth embodiment is removed after changing to the switch SW4A in which two switches are incorporated. (Without removing the Zener diode D3, the inner frame opening detection circuit 290 and the front opening detection It may be connected in the same manner as the circuit 292). In the following, the inner frame opening detection circuit 290 of the fourth embodiment will be changed to the inner opening detection circuit 290 of the fourth embodiment as the inner opening detection circuit 300 in the fifth embodiment. In the pachinko machine 600 of the fifth embodiment, the front frame frame open detection circuit 302 is the front frame frame open detection circuit 302 in which the above-described change is made to the front frame frame open detection circuit 292 of the pachinko machine 500 of the fourth embodiment. Therefore, the inner frame terminal plate output circuit 290a of the fourth embodiment is changed to the inner frame terminal plate output circuit 290a, and the fourth embodiment is the inner frame terminal plate output circuit 300a of the fifth embodiment. The inner frame input / output port output circuit 290b of the pachinko machine 500 according to the embodiment is changed to the inner frame input / output port output circuit 300b in the fifth embodiment. Similarly, the front frame terminal plate output circuit 292a of the fourth embodiment has been modified as the front frame terminal plate output circuit 302a of the fifth embodiment. The front frame input / output port output circuit 292 b of the pachinko machine 500 according to the fourth embodiment is the front frame input / output port output circuit 302 b according to the fifth embodiment.

  According to the pachinko machine 600 of the fifth embodiment, the capacitor CD7 of the integration circuit 281 of the inner frame opening detection circuit 300 (inner frame terminal board output circuit 300a) is stored when the inner frame 12 is opened. When the inner frame 12 is closed, the stored charge is instantaneously discharged to ground through the switch SW3-3 connected to the inner frame frame open detection circuit 300 (inner frame terminal plate output circuit 300a). can do. Similarly, when the front frame 14 is opened, the charge accumulated in the capacitor CD7 of the integration circuit 281 of the front frame frame open detection circuit 302 (front frame terminal plate output circuit 302 a) is closed by the front frame 14. In this case, discharge to ground can be made instantaneously through the switch SW4-3 connected to the front frame opening detection circuit 302 (front frame terminal plate output circuit 302a).

  As described above, since the charge stored in the capacitor CD7 of the integration circuit 281 is always zero until the inner frame 12 or the front frame 14 is again opened, the inner frame 12 or the front frame 14 is Even if the open circuit is continuously opened a plurality of times in a short time, the integration circuit 281 operates normally and the voltage applied to the TRG terminal of the timer IC1 regardless of the open period of the inner frame 12 or the front frame 14 The falling period of can be made into a fixed period (about 2 ms).

  Further, according to the pachinko machine 600 of the fifth embodiment, as described above, the charge stored in the capacitor CD7 of the integrating circuit 281 of the inner frame opening detection circuit 300 (inner frame terminal plate output circuit 300a) is When the inner frame 12 is closed, it is discharged to the ground through the switch SW3-3, and is stored in the capacitor CD7 of the integrating circuit 281 of the front frame frame opening detection circuit 302 (front frame terminal plate output circuit 302a) The charge is discharged to the ground through the switch SW4-3 when the front frame 14 is closed. Therefore, unlike the pachinko machine 500 of the fourth embodiment, when the inner frame 12 or the front frame 14 is opened again and the switch SW3-1 or the switch SW4-1 is conducted, the charge stored in the capacitor CD7 is An overvoltage (for example, a voltage of 12.3 volts) which is superimposed on the voltage supplied from the capacitor CD1 and which destroys the timer IC1 is not applied to the TRG terminal of the timer IC1. Therefore, it is possible to eliminate the need for the Zener diode D3 that prevents the application of an overvoltage having a magnitude that destroys the timer IC1.

  Further, according to the pachinko machine 600 of the fifth embodiment, as in the pachinko machine 500 of the fourth embodiment, when the DC voltage of 12 volts is supplied from the DC power supply DC1, the inner frame 12 and the front frame 14 The pachinko machine 600 is used to separately report whether the inner frame 12 has been opened, the front frame 14 has been opened, or both have been opened. be able to. Furthermore, according to the pachinko machine 600 of the fifth embodiment, similarly to the pachinko machine 500 of the fourth embodiment, in addition to the case where a DC voltage of 12 volts is supplied from the DC power supply DC1, the DC power supply DC1 to 12 volts Even when no DC voltage is supplied, when either the inner frame 12 or the front frame 14 is opened, pulse signals can be separately output to the hall computer 262. Therefore, the pulse signal stored in the hall computer 262 can identify whether the inner frame 12 has been opened, the front frame 14 has been opened, or both have been opened.

  In the description of the pachinko machine 600 of the fifth embodiment, the same parts as those of the pachinko machine 500 of the fourth embodiment are denoted by the same reference numerals, and the description thereof is omitted, and only different parts will be described.

  The structure of the switch SW3A connected to the inner frame opening detection circuit 300 and the switch SW4A connected to the front opening detection circuit 302 will be described with reference to FIG. The switch SW3A is obtained by adding the switch SW3-3 to the switch SW3 incorporating the switches SW3-1 and SW3-2, and the other structure is the same as the switch SW3. Similarly, the switch SW4A is obtained by adding the switch SW4-3 to the switch SW4 incorporating the switches SW4-1 and SW4-2, and the other structure is the same as the switch SW4. Therefore, in the switch SW3A and the switch SW4A, the same parts as those of the switch SW3 and the switch SW4 are given the same reference numerals, and the description thereof is omitted, and only different parts will be described. Further, since the switch SW3A and the switch SW4A have the same structure, the structure of the switch SW3A will be described, and the description of the switch SW4A will be omitted.

  FIG. 34 is a cross-sectional view of the switch SW3A. FIG. 34 (a) is a cross-sectional view showing the state (shutdown state) of the switch SW3A in the state where the inner frame 12 is closed. Further, FIG. 34 (b) is a cross-sectional view showing the state of the switch SW3A in the state where the inner frame 12 is in the process of being opened or closed. Further, FIG. 34C is a cross-sectional view showing a state (conductive state) of the switch SW3A in a state in which the inner frame 12 is opened.

  As shown in FIG. 34 (a), the switch SW3A connected to the inner frame opening detection circuit 300 is provided with a switch SW3-3 which operates reverse to the switch SW3-1 and the switch SW3-2. There is. The switch SW3-3 includes a conductor plate SW3-3a made of metal, which is a conductive member disposed on the movable shaft SW3a in contact with the closed state of the inner frame 12, and the conductor plate SW3-3a facing each other. A pair of terminal boards SW3-3b made of metal disposed at the positions, a support board SW3-3c for arranging the pair of terminal boards SW3-3b in the casing SW3b, and a conductor board SW3-3a A pair of springs SW3ca are provided on the surface facing the pair of terminal plates SW3-3b and generate an urging force in a direction opposite to the pair of terminal plates SW3-3b with respect to the conductor plate SW3-3a. ing. Thus, the switch SW3 incorporates three switches: the switch SW3-1, the switch SW3-2, and the switch SW3-3.

  As shown in FIG. 34 (a), when the inner frame 12 is closed, the movable shaft SW3a abuts on the inner frame 12, and the movable shaft SW3a is pushed into the housing SW3b. Accordingly, the contact between the conductor plate SW3-1a and the pair of terminal plates SW3-1b is prevented, and the contact between the conductor plate SW3-2a and the pair of terminal plates SW3-2b is prevented. On the other hand, conductor board SW3-3a and a pair of terminal boards SW3-3b contact. Therefore, in the state where the inner frame 12 is closed, the switch SW3-1 and the switch SW3-2 both become in a state in which the conduction is cut off, while the switch SW3-3 becomes in the state of conduction.

  Next, as shown in FIG. 34 (b), when the inner frame 12 is in the process of being opened or closed, the contact of the movable shaft SW3a with the inner frame 12 is released, so attachment of the pair of springs SW3ca The contact force between the conductor plate SW3-1a and the pair of terminal plates SW3-1b, the contact between the conductor plate SW3-2a and the pair of terminal plates SW3-2b, and the conductor plate SW3-3a and the pair of terminal plates SW3-3b Any contact with the body is in a state of being blocked. Therefore, in the state in which the inner frame 12 is in the process of being opened or being closed, all of the switches SW3-1, SW3-2, and SW3-3 are in the state in which the conduction is interrupted.

  Furthermore, as shown in FIG. 34C, in a state where the inner frame 12 is opened, the biasing force of the pair of springs SW3ca causes the conductor plate SW3-1a and the pair of terminal plates SW3-1b to be in contact with each other. The conductor plate SW3-2a and the pair of terminal plates SW3-2b are in contact with each other. On the other hand, the contact between the conductor plate SW3-3a and the pair of terminal plates SW3-3b is hindered. Therefore, in the state where the inner frame 12 is opened, both the switch SW3-1 and the switch SW3-2 are in the conductive state, while the switch SW3-3 is in the state in which the conduction is cut off.

  As described above, while the switch SW3-1 and the switch SW3-2 incorporated in the case SW3b are both in the closed state when the inner frame 12 is closed, the conductive state is obtained when the inner frame 12 is opened. It becomes. On the other hand, the switch SW3-3 incorporated in the case SW3b operates reverse to the switch SW3-1 and the switch SW3-2, and becomes conductive when the inner frame 12 is closed, while the inner frame When 12 is open, it is cut off. That is, the switch SW3-1 and the switch SW3-2 have a structure in which the conduction state and the disconnection state operate in conjunction with each other, and the switch SW3-3 is a state opposite to the states of the switch SW3-1 and the switch SW3-2. It becomes the structure which does the operation which becomes. However, the structure of the switch SW3A is not limited to the shape described in FIG. 34, and in the state where the inner frame 12 is closed, the switch SW3-1 and the switch SW3-2 are cut off, and the switch SW3-3 is In the conductive state, when the inner frame 12 is open, the switch SW3-1 and the switch SW3-2 may be conductive and the switch SW3-3 may be in the cut-off state. The same applies to the structure of the switch SW4A.

  Next, with reference to FIG. 35, the inner frame opening detection circuit 300 and the inner external output terminal plate 291 used in the pachinko machine 600 of the fifth embodiment will be described. FIG. 35 is a block diagram showing an electrical configuration of inner frame open circuit detection circuit 300 and inner frame external output terminal plate 291. Referring to FIG. Note that the inner frame opening detection circuit 300 of the pachinko machine 600 of the fifth embodiment is the switch SW3-1 connected to the inner frame opening detection circuit 290 of the pachinko machine 500 of the fourth embodiment. , The switch SW3A in which three switches, SW3-2, and SW3-3 are built in, is removed, and the Zener diode D3 used in the inner frame frame open detection circuit 290 of the pachinko machine 500 of the fourth embodiment is removed. It is a thing. The inner frame opening detection circuit 300 has the same configuration as the inner opening detection circuit 290 described above with reference to FIG. The inner frame external output terminal plate 291 of the pachinko machine 600 of the fifth embodiment has the same structure as the inner frame external output terminal plate 291 of the pachinko machine 500 of the fourth embodiment. Therefore, the inner frame opening detection circuit 300 and the inner outer output terminal plate 291 are the same as the inner opening detection circuit 290 and the inner outer output terminal plate 291 described above with reference to FIG. The same reference numerals will be assigned and the description thereof will be omitted, and only different parts will be described.

  Further, the front frame opening detection circuit 302 used in the pachinko machine 600 of the fifth embodiment is different from the inner opening detection circuit 300 used in the pachinko machine 600 of the fifth embodiment in connection. The switch to be operated is only the place where the switch SW3A is changed to the switch SW4A, and the other configuration is the same as that of the inner frame opening detection circuit 300. The front frame external output terminal plate 293 used in the pachinko machine 600 of the fifth embodiment has the same configuration as the inner frame external output terminal board 291 used in the pachinko machine 600 of the fifth embodiment. That is, the inner frame external output terminal plate 291 of the pachinko machine 500 of the fourth embodiment described above with reference to FIG. 25 has the same structure. Therefore, the description of the front frame opening detection circuit 302 and the front frame external output terminal plate 293 is omitted.

  As shown in FIG. 35, in the switch SW3-3 (see FIG. 34), one end of the switch SW3-3 (one end of the terminal plate 3-3b) is the other end of the switch SW3-1 (see FIG. 34). The other end of the terminal plate 3-2b and one end of the capacitor CD7 are connected, while the other end of the switch SW3-3 (the other end of the terminal plate 3-3b) is grounded. Thus, the inner frame terminal board output circuit 300a of the pachinko machine 600 of the fifth embodiment is obtained by adding the switch SW3-3 to the inner frame terminal board output circuit 290a of the pachinko machine 500 of the fourth embodiment. Become. The inner frame input / output port output circuit 300b of the pachinko machine 600 of the fifth embodiment has the same configuration as the inner frame input / output port output circuit 290b of the pachinko machine 500 of the fourth embodiment.

  As described above, the switch SW3-3 used for the inner frame terminal plate output circuit 300a performs an operation reverse to the state of the switch SW3-1 and the switch SW3-2. Therefore, when the inner frame 12 is closed, the switch SW3-3 conducts and one end of the capacitor CD7 is grounded, while the switch SW3-1 and the switch SW3-2 are disconnected. Become.

  Then, when the inner frame 12 is changed from the closed state to the open state, the switch SW3-3 is first cut off after the switch SW3-3 is cut off, and then the switch SW3-1 and the switch SW3-2 are turned on (see FIG. 34 (a)-> Fig. 34 (b)-> Fig. 34 (c)). Thus, when the inner frame 12 changes from the closed state to the open state, first, one end of the capacitor CD7 is disconnected from the ground by the switch SW3-3, and then the power from the capacitor CD1 is switched to the switch SW3-1. To the capacitor CD7. Therefore, when the inner frame 12 changes from the closed state to the open state, the capacitor CD1 that supplies power does not short to ground. Therefore, when the inner frame 12 changes from the closed state to the open state, the power from the capacitor CD1 flows to the ground, and short-circuit breaks the inner frame frame open detection circuit 300 (inner frame terminal plate output circuit 300a). Absent. When the inner frame 12 is opened, the switch SW3-1 is turned on, and the power of the capacitor CD1 is supplied to the capacitor CD7, charge is stored in the capacitor CD7 as described above, and the stored charge is increased. As a result, the voltage generated in the capacitor CD7 increases. Then, the fall of the voltage applied to the TRG terminal of the timer IC1 can be made constant (about 2 ms) by the change of the voltage generated in the capacitor CD7. As described above, the fall period of the voltage applied to the TRG terminal of the timer IC1 is adjusted by the integration circuit 281, that is, adjusted by the capacitor CD7 and the resistor R10, so that a simple circuit is not used. The falling period of the voltage applied to the TRG terminal of the timer IC1 can be set as a fixed period at low cost.

  Next, when the inner frame 12 changes from the open state to the closed state, the switch SW3-1 and the switch SW3-2 first become disconnected due to the structure of the switch SW3A, and then the switch SW3-3 becomes conductive ( Fig. 34 (c)-> Fig. 34 (b)-> Fig. 34 (a)). Thus, when the inner frame 12 changes from the open state to the closed state, first, the power supplied from the capacitor CD1 to the capacitor CD7 is stopped by the switch SW3-1, and then one end of the capacitor CD7 is It grounds via switch SW3-3. Therefore, when the inner frame 12 changes from the open state to the closed state, the capacitor CD1 that supplies power does not short to ground. Therefore, when the inner frame 12 changes from the open state to the closed state, the power from the capacitor CD1 does not flow into the ground and short circuit the inner frame frame open detection circuit 300.

  When the inner frame 12 is closed, the switch SW3-1 is turned off and the power supplied from the capacitor CD1 to the capacitor CD7 is stopped, and one end of the capacitor CD7 is grounded by the switch SW3-3. Can. Therefore, when the inner frame 12 is in the closed state, the charge stored in the capacitor CD7 can be instantaneously discharged through the switch SW3-3 when the inner frame 12 is in the open state, and can be made zero. . Therefore, since the charge stored in the capacitor CD7 is always zero until the inner frame 12 is opened again, even if the inner frame 12 is continuously opened a plurality of times in a short time. The integration circuit 281 operates normally, and regardless of the open period of the inner frame 12, the fall period of the voltage applied to the TRG terminal of the timer IC1 can be made a fixed period (about 2 ms).

  Further, as described above, the inner frame opening detection circuit 300 (inner frame terminal board output circuit 300a) is stored in the capacitor CD7 when the inner frame 12 is opened when the inner frame 12 is closed. The charge thus generated can be momentarily discharged to the ground via the switch SW3-3. Therefore, when the inner frame 12 is opened and the switch SW3-1 is turned on, the charge stored in the capacitor CD7 is superimposed on the voltage supplied from the capacitor CD1, and the overvoltage (of the magnitude that destroys the timer IC1 For example, a voltage of 12.3 volts) is not applied to the TRG terminal of the timer IC1. Therefore, it is possible to eliminate the need for a Zener diode that prevents the application of an overvoltage having a magnitude that destroys the timer IC1.

  Further, as described above, the inner frame opening detection circuit 300 changes the switch SW3 connected to the inner frame opening detection circuit 290 of the pachinko machine 500 of the fourth embodiment to the switch SW3A, and the fourth embodiment is implemented. The Zener diode D3 used in the inner frame opening detection circuit 290 of the pachinko machine 500 is removed, and the configuration is the same as that of the inner frame opening detection circuit 290 except for the above change. The inner frame external output terminal plate 291 of the pachinko machine 600 of the fifth embodiment has the same structure as the inner frame external output terminal plate 291 of the pachinko machine 500 of the fourth embodiment.

  Therefore, as in the case of the pachinko machine 500 of the fourth embodiment, when the power supply to the pachinko machine 600 is performed and the DC voltage of 12 volts is supplied from the DC power supply DC1, the inner frame 12 is opened, When the switch SW3-2 provided in the inner frame input / output port output circuit 300b conducts, a signal of 5 volts is output from the inner frame input / output port output circuit 300b to the input / output port 205. When a signal of 5 volts is input to the input / output port 205, the pachinko machine 600 uses the audio output device 226 and the lamp display device 227 to notify that the inner frame 12 is open. In addition, the pachinko machine 600 displays a message indicating the opening of the inner frame 12 on the third symbol display device 81. Furthermore, when the inner frame 12 is opened and the switch SW3-1 provided in the inner frame terminal plate output circuit 300a conducts, the inner frame terminal plate output circuit 300a is opened from the inner frame external output terminal plate 291. A pulse signal having a pulse width of 10 ms is output to the computer 262.

  On the other hand, for example, when the operating time of the game arcade is over and the power supply to the pachinko machine 600 is shut off, the inner frame 12 is opened since the DC voltage of 12 volts is not supplied from the DC power supply DC1. Even when the switch SW3-2 provided in the inner frame input / output port output circuit 300b conducts, no signal is input from the inner frame input / output port output circuit 300b to the input / output port 205 (inner frame input / output The DC voltage input from the port output circuit 300b to the input / output port 205 is zero volts). However, even if, for example, the operating time of the game arcade is over and the power supply to the pachinko machine 600 is cut off, the power is supplied from the capacitor CD1 to the inner frame terminal board output circuit 300a. Therefore, when the inner frame 12 is opened and the switch SW3-1 provided in the inner frame terminal plate output circuit 300a conducts, the inner frame terminal plate output circuit 300a is operated from the inner frame external output terminal plate 291. A pulse signal having a pulse width of 10 ms is output to the hall computer 262.

  The pulse signal output from the inner frame external output terminal plate 291 is stored in the hall computer 262 which keeps operating for 24 hours. Therefore, by the pulse signal stored in the hall computer 262, the pachinko machine in which the inner frame 12 has been opened can be identified. Furthermore, the hall computer 262 outputs the pulse signal from the inner frame external output terminal plate 291 and stores the output time of the output pulse signal so that the inner frame 12 of the specified pachinko machine is opened. Time can be detected.

  Thus, when the power supply to the pachinko machine 600 is being performed, the function of outputting a signal to the input / output port 205 and the function of outputting a pulse signal to the hall computer 262 when the inner frame 12 is opened; And the function of outputting a pulse signal to the hall computer 262 when the inner frame 12 is opened when the power supply to the pachinko machine 600 is interrupted, the inner frame opening detection circuit 300 which is one circuit. Can be demonstrated.

  Further, one end of the switch SW3-2 of the inner frame input / output port output circuit 300b is connected to the DC power supply DC1 and the anode terminal of the diode D1. Therefore, when the inner frame 12 is opened while the pachinko machine 600 is powered on, the switch SW3-2 is turned on to supply power from the DC power supply DC1 to the inner frame input / output port output circuit 300b. Thus, the inner frame input / output port output circuit 300b is in an operating state. On the other hand, when the pachinko machine 600 is powered off, no power is supplied from the DC power supply DC1 to the inner frame input / output port output circuit 300b, so the inner frame 12 is opened and the switch SW3-2 is opened. Even in this case, the inner frame input / output port output circuit 300b is stopped.

  On the other hand, one end of the switch SW3-1 of the inner frame terminal plate output circuit 300a is connected to one end of the capacitor CD1 via the diode D2 and the resistor R10. Therefore, when the inner frame 12 is opened when the power of the pachinko machine 600 is turned on, the switch SW3-1 conducts and power is supplied from the DC power supply DC1 to the inner frame terminal plate output circuit 300a. The inner frame terminal board output circuit 300a is in an operating state. On the other hand, when the pachinko machine 600 is powered off, the power supply from the DC power supply DC1 to the inner frame terminal plate output circuit 300a is stopped, but the inner frame 12 is opened and the switch SW3-1 is turned on. Then, since power is supplied from the capacitor CD1 to the inner frame terminal plate output circuit 300a, the inner frame terminal plate output circuit 300a is in an operating state. Here, when the pachinko machine 600 is powered off and power is supplied from the capacitor CD1 to the inner frame terminal plate output circuit 300a, power is supplied to the inner frame input / output port output circuit 300b. It can be cut off by the diode D1 that exerts a backflow prevention function. Therefore, when the power of the pachinko machine 600 is turned off, the number of times the inner frame terminal plate output circuit 300a can be operated can be increased, and the number of detections of the opening of the inner frame 12 can be increased.

  In the timer IC1 of the inner frame terminal plate output circuit 300a, when the inner frame 12 is opened, the switch SW3-1 is turned on, and the voltage applied to the TRG terminal of the timer IC1 falls to zero volts, this rising occurs. It functions as a monostable multivibrator that raises the voltage of the OUT terminal of the timer IC1 from zero volt to about 9.6 volts for about 10 ms from the fall. Then, by providing the integrating circuit 281 in the previous stage of the TRG terminal of the timer IC1, when the inner frame 12 is opened, the voltage applied to the TRG terminal of the timer IC1 is regardless of the open period of the inner frame 12. After falling to zero volts, the period until it returns to about 10.3 volts can be adjusted to be shorter than the period when the voltage at the OUT terminal of timer IC1 rises from zero volts to about 9.6 volts. As described above, the timer IC1 functions as a monostable multivibrator by setting the falling period of the TRG terminal voltage of the timer IC1 to a fixed period (about 2 ms) regardless of the open period of the inner frame 12 by the integration circuit 281. Can be normally operated, and the period in which the voltage at the OUT terminal of the timer IC1 rises from zero volts to about 9.6 volts can be kept to about 10 ms. Thus, the period in which current is supplied from the capacitor CD1 to the photocoupler PR1 can be limited to about 10 ms, and the output period of the pulse signal output from the inner frame external output terminal plate 291 to the hole computer 262 is about 10 ms. You can fasten it.

  Referring to FIG. 36, the voltage applied to capacitor CD7 (charge stored in capacitor CD7) changes according to the open / close state of inner frame 12 regardless of the power on / off state of pachinko machine 600 , The TRG terminal voltage of the timer IC1 of the inner frame terminal plate output circuit 300a, the OUT terminal voltage of the timer IC1 of the inner frame terminal plate output circuit 300a, and the output of the inner frame external output terminal plate 291 (of the hall computer 262 The relationship between the input) and the output of the inner frame input / output port output circuit 300b which changes according to the open / closed state of the inner frame 12 when the power of the pachinko machine 600 is turned on will be described. 36 shows the on / off state (state of the DC voltage supplied by the DC power source DC1) of the pachinko machine 600, the open / close state of the inner frame 12, the conduction / off state of the switch SW3-3, the switch SW3-1 and The ON / OFF state of the switch SW3-2, the voltage applied to the capacitor CD7 (the charge stored in the capacitor CD7), the TRG terminal voltage of the timer IC1 of the inner frame terminal plate output circuit 300a, and the inner frame terminal plate output The timing chart showing the relationship between the OUT terminal voltage of timer IC1 of circuit 300a, the output of inner frame external output terminal plate 291 (input of hall computer 262), and the output of inner frame input / output port output circuit 300b is there.

  As described above, the front frame terminal board output circuit 302a provided in the front frame frame open detection circuit 302 differs from the inner frame terminal board output circuit 300a in that the switch connected is the switch SW4-1. There is only one switch SW 3-1 and one switch SW 4-3 or switch SW 3-3. Therefore, since the operation of the front frame terminal plate output circuit 302a is the same as the operation of the inner frame terminal plate output circuit 300a, the description of the operation of the front frame terminal plate output circuit 302a will be omitted. The front frame input / output port output circuit 302b is different from the inner frame input / output port output circuit 300b only in that the switch connected is the switch SW4-2 or the switch SW3-2. is there. Therefore, since the operation of the front frame input / output port output circuit 302b is the same as the operation of the inner frame input / output port output circuit 300b, the description of the operation of the front frame input / output port output circuit 302b is omitted. . Further, as described above with reference to FIG. 35, since the front frame external output terminal plate 293 has the same configuration as the inner frame external output terminal plate 291, the operation of the front frame external output terminal plate 293 is for the inner frame. It is identical to the external output terminal plate 291. Therefore, the description of the operation of the front frame external output terminal plate 293 is omitted.

  As shown in FIG. 36 (a), the power supply of the pachinko machine 600 is in the on state until t18 (the DC voltage supplied by the DC power supply DC1 is 12 volts until t18), and after t18 The power of the machine 600 is turned off (the DC voltage supplied by the DC power supply DC1 is zero volts). Therefore, power from the DC power supply DC1 is supplied to the inner frame terminal plate output circuit 300a and the inner frame input / output port output circuit 300b until time t18. Then, after t18, power supply by the DC power supply DC1 to the inner frame terminal plate output circuit 300a and the inner frame input / output port output circuit 300b is stopped. However, since the capacitor CD1 is provided in the inner frame terminal plate output circuit 300a, after t18, power is supplied from the capacitor CD1 to the inner frame terminal plate output circuit 300a. Therefore, the inner frame terminal board output circuit 300a is operable even after t18.

  When the inner frame 12 changes from the closed state to the open state between t14 and t15 as shown in FIG. 36 (b), the switch SW3-3 follows this, as shown in FIG. 36 (c). It will be in the interruption | blocking state from a conduction | electrical_connection state (t14 time). Thereafter, as shown in FIG. 36 (d), the switch SW3-1 and the switch SW3-2 are switched from the cutoff state to the conduction state (at t15). The switch SW3-3 is turned off at t14, and the switches SW3-1 and SW3-2 are turned on at t15 because of the structure of the switch SW3A (FIG. 34 (a) → FIG. 34 (b) → See FIG. 34 (c)).

  When the switch SW3-1 becomes conductive at time t15, charging of the capacitor CD7 is started, and as shown in FIG. 36 (e), the voltage applied to the capacitor CD7 starts rising from zero volt (time t15). When the switch SW3-1 becomes conductive, the TRG terminal voltage of the timer IC1 becomes the same as the voltage applied to the capacitor CD7. Therefore, as shown in FIG. 36 (f), the TRG terminal voltage of the timer IC1 is about 10 Fall from 3 volts to zero volts and start rising (at t15). Following this, as shown in FIG. 36 (g), the OUT terminal voltage of the timer IC1 rises from zero volt to about 9.6 volt (at t15). As a result, the collector terminal and the emitter terminal of the transistor TR1 of the inner frame terminal plate output circuit 300a are conducted, and the light emitting diode on the primary side of the photocoupler PR1 of the inner frame external output terminal plate 291 (see FIG. 35) The current supply is started (at t15). Then, as shown in FIG. 36H, the output of the light receiving element (phototransistor) on the secondary side of the photocoupler PR1, that is, the output of the inner frame external output terminal plate 291 is high from the low state at time t15. Switch to the state. Thereby, the output of a pulse signal indicating opening of the inner frame 12 to the hole computer 262 is started. Further, as shown in FIG. 36 (d), when the inner frame 12 changes from the closed state to the open state between t14 and t15 and the switch SW3-2 becomes conductive (t15), the inner frame is inserted. The power from the DC power supply DC1 is supplied to the resistor R11 and the resistor R12 of the output port output circuit 300b, and the voltage applied to the resistor R12 becomes 5 volts (at t15). Therefore, as shown in FIG. 36 (i), a signal with a DC voltage of 5 volts is output from the inner frame input / output port output circuit 300b to the input / output port 205 (at t15).

  Next, as shown in FIG. 36 (e), when about 2 ms elapses from t15, the charging of the capacitor CD7 is completed, and the voltage applied to the capacitor CD7 becomes about 10.3 volts. Then, as shown in FIG. 36 (f), the voltage at the TRG terminal of the timer IC1 returns from zero volt to about 10.3 volts (approximately 2 ms has elapsed from t15). However, since about 10 ms has not elapsed since the voltage at the OUT terminal of timer IC1 has risen from zero volts to about 9.6 volts (time t15), the OUT terminal voltage of timer IC1 is about 9.6 volts. It is maintaining the state.

  Thereafter, when about 10 ms elapses from t15, as shown in FIG. 36 (g), the timer IC1 switches the voltage of the OUT terminal from about 9.6 volts to zero volts. Then, the collector terminal and the emitter terminal of the transistor TR1 of the inner frame terminal plate output circuit 300a are disconnected, and the current supply to one end of the resistor R7a of the inner frame external output terminal plate 291 is stopped. Therefore, the output of the inner frame external output terminal plate 291 switches from the high state to the low state as shown in FIG. 36 (h) when about 10 ms elapses from t15. As a result, the output of the pulse signal output to the hall computer 262 is stopped. Thus, by switching the output of the inner frame external output terminal plate 291, the pulse width of the pulse signal output from the inner frame external output terminal plate 291 to the hole computer 262 can be limited to about 10 ms.

  When the inner frame 12 changes from the open state to the closed state between t16 and t17 as shown in FIG. 36 (b), the switch SW3-1 and the switch SW3-2 as shown in FIG. 36 (d). Is switched from the conduction state to the interruption state at t16. Thereafter, as shown in FIG. 36C, the switch SW3-3 becomes conductive again (at t17). The switch SW3-1 and the switch SW3-2 are cut off at t16, and the switch SW3-3 becomes conductive at t17 because of the structure of the switch SW3A ((FIG. 34 (c) → FIG. 34 (b) → Refer to FIG. 34 (a)).

  As shown in FIG. 36 (d), when the switch SW3-1 turns off (at t16) and then the switch SW3-3 conducts (at t17) as shown in FIG. 36 (c), the capacitor CD7 is turned on. One end is grounded, and as shown in FIG. 36E, the charge stored in the capacitor CD7 is instantaneously discharged between t15 and t16 (t17). As a result, as shown in FIG. 36 (e), the charge stored in the capacitor CD7 becomes zero, and the voltage applied to the capacitor CD7 becomes zero volt (at t17). Accordingly, the inner frame terminal board output circuit 300a is again set to a state in which the inner frame 12 can be detected (at t17). Also, as shown in FIG. 36 (d), when the switch SW3-2 is cut off (at t16), power is supplied from the DC power supply DC1 to the resistor R11 and the resistor R12 of the inner frame input / output port output circuit 300b. Is stopped, and the voltage applied to the resistor R12 becomes zero volt (at t16). Therefore, as shown in FIG. 36 (i), the signal of DC voltage 5 volts output from the inner frame input / output port output circuit 300b to the input / output port 205 is stopped at t16 (inner frame input The output from the output port output circuit 300b to the input / output port 205 becomes zero volts at t16).

  Next, as shown in FIG. 36A, when the power of the pachinko machine 600 is turned off after t18 (when the DC voltage supplied by the DC power supply DC1 becomes zero volts), the inner frame terminal plate output circuit 300a The supply of power by the DC power supply DC1 to the inner frame input / output port output circuit 300b is stopped. However, even if the power of the pachinko machine 600 is in the OFF state, the power from the capacitor CD1 is supplied to the inner frame terminal plate output circuit 300a. Therefore, when the inner frame 12 changes from the closed state to the open state again, for example, between t19 and t20 after about 3 minutes from the time t17 at which the previous closed state was reached, this is followed in FIG. As shown in c), the switch SW3-3 changes from the conductive state to the cut-off state (at t19), and then, as shown in FIG. 36 (d), the switch SW3-1 and the switch SW3-2 from the cut-off state to the conductive state And (t20), charging of the capacitor CD7 is started. Therefore, as shown in FIG. 36 (e), the voltage applied to the capacitor CD7 starts rising from zero volt (at t20). Here, the switch SW3-3 is turned off at t19, and the switches SW3-1 and SW3-2 are turned on at t20 because of the structure of the switch SW3A (FIG. 34 (a) → FIG. 34 (b) → See FIG. 34 (c)).

  As shown in FIG. 36 (d), when the switch SW3-1 switches from the cutoff state to the conduction state (at t20), the voltage at the TRG terminal of the timer IC1 becomes the same as the voltage applied to the capacitor CD7. As shown in (f), once the voltage at the TRG terminal of the timer IC1 falls from about 10.3 volts to zero volts, the rise starts (at t20). Following this falling, as shown in FIG. 36 (g), the OUT terminal voltage of the timer IC1 rises from zero volt to about 9.6 volts (at t20). As a result, the collector terminal and the emitter terminal of the transistor TR1 of the inner frame terminal plate output circuit 300a are conducted, and the light emitting diode on the primary side of the photocoupler PR1 of the inner frame external output terminal plate 291 (see FIG. 35) The current supply is started (at t20). Then, as shown in FIG. 36H, the output of the light receiving element (phototransistor) on the secondary side of the photocoupler PR1, that is, the output of the inner frame external output terminal plate 291, is high from the low state at t20. Switch to the state. Thereby, the output of a pulse signal indicating opening of the inner frame 12 to the hole computer 262 is started. On the other hand, as shown in FIG. 36 (d), even if the inner frame 12 changes from the closed state to the open state again between t19 and t20, and the switch SW3-2 becomes conductive (t20), Since power from the DC power supply DC1 is not supplied to the resistors R11 and R12 of the inner frame input / output port output circuit 300b (since the DC voltage supplied by the DC power supply DC1 is zero volts), the voltage applied to the resistor R12 Becomes zero volts (at t20). Therefore, as shown in FIG. 36 (i), the signal output from the inner frame input / output port output circuit 300b to the input / output port 205 maintains the stopped state (input from the inner frame input / output port output circuit 300b). The output to the output port 205 maintains zero volts).

  Next, as shown in FIG. 36E, when about 2 ms has elapsed from t20, the charging of the capacitor CD7 is completed, and the voltage applied to the capacitor CD7 becomes about 10.3 volts. Then, as shown in FIG. 36 (f), the voltage at the TRG terminal of the timer IC1 returns from zero volt to about 10.3 volts (approximately 2 ms has elapsed from t20). However, since about 10 ms has not elapsed since the voltage at the OUT terminal of timer IC1 has risen from zero volts to about 9.6 volts (time t20), the OUT terminal voltage of timer IC1 is about 9.6 volts. It is maintaining the state.

  Thereafter, when about 10 ms has elapsed from t20, as shown in FIG. 36 (g), the timer IC1 switches the voltage of the OUT terminal from about 9.6 volts to zero volts. Then, the collector terminal and the emitter terminal of the transistor TR1 of the inner frame terminal plate output circuit 300a are disconnected, and the current supply to one end of the resistor R7a of the inner frame external output terminal plate 291 is stopped. Therefore, the output of the inner frame external output terminal plate 291 switches from the high state to the low state as shown in FIG. 36 (h) when about 10 ms elapses from t20. As a result, the output of the pulse signal output to the hall computer 262 is stopped. Thus, by switching the output of the inner frame external output terminal plate 291, the pulse width of the pulse signal output from the inner frame external output terminal plate 291 to the hole computer 262 can be limited to about 10 ms.

  When the inner frame 12 changes from the open state to the closed state between t21 and t22 as shown in FIG. 36 (b), the switch SW3-1 and the switch SW3- as shown in FIG. 36 (d). At time t21, 2 is switched from the conduction state to the interruption state. Thereafter, as shown in FIG. 36C, the switch SW3-3 becomes conductive again (at t22). The switch SW3-1 and the switch SW3-2 are cut off at t21, and the switch SW3-3 is turned on at t22 because of the structure of the switch SW3A ((FIG. 34 (c) → FIG. 34 (b) → 34 (a))).

  As shown in FIG. 36 (d), when the switch SW3-1 turns off (at t21) and then the switch SW3-3 turns on (at t22) as shown in FIG. 36 (c), the capacitor One end of the CD 7 is grounded, and as shown in FIG. 36E, the charge stored in the capacitor CD 7 is instantaneously discharged between t20 and t21 (t22). As a result, as shown in FIG. 36 (e), the charge stored in the capacitor CD7 becomes zero, and the voltage applied to the capacitor CD7 becomes zero volt (at t22). Therefore, the inner frame terminal board output circuit 300a is again set in a state in which the inner frame 12 can be detected (at t22). Further, as shown in FIG. 36 (d), when the switch SW3-2 is turned off (at t21), the input / output port output circuit 300b for the inner frame is switched to the inner frame when the pachinko machine 600 is powered on. It is set to a state in which 12 detections are possible (at t21).

  As described above, when the inner frame 12 is closed (at t17 and t22), the inner frame frame opening detection circuit 300 (inner frame terminal plate output circuit 300a) shuts off the switch SW3-1 to set the capacitor CD1. After the power supplied to the capacitor CD7 is stopped, one end of the capacitor CD7 can be grounded by the switch SW3-3. Therefore, when the inner frame 12 is in the closed state (at t17 and t22), the charge stored in the capacitor CD7 when the inner frame 12 is in the open state (from the charge stored at t15 to t16 and from t20 The charge stored at t21) can be discharged instantaneously via switch SW3-3 to zero (t17 and t22). As a result, since the charge stored in the capacitor CD7 is always zero until the inner frame 12 is opened again, it is assumed that the inner frame 12 is continuously opened a plurality of times in a short time. Also, the integration circuit 281 operates normally, and the fall period of the voltage applied to the TRG terminal of the timer IC1 can be made constant (about 2 ms) regardless of the open period of the inner frame 12.

  Further, when the inner frame 12 changes from the closed state to the open state (from t14 time to t15 time and t19 time to t20 time), the inner frame frame open detection circuit 300 (inner frame terminal plate output circuit 300a) Due to the structure, first, after the switch SW3-3 is turned off (at t14 and t19), the switch SW3-1 and the switch SW3-2 become conductive (at t15 and t20). As described above, when the inner frame 12 changes from the closed state to the open state, first, one end of the capacitor CD7 is disconnected from the ground by the switch SW3-3 (t14 and t19), and thereafter, from the capacitor CD1 Power is supplied to the capacitor CD7 via the switch SW3-1 (at t15 and t20). Therefore, when the inner frame 12 changes from the closed state to the open state, the capacitor CD1 that supplies power does not short to ground. Therefore, when the inner frame 12 changes from the closed state to the open state, the power from the capacitor CD1 flows to the ground, and short-circuit breaks the inner frame frame open detection circuit 300 (inner frame terminal plate output circuit 300a). Absent.

  Similarly, when the inner frame 12 changes from the open state to the closed state (from t16 time to t17 time and t21 time to t22 time), the switch SW3A turns on the inner frame frame open detection circuit 300 (inner frame terminal plate output circuit 300a). Due to the structure of the switch SW3, after the switches SW3-1 and SW3-2 are turned off (at t16 and t21), the switch SW3-3 is turned on (at t17 and t22, see FIG. 34). . Thus, when the inner frame 12 changes from the open state to the closed state, first, the power supplied from the capacitor CD1 to the capacitor CD7 is stopped by the switch SW3-1 (t16 and t21), and then Then, one end of the capacitor CD7 is grounded via the switch SW3-3 (t17 and t22). Therefore, when the inner frame 12 changes from the open state to the closed state, the capacitor CD1 that supplies power does not short to ground. Therefore, when the inner frame 12 changes from the open state to the closed state, the power from the capacitor CD1 flows to the ground, and short-circuit breaks the inner frame frame open detection circuit 300 (inner frame terminal plate output circuit 300a). Absent.

  In addition, when the inner frame 12 is in the open state when the inner frame 12 is in the closed state (at t17 and t22), the inner frame 12 is in the open state. The charge stored in the CD 7 can be discharged instantaneously to the ground through the switch SW3-3 (at t17 and t16) (the charge stored at t15 to t16 and the charge stored at t20 to t21) t 22 o'clock). Therefore, when the inner frame 12 is opened and the switch SW3-1 is turned on (at t15 and t20), the charge stored in the capacitor CD7 is superimposed on the voltage supplied from the capacitor CD1, and the timer IC1 is set. An overvoltage (for example, a voltage of 12.3 volts) which is to be destroyed is not applied to the TRG terminal of the timer IC1. Therefore, it is possible to eliminate the need for a Zener diode that prevents the application of an overvoltage having a magnitude that destroys the timer IC1.

  Further, as described above, the inner frame opening detection circuit 300 changes the switch SW3 connected to the inner frame opening detection circuit 290 of the pachinko machine 500 of the fourth embodiment to the switch SW3A, and the fourth embodiment is implemented. The Zener diode D3 used in the inner frame opening detection circuit 290 of the pachinko machine 500 is removed, and the configuration is the same as that of the inner frame opening detection circuit 290 except for the above change. The inner frame external output terminal plate 291 of the pachinko machine 600 of the fifth embodiment has the same structure as the inner frame external output terminal plate 291 of the pachinko machine 500 of the fourth embodiment.

  Therefore, as in the case of the pachinko machine 500 of the fourth embodiment, when the power supply to the pachinko machine 600 is performed and a DC voltage of 12 volts is supplied from the DC power supply DC1 (at time t18), When the frame 12 is opened and the switch SW3-1 provided in the inner frame terminal plate output circuit 300a conducts, the inner frame terminal plate output circuit 300a transmits the inner frame external output terminal plate 291 to the hall computer 262. , And outputs a pulse signal with a pulse width of 10 ms. Furthermore, when the inner frame 12 is opened and the switch SW3-2 provided in the inner frame input / output port output circuit 300b conducts, a signal of 5 volts from the inner frame input / output port output circuit 300b to the input / output port 205 Is output.

  In addition, for example, even when the operating time of the game arcade is over and the power supply to the pachinko machine 600 is cut off (even after t18), the inner frame terminal board output circuit 300a Since the power is supplied from the capacitor CD1, when the inner frame 12 is opened and the switch SW3-1 provided in the inner frame terminal plate output circuit 300a conducts, the inner frame terminal plate output circuit 300a A pulse signal having a pulse width of 10 ms is output from the inner frame external output terminal plate 291 to the hall computer 262. However, for example, when the operating time of the game arcade is over and the power supply to the pachinko machine 600 is cut off (in the case of after t18), the DC voltage of DC power from DC1 to DC 12 volts is within the inner frame Because it is not supplied to the input / output port output circuit 300b, even if the inner frame 12 is opened and the switch SW3-2 provided in the inner frame input / output port output circuit 300b conducts, the input / output for the inner frame A signal is not output from port output circuit 300 b to input / output port 205 (DC voltage output from inner frame input / output port output circuit 300 b to input / output port 205 is zero volts).

  Thus, when power is supplied to the pachinko machine 600, the function of outputting a signal to the input / output port 205 and the function of outputting a pulse signal to the hall computer 262 when the inner frame 12 is opened, And the function of outputting a pulse signal to the hall computer 262 when the inner frame 12 is opened when the power supply to the pachinko machine 600 is interrupted, the inner frame open circuit detecting circuit 300 being one circuit. Can be demonstrated.

  The pulse signal output from the inner frame external output terminal plate 291 is stored in the hall computer 262 which keeps operating for 24 hours. Therefore, by the pulse signal stored in the hall computer 262, the pachinko machine in which the inner frame 12 has been opened can be identified. Furthermore, the hall computer 262 outputs the pulse signal from the inner frame external output terminal plate 291 and stores the output time of the output pulse signal so that the inner frame 12 of the specified pachinko machine is opened. Time can be detected.

  In addition, when the inner frame 12 is opened and the switch SW3-1 and the switch SW3-2 become conductive, the timer IC1 of the inner frame terminal plate output circuit 300a does not matter regardless of the conduction period of the switch SW3-1. The switch SW3-1 becomes conductive regardless of the open period of the inner frame 12, and about 10 ms after the TRG terminal voltage of the timer IC1 falls from about 10.3 volts to zero volts, the OUT terminal of the timer IC1 Switch the voltage from about 9.6 volts to zero volts. Thus, the supply period of the current supplied to the photocoupler PR1 of the inner frame external output terminal plate 291 is approximately 10 ms.

  Therefore, for example, the business hours of the game arcade are finished, the power supply to the pachinko machine 600 is cut off, and the inner frame terminal board output circuit 300a and the inner frame external output terminal board 291 are DC power 12 to 12 volts DC. When no voltage is supplied, that is, when a DC voltage of about 10.3 volts is supplied from capacitor CD1 to inner frame terminal plate output circuit 300a and inner frame external output terminal plate 291, photocoupler PR1 from capacitor CD1. The supply period of the current supplied to it can be limited to about 10 ms per one opening of the inner frame 12. Therefore, the power consumption due to the opening of the inner frame 12 can be reduced.

  In each embodiment, the pulse signals output from the external output terminal plate 261, the inner frame external output terminal plate 291, and the front frame external output terminal plate 293 are not limited to the hall computer 262, which has a different installation place from the pachinko machine. Although it output to, it is not restricted to this. A dedicated storage device having the function of the hall computer 262 may be provided for each pachinko machine, and the dedicated storage device may be provided on the back side of each pachinko machine provided with the main control device 110 and the like. In this case, more specifically, a dedicated storage device such as the main control unit 110, the payout control unit 111 and the emission control unit 112 is housed in the substrate box, and the box base and the box cover provided on the substrate box And unsealably connected by a sealing unit (not shown) (connection by caulking structure). Then, a seal seal (not shown) is attached to the connection portion between the box base and the box cover over the box cover and the box base.

  In the fourth and fifth embodiments, the inner frame external output terminal plate 291 and the front frame external output terminal plate 293 are provided on different substrates, but the present invention is not limited to this. The inner frame external output terminal plate 291 and the front frame external output terminal plate 293 may be provided on the same substrate. Even when the inner frame external output terminal plate 291 and the front frame external output terminal plate 293 are provided on the same substrate, the inner frame external output terminal plate 291 is the inner frame frame open detection circuit 290. The front frame external output terminal plate 293 is connected to the front frame frame open detection circuit 292. The inner frame external output terminal plate 291 and the front frame external output terminal plate 293 separately output pulse signals to the hall computer 262.

  In the fourth embodiment and the fifth embodiment, the inner frame frame open detection circuit 290 for detecting the opening of the inner frame 12 and the front frame frame open detection circuit 292 for detecting the open front frame 14 are separately provided. However, the present invention is not limited to this. In the case of outputting to the hall computer 262 without distinguishing the opening of the inner frame 12 and the front frame 14, the following configuration may be employed. First, the front frame opening detection circuit 292 and the front output output terminal plate 293 are removed to leave the inner opening detection circuit 290 and the inner output output plate 291 in the main control unit 110. Then, the switch SW3 and the switch SW4 may be connected in parallel and connected to the inner frame opening detection circuit 290. With this configuration, it is possible to output to the hall computer 262 without distinguishing the opening of the inner frame 12 and the front frame 14. It should be noted that what is left in the main control device 110 may be the front frame frame open detection circuit 292 and the front frame external output terminal plate 293 instead of the inner frame frame open detection circuit 290 and the inner frame external output terminal plate 291. .

  In the fourth and fifth embodiments, when the inner frame 12 is opened, a signal of 5 volts is output to the input / output port 205 using the inner frame input / output port output circuit 290b. It is not limited. When a signal of 5 volts is output to the input / output port 205 when the inner frame 12 is opened without using the inner frame input / output port output circuit 290b, the following configuration may be employed. First, the inner frame input / output port output circuit 290b is removed from the inner frame frame open detection circuit 290 (the DC power supply DC1 is left). Next, a resistor is connected in series between the emitter terminal e of the transistor TR1 and the ground, and the input / output port 205 is connected to a connection point between the emitter terminal e of the transistor TR1 and the resistor connected in series. Then, when the collector terminal c and the emitter terminal e of the transistor TR1 conduct, that is, when the inner frame 12 is opened, a resistor connected in series so that a signal of 5 volts is output to the input / output port 205 You can adjust the value. As a result, when the inner frame 12 is opened, the switch SW3-2, the resistor R11, and the resistor R12 are unnecessary, and a signal of 5 volts is output to the input / output port 205, and a pulse signal of 10 ms in pulse width is output from the hall computer. It can be output to 262. Although the case where the inner frame input / output port output circuit 290b is unnecessary is described above, the front frame opening detection circuit is also used when the front frame input / output port output circuit 292b is unnecessary. The same procedure may be applied to 292.

In the first to fifth embodiments, the external output terminal board 261, the external output terminal board 291 for the inner frame, the external output terminal board 293 for the front frame, and the hall computer 262 are connected to each other. A pulse signal is output from the inner frame external output terminal plate 291 and the front frame external output terminal plate 293 to the hall computer 262 to store the opening of the inner frame 12 or the front frame 14 in the hall computer 262. It is not limited to For example, EEPROM (Electronically Erasable and Programmable Read) for pachinko machines
Only Memory) and backup RAM are provided. Then, the external output terminal plate 261, the inner frame external output terminal plate 291, and the front frame external output terminal plate 293 are connected to the EEPROM and the backup RAM. With this configuration, the open state of the inner frame 12 or the front frame 14 can be stored in the EEPROM or the backup RAM. Then, when the power of the pachinko machine is turned on, the MPU 201 confirms the storage of the EEPROM and the backup RAM. Thereby, the opening of the inner frame 12 or the front frame 14 can be detected using a pachinko machine. That is, the role of the hall computer 262 can be played by the EEPROM or the backup RAM (the role of the “specified device” described in the claims can be played by the EEPROM or the backup RAM). Note that the RAM 203 may be used as the backup RAM.

  Although the present invention has been described above based on the embodiment, the present invention is not limited to the above embodiment, and various modifications and improvements can be easily made without departing from the scope of the present invention. It can be guessed that.

  For example, in each of the above embodiments, each command is transmitted from the main control unit 110 to the sound lamp control unit 113, and the sound lamp control unit 113 instructs the display control unit 114 to display. However, the main control unit 110 may transmit the command directly to the display control unit 114. Further, an audio lamp control device may be connected to the display control device, and the display control device may be configured to transmit an output of each sound and a command instructing lighting of the lamp to the audio lamp control device. Furthermore, the audio lamp control device and the display control device may be configured as one control device.

  Further, in the above embodiment, the winnings to the first entrance 64 and the passage of the second entrance 67 are configured to be respectively suspended up to 4 times, but the maximum number of times is up to 4 times. The number of times is not limited, and may be set to three times or less, or five times or more (for example, eight times). In addition, the number of times of suspension of variable display based on winning on the first entrance 64 is different by a number or number of areas divided by four even in part of the third symbol display device 81 by the number of times of suspension A light emitting member such as a lamp may be provided separately from the first symbol display device 37, and may be displayed in a mode (for example, a color or a lighting pattern), and the number of reservations is notified by the light emitting member. You may.

  Further, as shown in the above embodiment, the variable display, which is a kind of dynamic display, is not limited to the one in which the symbols as identification information are vertically scrolled on the display screen of the third symbol display device 81, The symbol may be moved and displayed along a predetermined path such as a lateral direction or an L-shape. In addition, the dynamic display of identification information is not limited to the variable display of symbols, and, for example, one or more characters may be displayed in various ways along with the symbols or in addition to the symbols, or may be displayed in various ways. It also includes the effect display etc. In this case, one or more characters are used as the third symbol.

  The present invention may be implemented on a pachinko machine or the like of a type different from that of the above embodiment. For example, it may be implemented in a so-called second type pachinko gaming machine having a winning device having a special area such as V zone. Furthermore, in addition to the pachinko machine, it may be implemented as another game machine such as an allearch or a ball.

  The present invention may be implemented on a pachinko machine or the like of a type different from that of the above embodiment. For example, a pachinko machine (common name, two-time, three-time, and so on) in which the jackpot expected value can be increased until the jackpot state occurs a plurality of times (for example, two times, three times) including the jackpot once May be implemented as In addition, the pachinko machine may be implemented as a pachinko machine that generates a special game in which a predetermined game value is given to the player, as a prerequisite to winning a ball in a predetermined area after the jackpot symbol is displayed. In addition, it is possible to have the winning device which possesses special territory such as V zone and to execute to the pachinko machine which becomes special game state as a necessary condition to make the special territory win the ball. Furthermore, in addition to pachinko machines, various types of gaming machines may be implemented, such as arelapachis, ball balls, slot machines, gaming machines in which so-called pachinko machines and slot machines are fused.

  In the slot machine, for example, a symbol is changed by operating the operation lever in a state where the coin is inserted and the symbol effective line is determined, and the symbol is stopped and determined by operating the stop button. It is a thing. Therefore, as a basic concept of the slot machine, “a display device is provided which displays the identification information after displaying the identification information sequence consisting of a plurality of identification information in a variable manner, and is derived from the operation of the starting operation means (for example, operation lever) The variable display of identification information is started, and the variable display of identification information is stopped and fixedly displayed due to the operation of the operation means for stop (for example, stop button) or when a predetermined time elapses. It is a slot machine that generates a special game that gives a predetermined game value to the player, as a prerequisite that the combination of identification information at the time is a specific one. In this case, the game medium is represented by coins, medals, etc. An example is given.

  In addition, as a specific example of a gaming machine in which a pachinko machine and a slot machine are fused, a display device is provided which variably displays a symbol row consisting of a plurality of symbols and then displays the symbols, and is provided with a handle for ball launch. Not included. In this case, after the injection of a predetermined amount of balls based on a predetermined operation (button operation), for example, the variation of the symbol is started due to the operation of the operation lever, for example, due to the operation of the stop button or By the passage of time, the fluctuation of the symbol is stopped, and a special game for giving a predetermined game value to the player is generated as a necessary condition that the determined symbol at the time of the stop is a so-called jackpot symbol. Is a lot of balls being dispensed to the lower tray.

  Hereinafter, in addition to the gaming machine of the present invention, concepts of various inventions included in the various embodiments described above will be shown. A game machine comprising a main body, a door for opening and closing a front surface of the main body, and control means provided in a space formed by the door and the main body for controlling a game, the door for the main body When the door opening detection means detects the opening of the body and the door opening detection means detects the opening of the door, if in the initial state, the door by the operation from the initial state to the prescribed time The detection result by the door open detection means is outputted to the specific device based on the period adjustment means for outputting a signal which becomes a predetermined output period regardless of the open period of the above and the signal outputted by the period adjustment means An output means, a power supply means for supplying electric power to the output means and the period adjustment means to operate, the door open detection means initially detects the period adjustment means when the closing of the door is detected. The power supply means includes an off / off operation means for supplying power to operate the output means and the period adjustment means when the game machine is powered off. Gaming machine A1 characterized by

  According to the gaming machine A1, when the opening of the door is detected by the door opening detection means, the period adjusting means is predetermined by the operation from the initial state to the specified time regardless of the opening time of the door. Output a signal that will be an output period. Then, the output means outputs the detection result to the specific device based on the signal output from the period adjustment means. Here, the output period of the signal output by the period adjustment means is determined by the operation of the period adjustment means from the initial state to the specified time. In order to cause the period adjustment means to output a signal that is a predetermined output period regardless of the opening time of the door, the initialization means adjusts the period adjustment means when the door opening detection means detects the closing of the door. In the initial state. Therefore, the period adjusting means can always operate from the initial state when the door opening detecting means detects the opening of the door. Therefore, every time opening of the door is detected by the door opening detecting means, the period adjusting means is operated normally and stably from the initial state to the prescribed time, so that an output period predetermined for the period adjusting means is obtained. A signal can be output normally and stably, and a detection result can be output normally and stably from an output means to a specific apparatus.

  Further, according to the gaming machine A1, in addition to the state where the power supply of the gaming machine is turned on, the door opening detection means does not When the opening is detected, the off-operation means supplies power to the output means and the period adjustment means. Therefore, even if the power of the gaming machine is turned off and the control means is stopped, if the opening of the door is detected by the door open detection means, a signal which becomes an output period predetermined by the period adjustment means Is output, and the output means outputs the detection result to a specific device based on the output signal. Therefore, for example, even if the door is opened due to a fraudulent act by somebody after closing the store where all the game machines are turned off, it is possible to determine the gaming machine in which the door is opened by the specific device.

  The inside of the space formed by the door and the main body indicates the back or back side (including the back side of the main body) of the door which can not be touched when the door is closed. In addition, the detection result output from the output means provided for each of a plurality of gaming machines may be received by one specific device, or a specific device is provided for each gaming machine, and the specific device is distributed to each gaming machine. You may set it. When the specific device is disposed in each game machine, the box base and the box cover covering the opening of the box base are connected to each other, and the space formed by the box cover and the box base is specified. Store the device. Then, the box cover and the box base are unsealably connected by the sealing unit. Further, a seal seal is attached to the junction of the box cover and the box base over the box cover and the box base. Then, the specific device may be disposed on the back or back side of the door.

  In the gaming machine A1, the door opening detection means includes stop means for stopping the power supply to the period adjustment means by the power supply means when the closing of the door is detected. A2.

  According to the gaming machine A2, when the closing of the door is detected by the door open detection means, the stop means stops the power supply by the power source means to the period adjustment means. Therefore, in a state where the operation of the period adjusting means is stopped by the stopping means, the period adjusting means can be initialized by the initializing means. Therefore, the period adjustment means can be brought into the initial state normally and stably.

  In the gaming machine A1 or A2, the period adjusting means is configured using a storage means for storing charge, and the charge stored in the storage means by the power supplied from the initial state to the prescribed time by the power source means. A game machine A3 characterized by outputting a voltage generated along with the signal as a signal for the predetermined output period.

  According to the gaming machine A3, when power from the power supply means is supplied to the storage means constituting the period adjustment means from the initial state to the prescribed time, charges are stored in the storage means. The period adjustment means outputs the voltage generated with the charge stored in the storage means as a signal serving as a predetermined output period. As described above, by configuring the period adjustment unit by the storage unit, it is possible to output a signal for a predetermined output period with a simple configuration without using the period adjustment unit as a complicated circuit.

  In the gaming machine A3, when the closing of the door is detected by the door opening detection unit, the initialization unit discharges the charge stored in the storage unit constituting the period adjustment unit. A game machine A4 characterized by comprising discharge means for bringing the means into an initial state.

  According to the gaming machine A4, when the closing of the door is detected by the door opening detection unit, the discharging unit discharges the charge stored in the storage unit constituting the period adjusting unit. Therefore, the charge stored in the storage means when the door opening detection means detects the opening of the door is discharged by the discharging means to zero when the door opening detection means detects that the door is closed. can do. Thus, when the opening of the door is detected by the door opening detection unit, the period adjustment unit configured by the storage unit can always operate from the initial state. Therefore, every time opening of the door is detected by the door opening detecting means, the period adjusting means is operated normally and stably from the initial state to the prescribed time, so that an output period predetermined for the period adjusting means is obtained. A signal can be output normally and stably, and a detection result can be output normally and stably from an output means to a specific apparatus. In addition, as a discharge method of the storage means, it is exemplified that the storage means is short-circuited to the ground.

  In any one of game machines A2 to A4, the stopping means is a releasing means for releasing an electrical connection between the power supply means and the period adjusting means when the door opening detecting means detects the closing of the door. A game machine A5 characterized by comprising.

  According to the gaming machine A5, when the closing of the door is detected by the door open detection means, the electrical connection between the power supply means and the period adjustment means is released by the release means. Therefore, in the state where the power supply to the period adjustment means is stopped by the release means, the period adjustment means can be initialized by the initialization means or the discharge means. Therefore, the period adjustment means can be brought into the initial state normally and stably.

  In the gaming machine A5, the initialization means cancels a short circuit between the storage means forming the period adjustment means and the ground by the discharging means when the door opening detection means detects the opening of the door body. A discharge releasing means is provided, and the stopping means stops the release of the electrical connection between the power source means and the period adjusting means by the releasing means when the door opening detecting means detects the opening of the door. Power supply resuming means for resuming power supply to the period adjusting means by the power supply means, and when the door opening detecting means detects the opening of the door, the power supply resuming means After the short circuit by the discharging means of the storage means and the ground constituting the period adjusting means is released by the discharge releasing means, the electricity by the releasing means of the power source means and the period adjusting means The release of the connection is stopped, the power supply to the period adjustment means by the power supply means is resumed, and when the door open detection means detects the closing of the door, the discharge means is the power supply means The storage means constituting the period adjustment means is short-circuited to ground after the electrical connection between the device and the period adjustment means is released by the release means, and the charge stored in the storage means is discharged. Game machine A6.

  According to the gaming machine A6, when the opening of the door is detected by the door opening detection means, the power supply resuming means first uses the short circuit between the storage means and period grant means as the discharge canceling means. After the release, the power supply means resumes the power supply to the period adjustment means. On the other hand, when closing of the door is detected by the door open detection means, the discharge means first causes the release means to release the electrical connection between the power supply means and the period adjustment means, and then the period adjustment means is configured. The storage means to be connected is short-circuited to ground to discharge the charge stored in the storage means. Therefore, there is no possibility that the power supply means and the ground are short-circuited in either of the case where the door opening detection means detects opening of the door and the case where the door opening detection means detects closing of the door body. . Therefore, damage to the power supply means and the like due to a short circuit between the power supply means and the ground can be reliably prevented.

  In any one of the gaming machines A1 to A6, there is provided an output period limiting means for keeping one output period of the output means within a predetermined period, and the off-operation means is added to the output means and the period adjusting means. A game machine A7, characterized in that the output period limiting means is also supplied with power and operated.

  According to the gaming machine A7, one output period by the output means is kept within a predetermined period by the output period limiting means. Similarly to the output means and period adjustment means, the output period restriction means operates by receiving power from the operation means while the game machine is off, so that the operation period of the output means by one opening of the door. Can be suppressed within a predetermined period to suppress the consumption of the off-operation means during power-off of the gaming machine. Therefore, the number of times of operation of the output means can be increased, and the number of times of detection of the opening of the door can be increased.

  A gaming machine A8 according to any one of the gaming machines A1 to A7, wherein the off-operation means is configured to be chargeable by the power supplied from the power supply of the gaming machine.

  According to the gaming machine A8, the off-operation means is charged by the power supplied to the gaming machine while the gaming machine is on, so the gaming machine is turned on in accordance with the operating hours of the gaming arcade. Only when it is off can charge the operating means. Therefore, when the door is opened while the power of the gaming machine is closed after the store is closed, the output means and the period adjustment means (further, the output period restriction means) are operated by the off-operation means. And the detection result by the door open detection means can be notified to the specific device.

  In the gaming machine A7 or A8, the output means outputs a detection result to the specific device based on the output from the output period limiting means, and the output period limiting means causes the door opening detection means to detect the door. A game machine A9 characterized by performing output to the output means during the predetermined period when opening is detected.

  According to the gaming machine A9, the output means for outputting the detection result to the specific device based on the output from the output period limiting means, during the predetermined period when the door opening detection means detects the opening of the door body, Output is performed by the output period limiting means. Therefore, the output operation to the output means by the output period limiting means can be kept within a predetermined period per one opening of the door. Therefore, it is possible to suppress the consumption of the off-operation means during power-off of the gaming machine, and to increase the number of times the output means can be operated to increase the number of detections of the opening of the door.

  In the gaming machine A9, the output period limiting means stops the output to the output means when the door opening detecting means does not detect the opening of the door body.

  According to the gaming machine A10, the output of the output period limiting means to the output means for outputting the detection result to the specific device is stopped when the opening of the door is not detected by the door opening detection means. Therefore, when opening of the door is not detected by the door opening detection means, it is possible to suppress the power consumed along with the output operation of the output period limiting means. Therefore, it is possible to suppress the consumption of the off-operation means during power-off of the gaming machine, and to increase the number of times the output means can be operated to increase the number of detections of the opening of the door.

  In any one of game machines A7 to A10, the output period limiting means is configured using a monostable multivibrator, and an output period of a signal output by the period adjusting means to the monostable multivibrator is the door body. A game machine A11 characterized by being set to a period shorter than the predetermined period regardless of the open period.

  According to the gaming machine A11, the signal input to the output period limiting means using the monostable multivibrator is a predetermined output period by the output means by the period adjusting means regardless of the opening period of the door. Adjusted to be shorter than the period. Here, the monostable multivibrator continues to output the signal if the input period of the input signal is shorter than the output period of the output signal. Therefore, when a monostable multivibrator is used as the output period limiting means, it is input to the output period limiting means more than the output period of the signal to be output, that is, the predetermined period limited by the output period limiting means. The signal input period, ie, the opening period of the door, should be short. However, since it is completely unpredictable how long the door will be open, it is necessary to keep the door open period shorter than the predetermined period limited by the output period limiting means. It is necessary to set the period for a sufficient time. For example, if the opening period of the door body is predicted to be from several tens of seconds to several minutes, the predetermined period limited by the output period restriction means is set from several minutes to several tens of units with sufficient margin. Must. Then, during this predetermined period, power is continuously supplied to the output period limiting means and the output means from the off-time operation means, so that the wear of the off-time operation means becomes remarkable. Therefore, in order to suppress consumption of the operating means during off-state after using a monostable multivibrator as the output period limiting means, a special circuit configuration is required. However, according to the gaming machine A11, the period adjusting means can adjust the signal input to the output period limiting means to be shorter than the predetermined period regardless of the opening period of the door. Therefore, regardless of the opening period of the door, the output period limiting means can be operated normally, so that one output period by the output means can be kept within the predetermined period by the output period limiting means. As described above, according to the gaming machine A11, by providing the period adjusting means, the consumption of the operating means during off-state is suppressed, and the output period using the monostable multivibrator without adopting a special circuit configuration. A limiting measure can be realized.

  A game machine A12 according to any one of game machines A1 to A11, wherein the output means is mounted on a substrate different from the control means.

  In any one of game machines A1 to A12, the output means includes a photocoupler, and the detection result by the door open detection means is output to the specific device by an output of the photocoupler. Machine A13.

  In any one of the gaming machines A1 to A13, the output means and the period adjustment means (further, the output period limitation means) are configured to be operable even if the voltage is lower than the operating voltage of the control means. A game machine A14 to feature.

  According to the gaming machine A14, the output means and the period adjustment means (further, the output period limitation means) are configured to be operable even at a voltage lower than the operating voltage of the control means. Even if the charge amount decreases and the output voltage of the operating means during off-state becomes lower than the operating voltage of the control means, the output means and the period adjusting means (further, the output period limiting means) are operated to open the door Can be notified to specific devices. That is, the open detection of the door when the power of the gaming machine is turned off can be detected for a long time.

  In any one of the game machines A1 to A14, the output means and the period adjustment means (further, the output period restriction means) have an operable range voltage wider than an operable range voltage of the control means. A game machine A15 characterized by.

  According to the gaming machine A15, the operable means voltage of the output means and the period adjusting means (further, the output period limiting means) is wider than the operable range voltage of the control means. Therefore, when the power of the gaming machine is turned off, the output means and the period adjusting means (further, the output period limiting means) can be operated for a long time by the operating means during the off time. Can be detected for a long time.

  A gaming machine A16 according to any one of gaming machines A7 to A15, wherein the output period limiting means is configured to include a C-MOS semiconductor.

  According to the gaming machine A16, the output period limiting means is configured to include the C-MOS semiconductor. Here, the C-MOS semiconductor generally consumes less power during operation. Therefore, according to the gaming machine A16, it is possible to reduce the consumption of the operating means during the off time, and to perform the open detection of the door when the power of the gaming machine is turned off for a long time.

  A game machine A17 according to any one of game machines A1 to A16, wherein the period adjustment means is configured using an integration circuit.

  According to the gaming machine A17, since the period adjustment means is configured using the integration circuit, the signal inputted to the output period restriction means is adjusted to be shorter than the predetermined period without using a complicated circuit or signal processing. be able to. In addition, by adjusting the resistance value of the resistor and the capacitance value of the capacitor used in the integration circuit, the output period of the signal output by the period limiting means can be freely adjusted within a predetermined period.

  A gaming machine A18 according to any one of gaming machines A1 to A17, wherein the gaming machine is a pachinko gaming machine. Above all, the basic configuration of a pachinko gaming machine is provided with an operating handle, and in response to the operation of the operating handle, the ball is fired to a predetermined game area, and the ball is at an operating opening arranged at a predetermined position in the game area. As a prerequisite for winning (or passing through the operation opening), identification information dynamically displayed on the display device may be determined and stopped after a predetermined time. In addition, when the special game state occurs, the variable winning device (specific winning opening) disposed at a predetermined position in the gaming area is opened in a predetermined manner to enable the ball to be won, and the value according to the number of winnings There is a case where a value (including not only prize balls but also data etc. written to a magnetic card) is given.

  A gaming machine according to any one of gaming machines A1 to A17, wherein the gaming machine is a slot machine. Among them, as a basic configuration of the slot machine, “a variable display means for dynamically displaying an identification information sequence consisting of a plurality of identification information and subsequently displaying the identification information is provided. The dynamic display of the identification information is started as a result, and the dynamic display of the identification information is stopped due to the operation of the stop operation means (stop button) or when the predetermined time elapses. It is a gaming machine provided with a special gaming state generation means for generating a special gaming state advantageous to the player, as a necessary condition that the final identification information of is a specific identification information. In this case, the game medium may be a coin, a medal or the like as a representative example.

  A gaming machine A20 according to any one of gaming machines A1 to A17, wherein the gaming machine is a combination of a pachinko gaming machine and a slot machine. Among them, as a basic configuration of the integrated gaming machine, "a variable display means for dynamically displaying an identification information sequence consisting of a plurality of identification information and subsequently displaying identification information, and for starting operation means (for example, operation lever) Fluctuation of the identification information is started due to the operation of, and the dynamic display of the identification information is stopped due to the operation of the operation means for stop (for example, the stop button) or when a predetermined time elapses. A special game state generation means for generating a special game state advantageous to the player, provided that the finalized identification information upon stopping is the specific identification information, and using a ball as a game medium and the identification information In order to start the dynamic display of the game, a predetermined number of balls are required, and when a special gaming state occurs, a large number of balls are paid out.

  A game machine comprising a main body, a door for opening and closing a front surface of the main body, and control means provided in a space formed by the door and the main body for controlling a game, the door for the main body A door opening detection means for detecting the opening of the body, and an output means for outputting the detection result to the specific device when the opening of the door is detected by the door opening detection means, the output means comprising A game machine B1, which is configured to be able to output the detection result by the door opening detection means to the specific device when the power of the game machine is turned off and the control means is stopped.

  According to the gaming machine B1, even when the power of the gaming machine is turned off and the control means is stopped, when the door opening detection means detects the opening of the door, the detection result is specified by the output means It is output to the device. Therefore, for example, even if the door is opened due to a fraudulent act by somebody after closing the store where all the game machines are turned off, it is possible to determine the gaming machine in which the door is opened by the specific device.

  A game machine comprising a main body, a door for opening and closing a front surface of the main body, and control means provided in a space formed by the door and the main body for controlling a game, the door for the main body A door opening detection means for detecting the opening of the body, an output means for outputting the detection result to the specific device when the opening of the door body is detected by the door opening detection means, and one time by the output means A game comprising: output period limiting means for limiting an output period within a predetermined period; and off-off operating means for operating the output period limiting means and the output means while the power of the gaming machine is turned off. Machine B2.

  According to the gaming machine B2, when the opening of the door is detected by the door opening detection means, the detection result is output to the specific device by the output means. Since the output means receives power supply from the operating means during off-state while the power of the gaming machine is off, the door-opening detecting means detects the opening of the door even while the power of the gaming machine is off. The detection result can be output to a specific device. Therefore, for example, even if the door is opened due to a fraudulent act by somebody after closing the store where all the game machines are turned off, it is possible to determine the gaming machine in which the door is opened by the specific device.

  Moreover, one output period by the output means is limited within a predetermined period by the output period limiting means. Like the output means, the output period limiting means also operates while receiving power from the operating means while the gaming machine is off, so that the operating period of the output means by opening the door once is within a predetermined period. It is possible to suppress the consumption of the operating means during off-state during power-off of the gaming machine. Therefore, the number of times of operation of the output means can be increased, and the number of times of detection of the opening of the door can be increased.

  A game machine comprising a main body, a door for opening and closing a front surface of the main body, and control means provided in a space formed by the door and the main body for controlling a game, the door for the main body A door opening detection means for detecting the opening of the body, an output means for outputting the detection result to the specific device when the opening of the door body is detected by the door opening detection means, and one time by the output means An output period limiting means for limiting an output period within a predetermined period, and an off-period operating means for operating the output period limiting means and the output means while the power of the gaming machine is turned off, the output means comprises the output means The detection result is output to the specific device based on the output from the period limiting means, and the output period limiting means detects the opening of the door during the predetermined period when the door opening detection means detects the opening. output Gaming machine B3 which is characterized in that the output of the stage.

  According to the gaming machine B3, when the opening of the door is detected by the door opening detection means, the detection result is output to the specific device by the output means. Since the output means receives power supply from the operating means during off-state while the power of the gaming machine is off, the door-opening detecting means detects the opening of the door even while the power of the gaming machine is off. The detection result can be output to a specific device. Therefore, for example, even if the door is opened due to a fraudulent act by somebody after closing the store where all the game machines are turned off, it is possible to determine the gaming machine in which the door is opened by the specific device.

  Moreover, one output period by the output means is limited within a predetermined period by the output period limiting means. Like the output means, the output period limiting means also operates while receiving power from the operating means while the gaming machine is off, so that the operating period of the output means by opening the door once is within a predetermined period. It is possible to suppress the consumption of the operating means during off-state during power-off of the gaming machine. Therefore, the number of times of operation of the output means can be increased, and the number of times of detection of the opening of the door can be increased.

  Furthermore, to the output means for outputting the detection result to the specific device based on the output from the output period limiting means, the output period limiting means performs the predetermined period when the door opening detection means detects the opening of the door. Output is done. Therefore, the output operation to the output means by the output period limiting means can be kept within a predetermined period per one opening of the door. Therefore, it is possible to suppress the consumption of the off-operation means during power-off of the gaming machine, and to increase the number of times the output means can be operated to increase the number of detections of the opening of the door.

  A game machine comprising a main body, a door for opening and closing a front surface of the main body, and control means provided in a space formed by the door and the main body for controlling a game, the door for the main body A door opening detection means for detecting the opening of the body, an output means for outputting the detection result to the specific device when the opening of the door body is detected by the door opening detection means, and one time by the output means An output period limiting means for limiting an output period within a predetermined period, and an off-period operating means for operating the output period limiting means and the output means while the power of the gaming machine is turned off, the output means comprises the output means The detection result is output to the specific device based on the output from the period limiting means, and the output period limiting means outputs the output to the output means when the door open detection means does not detect the opening of the door body. Gaming machine B4, characterized in that the stop.

  According to the gaming machine B4, when the opening of the door is detected by the door opening detection means, the detection result is output to the specific device by the output means. Since the output means receives power supply from the operating means during off-state while the power of the gaming machine is off, the door-opening detecting means detects the opening of the door even while the power of the gaming machine is off. The detection result can be output to a specific device. Therefore, for example, even if the door is opened due to a fraudulent act by somebody after closing the store where all the game machines are turned off, it is possible to determine the gaming machine in which the door is opened by the specific device.

  Moreover, one output period by the output means is limited within a predetermined period by the output period limiting means. Like the output means, the output period limiting means also operates while receiving power from the operating means while the gaming machine is off, so that the operating period of the output means by opening the door once is within a predetermined period. It is possible to suppress the consumption of the operating means during off-state during power-off of the gaming machine. Therefore, the number of times of operation of the output means can be increased, and the number of times of detection of the opening of the door can be increased.

  Furthermore, the output of the output period limiting means to the output means for outputting the detection result to the specific device is stopped when the door opening detection means does not detect the opening of the door. Therefore, when opening of the door is not detected by the door opening detection means, it is possible to suppress the power consumed along with the output operation of the output period limiting means. Therefore, it is possible to suppress the consumption of the off-operation means during power-off of the gaming machine, and to increase the number of times the output means can be operated to increase the number of detections of the opening of the door.

  A game machine comprising a main body, a door for opening and closing a front surface of the main body, and control means provided in a space formed by the door and the main body for controlling a game, the door for the main body A door opening detection means for detecting the opening of the body, an output means for outputting the detection result to the specific device when the opening of the door body is detected by the door opening detection means, and one time by the output means The output period limiting means using a monostable multivibrator for keeping the output period within a predetermined period, and the output period limiting means connected to the output period limiting means, when the door opening detection means detects the opening of the door, the output Input period adjusting means for adjusting the signal inputted to the period limiting means to a period shorter than the predetermined period regardless of the opening period of the door, the output period limiting means and the output means Gaming machine B5, characterized in that it comprises a and off during operation means for operating during the off.

  According to the gaming machine B5, when the opening of the door is detected by the door opening detection means, the detection result is output to the specific device by the output means. Since the output means receives power supply from the operating means during off-state while the power of the gaming machine is off, the door-opening detecting means detects the opening of the door even while the power of the gaming machine is off. The detection result can be output to a specific device. Therefore, for example, even if the door is opened due to a fraudulent act by somebody after closing the store where all the game machines are turned off, it is possible to determine the gaming machine in which the door is opened by the specific device.

  Moreover, one output period by the output means is limited within a predetermined period by the output period limiting means. Like the output means, the output period limiting means also operates while receiving power from the operating means while the gaming machine is off, so that the operating period of the output means by opening the door once is within a predetermined period. It is possible to suppress the consumption of the operating means during off-state during power-off of the gaming machine. Therefore, the number of times of operation of the output means can be increased, and the number of times of detection of the opening of the door can be increased.

  Furthermore, the signal input to the output period limiting means using the monostable multivibrator is shorter than the predetermined period which is one output period by the output means by the input period adjusting means, regardless of the opening period of the door. Adjusted. Here, the monostable multivibrator continues to output the signal if the input period of the input signal is shorter than the output period of the output signal. Therefore, when a monostable multivibrator is used as the output period limiting means, it is input to the output period limiting means more than the output period of the signal to be output, that is, the predetermined period limited by the output period limiting means. The signal input period, ie, the opening period of the door, should be short. However, since it is completely unpredictable how long the door will be open, it is necessary to keep the door open period shorter than the predetermined period limited by the output period limiting means. It is necessary to set the period for a sufficient time. For example, if the opening period of the door body is predicted to be from several tens of seconds to several minutes, the predetermined period limited by the output period restriction means is set from several minutes to several tens of units with sufficient margin. Must. Then, during this predetermined period, power is continuously supplied to the output period limiting means and the output means from the off-time operation means, so that the wear of the off-time operation means becomes remarkable. Therefore, in order to suppress consumption of the operating means during off-state after using a monostable multivibrator as the output period limiting means, a special circuit configuration is required. However, according to the gaming machine B5, the signal inputted to the output period limiting means can be adjusted shorter than the predetermined period by the input period adjusting means, regardless of the opening period of the door. Therefore, regardless of the opening period of the door, the output period limiting means can be operated normally, so that one output period by the output means can be kept within the predetermined period by the output period limiting means. As described above, according to the gaming machine B5, by providing the input period adjusting means, consumption of the operating means during off-state can be suppressed and output using the monostable multivibrator without adopting a special circuit configuration. Means for limiting the period can be realized.

  In the gaming machine B5, the input period adjusting means is configured using an integrating circuit.

  According to the gaming machine B6, since the input period adjustment means is configured using the integration circuit, the signal input to the output period restriction means is adjusted to be shorter than the predetermined period without using a complicated circuit or signal processing. can do. Further, by adjusting the resistance value of the resistor and the capacitance value of the capacitor used in the integrating circuit, the input period of the signal input to the output period limiting means can be freely adjusted within a predetermined period.

  In the gaming machine B5 or B6, the input period adjusting means includes constant voltage means for fixing the maximum voltage of the signal input to the output period limiting means.

  According to the gaming machine B7, since the constant voltage means is provided, the maximum voltage of the signal input to the output period limiting means is made constant, the signal input to the output period limiting means is stabilized, and the output means is One output period can be stably held within a predetermined period.

  Also, in the case where the input period adjustment means is configured using an integration circuit, charges are stored in a capacitor used in the integration circuit, and a voltage due to this charge is superimposed on a signal input to the output period limitation means. There is a possibility that an overvoltage which may destroy the output period limiting means is applied to the output period limiting means. However, according to the gaming machine 7, since the maximum voltage of the signal input to the output period limiting means is made constant by the constant voltage means, the overvoltage which may destroy the output period limiting means is not applied to the output period limiting means . Therefore, destruction of the output period limiting means can be prevented.

  In the gaming machine B7, the constant voltage means is constituted by a Zener diode.

  According to the gaming machine B8, since the constant voltage means is constituted by the Zener diode, it is inputted to the output period limiting means with a simple configuration and at low cost as compared with a constant voltage circuit or the like constituted by complicated circuits. The maximum voltage of the signal can be made constant. Therefore, the signal input to the output period limiting means is stabilized using a simple configuration and inexpensive Zener diode, and the output period is limited while stably holding one output period by the output means within a predetermined period. It is possible to prevent an overvoltage which may destroy the means from being applied to the output period limiting means.

  In the gaming machines B1 to B8, the door includes an inner frame opened and closed with respect to the main body, and a transparent plate support door opened and closed with respect to the inner frame, and the door open detection means Are respectively provided on the inner frame and the transparent plate support door, and are connected in parallel to the output means, and the output means is at least one of the inner frame or the transparent plate support door by the door open detection means. When opening is detected, the detection result is output to the specific device. A game machine B9.

  According to the gaming machine B9, the door opening detection means is provided in each of the inner frame and the transparent plate support door and is connected in parallel to the output means. When at least one release is detected, the output means outputs the detection result to the specific device. Therefore, even if it is an opening of either the inner frame which constitutes a door, or a transparent plate support door, the opening can be notified to a specific device by one output means.

  In any one of the game machines B1 to B9, the door opening detection means is configured to be conductive when the door is open, and to be shut off when the door is closed. A game machine B10 characterized in that According to the gaming machine B10, the door opening detection means is conducted when the door is opened, and is shut off when the door is closed, so it is at the time of execution of a fraudulent act Power consumption can be reduced by operating the output means only while the door is open.

  In any one of the game machines B1 to B10, there is provided an off-operation means charged during power-on of the gaming machine, and the output means is operated by the charge or electric power charged to the operation means during the off-state. A game machine B11 characterized by According to the gaming machine B11, the off-operation means is charged by the power supplied to the gaming machine while the power of the gaming machine is on, so the gaming machine is turned on according to the business hours of the game arcade Only when it is off can charge the operating means. Therefore, when the door is opened while the power of the gaming machine after closing the game arcade is turned off, the output means (and the output period limiting means) is operated by the operating means during off, and the door is opened. The detection result by the open detection means can be notified to the specific device.

  In any one of the game machines B1 to B11, the control means includes main control means for performing main control of the game, and the output means is mounted on the main control means. .

  In any one of the game machines B1 to B11, a game machine B13 characterized in that the output means is mounted on a substrate different from the control means.

  In any one of game machines B1 to B13, the output means includes a photocoupler, and the detection result by the door open detection means is output to the specific device by an output of the photocoupler. Machine B14.

  In any one of the game machines B2 to B14, the output period limiting means and the output means are configured to be operable even if the voltage is lower than the operating voltage of the control means. . According to the gaming machine B15, since the output period limiting means and the output means are configured to be operable even at a voltage lower than the operating voltage of the control means, the charge amount of the operating means during off is reduced, Even when the output voltage of the operating means is lower than the operating voltage of the control means, the output period limiting means and the output means can be operated to notify the specific device of the opening of the door. That is, the open detection of the door when the power of the gaming machine is turned off can be detected for a long time.

  In any one of the game machines B2 to B15, the output period limiting means and the output means are characterized in that the operable range voltage is wider than the operable range voltage of the control means. B16. According to the gaming machine B16, the operable range voltage of the output period limiting means and the output means is wider than the operable range voltage of the control means. Therefore, when the game machine is powered off, the output period limiting means and the output means can be operated for a long time by the off-operation means, so that the door body is detected for a long time when the game machine is powered off. Can.

  In any one of the game machines B2 to B16, the output period limiting means is configured to include a C-MOS semiconductor. A game machine B17 characterized by comprising. According to the gaming machine B17, the output period limiting means is configured to include the C-MOS semiconductor. Here, the C-MOS semiconductor generally consumes less power during operation. Therefore, according to the gaming machine B17, it is possible to reduce the consumption of the operating means during the off time, and to perform the open detection of the door when the power of the gaming machine is turned off for a long time.

  A gaming machine B18 according to any one of gaming machines B1 to B17, wherein the gaming machine is a pachinko gaming machine.

  A gaming machine according to any one of gaming machines B1 to B17, wherein the gaming machine is a slot machine.

  A gaming machine B20 according to any one of gaming machines B1 to B17, wherein the gaming machine is a combination of a pachinko gaming machine and a slot machine.

  A main body, a door for opening and closing the front of the main body, control means provided in the space formed by the door and the main body for controlling the game, and notification means for notifying by control of the control means A door opening detection means for detecting the opening of the door body with respect to the main body, and the control means for detecting the detection result when the door opening detection means detects the opening of the door body And the output means for outputting the detection result to the specific device, and the output means is controlled by the control means when the game machine is turned on. If the door open detection means outputs the detection result to the specific device and the game machine is powered off and control by the control means is not performed, the door open detection hand is detected. Gaming machine C1, characterized in that the detection result and to output to the specific device according to.

  According to the gaming machine C1, when the power of the gaming machine is turned on and the control means is controlled, when the door opening detection means detects the opening of the door, the detection result is controlled by the output means The information is output to the means, and notification by the notification means is executed, and the detection result is output to the specific device by the output means. Therefore, for example, when the door is opened by an unauthorized person during the opening of the store where the power of the gaming machine is turned on, it is possible to determine the gaming machine in which the door is opened by notification by the notification means. At the same time, the game machine whose door is opened can also be determined by the specific device. On the other hand, when the power supply of the gaming machine is turned off, the control of the control means is stopped, but also in this case, when the opening of the door is detected by the door opening detection means, the detection result is output It is outputted to the specific device by means. Therefore, even if the door is opened due to an unauthorized action by somebody after closing the store where all the game machines are turned off, it is possible to determine the game machine in which the door is opened by the specific device. Therefore, regardless of the on / off state of the power supply of the gaming machine, when the door is opened due to a fraudulent act by somebody, the detection result is output to the specific device by one output means, and the game for which the door is opened Machine can be identified by a specific device.

  In the gaming machine C1, power supply means for supplying power to the output means to operate when the power supply of the gaming machine is turned on, and the power supply means are provided separately, and the power supply of the gaming machine is turned off. The control means is provided with an operation means for supplying power to the output means to operate when it is out, the output means being operated by the power supplied by the power supply means and detecting the detection result by the door open detection means The control output means for outputting to the control means, and the specification output means for operating with the power supplied by the power supply means or the operation means during off and outputting the detection result by the door open detection means to the specific device A game machine C2 characterized by

  According to the gaming machine C2, when the power of the gaming machine is turned on, the power is supplied to the control output means and the identification output means by the power means. Thus, when the door opening detection means detects the opening of the door, the detection result is output to the control means by the control output means, and the notification by the notification means is executed, and the detection result is the specification output It is outputted to the specific device by means. Therefore, for example, when the door is opened by an unauthorized person during the opening of the store where the power of the gaming machine is turned on, it is possible to determine the gaming machine in which the door is opened by notification by the notification means. At the same time, the game machine whose door is opened can also be determined by the specific device. On the other hand, when the power of the gaming machine is turned off, the power is supplied to the output means for identification by the operating means during off. Thus, when the door open detection means detects the opening of the door, the detection result is output to the specific device by the output means for specification. Therefore, even if the door is opened due to an unauthorized action by somebody after closing the store where all the game machines are turned off, it is possible to determine the game machine in which the door is opened by the specific device. Therefore, regardless of the on / off state of the power supply of the gaming machine, when the door is opened due to a wrongdoing by somebody, the output means for specification outputs the detection result to the specific device, and the game of which the door is opened Machine can be identified by a specific device.

  The gaming machine C2 includes output period limiting means for limiting one output period by the output means for identification within a predetermined period, and the off-time operation means includes the output period limiting means in addition to the output means for identification. A game machine C3 characterized in that it is also configured to supply power and operate.

  According to the gaming machine C3, one output period by the output means for specification is kept within a predetermined period by the output period limiting means. Like the output means for output, the output period restricting means also operates by receiving power supplied from the operating means during off while the power of the game machine is turned off. Therefore, the operation period of the output means for output by opening the door once. Can be suppressed within a predetermined period to suppress the consumption of the off-operation means during power-off of the gaming machine. Therefore, the number of times of operation of the output means for specification can be increased, and the number of times of detection of opening of the door can be increased.

  In the gaming machine C2 or C3, the off-operation means is configured to be chargeable by the power supplied from the power supply of the gaming machine.

  According to the gaming machine C4, the off-operation means is charged by the power supplied to the gaming machine while the power of the gaming machine is on, so the gaming machine is turned on according to the business hours of the game arcade. Only when it is off can charge the operating means. Therefore, if there is an opening of the door while the power of the gaming machine after the closing of the game arcade is turned off, the output means for output and the output period limiting means are operated by the operating means during off, and the door is opened. The detection result by the open detection means can be notified to the specific device.

  One of the gaming machines C2 to C4 includes a diode that allows current supplied from the power supply means to flow in one direction, and the off-operation means is configured using a capacitor or a secondary battery, and the door open detection means Is conducted when the door is open, and is shut off when the door is closed, and the power supply means is connected to the anode terminal of the diode. The cathode terminal of the diode is connected to one end of the operating means during off-state, the other end of the operating means during off-state is grounded, and the control output means is the power-supply means And the anode terminal of the diode and the door open detection means, and the output means for identification is a cathode terminal of the diode and one end of the operation means during off-state Gaming machine C5, characterized in that it is connected through the door opening detection means.

  According to the gaming machine C5, since the control output means is connected to the power supply means and the anode terminal of the diode, the door open detection means when the door is opened when the power of the game machine is turned on. Becomes conductive, power is supplied from the power supply means to the control output means, and an operation state is established. On the other hand, when the power supply of the gaming machine is turned off, the supply of power by the power supply means is stopped, so even if the door is opened and the door open detection means is conducted, the control output means is The power is not supplied from the power supply means, and the apparatus is stopped. On the other hand, since the output means for specification is connected to the operation means during off and the cathode terminal of the diode, the door open detection means is opened when the door is opened when the power of the game machine is turned on. The power is supplied from the power supply means to the output means for identification and becomes operative. When the power supply of the gaming machine is turned off, the power supply by the power supply means to the output means for specification is stopped, but when the door is opened and the door open detection means is conducted, the operating means is turned off during the off Since the power is supplied to the output means, the output means for identification is in an operating state. Here, when the power of the gaming machine is turned off and power is supplied from the operating means during off-state to the output means for specification, the power supply to the output means for control can be cut off by the diode. As a result, it is possible to suppress the consumption of the off-operation means during power-off of the gaming machine. Therefore, the number of times of operation of the output means for specification can be increased, and the number of times of detection of opening of the door can be increased.

  In any one of the gaming machines C1 to C5, the door includes an inner frame opened and closed with respect to the main body, and a transparent plate support door opened and closed with respect to the inner frame, and the door open detection means An inner frame door opening detection means provided in the inner frame; and a transparent plate door opening detection means provided in the transparent plate support door, and the output means includes the inner frame door opening detection means. When the opening of the inner frame is detected, the detection result is output to the control means, and notification by the notification means is executed, and the first output means for outputting the detection result to the specific device, and the transparent plate When the opening of the transparent plate support door is detected by the door opening detection means, the detection result is output to the control means to execute notification by the notification means and the detection result is output to the specific device. Equipped with a second output means Gaming machine C6, characterized by that.

  According to the gaming machine C6, when the opening of the inner frame is detected by the inner frame door opening detecting means when the power of the gaming machine is turned on and the control means is controlled, the detection result is The first output means outputs the information to the control means, and the notification means performs notification, and the first output means outputs the detection result to the specific device. Similarly, when the opening of the transparent plate support door is detected by the transparent plate door open detection means while the game machine is turned on, the detection result is output to the control means by the second output means. The notification by the notification means is executed, and the detection result is output to the specific device by the second output means. On the other hand, when the power of the gaming machine is turned off, the control of the control means is stopped, but also in this case, when the opening of the inner frame is detected by the inner frame door opening detecting means, the detection is performed. The result is output to the specific device by the first output means. Similarly, when the opening of the transparent plate support door is detected by the transparent plate door open detection means when the game machine is powered off, the detection result is output to the specific device by the second output means. . Thus, the first output means for outputting the detection result when the inner frame is opened and the second output means for outputting the detection result when the transparent plate support door is opened are separately provided. Therefore, when either or both of the inner frame and the transparent plate support door are opened, it can be determined by the notification by the notification means and the specific device which opening has occurred.

  In any one of the game machines C3 to C6, the output means for specification outputs a detection result to the specific device based on the output from the output period restriction means, and the output period restriction means is the door open detection means A game machine C7 characterized by performing output to the output means for specification during said predetermined period, when opening of said door is detected by this.

  According to the gaming machine C7, when the opening of the door is detected by the door opening detection means, the detection result is output to the specific device by the output means for specification. Since the output means for specification receives power supply from the operating means while the power of the gaming machine is off, the door opening detection means detects the opening of the door even while the power of the gaming machine is off. Then, the detection result can be output to a specific device. Therefore, for example, even if the door is opened due to a fraudulent act by somebody after closing the store where all the game machines are turned off, it is possible to determine the gaming machine in which the door is opened by the specific device.

  Moreover, one output period by the output means for specification is limited within a predetermined period by the output period limiting means. Like the output means for output, the output period restricting means also operates by receiving power supplied from the operating means during off while the power of the game machine is turned off. Therefore, the operation period of the output means for output by opening the door once. Can be suppressed within a predetermined period to suppress the consumption of the off-operation means during power-off of the gaming machine. Therefore, the number of times of operation of the output means for specification can be increased, and the number of times of detection of opening of the door can be increased.

  Furthermore, to the specific output means for outputting the detection result to the specific device based on the output from the output period limiting means, the output period is limited during a predetermined period when the door opening detection means detects the opening of the door. Output is performed by means. Therefore, the output operation to the output means for specification by the output period limiting means can be held within a predetermined period for one opening of the door. Therefore, the consumption of the operating means during off-state during power-off of the gaming machine can be suppressed, and the number of operable times of the output means for specification can be increased to increase the number of detectable times of opening of the door.

  In the gaming machine C7, the output period limiting means stops the output to the output means for specification when the opening of the door is not detected by the door opening detecting means.

  According to the gaming machine C8, the output of the output period limiting means to the specific output means for outputting the detection result to the specific device is stopped when the opening of the door is not detected by the door opening detection means. Therefore, when opening of the door is not detected by the door opening detection means, it is possible to suppress the power consumed along with the output operation of the output period limiting means. Therefore, the consumption of the operating means during off-state during power-off of the gaming machine can be suppressed, and the number of operable times of the output means for specification can be increased to increase the number of detectable times of opening of the door.

  In any one of the gaming machines C3 to C8, the output period limiting means is configured using a monostable multivibrator, connected to the monostable multivibrator, and the door opening detection means opens the door. The game is characterized by further comprising input period adjusting means for adjusting a signal input to the monostable multivibrator to a period shorter than the predetermined period regardless of the opening time of the door when a Machine C9.

  According to the gaming machine C9, the signal inputted to the output period limiting means using the monostable multivibrator is the output period by the output means for specification by the input period adjusting means regardless of the opening period of the door. It is adjusted shorter than the predetermined period which is. Here, the monostable multivibrator continues to output the signal if the input period of the input signal is shorter than the output period of the output signal. Therefore, when a monostable multivibrator is used as the output period limiting means, it is input to the output period limiting means more than the output period of the signal to be output, that is, the predetermined period limited by the output period limiting means. The signal input period, ie, the opening period of the door, should be short. However, since it is completely unpredictable how long the door will be open, it is necessary to keep the door open period shorter than the predetermined period limited by the output period limiting means. It is necessary to set the period for a sufficient time. For example, if the opening period of the door body is predicted to be from several tens of seconds to several minutes, the predetermined period limited by the output period restriction means is set from several minutes to several tens of units with sufficient margin. Must. Then, during this predetermined period, power is continuously supplied to the output period limiting means and the output means for identification from the operating means during off, so the consumption of the operating means during off becomes significant. Therefore, in order to suppress consumption of the operating means during off-state after using a monostable multivibrator as the output period limiting means, a special circuit configuration is required. However, according to the gaming machine C9, the signal inputted to the output period limiting means can be adjusted to be shorter than the predetermined period by the input period adjusting means, regardless of the opening period of the door. Therefore, regardless of the opening period of the door, the output period limiting means can be operated normally, so that one output period by the output means for specification can be kept within a predetermined period by the output period limiting means. As described above, according to the gaming machine C9, by providing the input period adjusting means, consumption of the operating means during off-state is suppressed, and output using the monostable multivibrator without adopting a special circuit configuration. Means for limiting the period can be realized.

  In any one of the game machines C1 to C9, the control means includes main control means for performing main control of the game, and the output means is mounted on the main control means. .

  In any one of the game machines C1 to C10, the output means is mounted on a substrate different from the control means.

  In any one of the game machines C1 to C11, the output means includes a photo coupler, and the detection result by the door open detection means is output to the control means and the specific device by the output of the photo coupler. A gaming machine C12.

  In any one of the gaming machines C3 to C12, the output period limiting means and the output means for specification are configured to be operable even if the voltage is lower than the operating voltage of the control means. Machine C13.

  According to the gaming machine C13, since the output period limiting means and the output means for specification are configured to be operable even at a voltage lower than the operating voltage of the control means, the charge amount of the operating means during off decreases. Even when the output voltage of the operating means is lower than the operating voltage of the control means, the output period limiting means and the specific output means can be operated to notify the specific device of the opening of the door. That is, the open detection of the door when the power of the gaming machine is turned off can be detected for a long time.

  In any one of the gaming machines C3 to C13, the output period limiting means and the output means for specification are characterized in that the operable range voltage is wider than the operable range voltage of the control means. Gaming machine C14.

  According to the gaming machine C14, the operable range voltage of the output period limiting means and the output means for specification is wider than the operable range voltage of the control means. Therefore, when the power of the gaming machine is turned off, the output period limiting means and the output means for identification can be operated for a long time by the operating means during the off time. It can be carried out.

  In any one of the gaming machines C3 to C14, the output period limiting means is configured to include a C-MOS semiconductor.

  According to the gaming machine C15, the output period limiting means is configured to include the C-MOS semiconductor. Here, the C-MOS semiconductor generally consumes less power during operation. Therefore, according to the gaming machine C15, it is possible to reduce the consumption of the operating means during the off-state, and to perform the open detection of the door when the power of the gaming machine is turned off for a long time.

  In any one of the game machines C9 to C15, the input period adjusting means is configured using an integration circuit.

  According to the gaming machine C16, since the input period adjusting means is configured using the integrating circuit, the signal inputted to the output period limiting means is adjusted shorter than the predetermined period without using a complicated circuit or signal processing. can do. Further, by adjusting the resistance value of the resistor and the capacitance value of the capacitor used in the integrating circuit, the input period of the signal input to the output period limiting means can be freely adjusted within a predetermined period.

  In any one of the game machines C9 to C16, the input period adjusting means includes constant voltage means for fixing the maximum voltage of the signal input to the monostable multivibrator which is the output period limiting means. Game machine C17.

  According to the gaming machine C17, since the constant voltage means is provided, the maximum voltage of the signal input to the output period limiting means is made constant, the signal input to the output period limiting means is stabilized, and the output for specifying One output period by means can be kept stable within a predetermined period.

  Also, in the case where the input period adjustment means is configured using an integration circuit, charges are stored in a capacitor used in the integration circuit, and a voltage due to this charge is superimposed on a signal input to the output period limitation means. There is a possibility that an overvoltage which may destroy the output period limiting means is applied to the output period limiting means. However, according to the gaming machine C17, since the maximum voltage of the signal input to the output period limiting means is made constant by the constant voltage means, the overvoltage which may destroy the output period limiting means is not applied to the output period limiting means . Therefore, destruction of the output period limiting means can be prevented.

  In the gaming machine C17, the constant voltage means comprises a Zener diode.

  According to the gaming machine C18, since the constant voltage means is constituted by the Zener diode, it is inputted to the output period limiting means with a simple configuration and at low cost as compared with a constant voltage circuit or the like constituted by complicated circuits. The maximum voltage of the signal can be made constant. Therefore, using a simple configuration and inexpensive Zener diode, the signal input to the output period limiting means is stabilized, and while the output period by the specific output means is stably held within a predetermined period, the output It is possible to prevent an overvoltage that may destroy the period limiting means from being applied to the output period limiting means.

  A gaming machine C19 according to any one of gaming machines C1 to C18, wherein the gaming machine is a pachinko gaming machine.

  A gaming machine C20 according to any of gaming machines C1 to C18, wherein the gaming machine is a slot machine.

  A gaming machine C21 according to any one of gaming machines C1 to C18, wherein the gaming machine is a combination of a pachinko gaming machine and a slot machine.

  A game machine comprising a main body, a door for opening and closing a front surface of the main body, and control means provided in a space formed by the door and the main body for controlling a game, the door for the main body The apparatus includes a door opening detection unit that detects the opening of the body, and an output unit that outputs the detection result to a specific device when the opening of the door is detected by the door opening detection unit. When the power of the game machine is turned on and the control by the control means is performed, the detection result by the door open detection means is output to the specific device, and the power of the game machine is turned off and the control means is A game machine C22 configured to output a detection result by the door opening detection means to the specific device even when control is not performed.

  According to the gaming machine C22, when the power of the gaming machine is turned on and the control means is controlled, when the door opening detection means detects the opening of the door, the detection result is specified by the output means It is output to the device. Therefore, for example, when the door is opened by an unauthorized person during the opening of the store where the power of the gaming machine is turned on, it is possible to determine the gaming machine in which the door is opened by the specific device. On the other hand, when the power supply of the gaming machine is turned off, the control of the control means is stopped, but also in this case, when the opening of the door is detected by the door opening detection means, the detection result is output It is outputted to the specific device by means. Therefore, even if the door is opened due to an unauthorized action by somebody after closing the store where all the game machines are turned off, it is possible to determine the game machine in which the door is opened by the specific device. Therefore, regardless of the on / off state of the power supply of the gaming machine, when the door is opened due to a fraudulent act by somebody, the detection result is output to the specific device by one output means, and the game for which the door is opened Machine can be identified by a specific device.

  In any one of the gaming machines C1, C6, C10 to C12 or C19 to C22, generation means for generating a signal to be output as the detection result from the output means, and the generation means for the game machine via a specific location A game machine C23 comprising: an on-supply means for supplying power during power-on; and an off-supply means for supplying power to the specific part during power-off of the game machine.

According to the gaming machine C23, while the power of the gaming machine is on, power is supplied from the supplying means to the specific part of the generating means while the power of the gaming machine is off, the power is supplied to the specific place of the generating means. Power is supplied from the means. That is, power is supplied to the generation means regardless of the power on / off state of the gaming machine. Therefore, the generation means can generate the signal outputted as the detection result from the output means regardless of the on / off state of the power supply of the gaming machine.
<Others>
In a pachinko machine, when a ball driven into a game area enters a symbol operation opening, a lottery is performed at the timing of the ball entering (for example, Patent Document 1: JP-A-2001-198332). In the case of a coin-operated game machine using a slot machine or a game ball, when the start lever is operated, a lottery is performed at the operated timing. As a result of the lottery, for example, when it is a jackpot, a large amount of prize balls and coins can be paid out. Since the control for determining the lottery and the jackpot is performed by the main control device, the main control device is likely to be a target of fraud.
As a specific fraudulent action, for example, the main control device may be replaced with a fraudulent one that frequently generates a jackpot, or a fraudulent substrate (for example, a “hanging board”) may be connected to the main control device. There are things that cause illegal Further, in the case of a pachinko machine, there is also an injustice which makes it easy for a ball to easily enter a winning opening or a symbol operating opening by bending a nail driven into the game board surface illegally.
In the case of a pachinko machine, the main control unit is mounted on the back of the game board. On the other hand, a glass frame is provided on the front of the game board, and the glass frame is individually openable and closable with respect to an inner frame body on which the game board is mounted. Therefore, if the fraudster commits an act against the game board or the main control device, the inner frame or the glass frame must be opened, but if the inner frame or the glass frame is opened, Since the opening is detected by the sensor and is notified to the hall computer that manages the game arcade, it can be easily grasped to which pachinko machine the cheating has been made.
However, if the fraudster intrudes, for example, at midnight after the closing of the game arcade, and the intruder performs an illegal act by opening the inner frame or the glass frame, the power of the pachinko machine is cut off at that time. Since the pachinko machine is stopped, the opening of the inner frame or the glass frame can not be detected, and the opening can not be notified to the hall computer.
The present technical idea is made to solve the problems and the like exemplified above, and when the door is opened while the power of the gaming machine is turned off, it is possible to grasp the opening. The purpose is to provide a gaming machine that can be
<Means>
In order to achieve this object, the gaming machine of the technical idea 1 is provided in the space formed by the main body, the door for opening and closing the front of the main body, the door and the main body, and control of the game. A door opening detection unit for detecting the opening of the door with respect to the main body, and an opening state of the door when the opening of the door is detected by the door opening detection unit. For example, based on the period adjustment means for outputting a signal that is a predetermined output period regardless of the opening period of the door by the operation from the initial state to the prescribed time, and the signal output by the period adjustment means The output means for outputting the detection result by the door open detection means to the specific device, and the power supply means for supplying power to the output means and the period adjustment means to operate the door open detection means, Said door The system further comprises initialization means for initializing the period adjustment means when closing is detected, and the power supply means supplies power to the output means and the period adjustment means when the game machine is powered off. An off-off operating means is provided which is operated to supply.
In the gaming machine according to the technical idea 2, in the gaming machine according to the technical idea 1, the door open detection unit stops the power supply to the period adjustment unit by the power supply unit when the closing of the door is detected. Means for stopping.
The gaming machine according to the technical idea 3 is the gaming machine according to the technical idea 1 or 2, wherein the period adjusting means is configured using a storage means for storing electric charge, and the power supply means sets a predetermined time from an initial state. The voltage generated along with the charge stored in the storage means by the power supplied up to this point is output as a signal serving as the predetermined output period.
In the gaming machine according to the technical idea 4, in the gaming machine according to the technical idea 3, the initialization means constitutes the period adjusting means when the door opening detecting means detects that the door is closed. A discharging means is provided which brings the storage means into an initial state by discharging the charge stored in the storage means.
The gaming machine according to the technical idea 5 is the gaming machine according to any one of the technical ideas 2 to 4, wherein the stopping means is configured to detect the closing of the door by the door opening detecting means. A release means is provided for releasing the electrical connection between the means and the period adjustment means.
In the gaming machine according to the technical idea 6, in the gaming machine according to the technical idea 5, the initialization means constitutes the period adjustment means when the door open detection means detects the opening of the door body. The power supply means and the period adjusting means are provided with a discharge releasing means for releasing the short circuit of the storage means and the ground by the discharging means, and the stopping means detects the opening of the door by the door opening detecting means. Power supply resuming means for resuming the power supply to the period adjustment means by the power supply means by stopping the release of the electrical connection by the release means, and the opening of the door by the door opening detection means. When the power supply resuming means detects that the short circuit due to the discharging means between the storage means and the ground constituting the period adjusting means is canceled by the discharge releasing means, In the case where the release of the electrical connection by the release means with the period adjustment means is stopped, the power supply to the period adjustment means by the power supply means is resumed, and the closing of the door is detected by the door open detection means The electric discharge means shorts the storage means constituting the period adjustment means to the ground after the electric connection between the power supply means and the period adjustment means is released by the release means. Discharge the stored charge.
<Effect>
According to the gaming machine described in the technical idea 1, when the opening of the door is detected by the door opening detection means, the period adjusting means operates from the initial state to the prescribed time regardless of the opening time of the door. It outputs a signal for a predetermined output period. Then, the output means outputs the detection result to the specific device based on the signal output from the period adjustment means. Here, the output period of the signal output by the period adjustment means is determined by the operation of the period adjustment means from the initial state to the specified time. In order to cause the period adjustment means to output a signal that is a predetermined output period regardless of the opening time of the door, the initialization means adjusts the period adjustment means when the door opening detection means detects the closing of the door. In the initial state. Therefore, the period adjusting means can always operate from the initial state when the door opening detecting means detects the opening of the door. Therefore, every time opening of the door is detected by the door opening detecting means, the period adjusting means is operated normally and stably from the initial state to the prescribed time, so that an output period predetermined for the period adjusting means is obtained. The signal can be output normally and stably, and the detection result can be output normally and stably from the output means to the specific device.
Further, according to the gaming machine described in the technical idea 1, in addition to the state where the power of the gaming machine is turned on, the door opening detection is performed even when the power of the gaming machine is turned off and the control means is stopped. When the opening of the door is detected by the means, the off-operation means supplies power to the output means and the period adjustment means. Therefore, even if the power of the gaming machine is turned off and the control means is stopped, if the opening of the door is detected by the door open detection means, a signal which becomes an output period predetermined by the period adjustment means Is output, and the output means outputs the detection result to a specific device based on the output signal. Therefore, for example, even if the door is opened due to a fraudulent act by someone after closing the store where all the gaming machines are turned off, it is possible to identify the gaming machine with the opened door by the specific device. is there.
According to the gaming machine described in the technical idea 2, in addition to the effects of the gaming machine described in the technical idea 1, when the closing of the door is detected by the door opening detecting means, the stopping means is the period adjusting means Stop the power supply by the power supply means. Therefore, in a state where the operation of the period adjusting means is stopped by the stopping means, the period adjusting means can be initialized by the initializing means. Therefore, there is an effect that the period adjustment means can be normally and stably in the initial state.
According to the gaming machine described in the technical idea 3, in addition to the effects exhibited by the gaming machine described in the technical idea 1 or 2, power from the power source means to the storage means constituting the period adjusting means from the initial state to the prescribed time Charge is stored in the storage means. The period adjustment means outputs the voltage generated with the charge stored in the storage means as a signal serving as a predetermined output period. As described above, by configuring the period adjustment unit by the storage unit, the signal having a predetermined output period can be output with a simple configuration without the period adjustment unit being a complicated circuit. There is.
According to the gaming machine described in the technical idea 4, in addition to the effects of the gaming machine described in the technical idea 3, when the closing of the door is detected by the door opening detecting means, the discharging means is the period adjusting means Discharge the charge stored in the storage means constituting the Therefore, the charge stored in the storage means when the door opening detection means detects the opening of the door is discharged by the discharging means to zero when the door opening detection means detects that the door is closed. can do. Thus, when the opening of the door is detected by the door opening detection unit, the period adjustment unit configured by the storage unit can always operate from the initial state. Therefore, every time opening of the door is detected by the door opening detecting means, the period adjusting means is operated normally and stably from the initial state to the prescribed time, so that an output period predetermined for the period adjusting means is obtained. The signal can be output normally and stably, and the detection result can be output normally and stably from the output means to the specific device. In addition, as a discharge method of the storage means, it is exemplified that the storage means is short-circuited to the ground.
According to the gaming machine described in the technical idea 5, in addition to the effects of the gaming machine according to any one of the technical ideas 2 to 4, the power supply is operated when the closing of the door is detected by the door opening detecting means. The electrical connection between the means and the period adjustment means is released by the release means. Therefore, in the state where the power supply to the period adjustment means is stopped by the release means, the period adjustment means can be initialized by the initialization means or the discharge means. Therefore, there is an effect that the period adjustment means can be normally and stably in the initial state.
According to the gaming machine described in the technical idea 6, when the opening of the door is detected by the door opening detecting means in addition to the effect of the gaming machine described in the technical idea 5, the power supply resuming means first After causing the discharge releasing means to release the short circuit between the storage means and the grant constituting the period adjusting means, the power supply from the power supply means to the period adjusting means is resumed. On the other hand, when closing of the door is detected by the door open detection means, the discharge means first causes the release means to release the electrical connection between the power supply means and the period adjustment means, and then the period adjustment means is configured. The storage means to be connected is short-circuited to ground to discharge the charge stored in the storage means. Therefore, there is no possibility that the power supply means and the ground are short-circuited in either of the case where the door opening detection means detects opening of the door and the case where the door opening detection means detects closing of the door body. . Therefore, there is an effect that breakage of the power supply means and the like caused by the short circuit between the power supply means and the ground can be surely prevented.

10 Pachinko machines (game machines)
11 Outer frame (body)
12 Inner frame (part of the door)
14 Front frame (part of the door)
110 Main controller (part of control means)
281 Integration circuit (period adjustment means)
300 Frame open detection circuit for inner frame (part of output means)
300a Terminal board output circuit for inner frame (part of output means)
291 External output terminal board for inner frame (part of output means)
302 Front frame open frame detection circuit (part of output means)
302a Front frame terminal board output circuit (part of the output means)
293 Front panel external output terminal board (part of the output means)
CD1 capacitor (part of power supply means, operating means during off)
D1 Diode DC1 DC power supply (part of power supply means)
IC1 timer (output period limiting means)
PR1 Photocoupler (part of output means)
SW3A switch (part of door open detection means, part of stop means, part of release means, part of power supply resumption means, part of initialization means, part of discharge means, part of discharge release means )
SW3-1 switch (part of stop means, part of release means, part of power supply restart means)
SW3-3 switch (part of initialization means, part of discharge means, part of discharge release means)
SW4A switch (part of door open detection means, part of stop means, part of release means, part of power supply restart means, part of initialization means, part of discharge means, part of discharge release means )
SW4-1 switch (part of stop means, part of release means, part of power supply restart means)
SW 4-3 Switch (part of initialization means, part of discharge means, part of discharge release means)

Claims (6)

A gaming machine comprising a main body, a door for opening and closing the front of the main body, and control means provided in a space formed by the door and the main body for controlling a game.
Door opening detection means for detecting the opening of the door relative to the main body;
When the opening of the door is detected by the door opening detection means, if it is in the initial state, an output period determined in advance regardless of the opening period of the door by the operation from the initial state to the prescribed time Period adjustment means for outputting a signal that
Output means for outputting the detection result by the door open detection means to the specific device based on the signal outputted by the period adjustment means;
Power supply means for supplying power to the output means and the period adjustment means to operate;
The door open detection means includes an initialization means for initializing the period adjustment means when detecting the closing of the door body,
A game machine characterized in that the power supply means comprises an off-off operation means for supplying power to the output means and the period adjustment means to operate when the power of the game machine is turned off.   The game machine according to claim 1, wherein the door opening detection means comprises stop means for stopping the power supply to the period adjustment means by the power source means when the closing of the door body is detected. .   The period adjustment means is configured using storage means for storing charge, and the voltage generated along with the charge stored in the storage means by the power supplied from the initial state by the power source means from the initial state to the specified time is 3. A game machine according to claim 1, wherein the game machine outputs the signal as a predetermined output period.   The initialization unit discharges the charge stored in the storage unit constituting the period adjustment unit when the door opening detection unit detects that the door is closed, thereby bringing the storage unit into an initial state. 4. A game machine according to claim 3, further comprising discharge means.   The stop means includes release means for releasing an electrical connection between the power supply means and the period adjustment means when the door open detection means detects that the door is closed. The gaming machine according to any one of Items 2 to 4. The initialization means includes discharge release means for releasing a short circuit by the discharge means of the storage means constituting the period adjustment means and the ground when the door open detection means detects the opening of the door. ,
The stop means stops the release of the electrical connection between the power supply means and the period adjustment means by the release means when the door open detection means detects the opening of the door, and the stop means stops the release by the power means. Power supply resuming means for resuming power supply to the period adjustment means,
When the opening of the door is detected by the door opening detection means, the electric power supply resuming means cancels the short circuit by the discharging means of the storage means and the ground constituting the period adjusting means by the discharge releasing means. And stopping the release of the electrical connection by the release means between the power supply means and the period adjustment means, and resuming the power supply to the period adjustment means by the power supply means.
When closing of the door is detected by the door opening detection means, the discharge means is configured to release the electrical connection between the power supply means and the period adjustment means by the release means, and then the period adjustment means 6. A game machine according to claim 5, characterized in that the storage means constituting is short-circuited to the ground to discharge the charge stored in the storage means.

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