JP2019068367A - Rfid tag reader/writer device, receiving method of rfid tag reader/writer device, and program - Google Patents

Abstract

To provide an RFID tag reader/writer device which can realize simplification of the circuit scale and improvement of demodulation accuracy.SOLUTION: An RFID tag reader/writer device that receives a response signal transmitted from an RFID tag includes a local oscillator for outputting a local oscillator signal of a predetermined oscillation frequency, a phase shifter for changing the phase of the local oscillator signal output from the local oscillator to an arbitrary phase control amount, and a reception mixer for performing down-conversion so as to multiply the local oscillator signal whose phase is changed by the phase shifter by the response signal, and a control unit for controlling the phase control amount of the phase shifter and searching for the phase control amount on the basis of an amplitude at which the output signal down-converted by the reception mixer is maximized.SELECTED DRAWING: Figure 2

Description

  The present invention relates to a radio frequency identification (hereinafter referred to as “RFID”) tag reader / writer device, and a receiving method and program of the RFID tag reader / writer device.

  Conventionally, when the RFID tag reader / writer device receives a response signal transmitted from an RFID tag, IQ quadrature demodulation is performed using I-phase and Q-phase quadrature waveforms having a phase difference of 90 °. (Hereinafter, the I-phase carrier transmission system is referred to as “I channel (I-ch)”. The Q-phase carrier transmission system is referred to as “Q channel (Q-ch)”).

  In order to perform quadrature demodulation, the RFID tag reader / writer device uses for the I, Q-ch a local signal that is 90 ° out of phase by the 90 ° hybrid based on the local signal of the oscillation frequency output from the local unit. Generate each one. The response signals received through the antenna are distributed by the distributor for I and Q channels, respectively. Then, the mixer for I-ch and the mixer for Q-ch multiply the response signals respectively distributed for I and Q-ch by local oscillation signals generated for I and Q-ch, respectively. Together, each response signal is downconverted to baseband. The I-ch reception baseband processing circuit and the Q-ch reception baseband processing circuit amplify response signals down-converted by the I-ch mixer and the Q-ch mixer, respectively, Convert to a baseband signal for ch.

  The I-ch A / D converter (Analog-to-digital converter: hereinafter referred to as "ADC") and the Q-ch ADC are reception basebands provided for I and Q-ch respectively. The analog baseband signal processed by the processing circuit is converted into digital signals for I and Q-ch, respectively, and sent to the CPU.

  As described above, by adopting the synchronous detection method in which I-ch and Q-ch are separated and output, even if the phase changes due to the distance between the antenna and the RFID tag, etc., the signal is received by the antenna The response signal from the RFID tag can be stably received. A technology of an RFID tag communication device which changes the phase of the received signal by 90 ° and inputs it to the receiving mixer and also inputs it to the receiving mixer without changing the phase of the received signal by providing the phase change circuit with the 90 ° hybrid coupler. For example, the technology of Patent Document 1 is disclosed.

JP, 2009-130604, A

  When performing reception by orthogonal demodulation, since components for two systems, one for I-ch and one for Q-ch, are respectively required, the circuit scale is increased and the cost is increased. Further, since the response signal transmitted from the RFID tag is weak, the RFID tag reader / writer device needs to amplify the response signal to several tens of dB. As a result of the amplification, a difference in offset is largely generated between the I-ch response signal and the Q-ch response signal, which may cause a demodulation error.

  An object according to one aspect of the present invention is to provide an RFID tag reader / writer device which can realize simplification of the circuit scale and improvement of demodulation accuracy.

  The RFID tag reader / writer device according to one aspect of the present invention is an RFID tag reader / writer device that receives a response signal transmitted from an RFID tag, and outputs a local oscillation signal of a predetermined oscillation frequency; A phase shifter for changing the phase of the local oscillation signal output from the generator by an arbitrary amount of phase control, and a down conversion by multiplying the response signal by the local oscillation signal whose phase is changed by the phase shifter. And a control unit configured to control a phase control amount of the phase shifter and search for the phase control amount based on an amplitude at which an output signal down-converted by the reception mixer is maximized.

  According to the above-described aspect, it is possible to provide an RFID tag reader / writer device that can realize simplification of the circuit scale and improvement of demodulation accuracy.

It is a figure which shows an example of the RFID tag reader-writer system of 1st Embodiment. It is a circuit diagram showing an example of a RFID tag reader-writer device. It is a figure which shows the example of the relationship of the response signal from an RFID tag, the phase control amount of a phase shifter, and output from ADC. It is a flowchart which shows the example of the tag response reception process of 1st Embodiment. It is a flow chart which shows an example of phase control amount search processing of a 1st embodiment. It is a graph which shows the example of the relationship between the tag response amplitude and phase control amount of 1st Embodiment, and time. It is a flow chart which shows an example of phase control amount search processing of a 2nd embodiment. It is a graph which shows the example of the relationship between the tag response amplitude and phase control amount of 2nd Embodiment, and time. It is a flow chart which shows an example of phase control amount search processing of a 3rd embodiment. It is a graph which shows the example of the relationship between the tag response amplitude A of 3rd Embodiment, the amount of phase control, and time. It is a graph which shows the example of the relationship between a RSSI value and phase control amount, and distance. It is a flow chart which shows an example of distance calculation processing of a 4th embodiment. It is a figure which shows the example of the relationship between the ADC output in an RFID tag reader-writer apparatus, and a slice level. It is a figure which shows the example of the relationship of the ADC output and slice level in the RFID tag reader-writer apparatus of 5th Embodiment.

First Embodiment
FIG. 1 is a diagram showing an example of the RFID tag reader / writer system 1 according to the first embodiment. The RFID tag reader / writer system 1 includes an RFID tag reader / writer device 10 and a plurality of RFID tags 91 attached to a plurality of articles 90. In the first embodiment, the RFID tag 91 attached to the article 90 is transported on the belt conveyor 100 in the transport direction (rightward in FIG. 1).

  The RFID tag 91 is an identification tag attached to an article 90 to be identified and managed, and includes an antenna 91a. The antenna 91a is formed to match the frequency of the transmission signal transmitted from the RFID tag reader / writer device 10, and is, for example, a dipole antenna or the like made of an antenna pattern of aluminum foil. The RFID tag 91 receives a transmission signal transmitted from the RFID tag reader / writer device 10, and returns a response signal to the RFID tag reader / writer device 10 by a backscatter method. Then, the RFID tag reader / writer device 10 receives the response signal from the RFID tag 91 and demodulates it, whereby communication of information with the RFID tag 91 is performed. The RFID tag reader / writer 10 according to the first embodiment performs, for example, a reading operation of the RFID tag 91 based on an instruction from a PC (Personal Computer) 200.

FIG. 2 is a circuit diagram showing an example of the RFID tag reader / writer device 10 in FIG.
The RFID tag reader / writer device 10 controls a whole CPU (Central Processing Unit) (control unit) 20, a transmission circuit 30, a local oscillator 40, a coupler 50, an antenna 60, a reception circuit 70, a storage unit And 80.

  In the RFID tag reader / writer device 10, when receiving an instruction to issue a read command from the PC 200, the CPU 20 analyzes the command and outputs a transmission signal that is an instruction to issue a read command to the transmission circuit 30.

The local generator 40 outputs a local oscillation signal of a predetermined oscillation frequency.
The transmission circuit 30 includes a DAC (Digital to analog converter) 31, a transmission baseband processing circuit 32, a transmission mixer 33, and a transmission amplifier 34.

  The DAC 31 converts the digital transmission signal generated by the CPU 20 into an analog signal and outputs the analog signal to the transmission baseband processing circuit 32.

  The transmission baseband processing circuit 32 performs waveform shaping processing such as removal of unnecessary frequency components from the transmission signal output from the DAC 31.

  The transmission mixer 33 multiplies the transmission signal whose waveform is shaped by the transmission baseband processing circuit 32 by the local oscillation signal output from the local oscillator 40. As a result, the transmission signal is upconverted to the frequency of the local oscillation signal output from the local oscillation unit 40.

  The transmission amplifier 34 amplifies the upconverted transmission signal to a predetermined transmission power and outputs the amplified transmission signal to the coupler 50.

  The coupler 50 guides the high frequency transmission signal amplified by the transmission amplifier 34 to the antenna 60, and the transmission signal is output through the antenna 60. In this manner, the RFID tag reader / writer device 10 issues to the RFID tag 91 a transmission signal that is an instruction for issuing a read command for reading information.

  On the other hand, when the RFID tag reader / writer device 10 receives a reflected wave as a response signal from the RFID tag 91 to the antenna 60, the coupler 50 receives a reflected wave as a response signal from the RFID tag 91 input from the antenna 60. Lead to 70.

  The receiving circuit 70 includes a phase shifter 71, a receiving mixer 72, a receiving baseband processing circuit 73, and an ADC 74.

  The phase shifter 71 changes the phase of the local oscillation signal output from the local oscillation unit 40 to an arbitrary phase control amount θ. Specifically, based on the control of the CPU 20, the phase shifter 71 changes the phase shift of the signal from the local oscillation signal to θ (0 to 360 °) when the phase control amount θ is instructed. The local oscillator signal output from the local oscillator 40 is supplied to the phase shifter 71, and the local oscillator signal obtained by arbitrarily shifting the local oscillator signal from the local oscillator 40 is supplied to the reception mixer 72. .

  The reception mixer 72 multiplies the response signal derived from the coupler 50 by the local oscillation signal whose phase is changed by the phase shifter 71. In the first embodiment, it is assumed that a response signal received via the antenna 60 is led to the reception mixer 72. The response signal is frequency-converted to the frequency of the local oscillation signal output from the local oscillation unit 40 and down-converted to the baseband. The frequency of the local signal used to multiply the response signal is the same as the frequency used to multiply the transmit signal in the transmit mixer 33.

  The reception baseband processing circuit 73 removes unnecessary frequency components from the response signal output from the reception mixer 72 and the like.

  The ADC 74 converts the response signal of the analog signal processed by the reception baseband processing circuit 73 into a digital signal and outputs the digital signal to the CPU 20. In this case, the CPU 20 functions as a control unit that controls the phase of the phase shifter 71 such that the amplitude of the response signal converted into the digital signal is maximized. Details of controlling the phase by the phase shifter 71 will be described later. Then, the CPU 20 controls the RFID tag reader / writer device 10 based on the decoded response signal command and control message. Further, the CPU 20 reads a program or an application program of the RFID tag reader / writer device 10, executes processing according to the read program, and centrally controls the entire RFID tag reader / writer device 10. The storage unit 80 stores various data necessary for processing by the CPU 20, a program to be executed by the CPU 20, an application program, and the like.

  The response signal transmitted from the RFID tag reader / writer device 10 is defined by the existing wireless communication standard (for example, ISO / IEC JTC1 / SC31). Next, the configuration of the response signal from the RFID tag 91 defined by the existing wireless communication standard will be described. FIG. 3 is a diagram showing an example of the relationship between the response signal from the RFID tag 91, the phase control amount of the phase shifter 71, and the output from the ADC 74. As shown in FIG. 3 (a) shows the configuration of the response signal from the RFID tag 91, FIG. 3 (b) shows the phase control amount of the phase shifter 71, and FIG. 3 (c) shows the response of the RFID tag 91 outputted from the ADC 74. Signals (hereinafter referred to as “ADC output”) are shown.

  In the first embodiment, as shown in FIG. 3A, the response signal from the RFID tag 91 is a tag response data (tag response) T1 including a read command and a control message, and a tag response data T1. And a pilot tone P1 and a preamble P2. Therefore, the RFID tag reader / writer device 10 receives the response signal from the RFID tag 91 in the order of pilot tone (pilot tone) P1, preamble (preamble) P2, and tag response data (tag response) T1.

  The pilot tone P1 is for generating a synchronization signal. Specifically, logic "0" is arranged in pilot tone P1 and is used for PLL lock in the clock recovery circuit.

  The preamble P2 is provided for frame synchronization. Specifically, the preamble P2 is provided at the end of the pilot tone P1, that is, immediately before the tag response data T1, and is used to determine the start bit of the data. The RFID tag reader / writer 10 synchronizes with the response signal from the RFID tag 91, and demodulates the response signal including the tag response data T1.

  The signal generated in the transmission circuit 30 and the signal down-converted in the reception circuit 70 are generated using the output signal of the same oscillator (local generator 40). That is, the local generation unit 40 of the transmission circuit 30 and the local generation unit 40 of the reception circuit 70 are shared. Therefore, it can be considered that the frequency deviation of the signal generated by the transmission circuit and the frequency deviation of the signal received by the reception circuit are substantially the same.

When the RFID tag reader / writer device 10 detects a pilot tone P1 included in the response signal of the RFID tag 91 in tag response reception processing described later, the RFID tag reader / writer device 10 performs phase control amount search processing. Although the details will be described later, in the phase control amount search process, the phase control amount at which the amplitude A _(θ) of the pilot tone P1 (hereinafter referred to as “tag response amplitude A _(θ) ” ₎ included in the ADC output becomes maximum. _A process of searching for θ _{A = max} is performed.

Then, the RFID tag reader / writer device 10 detects the detected maximum amplitude A _{max at} which the ADC output of the pilot tone P 1 is maximized by changing the phase control amount of the phase shifter 71 in the phase control amount search process. As shown in FIGS. 3B and 3C, the RFID tag reader / writer device 10 changes the phase of the local oscillation signal to one wavelength λ, that is, 0 to 360 ° to detect the maximum detection amplitude A _max . Search for the phase control amount θ _{A = max} . Then, the RFID tag reader / writer device 10 demodulates the preamble P2 and the tag response data T1 with the searched phase control amount θ _{A = max} . Hereinafter, details of the tag response reception process and the phase control amount search process will be described.

  In the example of FIG. 3C, the slice level SL is set. The CPU 20 determines the bit of the reception signal by determining whether the reception signal has become larger (rising) or smaller (falling) than the slice level SL. In the first embodiment, the slice level SL is fixed.

  FIG. 4 is a flowchart showing an example of the tag response reception process of the first embodiment. First, when receiving an instruction to issue a read command from the PC 200, the CPU 20 outputs a transmission signal that is an instruction to issue a read command to the RFID tag 91 (step S11), and when the RFID tag 91 returns a response, the response A signal is received (step S12).

The CPU 20 determines whether the pilot tone P1 included in the response signal is detected (step S13). If the pilot tone P1 has not been detected (NO in step S13), the CPU 20 waits until the pilot tone P1 is detected. When the pilot tone P1 is detected (YES in step S13), the CPU 20 performs phase control amount search processing (step S14). In the phase control amount search process, the CPU 20 performs a process of searching for a phase control amount θ _{A = max at} which the tag response amplitude A _(θ) of the ADC output becomes maximum. Details of the phase control amount search process will be described later.

When the phase control amount search process ends, the CPU 20 determines whether or not the preamble P2 included in the response signal is detected (step S15). When the preamble P2 is not detected (NO in step S15), the CPU 20 waits until the preamble P2 is detected. When the preamble P2 is detected (YES in step S15), the CPU 20 demodulates the tag response data T1 with the phase control amount θ _{A = max} searched in the phase control amount search process (step S16). The CPU 20 determines whether or not to finish (step S17). For example, it is determined whether the reception of the tag response data T1 from the RFID tag has been completed or, based on the user's operation, an instruction to the CPU 20 to end the tag response reception process is received. If the reception completion or end instruction has not been received (NO in step S17), the process returns to step S11, issues the next command, and the processes in steps S11 to S17 are repeatedly executed. On the other hand, when the reception is completed in the tag response data T1 from the RFID tag or the end instruction is received (YES in step S17), the tag response reception process is ended.

Next, phase control amount search processing according to the first embodiment will be described with reference to FIGS. 5 and 6. FIG. 5 is a flowchart showing an example of the phase control amount search process of the first embodiment. FIG. 6 is a graph showing an example of the relationship between the tag response amplitude A _(θ) and the phase control amount θ and the time t according to the first embodiment.

First, the CPU 20 initializes the phase control amount θ and the detected maximum amplitude A _max of the phase shifter 71 (step S21). In this process, for example, the CPU 20 resets the value of the phase control amount θ and the value of the detected maximum amplitude A _max stored in the storage unit 80 to zero.

The phase control amount θ is a control amount of the phase of the local oscillation signal output from the local oscillation unit 40.
Among the amplitudes of the response signal detected by the CPU 20, the detection maximum amplitude A _max refers to an amplitude at which the amplitude is maximum. That is, the detection maximum amplitude A _max is an amplitude of the tag response amplitude A _(θ) at which the amplitude is maximum. As shown in FIGS. 6A and 6B, the tag response amplitude A _(θ) changes in accordance with the phase control amount θ. The phase control amount at the inflection point f1 of the tag response amplitude A _(θ) θ is a phase control amount theta _{A = max} tag response amplitude A _(theta) is maximum.

  The CPU 20 controls the phase shifter 71 to arbitrarily change the phase of the local oscillation signal output from the local oscillation unit 40. For example, the CPU 20 controls the phase shifter 71 to control the phase control amount of the local oscillation signal output from the local oscillation unit 40 by the wavelength λ (0 to 360 °) as shown in FIG. Change up to step by step.

The CPU 20 detects the tag response amplitude A _(θ) of the ADC output (step S22). The CPU 20 determines whether the tag response amplitude A _(θ) detected in step S22 is _{equal to} or greater than the detected maximum amplitude A _max detected so far, that is, the tag response amplitude A _(θ) is stored in step S24 described later. It is determined whether or not the detected maximum amplitude A _max which has been detected and stored in the unit 80 has been exceeded (step S23).

If the tag response amplitude A _(θ) is _{equal to} or greater than the detected maximum amplitude A _max detected so far (YES in step S23), that is, the tag response amplitude A _(θ) is stored in the storage unit 80 If the detected maximum amplitude A _max is the maximum including the detected maximum amplitude A _max , the CPU 20 stores the tag response amplitude A _(θ) detected in step S22 in the storage unit 80 as the detected maximum amplitude A _max . Then, the CPU 20 stores the phase control amount θ _{A = max at} which the tag response amplitude A _(θ) is maximum as the phase control amount θ in the storage unit 80 (step S24).

On the other hand, if the tag response amplitude A _(θ) is smaller than the detected maximum amplitude A _max detected so far (NO in step S23), ie, the tag response amplitude A _(θ) has detected so far If it does not exceed A _max , the process of step S24 is skipped, and the process proceeds to step S25.

The CPU 20 increases the phase control amount θ of the phase shifter 71 by a predetermined increment Δθ (step S25). For example, as shown in FIG. 6A, the CPU 20 increases the phase control amount θ from θ _(n−1) to θ _(n) . Also, in response to the increase of the phase control amount θ from θ _(n-1) to θ _(n) , the tag response amplitude A _(θ) is also A _{(θ (n-1))} to A _{(θ (n)} Change to ₎₎ . The value of the increase amount of increase Δθ can be arbitrarily changed.

For example, as shown in FIG. 6B, when the tag response amplitude A _{(θ (n−1))} detected last time (n−1 time ₎ is the detection maximum amplitude A _max , this time (n th time) ) A case where the tag response amplitude A _{(θ (n))} is detected will be described. In this case, the current (n-th) detected tag response amplitude A _{(theta (n))} is currently detected maximum amplitude A _max and going on the previous ((n-1) th) detected tag response amplitude A _{(theta (n -1) Because of the} above, the CPU 20 stores the tag response amplitude A _{(θ (n))} detected this time (n-th time) in the storage unit 80 as a detection maximum amplitude A _max . The CPU 20 stores the phase control amount θ _{A = max} when the tag response amplitude A _{(θ (n))} is the detected maximum amplitude A _max , that is, the tag response amplitude A _(θ) is maximum. Store in 80.

On the other hand, for example, when the tag response amplitude A _{(θ (n))} detected last time (n th ₎ is the detected maximum amplitude A _max , the current (n + 1 th) tag response amplitude A _{(θ (n + 1)} description will be given _of a case _where) was detected. In this case, the tag response amplitude A _{(θ (n + 1)} ) detected this time (n + 1 th time ₎ is the tag response amplitude A _{(θ (n))} detected last time (n th time) which is the detection maximum amplitude A _max at the present time for smaller, CPU 20 is now (n + 1 th) detected tag response amplitude a _{(theta (n))} without detecting the maximum amplitude a _max to the previous (n-th) detected tag response amplitude a _{(theta (n) ) Is} kept at the detection maximum amplitude A _max .

Referring back to FIG. 5, the CPU 20 determines whether the phase control amount θ is equal to or greater than the wavelength λ (variable), that is, increases the phase control amount θ by an increment Δθ and sweeps the phase from 0 to 360 °. It is determined whether or not it is (step S26). If the phase control amount θ is less than the wavelength λ, that is, if the phase control amount θ does not reach the wavelength λ (NO in step S26), the process returns to step S22 and the phase control amount θ becomes one wavelength λ. The processes of steps S22 to S26 are repeatedly performed until reaching. On the other hand, when the phase control amount θ is equal to or longer than the wavelength λ, that is, when the phase control amount θ reaches the wavelength λ (YES in step S26), the CPU 20 controls the phase control amount θ with the tag response amplitude. It stores in the storage unit 80 as the phase control amount θ _{A = max at which} A _(θ) becomes maximum (step S27). When this process ends, the CPU 20 ends the search process of the phase control amount θ _{A = max at which} the tag response amplitude A _(θ) becomes maximum, and returns to the tag response reception process of FIG. 4.

  Conventionally, reception was performed by quadrature demodulation using two systems of components for I-ch and Q-ch, but in the first embodiment, the phase is changed by the phase shifter 71. By doing this, it is possible to configure with only one system of components. As a result, the circuit scale can be simplified, and the cost reduction of the entire device and the miniaturization of the device can be achieved.

  Also, conventionally, the weak response signal from the RFID tag 91 is amplified by several tens of dB on the I-ch side and the Q-ch side by orthogonal demodulation, respectively, resulting in the I-ch side and the Q-ch side. A large deviation or offset in amplification occurs between the two, resulting in a demodulation error. On the other hand, in the first embodiment, it is possible to eliminate the occurrence of the deviation of the amplification degree or the offset due to the difference of ch, suppress the occurrence of the demodulation error, and improve the demodulation accuracy.

  Furthermore, in the first embodiment, the response signal is processed by two systems of I-ch and Q-ch by quadrature demodulation. By changing the phase according to 71, processing can be performed with only one system. As a result, the load on processing of the response signal in the CPU 20 can be halved, and the reception rate can be doubled.

In the above embodiment, the CPU 20 determines whether or not the phase control amount θ is equal to or longer than the wavelength λ, that is, whether or not the phase is swept up to 0 to 360 °. For example, the CPU 20 can determine whether the phase control amount θ is equal to or more than a half wavelength λ, that is, whether or not the phase is swept to 0 to 180 °. In this case, the CPU 20 can search for a phase control amount θ _{A = max} at which the tag response amplitude A _(θ) is maximized by squaring the ADC output. As a result, the process of searching for the phase control amount θ _{A = max} can be performed at high speed.

The CPU 20 can also determine whether or not the phase control amount θ is equal to or greater than 1⁄4 wavelength λ, that is, whether or not the phase is swept to 0 to 90 °. In this case, the CPU 20 can search for the phase control amount θ _{A = max} in which the tag response amplitude A _(θ) is maximized in two cases. First, the CPU 20 squares the ADC output, sweeps the phase to 0 to 90 ° (1⁄4 wavelength λ), and sweeps the phase, the phase control amount giving the maximum detection amplitude A _max at which the amplitude is maximum. The θA _{= max} and the phase control amount θA _{= min} giving the detected minimum amplitude _Amin at which the amplitude is minimum are detected.

When the phase control amount θ is 0 or 1⁄4 wavelength λ, the CPU 20 detects that the difference increases in the entire phase shift range within the swept 0 to 90 ° (1⁄4 wavelength λ) range. The inflection point giving the maximum amplitude _Amax is detected. Then, the CPU 20 detects the phase control amount θ at the inflection point, and stores the phase control amount θ in the storage unit 80 as the phase control amount θ _{A = max} at which the tag response amplitude A _(θ) becomes maximum.

If the phase control amount θ is not 0 or 1⁄4 wavelength λ, there is no maximum detection amplitude A _max in the entire phase shift range within the range of 0 to 90 ° (1⁄4 wavelength λ) swept. The CPU 20 detects an inflection point at which the difference giving the detected minimum amplitude A _min in the entire phase shift range is minimum, within the range of 0 to 90 ° (1⁄4 wavelength λ) swept. Then, the CPU 20 detects the phase control amount θ at the inflection point, and detects this phase control amount θ as a phase control amount θ _{A = min at} which the tag response amplitude A _(θ) becomes minimum. In this case, since the detection maximum amplitude A _max in the entire phase shift range is equal to the phase control amount θ _{A = min} + 90 ° at which the tag response amplitude A _(θ) becomes minimum to the phase control amount θ, the CPU 20 performs phase control The amount θ _{A = min} + 90 ° is stored in the storage unit 80 as the phase control amount θ _{A = max} . As a result, the process of searching for the phase control amount θ _{A = max} can be performed at high speed.

Further, in the above embodiment, under the control of the CPU 20, when the phase control amount θ is given, the phase shifter 71 increases the given phase control amount θ by an increment Δθ to 0 to 360 °. Although the phase of the local signal is changed, it is not limited to this. For example, the CPU 20 can control the phase shifter 71 to create a plurality of local oscillation signals of different phases in advance. Then, the CPU 20 controls the phase of the phase shifter 71 so that the amplitude of the response signal becomes maximum, based on a plurality of locally generated signals generated in advance. Thus, the process of changing the phase of the local signal can be omitted, and the search of the phase control amount θ _{A = max} can be processed at high speed.

Second Embodiment
Next, the RFID tag reader / writer device 10 according to the second embodiment will be described. The circuit diagram of the RFID tag reader / writer device 10 of the second embodiment and the tag response reception process are the same as in the first embodiment, and thus the description thereof is omitted.

However, in the phase control amount search process of the first embodiment, the phase is swept until the phase control amount θ becomes the wavelength λ to search for the phase control amount θ _{A = max} , whereas the second embodiment The embodiment is different in that the search of the phase control amount θ _{A = max} after the inflection point of the tag response amplitude A _(θ) is ended.

The phase control amount search process of the second embodiment will be described with reference to FIGS. 7 and 8. FIG. 7 is a flowchart illustrating an example of phase control amount search processing according to the second embodiment. FIG. 8 is a graph showing an example of the relationship between the tag response amplitude A _(θ) and the phase control amount θ and the time t according to the second embodiment.

First, the CPU 20 initializes the phase control amount θ of the phase shifter, the detection maximum amplitude A _max and the previous tag response amplitude A ′ _(θ) (step S31). In this process, for example, the CPU 20 resets the value of the phase control amount θ, the value of the detected maximum amplitude A _max , and the value of the previous tag response amplitude A ′ _(θ) stored in the storage unit 80 to zero. The previous tag response amplitude A ′ _(θ) is the tag response amplitude stored in the storage unit 80 in step S36 described later.

  The CPU 20 controls the phase shifter 71 to arbitrarily change the phase of the local oscillation signal output from the local oscillation unit 40. For example, the CPU 20 controls the phase shifter 71 to continuously and continuously change the phase control amount of the local oscillation signal output from the local oscillation unit 40 as shown in FIG. 8A.

The CPU 20 detects the tag response amplitude A _(θ) of the ADC output (step S32). The CPU 20 subtracts the previous tag response amplitude A ′ _(θ) (amplitude of the first output signal) from the tag response amplitude A _(θ) (amplitude of the second output signal ₎ detected in step S 32. ΔA is calculated (step S33). The CPU 20 determines whether the difference ΔA calculated in step S33 is 0 or more (step S34).

Increases when the difference ΔA is greater than or equal to zero (YES in step S34), the CPU 20 does not exceed the inflection point f2 of the tag response amplitude A _(theta), the tag response amplitude A _(theta) is beyond this Then, the process proceeds to step S35.

The CPU 20 increases the phase control amount θ by a predetermined increment Δθ (step S35). Then, the CPU 20 acquires the tag response amplitude A _(θ) corresponding to the phase control amount θ which is increased by the increase Δθ. For example, as shown in FIG. 8A, the CPU 20 increases the phase control amount θ from θ _(n−1) to θ _(n) . Also, in response to the increase of the phase control amount θ from θ _(n-1) to θ _(n) , the tag response amplitude A _(θ) is also A _{(θ (n-1))} to A _{(θ (n)} Change to ₎₎ . The value of increase Δθ can be arbitrarily changed.

The CPU 20 stores the present tag response amplitude A _(θ) as the previous tag response amplitude A ′ _(θ) in the storage unit 80 (step S36).

For example, as shown in FIG. 8, when the tag response amplitude A _{(θ (n−1))} detected last time (n−1 time ₎ is stored as the previous tag response amplitude A ′ _(θ) , this time A case where the (nth) tag response amplitude A _{(θ (n))} is detected will be described.

In this case, the CPU 20 detects the tag response amplitude A _{(θ (n)} ) detected this time (n-th time ₎ as the tag response amplitude A ′ _(θ) of the previous time. Since the response amplitude is A _{(θ (n-1))} or more, the difference ΔA of A _{(θ (n))} −A _{(θ (n−1))} is 0 or more. In this case, the CPU 20 increases the phase control amount θ by a predetermined increment Δθ.

  When this process ends, the process returns to step S32, and the processes of steps S32 to S36 are repeatedly executed until the difference ΔA becomes less than zero.

On the other hand, when the difference ΔA is less than 0 (NO in step S34), the CPU 20 determines that the tag response amplitude A _(θ) exceeds the inflection point f2 and the tag response amplitude A _(θ) is After that, it is determined that the number decreases, and the process proceeds to step S37. That is, when the CPU 20 determines that the tag response amplitude A _(θ) exceeds the inflection point f2, the search for the phase control amount θ _{A = max} ends without changing the phase control amount θ any further. Do.

The CPU 20 calculates a difference “θ−Δθ” obtained by subtracting the increase Δθ from the phase control amount θ. The CPU 20 stores the calculated difference “θ−Δθ” in the storage unit 80 as the phase control amount θ _{A = max at} which the tag response amplitude A _(θ) becomes maximum (step S37). When this process ends, the CPU 20 ends the search process of the phase control amount θ _{A = max at which} the tag response amplitude A _(θ) becomes maximum, and returns to the tag response reception process of FIG. 4.

In the second embodiment, when the CPU 20 determines that the tag response amplitude A _(θ) exceeds the inflection point f2, the phase control amount θ is not changed any more and the phase control amount θ _{A =} End the search for _max . As a result, unnecessary processing can be omitted, and processing for searching for the phase control amount θ _{A = max} can be performed at high speed.

Third Embodiment
Next, an RFID tag reader / writer device 10 according to a third embodiment will be described. The circuit diagram of the RFID tag reader / writer device 10 according to the third embodiment is the same as the circuit diagram according to the first embodiment, and thus the description thereof is omitted.

However, in the first and second embodiments, the search for the phase control amount θ _{A = max} is performed only once, but in the third embodiment, the RFID tag 91 is moved after the phase control amount is determined once. With respect to the fluctuation of the optimum phase control amount that occurs with the above, the following point is different in that the follow-up search of the optimum phase control amount θA _{= max} is performed.

The phase control amount search process of the third embodiment will be described with reference to FIGS. 9 and 10. FIG. 9 is a flowchart showing an example of phase control amount search processing of the third embodiment. FIG. 10 is a graph showing an example of the relationship between the tag response amplitude A _(θ) and the phase control amount θ and the time t according to the third embodiment. The symbols of the process flow of FIG. 10 correspond to the step numbers of the phase control amount search process of the third embodiment. Further, in FIG. 10 (b), a1 represents a state in which the optimal phase control amount does not change, and a2 and a3 represent a state between the RFID tag 91 and the RFID tag reader / writer device 10 by the movement of the RFID tag 91 or the like. This represents a state in which a deviation of the optimal phase control amount has occurred.

  The CPU 20 controls the phase shifter 71 to arbitrarily change the phase of the local oscillation signal output from the local oscillation unit 40. For example, the CPU 20 controls the phase shifter 71 to gradually increase the phase control amount θ of the local oscillation signal output from the local oscillation unit 40 in the positive or negative direction as shown in FIG. 10A. Change continuously. Changing the phase control amount θ in the + direction means increasing the phase control amount θ. Further, changing the phase control amount θ to the − direction means reducing the phase control amount θ.

The CPU 20 detects the tag response amplitude A _(θ) of the ADC output (step S51). The CPU 20 increases the current phase control amount θ by a predetermined increment _Δθ, and acquires a tag response amplitude A _{(θ + Δθ)} obtained by shifting the current phase control amount θ by + Δθ (step S52). For example, as shown in FIG. 10, the CPU 20 acquires a phase control amount θ + Δθ shifted from the current phase control amount θ by + Δθ. Further, in response to the increase of the phase control amount from θ to θ + Δθ, the tag response amplitude also changes from A _{(θ )} to A _{(θ + Δθ)} . In this case, the CPU 20 acquires a tag response amplitude A _{(θ + Δθ)} obtained by shifting the current phase control amount θ by + Δθ. The value of increase Δθ of the phase control amount can be arbitrarily changed.

Based on the difference between the tag response amplitude A _{(θ + Δθ)} acquired in step S52 and the current tag response amplitude A _(θ) detected in step S51, the CPU 20 determines the phase at which the tag response amplitude A _(θ) becomes maximum. It is determined whether the control amount θ _{A = max} has fluctuated in the + direction or in the − direction. That is, the CPU 20 determines whether the tag response amplitude A _{(θ + Δθ)} acquired in step S52 is _{equal to} or more than the current tag response amplitude A _(θ) detected in step S51 (step S53). If the acquired tag response amplitude A _{(theta + [Delta] [theta])} is the current tag response amplitude A _(theta) above (YES in step S53), the CPU 20 is the RFID tag 91 is moved, the tag response amplitude A _{( It} is determined that the phase control amount θA _{= max at} which _θ) becomes maximum fluctuates in the + direction (step S54).

In this case, the CPU 20 changes the phase control amount θ in the positive direction to search for a phase control amount θ _{A = max} at which the tag response amplitude A _(θ) becomes maximum (step S55). In this process, the CPU 20 increases the phase control amount θ in the + direction by Δθ, and searches for the phase control amount θ _{A = max at} which the tag response amplitude A _(θ) becomes maximum. Specifically, the CPU 20 performs the same process as step S32 to step S36 of the phase control amount search process of the second embodiment of FIG. That is, in the process of step S35 of the phase control amount search process of the second embodiment, the CPU 20 increases the phase control amount θ in the + direction by Δθ. Then, to get the tag response amplitude A _(theta) corresponding to the phase control amount theta which increased by [Delta] [theta], this tag response amplitude A and _(theta), the previous tag response amplitude A 'storage unit 80 as the _(theta) Store. Then, until the difference ΔA obtained by subtracting the previous tag response amplitude A ′ _(θ) from the tag response amplitude A _(θ) becomes smaller than 0, the processes of steps S32 to S36 are repeatedly executed. When the difference ΔA becomes less than 0, the CPU 20 calculates the difference “θ−Δθ” obtained by subtracting the increase Δθ from the phase control amount θ. Then, the CPU 20 stores the calculated difference “θ−Δθ” in the storage unit 80 as the phase control amount θ _{A = max at} which the tag response amplitude A _(θ) becomes maximum.

Returning to FIG. 9, the CPU 20 sets the phase control amount θ _{A = max} searched in step S55 as the next phase control amount θ (step S56). When this process ends, the CPU 20 ends the search process of the phase control amount θ _{A = max at which} the tag response amplitude A _(θ) becomes maximum.

On the other hand, when the acquired tag response amplitude A _{(θ + Δθ)} is smaller than the present tag response amplitude A _(θ) (NO in step S53), the CPU 20 predetermines the current phase control amount θ. A tag response amplitude A _(.theta .-. DELTA..theta.) Obtained by shifting the present phase control amount .theta. By -.DELTA..theta. For example, as shown in FIG. 10, the CPU 20 acquires a phase control amount θ-Δθ shifted from the current phase control amount θ by −Δθ. Further, in response to the decrease of the phase control amount from θ to θ-Δθ, the tag response amplitude also changes from A _{(θ )} to A _(θ-Δθ) . In this case, the CPU 20 acquires a tag response amplitude A _(θ-Δθ) obtained by shifting the current phase control amount θ by −Δθ. The value of the decrease Δθ of the phase control amount can be arbitrarily changed.

The CPU 20 determines whether the tag response amplitude A _(θ−Δθ) acquired in step S57 is _{equal to} or more than the current tag response amplitude A _(θ) detected in step S51 (step S58). If the acquired tag response amplitude A _(θ-Δθ) is smaller than the current tag response amplitude A _(θ) (NO in step S58), the process returns to step S51. Then, the obtained tag response amplitude _{A (θ-Δθ)} is processing between step S51~ step S58 until the current tag response amplitude A _(theta) above is repeatedly executed.

On the other hand, if the acquired tag response amplitude A _(θ-Δθ) is equal to or greater than the current tag response amplitude A _{(θ) (} YES in step S58), the CPU 20 moves the RFID tag 91 and moves the tag. It is determined that the phase control amount θA _{= max at} which the response amplitude A _(θ) becomes maximum fluctuates in the − direction (step S59).

In this case, the CPU 20 changes the phase control amount θ to the − direction and searches for the phase control amount θ _{A = max} at which the tag response amplitude A _(θ) becomes maximum (step S60). In this process, the CPU 20 decreases the phase control amount θ by −Δ in the − direction, and searches for the phase control amount θ _{A = max at} which the tag response amplitude A _(θ) becomes maximum. Specifically, the CPU 20 performs a process similar to steps S32 to S36 of the phase control amount search process of the second embodiment of FIG. That is, in the process of step S35 of the phase control amount search process of the second embodiment, the phase control amount θ is decreased by Δθ in the − direction. Then, the tag response amplitude A _(θ) corresponding to the phase control amount θ reduced by Δθ is acquired, and the present tag response amplitude A _(θ) is stored in the storage unit 80 as the previous tag response amplitude A ′ _(θ). Do. Then, until the difference ΔA obtained by subtracting the previous tag response amplitude A ′ _(θ) from the tag response amplitude A _(θ) becomes smaller than 0, the processes of steps S32 to S36 are repeatedly executed. When the difference ΔA becomes less than 0, the CPU 20 calculates a difference “θ−Δθ” obtained by subtracting the decrease Δθ from the phase control amount θ. Then, the CPU 20 stores the calculated difference “θ−Δθ” in the storage unit 80 as the phase control amount θ _{A = max at} which the tag response amplitude A _(θ) becomes maximum.

Returning to FIG. 9, the CPU 20 sets the phase control amount θ _{A = max} searched in step S60 as the next phase control amount θ (step S61). When this process ends, the CPU 20 ends the search process of the phase control amount θ _{A = max at which} the tag response amplitude A _(θ) becomes maximum.

In the third embodiment, for example, the phase control amount θ _A at which the tag response amplitude A _(θ) becomes maximum due to the RFID tag 91 moving closer or farther due to movement of the belt conveyor 100 or the like. _{Even when = max} changes, the phase control amount θ _{A = max} can be searched following the change. As a result, it is possible to suppress the occurrence of demodulation errors and to improve the demodulation accuracy.

Fourth Embodiment
Next, an RFID tag reader / writer device 10 according to a fourth embodiment will be described. The circuit diagram of the RFID tag reader / writer device 10 of the fourth embodiment, the tag response reception process, and the phase control amount search process are the same as those of the first embodiment, and thus the description thereof is omitted.

However, while in the first embodiment, the phase control amount θ _{A = max at} which the tag response amplitude A _(θ) is maximized is searched, in the fourth embodiment, the RFID tag reader / writer device 10 , And the RFID tag 91 are different in that a distance calculation process is performed to calculate the distance X.

The distance calculation process of the fourth embodiment will be described with reference to FIGS. 11 and 12. FIG. 11 is a graph showing an example of the relationship between the distance X and the RSSI (Received Signal Strength Index) value and the phase control amount θA _{= max} . FIG. 12 is a flowchart showing an example of the distance calculation process of the fourth embodiment.

In the distance calculation process, the distance corresponding to the RSSI value measured by the CPU 20 is referred to from the information of FIG. 11 indicating the relationship between the RFID tag reader / writer device 10 and the distance between the RFID tag 91 stored in the storage unit 80. Then, if there are a plurality of distances referred to, the distance X between the RFID tag reader / writer device 10 and the RFID tag 91 is calculated based on the phase control amount θA _{= max} searched in the phase control amount search process.

  In the fourth embodiment, when the wavelength is λ, the distance to λ / (2π) is the near field, the distance further than that is the far field, and the boundary is the boundary L. The boundary L between the near field and the far field varies depending on the characteristics and the frequency of the antenna 60 of the RFID tag reader / writer device 10 and the antenna of the RFID tag 91, and thus can be arbitrarily changed.

As shown in FIG. 11, the distance X depends on the RSSI value at a position (far field) farther than the boundary L, that is, in inverse proportion to the RSSI value, but a position closer to the boundary L (near field ) Does not necessarily depend on the RSSI value. For example, although the predetermined distances X ₁ and X ₂ located at positions (near fields) closer to the boundary L and the distances X _{3 at} positions (far fields) farther than the boundaries L respectively have the same RSSI value r 1 Each has a different distance. On the other hand, the phase control amount θ _{A = max} is formed by a gentle curve whose boundary L is a substantially minimum point. Therefore, in the fourth embodiment, the CPU 20 searches the phase control amount θ _A for the distance calculated based on the measured RSSI value from the information indicating the relationship between the RSSI value and the distance X in the phase control amount search process. _The distance X is calculated by the distance calculation process which is complemented by _{= max} . Information (for example, FIG. 11) indicating the relationship between the RSSI value and the distance X is stored in advance in the storage unit 80.

  The distance calculation process will be described with reference to FIG. The distance calculation process is started, for example, when an instruction to start the distance calculation process is received to the CPU 20 based on the user's operation after the phase control amount search process ends.

The CPU 20 measures the RSSI value using the response signal from the RFID tag 91 (step S71). The CPU 20 acquires the phase control amount θ _{A = max} searched in the phase control amount search process (step S72).

  The CPU 20 refers to the storage unit 80 and acquires information (for example, FIG. 11) indicating the relationship between the RSSI value and the distance X.

The CPU 20 determines whether the distance corresponding to the RSSI value acquired in step S71 is one (step S74). If the distance corresponding to the RSSI value is one (YES in step S74), the CPU 20 calculates the corresponding distance as the distance X (step S75). As if the distance corresponding to the RSSI value is one, for example, when the RSSI value is r2 is to become one of the corresponding distance _{X 4,} CPU 20 is RFID tag reader-writer device _{X 4} 10 The distance X between the RFID tag 91 and the RFID tag 91 is calculated. Similarly calculated, for example, when the RSSI value is r3 is to become one of the corresponding distance _{X 5,} CPU 20 is a _{X 5} and RFID tag reader-writer device 10, the RFID tag 91, as the distance X Do. When this process ends, the distance calculation process ends.

  On the other hand, if the distance corresponding to the RSSI value is not one, that is, if there are a plurality of distances (NO in step S74), the CPU 20 identifies the boundary L between the near field and the far field from the wavelength λ ( Step S76). In this process, the CPU 20 specifies the wavelength λ / (2π) as the boundary L.

The CPU 20 determines whether the distance corresponding to the RSSI value acquired in step S71 is more than two (step S77). If there are two distances corresponding to the RSSI value (NO in step S77), the CPU 20 calculates the distance X from the relationship between the phase control amount θA _{= max} and the boundary L (step S78).

Specifically, in the case where the distance corresponding to the RSSI value is two, for example, when the RSSI value is r4, the corresponding distances are two, X ₆ and X ₇ .
In this case, when the phase control amount theta _{A = max} obtained boundary L smaller than in step S72, CPU 20 is a _{X 6} located closer than the boundary L and the RFID tag reader-writer device 10, the RFID tag 91, the Calculated as the distance X. On the contrary, when the phase control amount theta _{A = max} obtained is equal to or larger than the boundary L in step S72, CPU 20 includes an RFID tag reader-writer device 10 X ₇ in the farther comprise the boundary L, It is calculated as the distance X with the RFID tag 91. When this process ends, the distance calculation process ends.

On the other hand, if the distance corresponding to the RSSI value is more than two, that is, three (NO in step S77), the CPU 20 determines whether the phase control amount θ _{A = max} is the boundary L or more. It determines (step S79). When the phase control amount θA _{= max} is equal to or larger than the boundary L, the CPU 20 calculates the distance X which is the farthest among the three distances corresponding to the RSSI value (step S80). When this process ends, the distance calculation process ends.

Specifically, as if the distance corresponding to the RSSI value is three, for example, when the RSSI value is r1, the corresponding distance is three and the _{X 1} and _{X 2} and _{X 3.} If the phase control amount theta _{A = max} is greater than or equal to the boundary L, CPU 20 has three distances _X 1 corresponding to the RSSI _value, of X 2, _{X 3,} calculates the farthest distance _{X 3} as the distance X On the other hand, when the phase control amount θA _{= max} is smaller than the boundary L, the CPU 20 calculates the distance X based on the fluctuation direction of the phase control amount θA _{= max} (step S81).

Specifically, when it is determined that the phase control amount θ _{A = max} has changed in the − direction, the CPU 20 selects one of the three distances X ₁ , X ₂ and X ₃ corresponding to the RSSI value. an RFID tag reader-writer device 10 a short distance _{X 1,} an RFID tag 91 is calculated as the distance X. The determination as to whether or not the phase control amount θA _{= max} has fluctuated in the − direction is made, for example, by performing the process of step S59 of the third embodiment of FIG.

On the other hand, when it is determined that the phase control amount θ _{A = max} has fluctuated in the _positive direction, the CPU 20 calculates an intermediate distance among the _three distances X ₁ , X ₂ and X ₃ corresponding to the RSSI value. X ₂ is calculated as the distance X between the RFID tag reader / writer device 10 and the RFID tag 91. The determination as to whether or not the phase control amount θA _{= max} has changed in the positive direction is made, for example, by performing the process of step S54 in the third embodiment of FIG. When this process ends, the distance calculation process ends.

In the fourth embodiment, the RSSI value can be complemented by the searched phase control amount θ _{A = max,} and the accuracy of calculating the distance X between the RFID tag reader / writer device 10 and the RFID tag 91 can be improved. . Thereby, for example, the CPU 20 can accurately control the range in which the RFID tag 91 is read by the RFID tag reader / writer device 10 based on the calculated distance X.

Fifth Embodiment
Next, the RFID tag reader / writer device 10 of the fifth embodiment will be described. The RFID tag reader / writer device 10 of the fifth embodiment is the same as the circuit diagram of the first embodiment, the tag response reception process, and the phase control amount search process, so the description will be omitted.

However, while the slice level SL in the first embodiment is fixed and is not changed even when the tag response amplitude A _(θ) changes, in the fifth embodiment, the slice level SL is not changed. The level SL is variable, and the slice level SL varies in accordance with the detected maximum amplitude A _max .

  FIG. 13 is a diagram showing an example of the relationship between the ADC output and the slice level SL in the RFID tag reader / writer device.

As shown in FIG. 13A, when the tag response amplitude A _(θ) of the ADC output is sufficiently large, the amplitude waveform exists above and below the slice level SL, so that demodulation is correctly performed. On the other hand, as shown in FIG. 13 (b), when the tag response amplitude A _{(.theta.) Of} the ADC output is small, the amplitude waveform may not be formed above and below the slice level SL, which may result in incorrect demodulation. .

  FIG. 14 is a view showing an example of the relationship between the ADC output and the slice level SL in the RFID tag reader / writer device 10 of the fifth embodiment.

As shown in FIG. 14A, when the tag response amplitude A _(θ) of the ADC output is sufficiently large, the CPU 20 sets the slice level SL high in accordance with the detected maximum amplitude A _max detected in the phase control amount search process. Set As a result, amplitude waveforms appear above and below the slice level SL, so that they are correctly demodulated. Also, as shown in FIG. 14B, when the tag response amplitude A _(θ) of the ADC output is small, the CPU 20 adjusts the slice level SL to match the detected maximum amplitude A _max detected in the phase control amount search process. Set low. As a result, it is possible to prevent the problem that the signal of the ADC output does not form an amplitude waveform above and below the slice level SL, and demodulation can not be performed correctly.

  The present invention is not limited to the above-described embodiment as it is, and constituent elements can be modified and embodied without departing from the scope of the invention at the implementation stage. In addition, various inventions can be formed by appropriate combinations of a plurality of components disclosed in the above embodiments. For example, all components shown in the embodiments may be combined as appropriate. Furthermore, components in different embodiments may be combined as appropriate. Of course, various modifications and applications are possible without departing from the scope of the invention.

1 tag reader / writer system 10 RFID tag reader / writer device 20 CPU
30 transmitter circuit 31 DAC
32 Transmission baseband processing circuit 33 Transmission mixer 34 Transmission amplifier 40 Station generator 50 Coupler 60 Antenna 70 Reception circuit 71 Phase shifter 72 Reception mixer 73 Reception baseband processing circuit 80 Storage unit 90 Article 91 RFID tag 91a Antenna 100 Belt conveyor P1 Pilot tone P2 Preamble SL Slice level T1 Tag response data f1 Inflection point f2 Inflection point

Claims (12)

An RFID tag reader / writer device that receives a response signal transmitted from an RFID tag, comprising:
A local oscillator which outputs a local oscillation signal of a predetermined oscillation frequency;
A phase shifter for changing the phase of the local oscillation signal output from the local oscillation unit to an arbitrary phase control amount;
A reception mixer for multiplying the down-conversion signal by multiplying the local oscillation signal whose phase is changed by the phase shifter with the response signal;
A control unit for controlling the phase control amount of the phase shifter and searching for the phase control amount based on an amplitude at which the output signal down-converted by the reception mixer is maximized;
An RFID tag reader / writer device comprising: The control unit controls the amount of phase control of the phase shifter to be swept to a half wavelength, and searches for the amount of phase control based on an amplitude at which the square of the output signal is maximized. The RFID tag reader / writer device according to claim 1. The control unit controls the amount of phase control of the phase shifter to be swept to 1⁄4 wavelength, and searches for the amount of phase control based on an amplitude at which the square of the output signal becomes maximum or minimum. The RFID tag reader / writer device according to claim 1, The control unit
The phase control amount of the local oscillation signal is continuously increased stepwise,
Based on an inflection point at which the difference between the amplitude of the first output signal before the phase control amount is increased and the amplitude of the second output signal after the phase control amount is increased or decreased. The RFID tag reader / writer device according to claim 2 or 3, wherein the phase control amount is searched based on an amplitude at which the output signal becomes maximum or minimum. The RFID tag reader / writer device according to claim 4, wherein when the amplitude of the output signal exceeds the inflection point, the control unit ends the search for the phase control amount. The control unit
After determining the phase control amount using any one of claims 1 to 5,
The phase control amount of the local oscillation signal is continuously increased stepwise in the positive direction or decreased stepwise in the negative direction.
The phase at which the amplitude of the output signal is maximum based on the difference between the amplitude of the third output signal before changing the phase control amount and the amplitude of the fourth output signal after changing the phase control amount Determine whether the control amount fluctuates in the + direction or in the − direction,
When it is determined that the phase control amount at which the amplitude of the output signal is maximum fluctuates in the positive direction, the phase control amount is increased and changed in the positive direction, and the phase is increased based on the amplitude at which the output signal is maximum. Search for the amount of control,
When it is determined that the phase control amount at which the amplitude of the output signal is maximum fluctuates in the-direction, the phase control amount is decreased and changed in the-direction to change the phase based on the amplitude at which the output signal becomes maximum. The RFID tag reader / writer device according to any one of claims 1 to 5, wherein a control amount is searched. It further comprises a storage unit for storing information indicating the relationship between the RSSI value of the response signal from the RFID tag and the distance between the RFID tag reader / writer device and the RFID tag.
The control unit
Measuring the RSSI value using the response signal from the RFID tag;
The distance corresponding to the measured RSSI value is referred to from the information indicating the relationship between the RFID tag reader / writer device and the distance between the RFID tag stored in the storage unit,
When there are a plurality of distances referred to, the distance between the RFID tag reader / writer device and the RFID tag is calculated based on the phase control amount of the amplitude that maximizes the searched output signal.
The RFID tag reader / writer device according to any one of claims 1 to 6, characterized in that: The control unit, when there are a plurality of distances corresponding to the measured RSSI value, the RFID tag reader / writer device and the RFID tag based on the fluctuation direction of the phase control amount of the amplitude at which the searched output signal becomes maximum. Calculate the distance between
The RFID tag reader / writer device according to claim 7, characterized in that: The control unit may further demodulate by detecting whether the output signal has risen or falls with the set level as a slice level in accordance with the magnitude of the amplitude at which the output signal becomes maximum. The RFID tag reader / writer device according to any one of claims 1 to 8, wherein The RFID tag reader / writer device according to any one of claims 1 to 9, wherein the local station part is also used as a local station part for modulation of a transmission circuit of the RFID tag reader / writer. A receiving method of an RFID tag reader / writer device for receiving a response signal transmitted from an RFID tag, comprising:
Output a local oscillation signal of a predetermined oscillation frequency,
Changing the phase of the output local signal to an arbitrary phase control amount,
The response signal is multiplied by the local oscillation signal whose phase is changed and down-converted,
The phase control amount is searched based on an amplitude at which the downconverted output signal is maximized.
A receiving method of an RFID tag reader / writer device characterized in that. In a program that causes a computer of an RFID tag reader / writer device to receive a response signal transmitted from an RFID tag,
A process of outputting a local oscillation signal of a predetermined oscillation frequency;
Changing the phase of the output local signal to an arbitrary phase control amount;
A process of multiplying the response signal by the local oscillation signal whose phase has been changed and down-converting the response signal;
Searching for the phase control amount based on an amplitude at which the down-converted output signal is maximized;
A program characterized by doing.