JP2019066268A - Capacitance detector and resistance detector - Google Patents

Capacitance detector and resistance detector Download PDF

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JP2019066268A
JP2019066268A JP2017190629A JP2017190629A JP2019066268A JP 2019066268 A JP2019066268 A JP 2019066268A JP 2017190629 A JP2017190629 A JP 2017190629A JP 2017190629 A JP2017190629 A JP 2017190629A JP 2019066268 A JP2019066268 A JP 2019066268A
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JP6871836B2 (en
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真太郎 市川
Shintaro Ichikawa
真太郎 市川
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Abstract

To increase the accuracy of a capacitance detector and a resistance detector.SOLUTION: A capacitance detector and a resistance detector of the present invention comprise an oscillation unit, a first differentiation unit, a second differentiation unit, a differential amplification unit, a control unit, an integration unit, and a sample-and-hold unit. The first differentiation unit generates a first differential signal derived by differentiating an oscillation signal using a first capacitance sensor or a first resistance sensor. The second differentiation unit generates a second differential signal derived by differentiating an oscillation signal using a second capacitance sensor or a second resistance sensor. The differential amplification unit generates a differential amplification signal that corresponds to a difference between the absolute value of the first differential signal and the absolute value of the second differential signal. The integration unit generates an integration signal derived by integrating the differential amplification signal, and resets the integration signal in accordance with an integration control signal.SELECTED DRAWING: Figure 1

Description

本発明は、物理量の変化によって静電容量の差が変化する第１容量センサと第２容量センサの静電容量の差を検出する容量検出装置、および物理量の変化によって抵抗の差が変化する第１抵抗センサと第２抵抗センサの抵抗の差を検出する抵抗検出装置に関する。   The present invention relates to a capacitance detection device that detects a difference in capacitance between a first capacitance sensor and a second capacitance sensor in which a difference in capacitance changes due to a change in physical quantity, and a difference in resistance changes due to a change in physical quantity The present invention relates to a resistance detection device that detects a difference in resistance between a first resistance sensor and a second resistance sensor.

特許文献１の容量検出装置と抵抗検出装置が、物理量の変化によって生じた静電容量または抵抗の差を検出する技術として知られている。そして、特許文献１の容量検出装置と抵抗検出装置は、アナログスイッチのチャージインジェクションの変動によって生じるノイズを低減し、検出精度を高めている。図６に特許文献１の図８に示された容量検出装置の構成を示す。図７に特許文献１の図９に示された第１微分部、第２微分部、第１積分部、第２積分部の具体的な構成例を示す。図８に特許文献１の図１０に示されたタイミングチャートを示す。   The capacitance detection device and the resistance detection device of Patent Document 1 are known as a technique for detecting a difference in capacitance or resistance caused by a change in physical quantity. Then, the capacitance detection device and the resistance detection device of Patent Document 1 reduce noise caused by fluctuation of charge injection of the analog switch, and improve detection accuracy. FIG. 6 shows the configuration of the capacitance detection device shown in FIG. 8 of Patent Document 1. As shown in FIG. FIG. 7 shows a specific configuration example of the first differentiation unit, the second differentiation unit, the first integration unit, and the second integration unit shown in FIG. 9 of Patent Document 1. As shown in FIG. FIG. 8 shows a timing chart shown in FIG. 10 of Patent Document 1. As shown in FIG.

特許文献１の容量検出装置２００は、物理量の変化によって静電容量の差が変化する第１容量センサ１２１ａと第２容量センサ１２１ｂの静電容量の差を検出する。なお、以下では第１容量センサ１２１ａと第２容量センサ１２１ｂの静電容量が逆に変化する例を示す。容量検出装置２００は、発振部１１０、第１微分部１２０ａ、第２微分部１２０ｂ、第１積分部２３０ａ、第２積分部２３０ｂ、差動増幅部２４０、サンプルホールド部１５０、制御部２８０、フィルタ部１９０を備える。発振部１１０は、発振信号を生成する。   The capacitance detection device 200 of Patent Document 1 detects the difference in capacitance between the first capacitance sensor 121a and the second capacitance sensor 121b, in which the difference in capacitance changes due to a change in physical quantity. In the following, an example is shown in which the capacitances of the first capacitance sensor 121a and the second capacitance sensor 121b change in reverse. The capacitance detection device 200 includes an oscillation unit 110, a first differentiation unit 120a, a second differentiation unit 120b, a first integration unit 230a, a second integration unit 230b, a differential amplification unit 240, a sample hold unit 150, a control unit 280, and a filter. A unit 190 is provided. The oscillating unit 110 generates an oscillating signal.

第１微分部１２０ａは、第１容量センサ１２１ａを用いて発振信号を微分した第１微分信号を生成する。例えば、第１容量センサ１２１ａと固定抵抗１２２ａを用いて微分回路を形成すればよい。図７の第１微分部１２０ａの場合、発振信号が矩形波であり電圧がＶボルト変化した場合ならば、Ｑａ点での電圧は、 The first differential unit 120a generates a first differential signal obtained by differentiating the oscillation signal using the first capacitance sensor 121a. For example, the differential circuit may be formed using the first capacitance sensor 121a and the fixed resistor 122a. If the first differential unit 120a of FIG. 7, if when the oscillation signal voltage is a rectangular wave is changed V volts, the voltage at the Q a point,

Figure 2019066268
Figure 2019066268

のようになる。ただし、Ｖは発振信号の電圧、Ｃａは第１容量センサ１２１ａの静電容量、Ｒは固定抵抗１２２ａの抵抗、ｔは発振信号の電圧が変化してからの時間である。第２微分部１２０ｂは、第２容量センサ１２１ｂを用いて発振信号を微分した第２微分信号を生成する。例えば、第２容量センサ１２１ｂと固定抵抗１２２ｂを用いて微分回路を形成すればよい。図７の第２微分部１２０ｂの場合、発振信号が矩形波であり電圧がＶボルト変化した場合ならば、Ｑｂ点での電圧は、 become that way. Where V is the voltage of the oscillation signal, C a is the capacitance of the first capacitance sensor 121 a, R is the resistance of the fixed resistor 122 a, and t is the time after the voltage of the oscillation signal changes. The second differential unit 120 b generates a second differential signal obtained by differentiating the oscillation signal using the second capacitance sensor 121 b. For example, the differential circuit may be formed using the second capacitance sensor 121 b and the fixed resistor 122 b. If the second differential unit 120b of FIG. 7, if when the oscillation signal voltage is a rectangular wave is changed V volts, the voltage at the Q b point,

Figure 2019066268
Figure 2019066268

のようになる。ただし、Ｖは発振信号の電圧、Ｃｂは第２容量センサ１２１ｂの静電容量、Ｒは固定抵抗１２２ｂの抵抗、ｔは発振信号の電圧が変化してからの時間である。固定抵抗１２２ａと１２２ｂの抵抗を同じにしているので、静電容量が大きいほど幅の広い信号が出力される。例えば、電圧がＶｅ−１まで減衰する時間は、ｔ＝ＲＣａまたはｔ＝ＲＣｂである。図８の例では、第１容量センサの静電容量Ｃａの方が第２容量センサの静電容量Ｃｂよりも大きい場合を示している。したがって、第１微分信号の方が第２微分信号よりも幅が広い。 become that way. However, V is the voltage of the oscillation signal, the C b capacitance of the second capacitive sensor 121b, R is the resistance of the fixed resistor 122b, t is the time from when the change voltage of the oscillation signal. Since the fixed resistors 122a and 122b have the same resistance, a wider signal is output as the capacitance is larger. For example, the time in which the voltage to decay to Ve -1 is, t = a RC a or t = RC b. The example of FIG. 8 shows the case where the capacitance C a of the first capacitance sensor is larger than the capacitance C b of the second capacitance sensor. Therefore, the first differential signal is wider than the second differential signal.

第１積分部２３０ａは、少なくともあらかじめ定めた位相のときに第１微分信号から第２微分信号を引いた値に対応した信号となる第１積分信号を生成する。なお、あらかじめ定めた位相とは、発振信号の１周期ごとにどこかのタイミングという意味である。また、第１積分部２３０ａは、第１積分信号を積分制御信号にしたがってリセットする。第１積分部２３０ａは、例えば、ダイオード１３１、１３２、抵抗１３３、オペアンプ１３４、コンデンサ１３５、アナログスイッチ１３６を用いて図７のように構成すればよい。図７の積分部２３０ａの場合、ダイオード１３１は、第１微分信号のうち負の電圧となる部分のみをオペアンプ１３４側に伝達する。ダイオード１３２は、第２微分信号のうち正の電圧となる部分のみをオペアンプ１３４側に伝達する。したがって、Ｓａ点での電圧は図８のように、発振信号の半周期分は第１微分信号となり、残りの半周期分は第２微分信号となり、正負は反対となる。 The first integrating unit 230a generates a first integrated signal that is a signal corresponding to a value obtained by subtracting the second differential signal from the first differential signal when the phase is at least a predetermined phase. Here, the predetermined phase means that there is timing somewhere in one cycle of the oscillation signal. Also, the first integration unit 230a resets the first integration signal in accordance with the integration control signal. The first integrating unit 230a may be configured as illustrated in FIG. 7 using, for example, the diodes 131 and 132, the resistor 133, the operational amplifier 134, the capacitor 135, and the analog switch 136. In the case of the integrating unit 230 a of FIG. 7, the diode 131 transmits only the portion of the first differential signal to be the negative voltage to the operational amplifier 134 side. The diode 132 transmits only the portion of the second differential signal to be a positive voltage to the operational amplifier 134 side. Therefore, as in the voltage 8 at the S a point, a half period of the oscillation signal becomes a first differential signal, the remaining half period becomes the second differential signal, sign is the opposite.

第２積分部２３０ｂは、少なくとも第１積分部２３０ａと同じタイミングのときに第２微分信号から第１微分信号を引いた値に対応した信号となる第２積分信号を生成する。また、第２積分部２３０ｂは、第２積分信号を積分制御信号にしたがってリセットする。第２積分部２３０ｂは、例えば、ダイオード２３１、２３２、抵抗１３３、オペアンプ１３４、コンデンサ１３５、アナログスイッチ１３６を用いて図７のように構成すればよい。図７の積分部２３０ｂの場合、ダイオード２３１は、第１微分信号のうち正の電圧となる部分のみをオペアンプ１３４側に伝達する。ダイオード２３２は、第２微分信号のうち負の電圧となる部分のみをオペアンプ１３４側に伝達する。したがって、Ｓｂ点での電圧は図８のように、発振信号の半周期分は第２微分信号となり、残りの半周期分は第１微分信号となり、正負は反対となる。抵抗１３３、オペアンプ１３４、コンデンサ１３５、アナログスイッチ１３６の部分は第１積分部２３０ａと同じである。 The second integrating unit 230 b generates a second integrated signal that is a signal corresponding to a value obtained by subtracting the first differential signal from the second differential signal at the same timing as at least the first integrating unit 230 a. Further, the second integration unit 230 b resets the second integration signal in accordance with the integration control signal. The second integrator 230b may be configured as shown in FIG. 7 using, for example, the diodes 231 and 232, the resistor 133, the operational amplifier 134, the capacitor 135, and the analog switch 136. In the case of the integrating unit 230 b of FIG. 7, the diode 231 transmits only a portion to be a positive voltage in the first differential signal to the operational amplifier 134 side. The diode 232 transmits only the part of the second differential signal which is to be a negative voltage to the operational amplifier 134 side. Therefore, as in the voltage 8 at the S b point, a half period of the oscillation signal becomes a second differential signal, the remaining half period becomes the first differential signal, sign is the opposite. The portion of the resistor 133, the operational amplifier 134, the capacitor 135, and the analog switch 136 is the same as that of the first integrating unit 230a.

ダイオード１３１、１３２とダイオード２３１、２３２の向きが逆になっていることから、第１積分部２３０ａのＳａ点に第１微分信号が伝達されているときは第２積分部２３０ｂのＳｂ点には第２微分信号が伝達され、Ｓａ点に第２微分信号が伝達されているときはＳｂ点には第１微分信号が伝達される。差動増幅部２４０は、第１積分信号と第２積分信号との差に対応した積分信号を生成する。 Since the directions of the diodes 131 and 132 and the diodes 231 and 232 are reversed, when the first differential signal is transmitted to the point S a of the first integrating portion 230 a, the point S b of the second integrating portion 230 b The second differential signal is transmitted to the point S. When the second differential signal is transmitted to the point S a , the first differential signal is transmitted to the point S b . The differential amplification unit 240 generates an integral signal corresponding to the difference between the first integral signal and the second integral signal.

サンプルホールド部１５０は、積分信号の値をサンプルホールド制御信号に従って保持する。なお、保持のタイミングは、第１積分信号が第１微分信号から第２微分信号を引いた値に対応した信号となるタイミング（図８の場合は、積分を開始したときから１周期の整数倍のタイミング、言い換えると、積分を開始したときと同じ位相のとき）とすればよい。   The sample and hold unit 150 holds the value of the integration signal in accordance with the sample and hold control signal. The timing of holding is the timing at which the first integral signal becomes a signal corresponding to the value obtained by subtracting the second differential signal from the first differential signal (in the case of FIG. 8, an integral multiple of one cycle from when integration is started) Timing, that is, when the phase is the same as when integration is started).

制御部２８０は、発振信号の複数周期ごとに積分信号の値を保持するサンプルホールド制御信号を生成し、積分信号の値を保持した後に積分信号をリセットする積分制御信号を生成する。図８の例では発振信号の４周期分を積分しており、サンプルホールド制御信号によって４周期分を積分したところで、サンプルホールド部１５０が積分信号の値を保持している。そして、積分制御信号が第１積分部２３０ａと第２積分部２３０ｂのアナログスイッチ１３６をＯＮ状態にし、コンデンサ１３５の電荷を放電することで、第１積分信号と第２積分信号がリセットされ、積分信号もリセットされる。   The control unit 280 generates a sample-and-hold control signal that holds the value of the integration signal every plural cycles of the oscillation signal, and generates an integration control signal that resets the integration signal after holding the value of the integration signal. In the example of FIG. 8, four cycles of the oscillation signal are integrated, and when four cycles are integrated by the sample and hold control signal, the sample and hold unit 150 holds the value of the integration signal. Then, the integration control signal turns on the analog switch 136 of the first integration unit 230a and the second integration unit 230b to discharge the charge of the capacitor 135, whereby the first integration signal and the second integration signal are reset, and integration is performed. The signal is also reset.

特開２０１１−２１４９２３号公報JP, 2011-214923, A

しかしながら、さらなる検出精度の向上が求められており、特に、静電容量または抵抗の差がほとんどないときの検出精度（感度限界）の向上が求められている。   However, further improvement in detection accuracy is required, and in particular, improvement in detection accuracy (sensitivity limit) when there is almost no difference in capacitance or resistance is required.

本発明では、容量検出装置と抵抗検出装置の感度限界に影響を与えている原因を分析し、その原因に応じた対策を施すことで容量検出装置と抵抗検出装置の高精度化を図ることを目的とする。   In the present invention, it is intended to analyze the cause affecting the sensitivity limit of the capacitance detection device and the resistance detection device and to take measures according to the cause to achieve high accuracy of the capacitance detection device and the resistance detection device. To aim.

本発明の容量検出装置は、物理量の変化によって静電容量の差が変化する第１容量センサと第２容量センサの静電容量の差を検出する。本発明の抵抗検出装置は、物理量の変化によって抵抗の差が変化する第１抵抗センサと第２抵抗センサの抵抗の差を検出する。本発明の容量検出装置と抵抗検出装置は、発振部、第１微分部、第２微分部、差動増幅部、制御部、積分部、サンプルホールド部を備える。第１微分部は、第１容量センサまたは第１抵抗センサを用いて発振信号を微分した第１微分信号を生成する。第２微分部は、第２容量センサまたは第２抵抗センサを用いて発振信号を微分した第２微分信号を生成する。差動増幅部は、第１微分信号の絶対値と第２微分信号の絶対値との差に対応した差動増幅信号を生成する。制御部は、積分制御信号とサンプルホールド制御信号を生成する。積分部は、差動増幅信号を積分した積分信号を生成し、積分信号を積分制御信号にしたがってリセットする。サンプルホールド部は、積分信号の値をサンプルホールド制御信号に従って保持する。サンプルホールド制御信号は、発振信号の複数周期ごとに積分信号の値を保持するようにサンプルホールド部を制御する信号である。積分制御信号は、積分信号の値を保持した後に積分信号をリセットするように積分部を制御する信号である。   The capacitance detection device of the present invention detects the difference in capacitance between the first capacitance sensor and the second capacitance sensor, in which the difference in capacitance changes due to a change in physical quantity. The resistance detection device of the present invention detects the difference in resistance between the first resistance sensor and the second resistance sensor in which the difference in resistance changes with the change in physical quantity. The capacitance detection device and the resistance detection device of the present invention include an oscillation unit, a first differentiation unit, a second differentiation unit, a differential amplification unit, a control unit, an integration unit, and a sample hold unit. The first differential unit generates a first differential signal obtained by differentiating the oscillation signal using the first capacitance sensor or the first resistance sensor. The second differential unit generates a second differential signal obtained by differentiating the oscillation signal using the second capacitance sensor or the second resistance sensor. The differential amplification unit generates a differential amplification signal corresponding to the difference between the absolute value of the first differential signal and the absolute value of the second differential signal. The control unit generates an integration control signal and a sample and hold control signal. The integration unit integrates the differential amplification signal to generate an integration signal, and resets the integration signal according to the integration control signal. The sample and hold unit holds the value of the integration signal in accordance with the sample and hold control signal. The sample and hold control signal is a signal that controls the sample and hold unit so as to hold the value of the integral signal every plural cycles of the oscillation signal. The integral control signal is a signal that controls the integrator to reset the integral signal after holding the value of the integral signal.

本発明の容量検出装置と抵抗検出装置によれば、第１微分信号の絶対値と第２微分信号の絶対値との差に対応した差動増幅信号を積分するので、静電容量または抵抗に差がほとんどないときの差動増幅信号と積分信号を常にほとんど０にできる。つまり、静電容量または抵抗に差がほとんどないときは、差動増幅部と積分部が有するオペアンプの出力を常にほとんど０にできるので、オペアンプ内に使用されているトランジスタのＰＮ接合に流れる電流をほとんど０にできる。よって、ＰＮ接合に流れる電流の１／２乗に比例して生じるショットノイズを低減できる。よって、容量検出装置と抵抗検出装置を高精度化でき、特に、静電容量または抵抗の差がほとんどないときの検出精度（感度限界）を向上できる。   According to the capacitance detection device and the resistance detection device of the present invention, the differential amplification signal corresponding to the difference between the absolute value of the first differential signal and the absolute value of the second differential signal is integrated. The differential amplification signal and the integration signal can be made almost zero at all times when there is almost no difference. In other words, when there is almost no difference in capacitance or resistance, the output of the operational amplifier in the differential amplification unit and the integration unit can be almost always 0, so the current flowing through the PN junction of the transistor used in the operational amplifier It can be almost 0. Therefore, it is possible to reduce shot noise generated in proportion to 1/2 power of the current flowing through the PN junction. Therefore, the capacitance detection device and the resistance detection device can be made highly accurate, and in particular, the detection accuracy (sensitivity limit) can be improved when there is almost no difference in capacitance or resistance.

本発明の容量検出装置と抵抗検出装置の機能構成例を示す図。The figure which shows the function structural example of the capacity | capacitance detection apparatus of this invention, and a resistance detection apparatus. 本発明の容量検出装置の第１微分部、第２微分部、差動増幅部、積分部の具体的な構成例を示す図。FIG. 6 is a view showing a specific configuration example of the first differential unit, the second differential unit, the differential amplification unit, and the integration unit of the capacitance detection device of the present invention. 静電容量または抵抗に差がある場合の各部での信号の様子を示すタイミングチャートを示す図。The figure which shows the timing chart which shows the appearance of the signal in each part in case there is a difference in electrostatic capacity or resistance. 静電容量または抵抗に差がない場合の各部での信号の様子を示すタイミングチャートを示す図。The figure which shows the timing chart which shows the mode of the signal in each part in case there is no difference in an electrostatic capacitance or resistance. 本発明の抵抗検出装置の第１微分部、第２微分部、差動増幅部、積分部の具体的な構成例を示す図。FIG. 6 is a view showing a specific configuration example of a first differential unit, a second differential unit, a differential amplification unit, and an integration unit of the resistance detection device of the present invention. 特許文献１の図８に示された容量検出装置の構成を示す図。FIG. 8 is a view showing a configuration of a capacitance detection device shown in FIG. 8 of Patent Document 1. 特許文献１の図９に示された第１微分部、第２微分部、第１積分部、第２積分部の具体的な構成例を示す図。FIG. 10 is a view showing a specific configuration example of a first differentiation unit, a second differentiation unit, a first integration unit, and a second integration unit shown in FIG. 9 of Patent Document 1. 特許文献１の図１０に示されたタイミングチャートを示す図。The figure which shows the timing chart shown by FIG. 10 of patent document 1. FIG. 特許文献１の容量検出装置２００の第１容量センサ１２１ａと第２容量センサ１２１ｂの静電容量に差がない場合のタイミングチャートを示す図。The figure which shows the timing chart in case there is no difference in the electrostatic capacitance of the 1st capacitive sensor 121a of the capacitive detection apparatus 200 of patent document 1, and the 2nd capacitive sensor 121b.

以下、本発明の実施の形態について、詳細に説明する。なお、同じ機能を有する構成部には同じ番号を付し、重複説明を省略する。   Hereinafter, embodiments of the present invention will be described in detail. Note that components having the same function will be assigned the same reference numerals and redundant description will be omitted.

＜分析＞
まず、特許文献１の容量検出装置２００の感度限界に影響を与えている原因について分析する。図９に容量検出装置２００の第１容量センサ１２１ａと第２容量センサ１２１ｂの静電容量に差がない（同じ）場合のタイミングチャートを示す。静電容量が同じなので、第１積分信号、第２積分信号は１周期ごとに０（ゼロ）になるが、周期の途中では０以外の値となっている。つまり、第１積分部２３０ａと第２積分部２３０ｂが有するオペアンプ１３４が０以外の出力になるので、オペアンプ１３４内のトランジスタのＰＮ接合に電流が流れ、第１積分信号と第２積分信号にショットノイズが含まれることになる。差動増幅部２４０は、第１積分信号と第２積分信号との差に対応した積分信号を生成するので、積分信号内の信号成分は０になるが、ノイズ成分であるショットノイズが残ってしまう。このように、第１容量センサ１２１ａと第２容量センサ１２１ｂの静電容量が同じときの積分信号の信号成分は０だが、第１積分部２３０ａと第２積分部２３０ｂで生じたショットノイズが残るため、ＳＮ比が非常に悪くなり、感度限界に影響を与えていたと考えられる。 <Analysis>
First, the cause of affecting the sensitivity limit of the capacitance detection device 200 of Patent Document 1 is analyzed. FIG. 9 shows a timing chart in the case where the capacitances of the first capacitance sensor 121a and the second capacitance sensor 121b of the capacitance detection device 200 do not differ (the same). Since the capacitances are the same, the first integrated signal and the second integrated signal become 0 (zero) every one cycle, but have values other than 0 in the middle of the cycle. That is, since the operational amplifier 134 included in the first integrating unit 230a and the second integrating unit 230b has an output other than 0, current flows through the PN junction of the transistors in the operational amplifier 134, and a shot is generated for the first integration signal and the second integration signal. It will contain noise. Since the differential amplification unit 240 generates an integration signal corresponding to the difference between the first integration signal and the second integration signal, the signal component in the integration signal becomes 0, but the shot noise which is a noise component remains. I will. As described above, the signal component of the integral signal when the capacitances of the first capacitance sensor 121a and the second capacitance sensor 121b are the same is 0, but the shot noise generated by the first integrator 230a and the second integrator 230b remains As a result, it is considered that the signal-to-noise ratio became very bad and affected the sensitivity limit.

＜構成＞
図１に本発明の容量検出装置の機能構成例を、図２に本発明の容量検出装置の第１微分部、第２微分部、差動増幅部、積分部の具体的な構成例を示す。図３は静電容量に差がある場合の各部での信号の様子を示すタイミングチャート、図４は静電容量に差がない場合の各部での信号の様子を示すタイミングチャートである。なお、ここでは第１容量センサ１２１ａと第２容量センサ１２１ｂの静電容量が逆に変化する例を示すが、必ずしも逆に変化する必要は無い。物理量の変化によって第１容量センサ１２１ａと第２容量センサ１２１ｂの静電容量の差が変化すればよい。容量検出装置５００は、物理量の変化によって静電容量の差が変化する第１容量センサと第２容量センサの静電容量の差を検出する。容量検出装置５００は、発振部１１０、第１微分部１２０ａ、第２微分部１２０ｂ、差動増幅部５４０、積分部５３０、サンプルホールド部１５０、制御部２８０、フィルタ部１９０を備える。なお、発振部１１０、第１微分部１２０ａ、第２微分部１２０ｂ、サンプルホールド部１５０、制御部２８０、フィルタ部１９０は、特許文献１の容量検出装置２００と同じでよいが、本発明の構成の一部なので再度説明する。発振部１１０は、発振信号を生成する。例えば、矩形波を生成すればよいが、発振信号を矩形波に限定する必要は無い。 <Configuration>
FIG. 1 shows a functional configuration example of the capacitance detection device of the present invention, and FIG. 2 shows a specific configuration example of the first differential portion, the second differential portion, the differential amplification portion, and the integration portion of the capacitance detection device of the present invention. . FIG. 3 is a timing chart showing the state of signals at each part when there is a difference in electrostatic capacitance, and FIG. 4 is a timing chart showing the state of signals at each part when there is no difference in electrostatic capacitance. Here, although an example is shown in which the capacitances of the first capacitance sensor 121a and the second capacitance sensor 121b change in reverse, it is not necessary to change in reverse. The difference between the capacitances of the first capacitance sensor 121a and the second capacitance sensor 121b may be changed by the change of the physical quantity. The capacitance detection device 500 detects the difference in capacitance between the first capacitance sensor and the second capacitance sensor in which the difference in capacitance changes due to the change in physical quantity. The capacitance detection device 500 includes an oscillation unit 110, a first differentiation unit 120a, a second differentiation unit 120b, a differential amplification unit 540, an integration unit 530, a sample hold unit 150, a control unit 280, and a filter unit 190. The oscillation unit 110, the first differentiation unit 120a, the second differentiation unit 120b, the sample hold unit 150, the control unit 280, and the filter unit 190 may be the same as the capacitance detection device 200 of Patent Document 1, but the configuration of the present invention It will be explained again because it is a part of The oscillating unit 110 generates an oscillating signal. For example, although a rectangular wave may be generated, it is not necessary to limit the oscillation signal to a rectangular wave.

第１微分部１２０ａは、第１容量センサ１２１ａを用いて発振信号を微分した第１微分信号を生成する。例えば、第１容量センサ１２１ａと固定抵抗１２２ａを用いて微分回路を形成すればよい。図２の第１微分部１２０ａの場合、発振信号が矩形波であり電圧がＶボルト変化した場合ならば、Ｑａ点での電圧は、 The first differential unit 120a generates a first differential signal obtained by differentiating the oscillation signal using the first capacitance sensor 121a. For example, the differential circuit may be formed using the first capacitance sensor 121a and the fixed resistor 122a. If the first differential unit 120a of FIG. 2, if when the oscillation signal voltage is a rectangular wave is changed V volts, the voltage at the Q a point,

Figure 2019066268
Figure 2019066268

のようになる。ただし、Ｖは発振信号の電圧、Ｃａは第１容量センサ１２１ａの静電容量、Ｒは固定抵抗１２２ａの抵抗、ｔは発振信号の電圧が変化してからの時間である。 become that way. Where V is the voltage of the oscillation signal, C a is the capacitance of the first capacitance sensor 121 a, R is the resistance of the fixed resistor 122 a, and t is the time after the voltage of the oscillation signal changes.

第２微分部１２０ｂは、第２容量センサ１２１ｂを用いて発振信号を微分した第２微分信号を生成する。例えば、第２容量センサ１２１ｂと固定抵抗１２２ｂを用いて微分回路を形成すればよい。図２の第２微分部１２０ｂの場合、発振信号が矩形波であり電圧がＶボルト変化した場合ならば、Ｑｂ点での電圧は、 The second differential unit 120 b generates a second differential signal obtained by differentiating the oscillation signal using the second capacitance sensor 121 b. For example, the differential circuit may be formed using the second capacitance sensor 121 b and the fixed resistor 122 b. If the second differential unit 120b of FIG. 2, if when the oscillation signal voltage is a rectangular wave is changed V volts, the voltage at the Q b point,

Figure 2019066268
Figure 2019066268

のようになる。ただし、Ｖは発振信号の電圧、Ｃｂは第２容量センサ１２１ｂの静電容量、Ｒは固定抵抗１２２ｂの抵抗、ｔは発振信号の電圧が変化してからの時間である。固定抵抗１２２ａと１２２ｂの抵抗を同じにしているので、静電容量が大きいほど幅の広い信号が出力される。例えば、電圧がＶｅ−１まで減衰する時間は、ｔ＝ＲＣａまたはｔ＝ＲＣｂである。図３の例では、第１容量センサの静電容量Ｃａの方が第２容量センサの静電容量Ｃｂよりも大きい場合を示している。したがって、第１微分信号の方が第２微分信号よりも幅が広い。 become that way. However, V is the voltage of the oscillation signal, the C b capacitance of the second capacitive sensor 121b, R is the resistance of the fixed resistor 122b, t is the time from when the change voltage of the oscillation signal. Since the fixed resistors 122a and 122b have the same resistance, a wider signal is output as the capacitance is larger. For example, the time in which the voltage to decay to Ve -1 is, t = a RC a or t = RC b. The example of FIG. 3 shows the case where the capacitance C a of the first capacitance sensor is larger than the capacitance C b of the second capacitance sensor. Therefore, the first differential signal is wider than the second differential signal.

差動増幅部５４０は、第１微分信号の絶対値と第２微分信号の絶対値との差に対応した差動増幅信号を生成する。差動増幅部５４０は、例えば、ダイオード５４１、５４２、６４１、６４２、抵抗５４３、５４４、６４３、６４４、オペアンプ５４５を用いて図２のように構成すればよい。図２の差動増幅部５４０の場合、ダイオード５４１、５４２、６４１、６４２は整流回路の役目を果たしている。具体的には、第１微分信号と第２微分信号が正のときは、Ｓａ点が第２微分信号の電圧、Ｓｂ点が第１微分信号の電圧となり、オペアンプ５４５からの出力は、（第１微分信号−第２微分信号）に対応した信号となる。一方、第１微分信号と第２微分信号が負のときは、Ｓａ点が第１微分信号の電圧、Ｓｂ点が第２微分信号の電圧となり、オペアンプ５４５からの出力は、（−第１微分信号＋第２微分信号）に対応した電圧となる。つまり、差動増幅部５４０は、（｜第１微分信号｜−｜第２微分信号｜）に対応した差動増幅信号を生成する。 The differential amplification unit 540 generates a differential amplification signal corresponding to the difference between the absolute value of the first differential signal and the absolute value of the second differential signal. The differential amplification unit 540 may be configured as shown in FIG. 2 using, for example, diodes 541, 542, 641, 642, resistors 543, 544, 643, 644 and an operational amplifier 545. In the case of the differential amplification unit 540 of FIG. 2, the diodes 541, 542, 641, 642 play a role of rectifier circuits. Specifically, when the first differential signal and the second differential signal are positive, the point S a is the voltage of the second differential signal, the point S b is the voltage of the first differential signal, and the output from the operational amplifier 545 is It becomes a signal corresponding to (first differential signal−second differential signal). On the other hand, when the first differential signal and the second differential signal are negative, the point S a is the voltage of the first differential signal, the point S b is the voltage of the second differential signal, and the output from the operational amplifier 545 is It becomes a voltage corresponding to 1 differential signal + second differential signal). That is, the differential amplification unit 540 generates a differential amplification signal corresponding to (| first differential signal | − | second differential signal |).

積分部５３０は、差動増幅信号を積分した積分信号を生成する。また、積分部５３０は、積分信号を積分制御信号にしたがってリセットする。積分部５３０は、例えば、抵抗１３３、オペアンプ１３４、コンデンサ１３５、アナログスイッチ１３６を用いて図２のように構成すればよい。積分部５３０が電圧を積分するときは、アナログスイッチ１３６はＯＦＦの状態であり、コンデンサ１３５に電荷をためることによって、オペアンプ１３４の出力側に差動増幅信号の積分値が出力される。図２の回路の場合にはオペアンプ１３４の出力電圧はオペアンプ５４５の出力電圧と正負が反対になるので、図３のように正の差動増幅信号が入力されるときは負の積分信号が出力される。   Integration unit 530 generates an integrated signal obtained by integrating the differentially amplified signal. Further, integration unit 530 resets the integration signal in accordance with the integration control signal. The integrating unit 530 may be configured as shown in FIG. 2 using, for example, the resistor 133, the operational amplifier 134, the capacitor 135, and the analog switch 136. When the integration unit 530 integrates a voltage, the analog switch 136 is in the OFF state, and the charge of the capacitor 135 is stored, whereby the integrated value of the differential amplification signal is output to the output side of the operational amplifier 134. In the case of the circuit of FIG. 2, since the output voltage of the operational amplifier 134 is opposite in polarity to the output voltage of the operational amplifier 545, when a positive differential amplification signal is input as shown in FIG. Be done.

サンプルホールド部１５０は、積分信号の値をサンプルホールド制御信号に従って保持する。なお、保持のタイミングは、積分を開始したときから１周期の整数倍のタイミングとすればよい。フィルタ部１９０は、スイッチングノイズなどを除去する。なお、図１ではフィルタ部１９０も具備しているが、フィルタ部１９０は必要に応じて具備すればよい。   The sample and hold unit 150 holds the value of the integration signal in accordance with the sample and hold control signal. Note that the holding timing may be a timing that is an integral multiple of one cycle from when integration is started. The filter unit 190 removes switching noise and the like. Although the filter unit 190 is also provided in FIG. 1, the filter unit 190 may be provided as necessary.

制御部２８０は、サンプルホールド制御信号と積分制御信号を生成する。サンプルホールド制御信号は、発振信号の複数周期ごとに積分信号の値を保持するようにサンプルホールド部１５０を制御する信号である。積分制御信号は、積分信号の値を保持した後に積分信号をリセットするように積分部５３０を制御する信号である。図３，４の例では発振信号の４周期分を積分しており、サンプルホールド制御信号によって４周期分を積分したところで、サンプルホールド部１５０が積分信号の値を保持している。そして、積分制御信号が積分部５３０のアナログスイッチ１３６をＯＮ状態にし、コンデンサ１３５の電荷を放電することで、積分信号がリセットされる。なお、この例では４周期分ごとに積分信号の値を保持するサンプルホールド制御信号を生成したが、他の複数周期でもよい。複数周期分を積分することにより積分信号の値が大きくなるので、積分信号に対するアナログスイッチ１３６で生じるチャージインジェクションの変動の割合を小さくできる。したがって、容量検出装置５００は、特許文献１の容量検出装置２００と同じようにアナログスイッチ１３６で生じるチャージインジェクションの変動によるノイズを低減できる。   The controller 280 generates a sample and hold control signal and an integration control signal. The sample and hold control signal is a signal that controls the sample and hold unit 150 so as to hold the value of the integration signal for each of a plurality of cycles of the oscillation signal. The integral control signal is a signal that controls the integrator 530 so as to reset the integral signal after holding the value of the integral signal. In the examples of FIGS. 3 and 4, four cycles of the oscillation signal are integrated, and when four cycles are integrated by the sample and hold control signal, the sample and hold unit 150 holds the value of the integration signal. Then, the integration control signal turns on the analog switch 136 of the integration unit 530 to discharge the charge of the capacitor 135, whereby the integration signal is reset. In this example, the sample hold control signal for holding the value of the integration signal is generated every four cycles, but other plural cycles may be used. By integrating a plurality of periods, the value of the integration signal is increased, so that the rate of fluctuation of charge injection generated in the analog switch 136 with respect to the integration signal can be reduced. Therefore, the capacitance detection device 500 can reduce the noise due to the fluctuation of the charge injection generated in the analog switch 136 in the same manner as the capacitance detection device 200 of Patent Document 1.

さらに、容量検出装置５００は、第１微分信号の絶対値と第２微分信号の絶対値との差に対応した差動増幅信号を積分するので、静電容量に差がほとんどないときの差動増幅信号と積分信号を常にほとんど０にできる。つまり、静電容量に差がほとんどないときは、差動増幅部５４０と積分部５３０が有するオペアンプ５４５、１３４の出力を常にほとんど０にできるので、オペアンプ内に使用されているトランジスタのＰＮ接合に流れる電流をほとんど０にできる。よって、ＰＮ接合に流れる電流の１／２乗に比例して生じるショットノイズを低減できる。よって、容量検出装置５００は特許文献１の容量検出装置よりも精度を向上でき、特に、静電容量の差がほとんどないときの検出精度（感度限界）を向上できる。   Furthermore, since the capacitance detection device 500 integrates the differential amplification signal corresponding to the difference between the absolute value of the first differential signal and the absolute value of the second differential signal, the differential when there is almost no difference in electrostatic capacitance The amplification signal and the integration signal can always be almost zero. That is, when there is almost no difference in electrostatic capacity, the outputs of the operational amplifiers 545 and 134 included in the differential amplification unit 540 and the integration unit 530 can be almost always 0, so the PN junction of the transistors used in the operational amplifiers The current flowing can be almost zero. Therefore, it is possible to reduce shot noise generated in proportion to 1/2 power of the current flowing through the PN junction. Therefore, the capacitance detection device 500 can improve the accuracy more than the capacitance detection device of Patent Document 1, and in particular, can improve the detection accuracy (sensitivity limit) when there is almost no difference in electrostatic capacitance.

［変形例］
実施例１では、物理量の変化によって静電容量の差が変化する場合を説明した。しかし、図２の第１微分部１２０ａ、第２微分部１２０ｂの抵抗の差を変化させても、同じように物理量の変化を検出できる。そこで、本変形例では、物理量の変化によって抵抗の差が変化する第１抵抗センサと第２抵抗センサの抵抗の差を検出する抵抗検出装置について説明する。なお、本変形例では第１抵抗センサと第２抵抗センサの抵抗は逆に変化する例を示す。本変形例の抵抗検出装置の機能構成を図１に、抵抗に差がある場合のタイミングチャートを図３に、抵抗に差がない場合のタイミングチャートを図４に示す。また、第１微分部、第２微分部、積分部の具体的な構成例を図５に示す。抵抗検出装置６００も、発振部１１０、第１微分部１２０ａ、第２微分部１２０ｂ、差動増幅部５４０、積分部５３０、サンプルホールド部１５０、制御部２８０、フィルタ部１９０を備える。実施例１の容量検出装置５００との違いは、第１微分部３２０ａと第２微分部３２０ｂだけであり、その他の構成は容量検出装置５００と同じである。 [Modification]
In the first embodiment, the case where the difference in capacitance changes due to the change in physical quantity has been described. However, even if the difference in resistance between the first differential unit 120a and the second differential unit 120b in FIG. 2 is changed, the change in physical quantity can be similarly detected. Therefore, in the present modification, a resistance detection device that detects the difference in resistance between the first resistance sensor and the second resistance sensor in which the difference in resistance changes due to a change in physical quantity will be described. In this modification, the resistances of the first resistance sensor and the second resistance sensor are inversely changed. FIG. 1 shows a functional configuration of the resistance detection device of this modification, FIG. 3 shows a timing chart when there is a difference in resistance, and FIG. 4 shows a timing chart when there is no difference in resistance. Further, a specific configuration example of the first differentiation unit, the second differentiation unit, and the integration unit is shown in FIG. The resistance detection device 600 also includes an oscillation unit 110, a first differentiation unit 120a, a second differentiation unit 120b, a differential amplification unit 540, an integration unit 530, a sample hold unit 150, a control unit 280, and a filter unit 190. The difference from the capacitance detection device 500 of the first embodiment is only in the first differential unit 320a and the second differential portion 320b, and the other configuration is the same as that of the capacitance detection device 500.

第１微分部３２０ａが、第１抵抗センサ３２２ａを用いて発振信号を微分した第１微分信号を生成する。例えば、第１抵抗センサ３２２ａと静電容量が固定されたコンデンサ３２１ａを用いて微分回路を形成すればよい。図５の第１微分部３２０ａの場合、発振信号が矩形波であり電圧がＶボルト変化した場合ならば、Ｑａ点での電圧は、 The first differential unit 320a generates a first differential signal obtained by differentiating the oscillation signal using the first resistance sensor 322a. For example, the differential circuit may be formed using the first resistance sensor 322a and the capacitor 321a having a fixed capacitance. If the first differential unit 320a of FIG. 5, if when the oscillation signal voltage is a rectangular wave is changed V volts, the voltage at the Q a point,

Figure 2019066268
Figure 2019066268

のようになる。ただし、Ｖは発振信号の電圧、Ｃはコンデンサ３２１ａの静電容量、Ｒａは第１抵抗センサ３２２ａの抵抗、ｔは発振信号の電圧が変化してからの時間である。 become that way. Where V is the voltage of the oscillation signal, C is the capacitance of the capacitor 321a, Ra is the resistance of the first resistance sensor 322a, and t is the time after the voltage of the oscillation signal changes.

第２微分部３２０ｂが、第２抵抗センサ３２２ｂを用いて発振信号を微分した第２微分信号を生成する。例えば、第２抵抗センサ３２２ｂと静電容量が固定されたコンデンサ３２１ｂを用いて微分回路を形成すればよい。図５の第２微分部３２０ｂの場合、発振信号が矩形波であり電圧がＶボルト変化した場合ならば、Ｑｂ点での電圧は、 The second differential unit 320 b generates a second differential signal obtained by differentiating the oscillation signal using the second resistance sensor 322 b. For example, the differentiating circuit may be formed using the second resistance sensor 322 b and the capacitor 321 b having a fixed capacitance. If the second differential unit 320b of FIG. 5, if when the oscillation signal voltage is a rectangular wave is changed V volts, the voltage at the Q b point,

Figure 2019066268
Figure 2019066268

のようになる。ただし、Ｖは発振信号の電圧、Ｃはコンデンサ３２１ｂの静電容量、Ｒｂは第２抵抗センサ３２２ｂの抵抗、ｔは発振信号の電圧が変化してからの時間である。コンデンサ３２１ａと３２１ｂの静電容量を同じにしているので、抵抗が大きいほど幅の広い信号が出力される。例えば、電圧がＶｅ−１まで減衰する時間は、ｔ＝ＲａＣまたはｔ＝ＲｂＣである。図３の例では、第１抵抗センサの抵抗Ｒａの方が第２抵抗センサの抵抗Ｒｂよりも大きい場合に相当する。したがって、第１微分信号の方が第２微分信号よりも幅が広い。 become that way. Here, V is the voltage of the oscillation signal, C is the capacitance of the capacitor 321 b , R b is the resistance of the second resistance sensor 322 b , and t is the time after the voltage of the oscillation signal changes. Since the capacitances of the capacitors 321a and 321b are the same, a wider signal is output as the resistance is larger. For example, the time in which the voltage to decay to Ve -1 is t = R a C or t = R b C. The example of FIG. 3 corresponds to the case where the resistance R a of the first resistance sensor is larger than the resistance R b of the second resistance sensor. Therefore, the first differential signal is wider than the second differential signal.

このように本変形例の抵抗検出装置と実施例１の容量検出装置の相違点は、発振信号を微分する微分回路の時定数を変化させるのが、抵抗か静電容量かという点だけである。したがって、実施例１と同じように抵抗検出装置６００も特許文献１の抵抗検出装置よりも精度を向上でき、特に、抵抗の差がほとんどないときの検出精度（感度限界）を向上できる。   As described above, the difference between the resistance detection device of this modification and the capacitance detection device of the first embodiment is that the time constant of the differentiation circuit that differentiates the oscillation signal is only resistance or capacitance. . Therefore, as in the first embodiment, the resistance detection device 600 can improve the accuracy more than the resistance detection device of Patent Document 1, and in particular, can improve the detection accuracy (sensitivity limit) when there is almost no difference in resistance.

１１０ 発振部 １２０ａ，３２０ａ 第１微分部
１２０ｂ，３２０ｂ 第２微分部 １２１ａ 第１容量センサ
１２１ｂ 第２容量センサ １２２ａ，１２２ｂ 固定抵抗
１３１，１３２，２３１，２３２，５４１，５４２，６４１，６４２ ダイオード
１３３，５４３，５４４，６４３，６４４ 抵抗
１３４，５４５ オペアンプ １３５ コンデンサ
１３６ アナログスイッチ １５０ サンプルホールド部
１９０ フィルタ部 ２００，５００ 容量検出装置
２３０ａ 第１積分部 ２３０ｂ 第２積分部
２４０ 差動増幅部 ２８０ 制御部
３２１ａ，３２１ｂ コンデンサ ３２２ａ 第１抵抗センサ
３２２ｂ 第２抵抗センサ ５３０ 積分部
５４０ 差動増幅部 ６００ 抵抗検出装置 Reference Signs List 110 oscillation unit 120a, 320a first differentiation unit 120b, 320b second differentiation unit 121a first capacitance sensor 121b second capacitance sensor 122a, 122b fixed resistance 131, 132, 231, 232, 541, 542, 641, 642 diode 133, 543, 544, 643, 644 resistance 134, 545 op amp 135 capacitor 136 analog switch 150 sample hold portion 190 filter portion 200, 500 capacitance detection device 230a first integration portion 230b second integration portion 240 differential amplification portion 280 control portion 321a, 321b capacitor 322a first resistance sensor 322b second resistance sensor 530 integration unit 540 differential amplification unit 600 resistance detection device

Claims (2)

物理量の変化によって静電容量の差が変化する第１容量センサと第２容量センサの静電容量の差を検出する容量検出装置であって、
発振信号を生成する発振部と、
前記第１容量センサを用いて前記発振信号を微分した第１微分信号を生成する第１微分部と、
前記第２容量センサを用いて前記発振信号を微分した第２微分信号を生成する第２微分部と、
前記第１微分信号の絶対値と前記第２微分信号の絶対値との差に対応した差動増幅信号を生成する差動増幅部と、
積分制御信号とサンプルホールド制御信号を生成する制御部と
前記差動増幅信号を積分した積分信号を生成し、前記積分信号を前記積分制御信号にしたがってリセットする積分部と、
前記積分信号の値を前記サンプルホールド制御信号に従って保持するサンプルホールド部と、
を備え、
前記サンプルホールド制御信号は、前記発振信号の複数周期ごとに前記積分信号の値を保持するように前記サンプルホールド部を制御する信号であり、前記積分制御信号は、積分信号の値を保持した後に前記積分信号をリセットするように前記積分部を制御する信号である
ことを特徴とする容量検出装置。 A capacitance detection device for detecting a difference between capacitances of a first capacitance sensor and a second capacitance sensor in which a difference in capacitance changes due to a change in physical quantity,
An oscillation unit that generates an oscillation signal;
A first differential unit that generates a first differential signal obtained by differentiating the oscillation signal using the first capacitive sensor;
A second differential unit that generates a second differential signal obtained by differentiating the oscillation signal using the second capacitive sensor;
A differential amplification unit that generates a differential amplification signal corresponding to the difference between the absolute value of the first differential signal and the absolute value of the second differential signal;
A control unit that generates an integration control signal and a sample-and-hold control signal; an integration unit that generates an integration signal by integrating the differential amplification signal; and resets the integration signal according to the integration control signal;
A sample and hold unit that holds the value of the integrated signal according to the sample and hold control signal;
Equipped with
The sample-and-hold control signal is a signal for controlling the sample-and-hold unit to hold the value of the integral signal every plural cycles of the oscillation signal, and the integral control signal holds the value of the integral signal. It is a signal which controls the said integration part so that the said integration signal may be reset. The capacitance detection apparatus characterized by the above-mentioned. 物理量の変化によって抵抗の差が変化する第１抵抗センサと第２抵抗センサの抵抗の差を検出する抵抗検出装置であって、
発振信号を生成する発振部と、
前記第１抵抗センサを用いて前記発振信号を微分した第１微分信号を生成する第１微分部と、
前記第２抵抗センサを用いて前記発振信号を微分した第２微分信号を生成する第２微分部と、
前記第１微分信号の絶対値と前記第２微分信号の絶対値との差に対応した差動増幅信号を生成する差動増幅部と、
積分制御信号とサンプルホールド制御信号を生成する制御部と
前記差動増幅信号を積分した積分信号を生成し、前記積分信号を前記積分制御信号にしたがってリセットする積分部と、
前記積分信号の値を前記サンプルホールド制御信号に従って保持するサンプルホールド部と、
を備え、
前記サンプルホールド制御信号は、前記発振信号の複数周期ごとに前記積分信号の値を保持するように前記サンプルホールド部を制御する信号であり、前記積分制御信号は、積分信号の値を保持した後に前記積分信号をリセットするように前記積分部を制御する信号である
ことを特徴とする抵抗検出装置。 A resistance detection device for detecting a difference between resistances of a first resistance sensor and a second resistance sensor in which a difference in resistance changes due to a change in physical quantity,
An oscillation unit that generates an oscillation signal;
A first differential unit that generates a first differential signal obtained by differentiating the oscillation signal using the first resistance sensor;
A second differential unit that generates a second differential signal obtained by differentiating the oscillation signal using the second resistance sensor;
A differential amplification unit that generates a differential amplification signal corresponding to the difference between the absolute value of the first differential signal and the absolute value of the second differential signal;
A control unit that generates an integration control signal and a sample-and-hold control signal; an integration unit that generates an integration signal by integrating the differential amplification signal; and resets the integration signal according to the integration control signal;
A sample and hold unit that holds the value of the integrated signal according to the sample and hold control signal;
Equipped with
The sample-and-hold control signal is a signal for controlling the sample-and-hold unit to hold the value of the integral signal every plural cycles of the oscillation signal, and the integral control signal holds the value of the integral signal. It is a signal which controls the said integration part so that the said integration signal may be reset. The resistance detection apparatus characterized by the above-mentioned.
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH09243397A (en) * 1996-03-11 1997-09-19 Yamatake Honeywell Co Ltd Instrumental quantity error detecting device
US5777482A (en) * 1995-07-04 1998-07-07 Siemens Aktiengesellschaft Circuit arrangement and method for measuring a difference in capacitance between a first capacitance C1 and a second capacitance C2
JP2011214923A (en) * 2010-03-31 2011-10-27 Japan Aviation Electronics Industry Ltd Capacity detecting device and resistance detecting device
JP2012181143A (en) * 2011-03-02 2012-09-20 Japan Aviation Electronics Industry Ltd Capacity detection device and resistance detection device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5777482A (en) * 1995-07-04 1998-07-07 Siemens Aktiengesellschaft Circuit arrangement and method for measuring a difference in capacitance between a first capacitance C1 and a second capacitance C2
JPH09243397A (en) * 1996-03-11 1997-09-19 Yamatake Honeywell Co Ltd Instrumental quantity error detecting device
JP2011214923A (en) * 2010-03-31 2011-10-27 Japan Aviation Electronics Industry Ltd Capacity detecting device and resistance detecting device
JP2012181143A (en) * 2011-03-02 2012-09-20 Japan Aviation Electronics Industry Ltd Capacity detection device and resistance detection device

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