JP2019060985A - Integrated circuit device and fluorescent display tube - Google Patents

Abstract

To maintain the temperature of a filament constant.SOLUTION: An integrated circuit device pertaining to the present invention is designed to drive a filament in a fluorescent display tube having a filament that emits electrons. The integrated circuit device comprises: an output switch for controlling the output of a drive voltage to the filament; a detection unit for detecting the current value of a drive current flowing in the filament or the voltage value of a drive voltage applied to the filament; and a control unit for exercising feedback control to control the switching operation of the output switch on the basis of the current value or voltage value detected by the detection unit so that the time product of square value of either the current value or the voltage value becomes a fixed value.SELECTED DRAWING: Figure 5

Description

  The present invention relates to an integrated circuit device for driving the filament in a fluorescent display tube having a filament emitting electrons, and the fluorescent display tube.

A VFD (Vacuum Fluorescent Display: fluorescent display tube) is widely known as a display device for displaying various information.
As well known, in a VFD, a filament (electron emitting cathode) emitting electrons and an anode having a phosphor formed on an anode electrode controlling transfer of electrons are disposed in a sealed container. By applying a voltage to the filament and heating it, thermal electrons are emitted, and the thermal electrons collide with the phosphor on the anode to light the anode. The anodes are arranged in a predetermined pattern, and by selectively applying a drive voltage (DC voltage) to the anodes to be lit, only the phosphors of the anodes are emitted by the thermal electrons emitted from the filament. Excitation emission is performed, and the required information display is realized.
In VFD, a grid may be disposed between the filament and the anode to accelerate the thermal electrons emitted from the filament.

  As the VFD, there is one that employs a pulse drive method as disclosed in, for example, Patent Document 1 below, for driving a filament. In the pulse drive method, a pulse-like drive voltage is generated and applied to the filament, and control is performed by pulse width adjustment (ON duty adjustment) so that the effective value of the drive voltage or drive current becomes a constant value.

Japanese Patent Application Laid-Open No. 2002-108263 Unexamined-Japanese-Patent No. 11-339699

  Here, as disclosed in Patent Document 2 above, in the VFD, it is required to appropriately control the temperature of the filament from the viewpoint of preventing the electron emission capability of the filament and the reduction of the life of the filament.

  Therefore, it is an object of the present invention to keep the temperature of the filament constant.

  An integrated circuit device according to the present invention is an integrated circuit device for driving the filament in a fluorescent display tube having a filament that emits electrons, the output switch performing output control of a drive voltage to the filament, and the filament A detection unit that detects a current value of the flowing drive current or a voltage value of the drive voltage applied to the filament, and the current value or the voltage value based on the current value or the voltage value detected by the detection unit And a control unit that performs feedback control to control the switching operation of the output switch so that the time product of any square value becomes a constant value.

  Thus, control is performed such that the driving power of the filament is constant.

  In the integrated circuit device according to the present invention described above, the output switch includes a plurality of output switches to which different filaments are connected, and the detection unit detects the current of the filaments connected for each of the output switches. A value or the voltage value is individually detected, and the control unit is configured to perform the feedback control for each of the output switches based on the current value or the voltage value detected by the detection unit individually. It is possible.

  As a result, even when the contact resistance between the output switch and the filament varies, control is performed so that the temperature of each filament becomes constant.

  In the integrated circuit device according to the present invention described above, the control unit has a feedback circuit that controls the ON pulse width of the output switch as a feedback circuit that performs the feedback control, and a plurality of single feedback circuits. The feedback control for the output switch may be performed by time division.

  This makes it possible to eliminate the need for providing a feedback circuit for each output switch in order to suppress unevenness in luminance due to variations in contact resistance.

  In the integrated circuit device according to the present invention described above, the control unit has a feedback circuit that controls the ON pulse width of the output switch as a feedback circuit that performs the feedback control, and the feedback circuit is the square It is possible to charge the capacitor with a current corresponding to a value, and to turn off the output switch in response to the charging potential of the capacitor exceeding a predetermined potential.

  This eliminates the need to provide a triangular wave generation circuit for PWM (Pulse Width Modulation) control of the output switch.

  In the integrated circuit device according to the present invention described above, the feedback circuit charges a capacitor with a current corresponding to the square value, and turns off the output switch in response to the charging potential of the capacitor exceeding a predetermined potential. It is possible to discharge the capacitor when the output switch to be controlled is switched.

  As a result, it is possible to prevent feedback control of the next output switch from being performed when charge remains in the capacitor.

  Further, a fluorescent display tube according to the present invention includes a filament for emitting electrons, and an integrated circuit unit for driving the filament, wherein the integrated circuit unit is an output switch for controlling output of a drive voltage to the filament. A detection unit that detects the current value of the drive current flowing through the filament or the voltage value of the drive voltage applied to the filament; and the current value or the current value based on the current value or the voltage value detected by the detection unit. And a control unit that performs feedback control to control the switching operation of the output switch such that a time product of any square value of voltage values becomes a constant value.

  The same effect as the integrated circuit device according to the present invention described above can be obtained by the fluorescent display tube according to the present invention.

  According to the present invention, the temperature of the filament can be kept constant.

It is a figure showing circuit composition of a display in an embodiment. It is explanatory drawing about the structure of a fluorescent display tube. It is a figure for demonstrating the internal circuit structure of the integrated circuit device of 1st embodiment. FIG. 7 is a diagram showing an example of waveforms of control signals in the case of performing divisional driving. It is explanatory drawing about the pulse width control part with which the integrated circuit device of embodiment is provided. It is a wave form diagram for explaining the operation of a pulse width control part. It is a figure for demonstrating the internal circuit structure of the integrated circuit device of 1st embodiment including the structure for performing feedback control by time division. It is a figure showing an example of a maximum ON period of a drive voltage in a case of using a single pulse width control unit. It is the circuit diagram which showed the internal structure of the integrated circuit device of 2nd embodiment. It is the figure which showed the example of the maximum ON period of the drive voltage in, when the filament drive method of 2nd embodiment is applied. FIG. 6 is a circuit diagram showing a configuration example of an integrated circuit device in which a plurality of drive voltage output terminals are provided for each drive channel. It is the figure which illustrated the difference of the drive current which arises due to the difference in the number of connection of a filament. It is the circuit diagram which showed the internal structure of the integrated circuit device of 3rd embodiment. It is explanatory drawing of the effect | action by the integrated circuit device of 3rd embodiment. It is a figure showing an example of connection of a plurality of drive voltage output terminals and a plurality of filaments in a drive channel in which the number of use of the drive voltage output terminals is plural.

Hereinafter, embodiments according to the present invention will be described.
The description will be made in the following order.

<1. First embodiment>
[1-1. Configuration of Display Device]
[1-2. Filament drive of the first embodiment]
[1-3. Summary of the first embodiment]
<2. Second embodiment>
[2-1. Integrated Circuit Device of Second Embodiment]
[2-2. Summary of Second Embodiment]
<3. Third embodiment>
3-1. Integrated Circuit Device and Fluorescent Display Tube of Third Embodiment]
[3-2. Summary of Third Embodiment]
<4. Modified example>

<1. First embodiment>
[1-1. Configuration of Display Device]

FIG. 1 is a view showing a circuit configuration of a display device 100 provided with a fluorescent display tube 1 according to a first embodiment of the present invention. In the following description, the fluorescent display tube may be referred to as "VFD" (Vacuum Fluorescent Display).

The display device 100 includes a fluorescent display tube 1, a controller 101, a power supply circuit 102, and a zener diode ZD.
The controller 101 includes, for example, a microcomputer including a central processing unit (CPU), a read only memory (ROM), and a random access memory (RAM), and controls the display operation of the fluorescent display tube 1.

  The fluorescent display tube 1 is a terminal for supplying power to a first IC 2 and a second IC 3 each configured as an IC (Integrated Circuit) chip, a display unit 4 for displaying information by light emission, and a filament Fi described later. The filament terminals f1a, f2a,..., Fna and the filament terminals f1b, f2b,.

Here, the structure of the fluorescent display tube 1 will be described with reference to FIG. FIG. 2A is a schematic perspective view of a part of the fluorescent display tube 1 in a see-through manner, and FIG. 2B is a schematic cross-sectional view of the fluorescent display tube 1 cut along a cross section AA 'of FIG. 2A.
The fluorescent display tube 1 includes a sealed container 1c formed of a display tube substrate 1a and a cover member 1b covering the surface of the display tube substrate 1a, and in the sealed container 1c, a filament (direct heat type cathode) Fi and an anode An A display unit 4 having a grid Gr is formed. Here, the inside of the closed container 1c is in a vacuum state.

  In the display unit 4, a plurality of filaments Fi emitting electrons are provided (represented by black circles in FIG. 2B). Here, four filaments Fi are provided, but the number of filaments Fi may be plural. Hereinafter, the number of filaments Fi included in the fluorescent display tube 1 will be described as "n".

  The anode An is formed by forming a phosphor on an anode electrode that controls electrons emitted from the filament Fi. The anodes An are formed, for example, by pattern printing on the display tube substrate 1a, and are arrayed in a predetermined pattern according to the information to be displayed. The portion in which the plurality of anodes An are arranged in a predetermined pattern as described above is hereinafter referred to as "anode pattern portion 4a".

For example, in the case of information such as characters and numbers, the fluorescent display tube 1 of this example can display information by dividing the information into predetermined units, such as one digit or one character. In the example of FIG. 2, a display area of the predetermined unit is formed by seven segments of anodes An (seven independent anodes An) which allow display of a single numeral, alphabet, or the like. Such a display area for a predetermined unit is hereinafter referred to as a "display block". In the anode pattern portion 4a, a plurality of such display blocks are arranged on the display tube substrate 1a.
The arrangement pattern of the anodes An for seven segments as shown in FIG. 2A is only an example of the display block, and the arrangement pattern of the anodes An constituting the display block is not limited to this pattern.

  The grid Gr is a mesh-like electrode that accelerates electrons emitted from the filament Fi to the anode An, and is formed for each display block.

In the fluorescent display tube 1, the cover member 1b is made of, for example, glass, and at least a portion facing the display tube substrate 1a is transparent. That is, it is possible to visually observe the display information accompanying the lighting of the anode An through the transparent portion from the outside.
The surface on which information is displayed in the fluorescent display tube 1 (that is, the surface on the opposite side to the surface facing the anode An in the transparent portion) is referred to as “surface S1”. Further, the surface of the fluorescent display tube 1 opposite to the surface S1 is referred to as "back surface S2".

  In the fluorescent display tube 1, when displaying information on a desired display block among the display blocks in the anode pattern portion 4a, a grid provided corresponding to the display block in a state where a drive voltage is applied to the filament Fi A DC voltage is applied to Gr and a predetermined anode An in the display block. As a result, only the phosphor at a predetermined anode An in the display block is excited by the thermal electrons emitted from the filament Fi, and the display of information is realized.

The explanation is returned to FIG.
The first IC 2 incorporates a drive circuit for driving the anode An and the grid Gr of the display unit 4 shown in FIG.
In addition, the second IC 3 incorporates a drive circuit for driving the filament Fi.

  Although not shown in FIG. 2, in the fluorescent display tube 1 of this example, the first IC 2 and the second IC 3 are mounted on the display tube substrate 1 a and positioned in the enclosed space together with the display unit 4. That is, the fluorescent display tube 1 is configured as a so-called CIG (Chip In Glass) -VFD.

The filament Fi is connected to the filament terminals f1a to fna and the filament terminals f1b to fnb. Specifically, in this example, one end of each of n filaments Fi is connected to one corresponding one of filament terminals f1a, f2a,..., Fna, and the other end is filament terminals f1b, f2b, .., Fnb are connected to corresponding ones.
The filament terminals f1a to fna are connected to corresponding ones of drive voltage output terminals Tf1 to Tfn provided in the second IC 3, respectively. The filament terminals f1b to fnb are connected to the cathode of a Zener diode ZD whose anode is grounded.

The controller 101 outputs a signal for display control of the display unit 4 to the first IC 2 and the second IC 3. Specifically, the controller 101 outputs, to the first IC 2, a signal for instructing the anode An to be driven and the grid Gr, and a signal for instructing light emission luminance of the anode An.
The first IC 2 drives the anode An and the grid Gr in accordance with these instruction signals. The adjustment of the light emission luminance of the anode An is performed, for example, by changing the ON duty of the drive signal to the anode An.

Further, the controller 101 outputs a signal for instructing the filament Fi to be driven to the second IC 3.
In this example, the drive voltage output terminals Tf1 to Tfn are individually connected to the filament terminals f1a to fna in the second IC 3 so that the respective filaments Fi can be driven individually. The second IC 3 can drive the filament Fi instructed by the signal from the controller 101.

The fluorescent display tube 1 of this example is not only a display mode for displaying information on the entire display area of the display unit 4 (hereinafter referred to as "full area display mode") as a display mode of the display unit 4 but There is a display mode (hereinafter referred to as "partial display mode") in which information display is performed on only a part of a plurality of display areas divided in the arrangement direction.
In the full range display mode, the controller 101 instructs the second IC 3 to drive all the filaments Fi, and in the partial display mode, drive only some of the filaments Fi.
In the partial display mode, only a part of the filament Fi necessary for lighting the anode An in the partial display area is driven. That is, the filament Fi unnecessary for lighting the anode An is not unnecessarily driven, thereby reducing power consumption. The circuit configuration for realizing such a partial drive function of the filament Fi is not shown.

In addition, the second IC 3 in this example applies a drive voltage to the respective filaments Fi at different timings with respect to the drive of the plurality of filaments Fi. Specifically, the second IC 3 performs so-called divided driving in which drive voltages are sequentially applied while being shifted one by one for the plurality of filaments Fi. At this time, a pulse-like (rectangular wave) voltage is applied as a drive voltage.
As a result, the current flowing in the second IC 3 can be reduced compared to the case of simultaneous driving in which the driving voltage is simultaneously applied to the plurality of filaments Fi. For example, if it is necessary to flow a current of 30 mA to one filament Fi, in this example, one filament Fi is driven at a time, and two or more filaments are not driven at the same time. It is sufficient for the current of 30 mA which is one. On the other hand, in the case of simultaneous driving, a current of 30 mA × the number of filaments Fi flows, so if four filaments Fi, for example, a current of 120 mA flows.
Generally, in order to pass more current to the IC, it is necessary to make the wiring width inside the IC thicker, and the IC external size becomes larger, which leads to an increase in the cost of the IC. According to this embodiment, since the amount of current flowing inside the second IC 3 can be reduced, the wiring width inside the second IC 3 can be reduced, and cost reduction can be achieved.
In addition, since the current flowing to the second IC 3 can be reduced, radiation noise can be reduced.

  The internal circuit configuration of the second IC 3 will be described again.

The power supply circuit 102 generates a high voltage VH which the first IC 2 uses as a drive voltage for the anode An and the grid Gr, and an input voltage VIN which the second IC 3 uses as a drive voltage for each filament Fi.
The input voltage VIN is supplied to the input terminal Tvi provided to the second IC 3.

[1-2. Filament drive of the first embodiment]

FIG. 3 is a diagram for describing an internal circuit configuration of the second IC 3. In FIG. 3, among the internal circuit configuration of the second IC 3, only the portion related to the drive of the filament Fi is mainly extracted and shown.

As shown, the second IC 3 includes a plurality of output transistors Q1 functioning as an output switch that performs output control of the drive voltage to the filament Fi, and a detection transistor connected in parallel with a corresponding one of the output transistors Q1. A control circuit 30 is provided which controls ON / OFF of each output transistor Q1 and each detection transistor Q2.
In the figure, in order to distinguish each output transistor Q1 and each detection transistor Q2, hyphens (-) and numerical values of 1 to n are attached to the end of the signs of Q1 and Q2.
The detection transistors Q2-1, Q2-2,..., Q2-n are connected in parallel to the output transistor Q1 whose numerical value at the end of the code matches.

In this example, for example, p-type MOSFETs (Metal-Oxide-Semiconductor Field-Effect Transistors) are adopted as each output transistor Q1 and each detection transistor Q2, and output transistors Q1-1, Q1-2,. , Q1-n are connected to the sources of detection transistors Q2-1, Q2-2,.
Each connection point between the source of the output transistors Q1-1, Q1-2, ..., Q1-n and the source of the detection transistors Q2-1, Q2-2, ..., Q2-n is connected to the input terminal Tvi. An input voltage VIN is supplied.

The drains of the output transistors Q1-1, Q1-2,..., Q1-n are connected to ones of the drive voltage output terminals Tf1 to Tfn having the same numerical value at the end of the code. Thereby, when the output transistors Q1-1, Q1-2,..., Q1-n are turned ON, the input voltage VIN is applied as the drive voltage Ef to the corresponding filaments Fi.
Hereinafter, the drive voltages Ef output by the output transistors Q1-1, Q1-2,..., Q1-n are denoted as drive voltages Ef1, Ef2,.

The gates of the output transistors Q1-1, Q1-2,..., Q1-n are those of the detection transistors Q2-1, Q2-2,. Connected with the gate of The control circuit 30 controls the connection between the gates of the output transistors Q1-1, Q1-2,..., Q1-n and the gates of the detection transistors Q2-1, Q2-2,. The signals Sg are supplied individually. Hereinafter, with regard to these control signals Sg, the numerical values at the end of the code are made to coincide with the numerical values at the end of the codes of the output transistor Q1 and the detection transistor Q2 of the supply destinations and denoted as control signals Sg1, Sg2,.
A pair of corresponding output transistor Q1 and detection transistor Q2 is controlled to be ON / OFF in common by each control signal Sg.

The drains of the detection transistors Q2-1, Q2-2,..., Q2-n are connected to the control circuit 30.
Here, according to the connection form of each output transistor Q1 and each detection transistor Q2, when the output transistor Q1 is turned ON, the output transistor Q1 turned ON between the source and drain of the corresponding detection transistor Q2. The current according to the current value flows according to the current value of the current flowing between the source and drain of That is, the control circuit 30 can detect the drive current value of each filament Fi by inputting the current flowing between the source and the drain of each detection transistor Q2.

  The control circuit 30 controls the ON / OFF of the output transistors Q1-1, Q1-2,..., Qn by the control signals Sg1, Sg2,. Apply.

FIG. 4 shows an example of waveforms of the control signals Sg1, Sg2,..., Sgn in the case of performing divisional driving.
In the divisional drive of this example, ON pulses are generated in order of control signals Sg1, Sg2,..., Sgn. At this time, the ON periods are not overlapped between the control signals Sg. Thereby, the current flowing in the second IC 3 can be reduced as described above.
In this example, since the p-type MOSFET is adopted as each output transistor Q1 and each detection transistor Q2 as described above, the ON period of each control signal Sg is actually a period of L level. . That is, when the control signal Sg is at L level, the corresponding output transistor Q1 and detection transistor Q2 are turned on. FIG. 4 does not show an actual waveform image of each control signal Sg, but merely shows the ON period and the OFF period of each control signal Sg.

In divided driving, a period in which application of the drive voltage Ef to all the filaments Fi (drive voltage output terminals Tf) is cycled is referred to as a “scan period” as illustrated. Further, in the scan period, the drivable period for each filament Fi, that is, the maximum ON period of the drive voltage is referred to as a “unit drive period”.
In this example, the drive voltage Ef is output in the order of the drive voltage output terminals Tf1, Tf2,..., Tfn (ascending order of the numerical values at the end of the code). Unit drive periods do not overlap between adjacent drive voltage output terminals Tf. This ensures that the filaments Fi connected to different drive voltage output terminals Tf are not simultaneously driven.

The explanation is returned to FIG.
The control circuit 30 outputs the output transistors Q1-1, Q-2,... Based on the current (the driving current value of the filament Fi) input through the detection transistors Q2-1, Q2-2,. , Q1-n are subjected to feedback control to adjust the ON duty. That is, feedback control by PWM (Pulse Width Modulation) is performed.
At this time, PWM control for each output transistor is control for adjusting the ON duty of the control signal Sg with the unit drive period as shown in FIG. 4 as the maximum ON period.

Here, if control is performed to match the drive current value of the filament Fi with a predetermined target current value as feedback control as described above, the temperature of the filament Fi can not be made constant.
Therefore, in the present embodiment, in order to keep the temperature of the filament Fi constant, the control circuit 30 is configured as follows.

FIG. 5 is an explanatory diagram of the pulse width control unit 31 provided in the control circuit 30. As shown in FIG.
In FIG. 5, only the set of the output transistor Q1-1 and the detection transistor Q2-1 is extracted and shown among the set of the output transistor Q1 and the detection transistor Q2 included in the second IC 3, and the drive voltage output terminal As for Tf, only the drive voltage output terminal Tf1 connected to the output transistor Q1-1 is extracted and shown.
Further, although the control circuit 30 includes the NAND gate circuit 35 as illustrated, the NAND gate circuit 35 shown in FIG. 5 corresponds to “NAND gate circuit 35-1” in FIG. 7 described later. is there.

In FIG. 5, the pulse width control unit 31 includes an IV conversion circuit 31a, a square amplifier 31b, a VI conversion circuit 31c, and a determination circuit 31d.
The IV conversion circuit 31a performs current-voltage conversion on the current input through the detection transistor Q2-1, that is, the current according to the current value corresponding to the drive current value of the filament Fi.
The squared amplifier 31 b obtains a square value of the current value subjected to current-voltage conversion by the IV conversion circuit 31 a.
The squared value obtained by the squared amplifier 31b is voltage-current converted by the VI conversion circuit 31c, and is input to the determination circuit 31d.

  The determination circuit 31d outputs an OFF instruction signal Tc instructing the OFF timing of the control signal Sg1 based on the current corresponding to the square value input from the VI conversion circuit 31c. As understood from the following description, the OFF instruction signal Tc indicates the timing at which the drive voltage Ef (here, Ef1) should be turned off within the unit drive period.

As illustrated, the determination circuit 31 d includes a capacitor Cc, a reset switch SWr, and a comparator Cmp.
The capacitor Cc is inserted between the current output terminal of the VI conversion circuit 31c and the ground, and the reset switch SWr is connected in parallel with the capacitor Cc between the current output terminal and the ground.
The inverting input terminal of the comparator Cmp is connected to the connection point between the capacitor Cc and the reset switch SWr, and the non-inverting input terminal is connected to the reference voltage Vref.

  In the NAND gate circuit 35, an OFF instruction signal Tc output from the comparator Cmp is input to one input terminal, and a timing signal Tm1 described later is input to the other input terminal. The output of the NAND gate circuit 35 is supplied as a control signal Sg1 to the gates of both the output transistor Q1-1 and the detection transistor Q2-1.

FIG. 6 is a waveform diagram for explaining the operation of the pulse width control unit 31, and shows waveforms of the timing signals Tm1, Tm2,..., Tmn, the OFF instruction signal Tc, and the control signal Sg1.
The timing signals Tm1, Tm2,..., Tmn are signals generated in the control circuit 30 as signals representing unit drive periods of the output transistors Q1-1, Q1-2,. The configuration for generating the timing signals Tm1, Tm2,..., Tmn will be described later again.

  In the determination circuit 31d shown in FIG. 5, the capacitor Cc is charged by the current corresponding to the square value input from the VI conversion circuit 31c. When the charging potential of capacitor Cc is equal to or lower than reference voltage Vref, OFF instruction signal Tc which is an output of comparator Cmp is at H level, and when the charging potential of capacitor Cc exceeds reference voltage Vref, OFF instruction signal Tc is at L level Fall to

  Based on this assumption, in a period before timing signal Tm1 rises to H level, control signal Sg1 maintains the OFF state (state of H level), and output transistor Q1-1 and detection transistor Q2-1 are turned OFF. Ru. Therefore, in the period, no current flows into the pulse width control unit 31 via the detection transistor Q2-1, and the capacitor Cc is not charged. Therefore, the OFF instruction signal Tc maintains the H level.

  When the timing signal Tm1 rises to H level, both inputs of the NAND gate circuit 35 become H level, so the control signal Sg1 falls to L level (that is, it turns to ON state), the output transistor Q1-1 and the detection transistor When Q2-1 is turned ON, the output of the drive voltage Ef1 through the drive voltage output terminal Tf1 and the flow of current into the pulse width control unit 31 through the detection transistor Q2-1 are started. That is, charging of the capacitor Cc by the current corresponding to the above-described square value is started.

  As described above, when the charging potential of the capacitor Cc exceeds the reference voltage Vref, the OFF instruction signal Tc which is the output of the comparator Cmp falls to L level. That is, thereby, one of the inputs of NAND gate circuit 35 becomes L level, and accordingly, control signal Sg1 which is the output of NAND gate circuit 35 rises to H level, and output transistor Q1-1 and detection transistor Q2-1 It will be turned off.

As described above, in the control circuit 30 according to the embodiment, the charging potential of the capacitor Cc by the current corresponding to the square value of the drive current of the filament Fi exceeds the value of the predetermined reference voltage VRef, that is, the square of the drive current In response to the time product of the values exceeding the predetermined value, the pulsed drive voltage Ef is forcibly turned OFF. The term “time product of squared values” means the product of squared values and time.
By the control as described above, feedback control is realized in which the “time product of the square value of the drive current of the filament Fi” is a constant value.

Here, the temperature of the filament Fi can be expressed as “θ × P”, where “θ” is the thermal resistance of the filament Fi and “P” is the drive power of the filament Fi. From this point, it can be seen that the temperature of the filament Fi can be made constant by making the driving power P constant.
According to Joule's law, assuming that the drive current value of the filament Fi and the drive voltage value are I and V, respectively,

P = I ^ 2 · θ
P = V ^ 2 / θ

It is expressed as However, "^" means a power.
As understood from this point, it can be understood that in order to make the drive power P of the filament Fi constant, the drive current value I or the square value of the drive voltage value V may be made constant.

  Therefore, when the filament Fi is pulse-driven as in this example, the temperature of the filament Fi is constant by performing feedback control in which the time product of the square value of the drive current of the filament Fi is constant as described above. It can be done.

  In FIG. 5, the determination circuit 31d is provided with a reset switch SWr for discharging the capacitor Cc. However, regarding the reset switch SWr and the reset signal Srs for controlling ON / OFF of the reset switch SWr. Will explain again.

Although only the configuration for performing feedback control for output transistor Q1-1 has been described above, in this example, similar feedback control is input via detection transistors Q2-1, Q2-2,. , And Q1-n individually based on the value of the current.
The feedback control is performed individually for each output transistor Q1 as described above in order to prevent the occurrence of uneven brightness due to the variation in contact resistance generated between the output transistor Q1 and the filament Fi.

Here, when performing feedback control individually for each output transistor Q1 as described above, it is conceivable to provide a pulse width control unit 31 for each output transistor Q1.
However, providing the pulse width control unit 31 for each output transistor Q1 leads to an increase in the circuit scale of the second IC 3 and is not desirable.
Therefore, in the present embodiment, feedback control for each output transistor Q1 is performed by time division using the single pulse width control unit 31.

The circuit configuration in the second IC 3 including the configuration for performing feedback control for each output transistor Q1 by time division by the single pulse width control unit 31 will be described with reference to the circuit diagram of FIG.
Note that illustration of the input terminal Tvi is omitted in FIG.

As shown in FIG. 7, the control circuit 30 includes the pulse width control unit 31, the timing generation circuit 32, the oscillation circuit 33, the setting register 34, and n NAND gate circuits 35 (35-1, 35-2,. , 35-n).
The timing generation circuit 32 generates timing signals Tm1, Tm2,..., Tmn and a reset signal Srs on the basis of a periodic signal with a constant period output from the oscillation circuit 33.
As described above, the timing signals Tm1, Tm2,..., Tmn are signals representing a unit driving period for each of the output transistors Q1-1, Q1-2,.
In this example, the periodic signal output from the oscillation circuit 33 is, for example, a signal that rises to H level at each start timing of the scan period shown in FIG. The timing generation circuit 32 outputs, as timing signals Tm1, Tm2,..., Tmn, signals representing each period obtained by equally dividing the scan period represented by the periodic signal into n. Specifically, among the n divided periods, a signal that becomes H level only in the first period is output as timing Tm1, and thereafter becomes H level only in the second,. The signals are output as timings Tm2, ..., Tmn, respectively.

The timing generation circuit 32 in this example can change the number of output timing signals Tm and the H level period of each timing signal Tm according to the setting value for the setting register 34.
Specifically, in the setting register 34, the value of the ratio (%) of the unit drive period to the scan period can be set. For example, in the case of n = 10, a value indicating “10%” is set as the value of the ratio.
The timing generation circuit 32 variably sets the number of outputs of the timing signal Tm and the H level period of each timing signal Tm based on the value of the ratio. For example, in the case of the setting of “10%”, ten timing signals Tm in which the H level period is 10% of the scanning period are output as the timing signal Tm.
Thus, the single timing generation circuit 32 can cope with the case where the number of filaments Fi is different.

The timing signals Tm1, Tm2,..., Tmn are used as one input of the NAND gate circuit 35 whose numerical value at the end of the code matches among the NAND gate circuits 35-1, 35-2,.
The other inputs of the NAND gate circuits 35-1, 35-2,..., 35-n are used as an OFF instruction signal Tc output from the pulse width control unit 31. As illustrated, the outputs of the NAND gate circuits 35-1, 35-2, ..., 35-n are set as control signals Sg1, Sg2, ..., Sgn, respectively.

Here, the output transistors Q1-1, Q1-2,..., Q1-n and the detection transistors Q2-1, Q2-2,..., Q2-n are ON periods of the timing signals Tm, Tm2,. Since the H level period) does not overlap and comes in order, it is turned ON without overlapping from the set of output transistor Q1-1 and detection transistor Q2-1 to the set of output transistor Q1-n and detection transistor Q2-n. Go.
As illustrated, since the drains of the detection transistors Q2-1, Q2-2,..., Q2-n are connected to the IV conversion circuit 31a in the pulse width control unit 31, the IV conversion circuit 31a sequentially The detection current is sequentially input via the detection transistors Q2-1, Q2-2, ..., Q2-n that are turned on.

  As described above, in response to the timing signal Tm1 rising to the H level, the pair of the output transistor Q1-1 and the detection transistor Q2-1 is turned on, and the IV conversion circuit 31a via the detection transistor Q2-1. Current input to the capacitor Cc is started, and charging of the capacitor Cc is started. Then, when the charging potential of the capacitor Cc exceeds the reference voltage VRef, the OFF instruction signal Tc falls from the H level to the L level, and the control signal Sg1 turns to OFF, and the output transistor Q1-1 and the detection transistor Q2-1. The pair is turned off.

  Similarly, in response to timing signal Tm2, ..., timing signal Tmn sequentially rising to H level, a set of output transistor Q1-2 and detection transistor Q2-2, ..., output transistor Q1-n and detection transistor The set of Q2-n is sequentially turned on, current input to the IV conversion circuit 31a is sequentially started via the detection transistors Q2-2, ..., Q2-n, and charging of the capacitor Cc is sequentially started. Then, each time the charging potential of capacitor Cc exceeds reference voltage VRef, OFF instruction signal Tc falls from H level to L level, and control signals Sg2,..., Sgn sequentially turn OFF, whereby output transistor Q1. The set of -2 and the detection transistor Q2-2,..., The set of the output transistor Q1-n and the detection transistor Q2-n are sequentially turned OFF.

During this time, the OFF timing of each output transistor Q1 is controlled by the operation of the pulse width control unit 31 described above to a timing at which the time product of the square value of the detection current by the corresponding detection transistor Q2 becomes a constant value.
That is, as understood from this point, according to the configuration of the control circuit 30 shown in FIG. 7, feedback control for each output transistor Q1 is performed by time division by the single pulse width control unit 31. .

  Here, in response to performing feedback control for each output transistor Q1 in a time division manner using the single pulse width control unit 31 as described above, the pulse width control unit 31 of this example includes the capacitor Cc. A reset switch SWr for discharging appropriately is provided (see FIG. 5).

The timing generation circuit 32 generates a reset signal Srs for turning on / off the reset switch SWr. Specifically, the timing generation circuit 32 generates, as the reset signal Srs, a signal that turns on the reset switch SWr for a predetermined time immediately before each falling timing of the timing signals Tm1, Tm2, ..., Tmn. The reset signal Srs is a signal that starts an ON instruction of the reset switch SWr at a timing that is at least after the falling timing of the OFF instruction signal Tc and before the falling timing of the corresponding timing signal Tm. It only needs to be generated. For example, it is conceivable to use a falling timing of each timing signal Tm as a reference timing and generate a signal that turns on the reset switch SWr for a predetermined time from a timing that is a predetermined time before the reference timing.
It can be said that such a reset signal Srs is a signal that sequentially turns on the reset switch SWr when the output transistor Q1 to be subjected to feedback control is switched.

As the reset switch SWr is ON / OFF controlled by the reset signal Srs as described above, charge is stored in the capacitor Cc in the process of sequentially switching the output transistor Q1 to be controlled by the pulse width control unit 31 to perform feedback control. It is possible to prevent feedback control of the next output transistor Q1 from being performed in the remaining state.
Therefore, the ON pulse width of the output transistor Q1 can be accurately controlled, and the accuracy of feedback control can be improved.

  In the above, an example in which the drive current value of the filament Fi is detected by the detection transistor Q2 connected in parallel to the output transistor Q1 has been described. For example, a current detection resistor is provided on the output line of the drive voltage Ef Alternatively, the drive current value may be detected by another method such as detecting the drive current value of the filament Fi by the current detection resistor.

  Further, although the example in which the feedback control based on the drive current value is performed has been described above, the feedback control based on the voltage value of the drive voltage Ef can also be performed. In that case, the detection transistor Q2 and the IV conversion circuit 31a are omitted, and instead, a configuration for detecting the voltage value of each drive voltage Ef is added, and the detected voltage value is represented by a dashed arrow V in FIG. It may be configured to input to the squared amplifier 31 b.

In addition, although it is assumed that the reference voltage Vref is a fixed value in the above, the reference voltage Vref may be variable.
Thereby, the target temperature of the filament Fi can be arbitrarily changed according to the specification of the fluorescent display tube 1.

  Further, in the above, an example in which feedback control in which the time product of the square value of the drive current value of the filament Fi (or the voltage value of the drive voltage Ef) is a constant value is applied to the case of performing division drive of the filament Fi However, the feedback control can be suitably applied even in the case of simultaneously driving a plurality of filaments Fi.

  Also, in the above, the feedback control in which the time product of the square value of the drive current value of the filament Fi (or the voltage value of the drive voltage Ef) is a constant value is based on the premise that the voltage value of the drive voltage Ef is constant. Although the example applied to the case of adjusting the pulse width of the drive voltage Ef has been mentioned, the feedback control is also applied to the case of adjusting the voltage value of the drive voltage Ef under the premise that the pulse width of the drive voltage Ef is constant. It can apply suitably.

Furthermore, although the example in which the switch to be controlled in the feedback control is a transistor has been described above, it is also possible to perform the feedback control on a switch other than a switch by a transistor.

[1-3. Summary of the first embodiment]

As described above, the integrated circuit device (second IC 3) according to the first embodiment is an integrated circuit device for driving a filament in a fluorescent display tube (1) having a filament (Fi) emitting electrons. An output switch (output transistor Q1) for controlling the output of the drive voltage to the filament, and a detection unit (detection transistor Q2 or the like) for detecting the current value of the drive current flowing through the filament or the drive voltage applied to the filament The feedback control is performed to control the switching operation of the output switch based on the current value or the voltage value detected by the detection unit, such that the time product of any current value or the square value of the voltage value becomes a constant value. And a control unit (control circuit 30).

Thus, control is performed such that the driving power of the filament is constant.
Therefore, the temperature of the filament can be kept constant.
By keeping the temperature of the filament constant, it is possible to suppress the decrease in the life of the filament.

  Further, in the integrated circuit device according to the first embodiment, the output switch includes a plurality of output switches to which different filaments are connected, and the detection unit detects the current value or the voltage value of the connected filaments for each output switch. The control unit separately performs feedback control for each output switch based on the current value or the voltage value individually detected by the detection unit.

As a result, even when the contact resistance between the output switch and the filament varies, control is performed so that the temperature of each filament becomes constant.
Therefore, it is possible to suppress the unevenness in luminance due to the variation in the contact resistance, and to improve the display quality.

  Further, in the integrated circuit device according to the first embodiment, the control unit has a feedback circuit (pulse width control unit 31) for controlling the ON pulse width of the output switch as a feedback circuit for performing feedback control. A feedback circuit performs feedback control on a plurality of output switches by time division.

This makes it possible to eliminate the need for providing a feedback circuit for each output switch in order to suppress unevenness in luminance due to variations in contact resistance.
That is, the circuit configuration can be simplified in order to suppress the uneven brightness due to the variation in the contact resistance, and the cost can be reduced by reducing the number of parts.

  Furthermore, in the integrated circuit device according to the first embodiment, the control unit has a feedback circuit (pulse width control unit 31) that controls the ON pulse width of the output switch as a feedback circuit that performs feedback control. The capacitor (Cc) is charged by the current corresponding to the square value, and the output switch is turned off in response to the charging potential of the capacitor exceeding a predetermined potential.

This eliminates the need to provide a triangular wave generation circuit for PWM control of the output switch.
Therefore, the configuration of the feedback circuit can be simplified, and the cost can be reduced by reducing the number of parts.

  In the integrated circuit device according to the first embodiment, the feedback circuit charges the capacitor (the capacitor Cc) with a current corresponding to a square value, and the output switch is responsive to the charging potential of the capacitor exceeding a predetermined potential. Is turned off, and the capacitor is discharged when the output switch to be controlled is switched.

As a result, it is possible to prevent feedback control of the next output switch from being performed when charge remains in the capacitor.
Therefore, the ON pulse width of the output switch can be accurately controlled, and the accuracy of feedback control can be improved.

  Further, the fluorescent display tube (1 of the first embodiment) includes a filament (Fi) emitting electrons and an integrated circuit unit (second IC 3) driving the filament, and the integrated circuit unit An output switch (output transistor Q1) that performs output control of the drive voltage, a detection unit (such as a detection transistor Q2) that detects the current value of the drive current flowing through the filament or the voltage value of the drive voltage applied to the filament Control unit that performs feedback control to control the switching operation of the output switch based on the current value or the voltage value detected by the control unit so that the time product of either the current value or the square value of the voltage value becomes a constant value And (control circuit 30).

The same function and effect as the integrated circuit device of the first embodiment described above can be obtained by the fluorescent display tube of the first embodiment.

<2. Second embodiment>
[2-1. Integrated Circuit Device of Second Embodiment]

Subsequently, a second embodiment according to the present invention will be described with reference to FIG. 8 to FIG.
The second embodiment relates to the enlargement of the maximum ON period of the drive voltage Ef.
In the following description, parts that are the same as the parts already described are given the same reference numerals and descriptions thereof will be omitted.

In the first embodiment described above, an example in which feedback control for each output transistor Q1 is performed by time division by a single pulse width control unit 31 when dividing and driving a plurality of filaments Fi has been described, but in that case, It is not permitted to overlap the ON periods between the output transistors Q1.
Therefore, the maximum ON period (maximum ON period of the drive voltage Ef of each filament Fi) of each output transistor Q1 can not be extended more than the period obtained by equally dividing the scan period (see FIG. 4) into n.

FIG. 8 is a diagram for explaining an example of the maximum ON period of each output transistor Q1 when the number of output transistors Q1 is ten, and FIG. 8A assumes that all ten output transistors Q1 are used. FIG. 8B shows an example of the maximum ON period in the case where only five out of ten output transistors Q1 are used.
In the case of FIG. 8A, the maximum ON period of each output transistor Q1 is 10% (1/10) of the scan period, and in the case of FIG. 8B, the maximum ON period of each output transistor Q1 is 20% of the scan period (1/5). ).

When the filament Fi is pulse-driven, the effective value of the drive voltage Ef is expressed as follows.

Effective value = power supply voltage value of drive voltage Ef (voltage value of input voltage VIN) × square root of ON duty of pulse voltage

For example, assuming that the input voltage VIN is 5V and it is desired to obtain 2V of the effective value of the drive voltage Ef, in the example of FIG. 8A, the effective value of the drive voltage Ef is at most 5V × 1 / √10 = 1.58V And can not achieve the target 2V.
On the other hand, in the example of FIG. 8B, the effective value of the drive voltage Ef is 5 V × 1 / √5 = 2.24 V at maximum, and the target 2 V can be achieved.

  However, the power supply voltage (input voltage for driving) of the drive voltage Ef may fluctuate, and when the power supply voltage is lowered, there is a possibility that the target effective value can not be achieved. If the target effective value can not be achieved, the brightness is reduced and the display quality is reduced.

  Therefore, in the second embodiment, the maximum ON period of the drive voltage Ef is expanded while preventing occurrence of luminance unevenness (preventing deterioration in display quality) by individually performing feedback control for each output transistor Q1. To improve the robustness of the display quality against input voltage fluctuations.

FIG. 9 is a circuit diagram showing an internal configuration of the second IC 3A as the second embodiment.
In the second embodiment, the configuration other than the second IC 3A in the display device 100 is the same as that in the first embodiment, and thus the description thereof is omitted.

As shown, in the second IC 3A, two control circuits 30 are provided.
One control circuit 30 performs feedback control of each output transistor Q1 for output transistors Q1 (Q1-1, Q1-3,..., Q1- (n-1)) in the odd order of outputting the drive voltage Ef. The other control circuit 30 outputs the drive voltage Ef in an even-numbered order of output transistors Q1 (Q1-2, Q1-4,..., Q1-n) as the target of each output transistor Q1. Perform feedback control in time division. Here, "n" is an even number.
In any control circuit 30, feedback control is performed so that ON periods do not overlap between the output transistors Q1 to be controlled.

One control circuit 30 can input detection currents from the detection transistors Q2-1, Q2-3,..., Q2- (n-1) to the IV conversion circuit 31a, and the output transistor Q1-1 and detection Control signal to each gate of transistor Q2-1, each gate of output transistor Q1-3 and detection transistor Q2-3, ..., each gate of output transistor Q1- (n-1) and detection transistor Q2- (n-1) Sg1, Sg3, ..., Sg (n-1) are output, respectively.
The other control circuit 30 can input detection currents from the detection transistors Q2-2, Q2-4,..., Q2-n to the IV conversion circuit 31a, and the output transistor Q1-2 and the detection transistor Q2-2. Control signals Sg2, Sg4,..., Sgn are output to the gates of the output transistor Q1-4 and the gates of the output transistor Q1-4 and the detection transistor Q2-4,..., The output transistor Q1-n and the detection transistor Q2-n, respectively.

As described above, in the second IC 3A, feedback control is performed using different control circuits 30 for the output transistors Q1 adjacent to each other in order of outputting the drive voltage Ef.
As a result, it is possible to make the ON periods of the drive voltage overlap between the filaments Fi in which the drive order is adjacent.

FIG. 10 is a diagram for explaining the effect when two control circuits 30 are provided as described above, FIG. 10A shows the effect corresponding to the case of FIG. 8A, and FIG. 10B shows the effect of FIG. It is a figure for demonstrating the effect corresponding to the case of.
When the configuration of the second IC 3A is applied when all ten output transistors Q1 are used as shown in FIG. 8A, the maximum ON period of each output transistor Q1 is twice that in FIG. 8A. It can be expanded to 20% (20% of the scanning period). On the other hand, when five out of ten output transistors are used as shown in FIG. 8B, the maximum ON period of each output transistor Q1 is 20% to 33% (1%) by applying the configuration of the second IC 3A. It can be expanded to / 3).

Here, also in the second IC 3A, feedback control for each output transistor Q1 is individually performed. For this reason, suppression of the luminance nonuniformity resulting from the dispersion | variation in contact resistance is achieved.
Therefore, according to the second IC 3A, the display quality for the input voltage fluctuation (the fluctuation of the input voltage VIN) is increased by the enlargement of the maximum ON duty while preventing the deterioration of the display quality due to the uneven brightness due to the contact resistance variation. Robustness can be improved.

Although an example in which the number of control circuits 30 is two has been described above, for example, two control circuits 30 for the output transistor Q1 whose output order of the drive voltage Ef is odd are two, and the output transistors whose even order is output. The number of control circuits 30 can be arbitrary, such as providing two control circuits 30 for Q1. By providing a plurality of control circuits 30 for each of the odd-numbered and even-numbered output transistors Q1, not only the output transistors Q1 whose output order of the drive voltage Ef is adjacent but also the output transistors Q1 which are not adjacent to each other. The drive voltage ON periods can be overlapped also between the two. That is, the maximum ON period of each output transistor Q1 can be further expanded.
In order to expand the maximum ON period of the drive voltage Ef, different control circuits 30 only need to perform feedback control of at least the output transistors Q1 adjacent to each other in the output order of the drive voltage Ef. .

In the second embodiment, the feedback control by the control circuit 30 is not limited to control in which the time product of the drive current of the filament Fi or the square of the drive voltage Ef is a constant value. For example, control may be performed such that the time product of the drive current value of the filament Fi or the voltage value of the drive voltage Ef is a constant value. That is, the feedback control in the second embodiment may control the ON duty of the output transistor based on the drive current value of the filament Fi or the voltage value of the drive voltage Ef.

[2-2. Summary of Second Embodiment]

As described above, the integrated circuit device (second IC 3A) according to the second embodiment is an integrated circuit device for driving a filament in a fluorescent display tube (1) having a plurality of filaments (Fi) emitting electrons. A plurality of output switches (output transistor Q1) for performing output control of drive voltages for different filaments, and a control unit for sequentially applying pulse-like drive voltages to different filaments by sequentially turning on the output switches (control And the control unit controls the ON duty of the output switch connected to the filament based on the current value of the drive current flowing through the filament or the voltage value of the drive voltage applied to the filament. Having a plurality of feedback circuits (control circuit 30) for performing feedback control to control the plurality of Performs individual feedback control for each output switch using to feedback circuit, the order of outputting the driving voltage for each output switch are adjacent, feedback control is performed using different feedback circuit.

As a result, in order to suppress the uneven brightness due to the variation in the contact resistance, it is possible to make the ON period of the drive voltage overlap between the filaments whose drive order is adjacent.
Therefore, it is possible to improve the robustness of the display quality with respect to the input voltage fluctuation by enlarging the maximum ON duty while preventing the display quality deterioration due to the uneven brightness caused by the variation of the contact resistance.

  Further, in the integrated circuit device of the second embodiment, each feedback circuit performs feedback control for a plurality of output switches by time division.

As a result, when performing feedback control individually for each output switch, it is not necessary to provide the same number of output switches as feedback circuits to be controlled.
Therefore, the circuit configuration of the control unit can be simplified, and the cost can be reduced by reducing the number of parts.

  Furthermore, in the integrated circuit device according to the second embodiment, the control unit performs, as the plurality of feedback circuits, a feedback circuit that performs feedback control on output switches in which the order of outputting the drive voltage is an odd number; And a feedback circuit that performs feedback control on the output switch.

This makes it possible to minimize the number of feedback circuits in the case where the drive voltage ON periods overlap only between the two output switches adjacent to each other in the output order of the drive voltage.
Therefore, the circuit configuration of the control unit can be simplified, and the cost can be reduced by reducing the number of parts.

  Furthermore, in the integrated circuit device of the second embodiment, the feedback circuit is configured to apply the ON duty of the output switch to be controlled to the current value of the drive current flowing to the filament connected to the output switch or the filament. The time product of any square value of the voltage value of the driving voltage is controlled to be a constant value.

Thus, control is performed such that the driving power of the filament is constant.
Therefore, the temperature of the filament can be kept constant. By keeping the temperature of the filament constant, it is possible to suppress the decrease in the life of the filament.

  Further, in the integrated circuit device according to the second embodiment, the feedback circuit charges the capacitor (the same Cc) with a current corresponding to a square value, and the output switch is performed in response to the charging potential of the capacitor exceeding a predetermined potential. Is turned off.

This eliminates the need to provide a triangular wave generation circuit for PWM control of the output switch.
Therefore, the configuration of the feedback circuit can be simplified, and the cost can be reduced by reducing the number of parts.

  Furthermore, in the integrated circuit device of the second embodiment, the feedback circuit discharges the capacitor when the output switch to be controlled is switched.

As a result, it is possible to prevent feedback control of the next output switch from being performed when charge remains in the capacitor.
Therefore, the ON pulse width of the output switch can be accurately controlled, and the accuracy of feedback control can be improved.

  The fluorescent display tube (1) of the second embodiment includes a plurality of filaments (Fi) emitting electrons and an integrated circuit unit (second IC 3A) driving the filaments, and the integrated circuit unit A plurality of output switches (output transistor Q1) for performing output control of drive voltages for different filaments and a control unit (control circuit 30 for sequentially applying pulse drive voltages to different filaments by sequentially turning on the output switches) And the control circuit 30), and the control unit controls the ON duty of the output switch connected to the filament based on the current value of the drive current flowing through the filament or the voltage value of the drive voltage applied to the filament A plurality of feedback circuits (control circuit 30) for performing feedback control, and the plurality of feedback circuits are used Feedback control performs individually for each output switch Te, the order of outputting the driving voltage for each output switch are adjacent, feedback control is performed using different feedback circuit.

The same operation and effect as the integrated circuit device of the second embodiment described above can be obtained by the fluorescent display tube of the second embodiment.

<3. Third embodiment>
3-1. Integrated Circuit Device and Fluorescent Display Tube of Third Embodiment]

The third embodiment is a countermeasure in the case where a plurality of drive voltage output terminals Tf are provided for each drive channel for driving the filament Fi.
The number of filaments Fi included in the fluorescent display tube 1 varies depending on the specifications. In order to make it possible to use a common drive circuit even when the number of filaments Fi is different, drive voltage output for one of the output transistors Q1, in other words, for one of the channels (drive channels) for driving the filament Fi Providing a plurality of terminals Tf is performed.

FIG. 11 is a circuit diagram showing a configuration example of a second IC 3 ′ in which a plurality of drive voltage output terminals Tf are provided for each drive channel.
FIG. 11 shows an example in which the number n of output transistors is 10 and the number of drive voltage output terminals Tf is 2 for each drive channel.
Here, the drive channel corresponds to one bit of the output of the drive voltage Ef of the filament Fi, and means a system in which output control of the drive voltage Ef is performed by another control signal Sg.

For example, when the configuration shown in FIG. 11 is adopted, the number of applicable filaments Fi is 10 in the case where filaments Fi are connected to only one drive voltage output terminal Tf for each drive channel, both for each drive channel. When the filament Fi is connected to the drive voltage output terminal Tf, it is possible to use any number up to 20.
It is also possible to discontinue any of the ten drive channels (by setting the ratio to the setting register 34 described above). In that case, it is possible to cope with the case where the number of filaments Fi is nine or less.

However, depending on the relationship between the number of filaments Fi included in the fluorescent display tube 1 and the number of drive voltage output terminals Tf for each drive channel, a difference may occur in the number of filaments Fi connected between the drive channels.
For example, in the case where the number of drive channels is 10 and the number of drive voltage output terminals Tf per channel is 2 as exemplified above, if the number of filaments Fi included in the fluorescent display tube 1 is an even number, each drive channel The number of filament connections can be common to one or two, but in the case of an odd number, there may be cases where only one drive channel is connected and all other drive channels are connected (the number of filaments is In the case of 11, 13, 15 etc.).
Assuming that the number of drive voltage output terminals Tf for each drive channel is m, if the number of filaments Fi is not divisible by m, such a difference in the number of filament connections between drive channels may occur.

  When a difference in the number of filament connections occurs between the drive channels, a difference occurs in the loads connected between the drive channels, and a difference also occurs in the drive current of the filament Fi.

FIG. 12 is a diagram illustrating the difference in drive current caused by the difference in the number of connected filaments Fi.
Specifically, in FIG. 12, when the filament Fi is connected to both of two provided drive voltage output terminals Tfn1 and Tfn2 for an arbitrary drive channel (FIG. 12A), the filament Fi is provided only to the drive voltage output terminal Tfn1. For each of the connected cases (FIG. 12B), the difference in the current flowing through the filament Fi is illustrated.

Here, the case where the current ratio between the detection transistor Q2-n and the output transistor Q1-n in the target drive channel is 1: 1000 as illustrated is illustrated.
The current ratio can be changed by the gate length and the gate width when the output transistor Q1 and the detection transistor Q2 are MOSFETs. For the detection transistor Q2-n, it is sufficient if a current capable of feedback control flows as a detection current, so that the value of the current ratio is significantly reduced compared to the output transistor Q1-n.

12A and 12B, the current flowing between the source and the drain of the output transistor Q1-n is “Io”, the current (detection current) flowing to the detection transistor Q2 is “Id”, and the drive voltage output terminals Tfn1 and Tfn2 are present. The flowing current is described as "Io1" and "Io2", respectively.
In this case, it is assumed that the drive current value of each filament Fi is 10 mA.
According to this, when the filament Fi is connected to both of the drive voltage output terminals Tfn1 and Tfn2 as shown in FIG. 12A, the current values of the currents Io1 and Io2 can be expressed as 10 mA, respectively. The value can be written as 20 mA. In this case, the current value of the detection current Id can be expressed as 20 mA × (1/1000) = 0.02 mA.

  On the other hand, in the case of FIG. 12B, the drive voltage output terminal Tfn2 is not connected to the case of FIG. 12A and the current Io2 does not flow (current Io2 = 0 mA), so the current value of the current Io can be expressed as 10 mA Yes (current Io1 is again 10 mA). In this case, since the current Io is 10 mA, the detection current Id can be expressed as 10 mA × (1/1000) = 0.01 mA.

  From the comparison between FIG. 12A and FIG. 12B described above, it can be seen that when the number of connected filaments Fi is different, a difference occurs in the current value of the detection current Id to the control circuit 30. As described above, when the difference between the detection currents Id occurs, the feedback control causes a difference in the width of the drive pulse of the filament Fi. That is, a difference occurs in the effective value of the drive current of the filament Fi. Specifically, in the relationship between FIG. 12A and FIG. 12B, control is performed such that the drive pulse width becomes longer in FIG. 12B in which the current value of the detection current Id decreases, than in the case of FIG. The effective value of the drive current is lower in FIG. 12A and higher in FIG. 12B.

  If a difference in drive current resulting from such a difference in the number of filament connections is generated between the drive channels, the occurrence of uneven brightness is promoted and the display quality is degraded.

FIG. 13 is a circuit diagram showing an internal configuration of the second IC 3B as the third embodiment.
The configuration other than the second IC 3B in the display device 100 is the same as that in the first embodiment, and therefore the description by the illustration is omitted.

  FIG. 13 illustrates the case where the number of drive channels is 10 and the number of drive voltage output terminals Tf for each drive channel is two. That is, as the drive voltage output terminals Tf, two drive voltage output terminals Tf1 to Tf10 corresponding to the first drive channel to the tenth drive channel are respectively provided. Here, the drive voltage output terminals Tf1 to Tf10 are distinguished by adding "1" and "2" to the end of each drive channel.

  Further, FIG. 13 illustrates the case where the number of filaments Fi is nineteen. In this case, the display device 100 is provided with filament terminals f1a to f19a corresponding to the 19 filaments Fi, and only the drive voltage output terminal Tf101 on one side is connected to the filament terminal f19a in only the tenth drive channel. In the other drive channels, one corresponding filament terminal f of the filament terminals f1a to f18a is connected to the drive voltage output terminal Tf whose code end is “1” or “2”, respectively.

In the second IC 3B, a plurality of output transistors Q1 are provided for each drive channel. Specifically, each drive channel is provided with a plurality of output transistors Q1 each connected in parallel with a voltage source of the drive voltage Ef (here, the input terminal Tvi corresponds). In this example, the number of output transistors Q1 for each drive channel is two, and in the figure, each output transistor is attached with "a" and "b" as in the output transistors "Q1a" and "Q1b". We distinguish Q1.
The output transistors Q1a and Q1b for each drive channel are distinguished by giving numerical values in ascending order with hyphens at the end of the code (in the present example, “−1” to “−10”).

  The source of each of the output transistor Q1a and the output transistor Q1b is connected to the input terminal Tvi in each drive channel. Further, in each drive channel, the drain of output transistor Q1a is connected to drive voltage output terminal Tf whose code end is “1” provided in the corresponding drive channel, and the drain of output transistor Q1b is provided in the corresponding drive channel The end of the sign is connected to the drive voltage output terminal Tf of "2".

  The detection transistor Q2 in each drive channel is connected to the input terminal Tvi in parallel with the output transistors Q1a and Q1b in the same drive channel.

  In this case, control circuit 30 outputs control signals Sg1-Sg10 corresponding to the first to tenth drive channels, but in each drive channel, corresponding control signal Sg is output transistors Q1a, Q1b, and It is commonly supplied to the gates of the detection transistor Q2.

  In this example, the current ratio between the output transistors Q1a and Q1b in each drive channel is “1: 1”. Further, in each drive channel, the current ratio (Q2: Q1a or Q1b) between the detection transistor Q2 and each output transistor Q1 is "1: 500".

FIG. 14 is an explanatory view of the operation of the second IC 3B as the third embodiment, in the case where the filament Fi is connected to both of the drive voltage output terminals Tfn1 and Tfn2 in an arbitrary drive channel (FIG. 14A), In each of the cases where the filament Fi is connected only to the voltage output terminal Tfn1 (FIG. 14B), the difference in current flowing in the filament Fi is illustrated.
As understood from the above description, in this example, the current ratio (Q2-n: Q1a-n: Q1b-n) of the detection transistor Q2-n and the output transistors Q1a-n and Q1b-n is “1”. : 500: 500 "can be written.

In FIG. 14A and FIG. 14B, the currents flowing through the output transistors Q1a-n and Q1b-n are respectively described as "Ioa" and "Iob".
Also in this case, it is assumed that the drive current value of each filament Fi is 10 mA.
According to this, when the filament Fi is connected to both of the drive voltage output terminals Tfn1 and Tfn2 as shown in FIG. 14A, the current values of the currents Io1 and Io2 can be represented as 10 mA, respectively, and the currents Ioa and Iob Also, each current value can be expressed as 10 mA. The current value of the detection current Id can be expressed as 10 mA × (1/500) = 0.02 mA.

  On the other hand, in the case of FIG. 14B, the current values of the current Io1 and the current Ioa can both be expressed as 10 mA. And since the current Ioa is 10 mA, the current value of the detection current Id can be expressed as 10 mA × (1/500) = 0.02 mA.

  Thus, according to the second IC 3B, the current value of the detection current Id can be made constant regardless of the number of connections of the filament Fi to the drive channel. Therefore, no difference occurs in the drive pulse width of the filament Fi due to the difference in the number of connections of the filaments Fi as in the case of FIG. 12 above, and no difference occurs in the effective value of the drive current of the filament Fi. You can do so.

As described above, according to the second IC 3B of the third embodiment, even when a plurality of drive voltage output terminals Tf are provided for each drive channel, the number of connected filaments Fi may differ between the drive channels (that is, the drive voltage output terminals Even if the number of Tf used differs), it is possible to make sure that there is no difference in the effective value of the drive current of the filament Fi.
Therefore, the occurrence of luminance unevenness due to the difference in the number of drive voltage output terminals Tf used between drive channels can be prevented, and the display quality deterioration due to the luminance unevenness can be prevented.

In the above description, two drive voltage output terminals Tf are provided for each drive channel. However, the number of drive voltage output terminals Tf provided for each drive channel can be three or more. Even when the number of drive voltage output terminals Tf is three or more, in each drive channel, output transistors Q1 equal in number to the drive voltage output terminals Tf are provided, and those output transistors Q1 are compared to the voltage source of drive voltage Ef. It is connected in parallel with the detection transistor Q2.
Also in this case, the current value detected and input to the control circuit 30 can be made constant regardless of the number of drive voltage output terminals Tf used. That is, by feedback control, it is possible to prevent a difference in the drive current effective value of the filament Fi due to the difference in the number of use of the drive voltage output terminal Tf.

Further, although the example in which the current ratio between the output transistors Q1 is “1: 1” has been described above, in the present embodiment, the drive current value of each filament Fi is different due to such setting of the current ratio. Are trying to prevent
That is, by setting the current ratio as described above, occurrence of uneven brightness between the filaments Fi connected to the drive channel is prevented.
It is not essential that the current ratio between the output transistors Q1 be strictly “1: 1” in order to prevent the occurrence of the uneven brightness, and it may be approximately “1: 1”.

  In the third embodiment, the feedback control by the control circuit 30 is not limited to the control in which the time product of the square value of the drive current of the filament Fi is a constant value. For example, control may be performed such that the time product of the drive current value of the filament Fi is fixed. That is, the feedback control in the third embodiment may be control to adjust the ON duty of the output transistor based on the value of the current input through the detection transistor Q2.

Here, in the case where a plurality of drive voltage output terminals Tf are used in the drive channel, as shown in FIG. 15, the plurality of drive voltage output terminals Tf are formed of a plurality of filaments via the common wiring W. The configuration connected to Fi can be taken.
FIG. 15 shows an example where only the tenth drive channel is connected with one filament Fi, and the other drive channel is connected with two filaments Fi, as in FIG. In this case, in a drive channel in which two filaments Fi are connected, each drive voltage output terminal Tf is connected to a common wire W (for example, an aluminum printed wire) through a bonding wire or the like. Each filament terminal f to which the target filament Fi is connected is connected. For example, taking the first drive channel as an example, the drive voltage output terminals Tf11 and Tf12 are connected to the common wire W1, and the filament terminals f1a and f2a are connected to the wire W1.

As described above, in the drive channel in which the number of use of the drive voltage output terminals Tf is plural, the plural drive voltage output terminals Tf are connected to the plural filaments Fi via the common wiring W, In the same drive channel, it is possible to prevent the contact resistance between the plurality of drive voltage output terminals Tf from being different from that of the filament Fi.
Therefore, it is possible to prevent the occurrence of uneven brightness due to the difference in contact resistance among the plurality of filaments Fi connected to the same drive channel, and to prevent the deterioration of display quality.

[3-2. Summary of Third Embodiment]

As described above, the integrated circuit device (second IC 3B) according to the third embodiment is an integrated circuit device for driving a filament in a fluorescent display tube (1) having a plurality of filaments (the same Fi) emitting electrons. An output transistor that includes a plurality of drive channels each outputting a drive voltage of the filament based on an individual control signal (Sg) as a drive channel for driving the filament, and performing output control of the drive voltage, A plurality of output transistors (the same Q1a and Q1b) respectively connected in parallel with a voltage source of voltage, and drive voltage output terminals (the same Tf11, Tf12, Tf21 and Tf22) individually connected to each output transistor. , Tf101, Tf102), and a transistor connected in parallel with a plurality of output transistors with respect to a voltage source And a detection transistor (the same Q2), which is a capacitor, for each drive channel, and for each drive channel, the current flowing to the filament connected to the drive voltage output terminal based on the value of the current input through the detection transistor. A control unit (control circuit 30) is provided to perform feedback control by adjusting the ON duty of the output transistor.

In the above integrated circuit device, feedback control based on the detection current is separately performed for each drive channel, so that each filament may be dispersed even when the contact resistance between the drive voltage output terminal and the filament varies. It is possible to make sure that there is no difference in the drive current of
Therefore, it is possible to suppress the uneven brightness due to the variation in the contact resistance, and to prevent the display quality from being reduced.
Further, as described above, by configuring the plurality of output transistors to be connected in parallel to the detection transistor, in each drive channel, the current detected and input to the control unit regardless of the number of drive voltage output terminals used The value is fixed. Therefore, even if the number of drive voltage output terminals used changes, it is possible to prevent a difference in the current flowing through the filament.
Therefore, the occurrence of uneven brightness due to the difference in the number of drive voltage output terminals used between the drive channels can be prevented, and the reduction in display quality due to the uneven brightness can be prevented.
As described above, according to the integrated circuit device of the third embodiment, it is possible to prevent the deterioration in display quality due to the uneven brightness caused by the variation of the drive current among the filaments.
Further, according to the integrated circuit device of the third embodiment, in order to prevent the difference in the drive current of the filament due to the difference in the number of drive voltage output terminals used, according to the number of drive voltage output terminals used Since it is not necessary to switch the feedback control method, the circuit configuration can be simplified, and the cost can be reduced by reducing the number of parts.

  In the integrated circuit device according to the third embodiment, the control unit performs the feedback control such that the time product of the square value of the current input through the detection transistor is constant.

Thus, control is performed such that the driving power of the filament is constant.
Therefore, the temperature of the filament can be kept constant. By keeping the temperature of the filament constant, it is possible to suppress the decrease in the life of the filament.

  Furthermore, in the integrated circuit device of the third embodiment, in the drive channel, the current ratio between the output transistors is approximately 1: 1.

As a result, no difference occurs in the drive current value of each filament connected to the drive channel.
Therefore, it is possible to prevent the occurrence of uneven brightness between the filaments connected to the drive channel.

  Furthermore, in the integrated circuit device according to the third embodiment, the control unit has a feedback circuit (pulse width control unit 31) that performs feedback control based on the value of the current input via the detection transistor, and is single The feedback circuit of (1) performs feedback control for a plurality of drive channels by time division.

This makes it possible to eliminate the need for providing a feedback circuit for each output transistor in order to prevent the occurrence of uneven brightness due to the variation in contact resistance.
That is, the circuit configuration can be simplified in order to suppress the uneven brightness due to the variation in the contact resistance, and the cost can be reduced by reducing the number of parts.

  The fluorescent display tube of the third embodiment includes a filament (Fi) emitting electrons and an integrated circuit unit (second IC 3 B) driving the filament, and the integrated circuit unit drives the filament. An output transistor having a plurality of drive channels each outputting a drive voltage of a filament based on an individual control signal as a channel and performing output control of the drive voltage, each being in parallel to a voltage source of the drive voltage A plurality of output transistors (the same Q1) connected in a relationship, drive voltage output terminals (the same Tf11, Tf12, Tf21, Tf22,..., Tf101, Tf102) individually connected to each output transistor, and a voltage source A detection transistor (the same Q2), which is a transistor connected in parallel with a plurality of output transistors, Feedback control by adjusting the ON duty of the output transistor for the current flowing through the filament connected to the drive voltage output terminal based on the value of the current input through the detection transistor, for each drive channel Control unit 30 (control circuit 30).

  The same function and effect as the integrated circuit device of the third embodiment described above can be obtained also by the fluorescent display tube of the third embodiment.

  Further, in the fluorescent display tube of the third embodiment, the plurality of drive voltage output terminals in the drive channel are connected to the plurality of filaments via the common wiring (the same W).

Thereby, it is possible to prevent the contact resistance between the plurality of drive voltage output terminals from being different in the same drive channel.
Therefore, it is possible to prevent the occurrence of uneven brightness due to the difference in contact resistance among a plurality of filaments connected to the same drive channel, and to prevent the deterioration of display quality.

<4. Modified example>

Although the embodiments of the present invention have been described above, the present invention should not be limited to the specific examples described above.
For example, although the case where the present invention is applied to a fluorescent display tube having a grid Gr for accelerating the electrons emitted from the filament Fi has been described above, the present invention is not so-called so-called grid Gr is omitted. The present invention can be suitably applied to a fluorescent display tube in which a two-pole tube structure is adopted.

  In addition, the present invention can be suitably applied to VFDs other than CIG-VFD.

  1 Fluorescent display tube, Fi filament, 3, 3A, 3B Second IC, f1a to fna, f1b to fnb Filament terminal, Tf (T1 to Tfn, Tf11 to Tf102) Drive voltage output terminal, Tvi input terminal, 100 Display device, Q1 (Q1-1 to Q1-n, Q1a-1 to Q1a-10, Q1b-1 to Q1b-10) Output transistor, Q2 (Q2-1 to Q2-n, Q2-1 to Q2-10) detection transistor, Reference Signs List 30 control circuit, 31 pulse width control unit, 31a IV conversion circuit, 31b squared amplifier, 31c VI conversion circuit, 31d determination circuit, Cc capacitor, SWr reset switch, 32 timing generation circuit

Claims (6)

An integrated circuit device for driving said filament in a fluorescent display tube having a filament emitting electrons,
An output switch for performing output control of a drive voltage to the filament;
A detection unit that detects a current value of a drive current flowing to the filament or a voltage value of a drive voltage applied to the filament;
Feedback for controlling the switching operation of the output switch so that the time product of either the current value or the square value of the voltage value becomes a constant value based on the current value or the voltage value detected by the detection unit And a control unit that performs control. The output switch includes a plurality of output switches to which different filaments are connected,
The detection unit is
The current value or the voltage value of the connected filament is individually detected for each of the output switches,
The control unit
The integrated circuit device according to claim 1, wherein the feedback control is performed for each of the output switches based on the current value or the voltage value detected by the detection unit individually. The control unit
The feedback circuit that performs the feedback control includes a feedback circuit that controls the ON pulse width of the output switch,
The integrated circuit device according to claim 2, wherein the single feedback circuit performs the feedback control of a plurality of the output switches by time division. The control unit
The feedback circuit that performs the feedback control includes a feedback circuit that controls the ON pulse width of the output switch,
The feedback circuit is
The integrated circuit device according to any one of claims 1 to 3, wherein the capacitor is charged by the current corresponding to the square value, and the output switch is turned off in response to the charging potential of the capacitor exceeding a predetermined potential. . The feedback circuit is
The capacitor is charged by the current corresponding to the square value, the output switch is turned off in response to the charging potential of the capacitor exceeding a predetermined potential, and the capacitor is switched when the output switch to be controlled is switched. The integrated circuit device according to claim 3, wherein discharge is performed. A filament that emits electrons,
An integrated circuit unit for driving the filament;
The integrated circuit unit is
An output switch for performing output control of a drive voltage to the filament;
A detection unit that detects a current value of a drive current flowing to the filament or a voltage value of a drive voltage applied to the filament;
Feedback for controlling the switching operation of the output switch so that the time product of either the current value or the square value of the voltage value becomes a constant value based on the current value or the voltage value detected by the detection unit And a control unit that performs control.

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