JP2009258188A - Fluorescent display tube and method for driving fluorescent display tube - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To automatically set stop of supplying grid driving voltage by detecting anode driving voltage in a drive circuit for a fluorescent display tube. <P>SOLUTION: Based on the anode driving voltage and power saving set voltage supplied from anode driving voltage waveform generation parts 441 to 448 and a power saving setting register 40, NAND circuits 451 to 4512 determine the presence of anode driving voltages in a power saving mode, and output "0" when all the anode driving voltages are "0". At that time, AND circuits 421 to 4212 are closed to stop the supply of output (grid driving voltage) from grid driving voltage waveform generation parts 511 to 5112 to grid drivers 431 and 4312 and grids G1 to G12. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a fluorescent display tube and a driving method of the fluorescent display tube.

A conventional fluorescent display tube and its operation will be described with reference to FIGS.
First, FIG. 7 will be described.
FIG. 7A is a block diagram of a commonly used drive circuit for a fluorescent display tube, which is an example of a fluorescent display tube capable of displaying K1 to K12 digits. The fluorescent display tube includes an anode electrode / grid group AG and a filament F for an electron source. The anode electrode / grid group AG includes anode electrode groups A1 to A12 (FIG. 7 (b1)) and mesh-like grids G1 to G12 (FIG. 7 (b2)) for every digit of K1 to K12. Each of the anode electrode groups A1 to A12 includes a plurality of segment type anode electrodes coated with a phosphor. The anode electrode groups A1 to A12 and the grids G1 to G12 face each other. Accordingly, the anode electrode groups of each digit, for example, the plurality of anode electrodes of the anode electrode group A1 are opposed to the grid G1, and electrons reaching the plurality of anode electrodes of the anode electrode group A1 from the filament F are controlled by the grid G1. Is done. That is, the electrons of the filament F reach the anode electrode when a grid driving voltage is applied to the grid G1, and do not reach unless the grid voltage is applied.

The grid driver unit 22g scans the grids G1 to G12 in the order of G1, G2,..., G12 and applies a pulsed grid driving voltage to each grid in a time division manner. The anode driver unit 22a scans the anode electrode groups A1 to A12 in the order of A1, A2,..., A12 in synchronization with the grid scanning, and applies a pulsed anode driving voltage to the anode electrodes in a time division manner. . The anode drive voltage is generated corresponding to display data stored in the control unit 11 including a CPU.
The filament F, the grids G1 to G12, and the anode electrode groups A1 to A12 are arranged as shown in FIG. 7C, and the electrons emitted from the filament F are drawn out by the grids G1 to G12 and are opposed to the anode electrodes. Irradiate groups A1-A12. For example, when a grid driving voltage is applied to the grid G1, electrons emitted from the filament F reach the anode electrode group A1 and are selected from among a plurality of anode electrodes of the anode electrode group A1 according to display data. An anode drive voltage is applied to the electrode, and the phosphor of the anode electrode emits light. The same applies to the anode electrode groups A2 to A12.

FIG. 8 is a diagram for explaining a grid driving voltage application procedure in a conventional dynamic driving method. FIG. 8A shows a configuration of an anode electrode group (same as FIG. 7B1). 8B and 8C show timing charts when the grid driving voltage is applied to the grids G1 to G12.
FIG. 8B is a timing chart of a normal driving method. Grid driving voltages are applied to the grids G1 to G12 in the order of timings T1, T2,..., T12, and are repeated in a cycle of T1 to T12.
In the driving method of FIG. 8B, for example, when the K1 digit and K2 digit are not displayed (when the anode electrode group of K1 digit and K2 digit is not turned on), grid driving is performed on the grids G1 and G2 at the timings T1 and T2. Since a voltage is applied, useless power that does not contribute to display is consumed.

Therefore, in order to reduce wasted power in the driving method of FIG. 8B, there is a driving method for stopping the supply of the grid driving voltage applied to the grids G1 and G2 at the timings T1 and T2 as shown in FIG. 8C. It has been proposed (see Patent Document 1).
In the drive method of FIG. 8C, in order to stop the supply of the grid drive voltage of the grids G1 and G2, the supply stop of the grid drive voltage is set in advance in the memory of the control unit 11 of FIG. The grid driving voltage is not supplied at the timings T1 and T2.

Japanese Unexamined Patent Publication No. 2000-11926

In the conventional driving method shown in FIG. 8 (c), it is necessary to select the digit that is not displayed by considering the display contents in advance, and to set the supply stop of the grid driving voltage for that digit in the control unit 11 shown in FIG. The selection and setting work is troublesome. In addition, there is a low-frequency display digit that is displayed only for a short period during the display period depending on the display content. However, because the digit cannot be set in advance to stop the supply of grid drive voltage, the period other than the short period is useless. Power will be consumed.
In view of the above problems, the present invention automatically detects digits that are not used for display, even if the display content includes a high-frequency display frequency that is always displayed or a low-frequency display frequency that is displayed only for a short period. It is an object of the present invention to provide a fluorescent display tube and a method for driving the fluorescent display tube, which can automatically perform power saving setting of the digit.

In order to achieve the object of the present invention, the fluorescent display tube driving method according to claim 1 includes a filament, a plurality of grids, and a plurality of anode electrode groups, and the grid and the anode electrode groups are opposed to each other in every digit. In the method of driving a fluorescent display tube that scans the grid and the anode electrode group for each digit, supplies the grid drive voltage to the grid, and supplies the anode drive voltage to the anode electrode of the anode electrode group, the anode drive voltage detection circuit includes: If all of the anode drive voltage or display data is detected during power saving setting using the power saving setting voltage and anode drive voltage or display data of the power saving setting unit, the grid drive voltage supply circuit of the corresponding digit is closed. The supply of the grid driving voltage to the grid is stopped.
The method for driving a fluorescent display tube according to claim 2 is the method for driving a fluorescent display tube according to claim 1, wherein the anode drive voltage detection circuit is a NAND circuit, and the grid drive voltage supply circuit is an AND circuit. Thus, the power saving setting voltage is directly input to the NAND circuit, the anode driving voltage or the display data is inverted and input, and the grid driving voltage and the output of the NAND circuit are input to the AND circuit.
The fluorescent display tube according to claim 3 includes a filament, a plurality of grids, and a plurality of anode electrode groups. The grid and the anode electrode group are opposed to each other, and the grid and the anode electrode group are scanned for each digit. A fluorescent display tube that supplies a grid driving voltage to a grid and supplies an anode driving voltage to an anode electrode of an anode electrode group, and includes a power saving setting unit, an anode driving voltage detection circuit, and a grid driving voltage supply circuit, and an anode driving voltage detection circuit Detects all “0” of the anode drive voltage or display data at the time of power saving setting using the power saving set voltage and anode drive voltage or display data of the power saving setting unit, the grid drive voltage supply circuit of the corresponding digit is detected. It is characterized in that it is closed and the supply of the grid driving voltage to the grid is stopped.
A fluorescent display tube according to a fourth aspect of the present invention is the fluorescent display tube according to the third aspect, wherein the anode drive voltage detection circuit is a NAND circuit, the grid drive voltage supply circuit is an AND circuit, The power saving set voltage is directly input, the anode driving voltage or the display data is inverted and input, and the grid driving voltage and the output of the NAND circuit are input to the AND circuit.

The present invention automatically detects the presence or absence of the anode drive voltage even for display contents that include a high-frequency display digit used for regular display, a low-display frequency digit used for display only for a short period, and a non-display digit. If the anode drive voltage is all 0, supply of the grid drive voltage to the grid of the corresponding digit is stopped, and if even one of the anode drive voltages is not 0, the grid of the corresponding digit is stopped. Supply grid drive voltage. Therefore, the present invention automatically selects the power-saving mode or the non-power-saving mode. When the power-saving mode is selected, the presence or absence of the anode drive voltage or display data is automatically detected regardless of the display content, and the grid Since the drive voltage is automatically supplied and stopped, a highly versatile power-saving setting is possible.
In the present invention, the supply of the grid driving voltage of the digit grid in which the anode driving voltage is not detected is automatically stopped only by selecting (setting) the power saving mode by a push button of the input / output device or the like. It is not necessary to examine the display contents in advance and confirm the digits not to be displayed one by one to set the power saving. Therefore, according to the present invention, the power saving mode can be easily set regardless of the display contents, and the display contents are not erroneously examined and the necessary digit display is not lost.

The invention of this application supplies (applies) a grid drive voltage to the grid of the digit only for a short period when a digit to be displayed for a short period is included in the display period. Since the supply (application) is not performed, the power saving effect is increased.
According to the present invention, since it is only necessary to set ON / OFF (1, 0) in the power saving setting unit, the labor saving setting unit is simplified, and a memory for storing setting data for non-display digits is required as in the prior art. do not do. Since the present invention uses a NAND circuit for detecting the presence of the anode drive voltage or display data when power saving is set, and uses an AND circuit for the grid drive voltage supply circuit, the conventional drive circuit IC has a NAND circuit and an AND circuit. Just add it. Therefore, according to the present invention, a driver circuit IC for a fluorescent display tube can be manufactured at low cost.
Since the fluorescent display tube of the present invention includes a drive circuit capable of setting power saving, wasteful power can be reduced.

  An embodiment of the present invention will be described with reference to FIGS. In addition, the same code | symbol is used for the part common to FIGS.

FIG. 1 shows an arrangement of an anode electrode group and a grid of a fluorescent display tube capable of displaying 12 digits, and wiring connected to the anode electrode and grid of the anode electrode group of each digit. FIG. 1 (a2) shows an arrangement of seven segment electrodes Se1 to Se7 in each digit of K2 to K12 digits.
In FIG. 1B, segment electrodes Se1 to Se12 of K2 to K12 digits are connected to anode wirings S1 to S7, and K1 digit REC, USR, MP3, and two arrows are respectively anode wiring S1. To the S5, and the K5 digit "colon" is connected to the anode wiring S8. In FIG. 1C, grid wirings g1 to g12 are connected to the grids G1 to G12.

FIG. 2 shows a drive circuit for the fluorescent display tube of FIG.
In FIG. 2, 31 is a CPU, 32 is an input device having keys and push buttons, and 33 is a drive voltage generator to be supplied to the grids G <b> 1 to G <b> 12 and the anode electrode groups A <b> 1 to A <b> 12 based on data from the CPU 31. The control unit controls the supply / stop of supply of the drive voltage.
The grid drive voltage waveform generation units 411 to 4112 generate pulse-shaped grid drive voltages (grid drive voltage waveforms) corresponding to the grids G1 to G12 based on the grid drive data sent from the CPU 31. The grid drive voltage is supplied to the grid drivers 431 to 4312 via the AND circuits 421 to 4212. The grid drivers 431 to 4312 apply a pulsed grid driving voltage to the grids G1 to G12 via the grid wirings g1 to g12.

  Based on the display data sent from the CPU 31, the anode drive voltage waveform generators 441 to 448 generate pulsed anode drive voltages (anode drive voltage waveforms) corresponding to the anode electrodes (segments) of the anode electrode groups A1 to A12. ) Is generated. The anode drive voltage is supplied to the NAND circuits 451 to 4512 and the anode drivers 461 to 468. The anode drivers 461 to 468 apply a pulsed anode driving voltage to the anode electrodes such as the segment electrodes Se1 to Se7, REC, USR, MP3, two arrows, and a colon through the anode wirings S1 to S8.

In addition to the anode drive voltage, the NAND circuits 451 to 4512 are supplied with a pulsed power saving setting voltage from the power saving setting register 40. The power saving setting unit (power saving setting register) 40 is a pulsed power saving setting that represents the power saving setting (1) or the non-power saving setting (0) based on the power saving setting data sent from the CPU 31. Generate voltage (power saving set voltage waveform). Setting or non-setting of power saving is performed by the input device 32.
When power saving is set in the power saving register 40, the outputs of the NAND circuits 451 to 4512 become "1" when the outputs of the anode drive voltage waveform generation units 441 to 448 all become "0". 421 to 4212 are opened, and the grid drive voltage of the grid drive voltage waveform generation units 411 to 4112 is supplied to the grid drivers 431 to 4312. The grid drivers 431 to 4312 apply a grid driving voltage to the grids G1 to G12. When all or part of the outputs of the anode drive voltage waveform generation units 441 to 448 become “1”, the outputs of the NAND circuits 451 to 4512 become “0”, so the AND circuits 421 to 4212 are closed and the grid drive voltage The supply to the grid drivers 431 to 4312 is stopped.

Next, a specific display example will be described with reference to FIG.
FIG. 3 is a driving example when power saving setting is not performed (non-power saving setting mode), FIG. 3A is a display example, FIG. 3B is a timing chart of grid driving voltage, and FIG. ) Shows a timing chart of the anode drive voltage.
FIG. 3A shows an example in which “REC” and “13:67” are displayed. Of the 12-digit anode electrode group, K1 digit, K3 to K6 digit, that is, 1st digit and 3rd to 6th digit. Display using the anode electrode group. In this display example, the anode electrode group of K1 digit and K3 to K6 digit is used for display, but the anode electrode group of K2 digit and K7 to K12 digit is not used for display.
When the display of FIG. 3A is driven in the non-power saving setting mode, the grid wirings g1 to g12 of FIG. 2 are pulsed at timings T1, T2,..., T12 as shown in FIG. The grid drive voltage is supplied. On the other hand, as shown in FIG. 3C, a pulsed anode drive voltage is supplied to the anode wirings S1 to S8 at timings T1, T3, T4, T5, and T6. Therefore, when driving in the non-power-saving setting mode, the drive voltage is also applied to the K2-digit and K7-K12-digit grids that are not used for display.

FIG. 4 is a timing chart of the driving voltage of the grid and the anode when the power saving is set (power saving setting mode) for the same display example as FIG.
In the power saving setting mode, the grid driving voltage is supplied to the grid wirings g1, g3, g4, g5, and g6 at timings T1, T3, T4, T5, and T6 as shown in FIG. It is not supplied to the wiring. On the other hand, the anode drive voltage is supplied to the anode wirings S1 to S8 at timings T1, T3, T4, T5, and T6 as shown in FIG. 4C (same as FIG. 3C).

FIG. 5 is a diagram for explaining the operation of the NAND circuits 451 to 4512 and the AND circuits 421 to 4212 in FIG. 2, and illustrates the NAND circuit 452 and the AND circuit 422. FIG. 5A is a circuit diagram, and FIG. 5B is a truth table showing the relationship between inputs and outputs of the NAND circuit 452.
As described above, the NAND circuit 452 is supplied with the power saving setting voltage from the power saving setting register 40 and is supplied with the anode driving voltage from the anode driving voltage waveform generation units 441 to 447. The output of the power saving setting register 40 is directly input to the NAND circuit 452, and the outputs of the anode drive voltage waveform generation units 441 to 447 are inverted (via the NOT circuit) and input to the NAND circuit 452.

In FIG. 5B, the output of the power saving setting register 40 is “1” when the power saving is set in the register 40 and “0” when it is not set (when the power saving setting is not set). . The outputs of the anode drive voltage waveform generation units 441 to 447 are “1” when there is an output (when there is an anode drive voltage), and “0” when there is no output.
In FIG. 5B, when the output X52 of the NAND circuit 452 becomes “0” (in the case of A3), the output X22 of the AND circuit 422 becomes “0”. Therefore, in the case of (A3), the output (grid drive voltage) of the grid drive voltage waveform generation unit 412 is not supplied to the grid driver 432. That is, no grid driving voltage is applied to the grid G2. The example (A3) corresponds to the K2 digit state (non-display state) of FIG. In the cases of (A1), (A2), and (B1) to (B3) other than (A3), the output X52 of the NAND circuit 452 is “1”, so the grid drive voltage waveform generation unit 412 Output (grid drive voltage) is supplied to the grid driver 432. That is, a grid driving voltage is applied to the grid G2.

When the power saving is set as described above (in the power saving setting mode), when all the outputs of the grid driving voltage waveform generation unit 412 become “0”, the grid driving voltage is not applied to the grid G2. When even one output of the grid drive voltage waveform generation unit 412 is “1”, the grid drive voltage is applied to the grid G2.
FIG. 5 shows an example of the NAND circuit 452 and the AND 422, but the same applies to other NAND circuits and AND circuits. The NAND circuit 455 of FIG. 2 is supplied with a drive voltage related to “colon” from the anode drive voltage waveform generation unit 448, and thus differs from the other NAND circuits. Is the same.

The NAND circuit 452 in FIG. 5 detects the presence / absence of the output (power saving setting voltage) of the power saving setting register (power saving setting unit) 40 and the outputs (anode driving voltage) of the anode driving voltage waveform generation units 441 to 447, Since it is a circuit that detects all “0” of the anode drive voltage when the power saving is set, it is not necessary to be a NAND circuit as long as the circuit can detect it. Therefore, in the present application, a circuit capable of detection is referred to as an anode drive voltage detection circuit.
The AND circuit 422 opens when the output of the NAND circuit 452 is “1” and supplies the grid driving voltage to the grid G2, and closes when the output of the NAND circuit 452 is “0” and closes the grid driving voltage to the grid G2. Since it is a circuit for stopping supply, an AND circuit is not necessary as long as it is a circuit that can supply and stop supplying grid drive voltage to the grid. Therefore, in the present application, a circuit that can supply and stop supplying the grid driving voltage to the grid is referred to as a grid driving voltage supply circuit.
Note that the anode drive voltage supplied to the NAND circuit 452 may be display data corresponding to the anode drive voltage.

  In this embodiment, in the case of the display example of FIG. 4, simply by setting the power saving (by simply setting “1” in the power saving setting register 40), the grid automatically becomes K2 digits and K7 to K12 digits. Therefore, it is not necessary to set the K2 digit and K7 to K12 digit grid drive voltage supply stop in advance as in the prior art. Depending on the contents of the display, some digits, for example, K7 and K8 digits may be displayed for a short period. In this case, the output of the NAND circuits 457 and 458 changes to “1” only for a short period. The outputs of the AND circuits 427 and 428 are also changed to “1”, and the grid driving voltage is supplied to the grid drivers 437 and 438. However, the grid driving voltage is supplied to the K7-digit and K8-digit grids in a period other than the short period. Since there is nothing to do, the power saving effect is increased. In addition, in this embodiment, it is not necessary to check the display contents in advance and check whether or not there is a period for displaying K7 and K8 digits. The display of K7 and K8 digits is not lost.

  Even if the display content includes a digit with a high display frequency that is always used for display, a digit with a low display frequency that is used for display only for a short period, a digit that is not used for display, etc. The presence or absence of the drive voltage is automatically discriminated. When the anode drive voltage is all 0, the supply of the grid drive voltage of the corresponding digit grid is stopped, and when any one of the anode drive voltages is not 0 (“ 1 ”is included), the grid driving voltage is supplied to the grid of the corresponding digit. Therefore, the present embodiment automatically determines the presence or absence of the anode drive voltage regardless of the display contents, and automatically supplies the grid drive voltage to the grid and automatically stops the supply. A highly versatile power-saving setting is possible.

The driving circuit of the fluorescent display tube is generally made into an IC, and the IC is attached to the inside of the vacuum container (airtight container) of the fluorescent display tube or to the substrate outside the vacuum container. In either case, it is called a fluorescent display tube equipped with a drive circuit or a drive circuit IC. The control unit 33 in FIG. 2 is also integrated into an IC, and the IC may be attached to the inside of a vacuum vessel (airtight vessel) of the fluorescent display tube, or may be attached to a substrate outside the vacuum vessel.
FIG. 6 is an example of a fluorescent display tube in which the IC of the control unit 33 is mounted inside a vacuum container (airtight container).
The vacuum container includes a glass anode substrate 51, a substrate 52 facing the anode substrate 51, and a side member 53. An anode electrode group A (corresponding to A 1 to A 12 in FIG. 1) is formed on the anode substrate 51, and a grid G (corresponding to G1 to G12 in FIG. 1), filament F and the like are attached. Further, the IC 60 of the control unit 33 in FIG. 2 is fixed to the anode substrate 51 by die bonding paste or the like. The IC 60 is connected to the external terminal 61 and the like by a wiring 62, and is connected to the anode electrode group A and the grid G by a wiring 63 (corresponding to the grid wirings g1 to g12 and the anode wirings S1 to S8 in FIG. 2).
Since the fluorescent display tube of FIG. 6 includes the IC of the control unit 33 that can be set for power saving, wasteful power can be reduced.

The arrangement of the anode electrodes and the grid of the fluorescent display tube according to the embodiment of the present invention, and the wiring connected to them are shown. 1 shows a drive circuit for a fluorescent display tube according to an embodiment of the present invention. The example of a display of the fluorescent display tube of FIG. 1 and the timing chart of the grid drive voltage and anode drive voltage at the time of the non-power saving setting corresponding to the display example are shown. The example of a display of the fluorescent display tube of FIG. 1 and the timing chart of the grid drive voltage and anode drive voltage at the time of the power saving setting corresponding to the example of display are shown. It is a figure explaining operation | movement of the NAND circuit of the drive circuit of the fluorescent display tube of FIG. 3 shows a fluorescent display tube incorporating an IC of the control unit of FIG. A driving circuit of a conventional fluorescent display tube, an arrangement of an anode electrode group and a grid, and a configuration thereof are shown. The timing chart of the grid drive voltage and anode drive voltage of the conventional fluorescent display tube is shown.

Explanation of symbols

31 CPU
32 input device 33 control unit 40 power saving setting register (power saving setting unit)
411 to 4112 Grid drive voltage waveform generation units 421 to 4212 AND circuits 431 to 4312 Grid drivers 441 to 448 Anode drive voltage waveform generation units 451 to 4512 NAND circuits 461 to 468 Anode drivers A1 to A12 Anode electrode group F Filaments G1 to G12 Mesh Grids K1 to K12 Number of display digits Se1 to Se7 Segment of anode electrode group

Claims (4)

  A filament, a plurality of grids, and a plurality of anode electrode groups are provided. The grid and the anode electrode groups are opposed to each other, and the grid and the anode electrode group are scanned for each digit to supply a grid driving voltage to the grid. In the method of driving a fluorescent display tube for supplying an anode driving voltage to the anode electrode, the anode driving voltage detection circuit uses the power saving setting voltage of the power saving setting unit and the anode driving voltage or display data to drive the anode during power saving setting. A method for driving a fluorescent display tube, wherein when all the voltages or display data are detected as “0”, the grid drive voltage supply circuit of the corresponding digit is closed to stop supplying the grid drive voltage to the grid.   2. The method for driving a fluorescent display tube according to claim 1, wherein the anode drive voltage detection circuit is formed of a NAND circuit, the grid drive voltage supply circuit is formed of an AND circuit, and a power saving setting voltage is directly input to the NAND circuit. A driving method of a fluorescent display tube, wherein an anode driving voltage or display data is inverted and inputted, and a grid driving voltage and an output of a NAND circuit are inputted to an AND circuit.   A filament, a plurality of grids, and a plurality of anode electrode groups are provided. The grid and the anode electrode groups are opposed to each other, and the grid and the anode electrode group are scanned for each digit to supply a grid driving voltage to the grid. A fluorescent display tube for supplying an anode driving voltage to the anode electrode of the power source includes a power saving setting unit, an anode driving voltage detection circuit, and a grid driving voltage supply circuit. The anode driving voltage detection circuit includes a power saving setting voltage of the power saving setting unit. When the anode drive voltage or display data is all set to “0” at the time of power saving setting using the anode drive voltage or display data, the grid drive voltage supply circuit of the corresponding digit is closed to supply the grid drive voltage to the grid. Fluorescent display tube characterized by stopping.   4. The fluorescent display tube according to claim 3, wherein the anode driving voltage detection circuit is a NAND circuit, the grid driving voltage supply circuit is an AND circuit, and a power saving setting voltage is directly input to the NAND circuit. Alternatively, the display data is inverted and input, and the grid display voltage and the output of the NAND circuit are input to the AND circuit.

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