JP2019056569A - Array antenna device and array antenna processing method - Google Patents

Abstract

To provide an array antenna device and an array antenna processing method which can perform timing correction with excellent accuracy even when there is difference in delay amount between a plurality of receiving devices.SOLUTION: An array antenna device according to an embodiment has a plurality of receiving devices, a detection section, and a timing correction section. The receiving devices have a plurality of antennas, a receiver, and an A/D converter. The receiver processes a signal received by the plurality of antennas. The A/D converter performs A/D conversion of the signal processed by the receiver. The detection section detects information about delay difference in the processing between the plurality of receiving devices. The timing correction section corrects a timing of the A/D conversion performed by the A/D converter included in the receiving devices on the basis of the information detected by the detection section.SELECTED DRAWING: Figure 2

Description

  Embodiments described herein relate generally to an array antenna apparatus and an array antenna processing method.

  There is a case where synchronization is established between a transmission device and a plurality of reception devices. For example, a station corresponding to a reference signal generation unit having a reference clock transmits timing frames (information on time (reference signal) based on the reference clock) to each receiving device, thereby realizing timing synchronization. Is called.

If such timing synchronization is not realized, there is a case where high-quality communication cannot be performed between the transmission device and the plurality of reception devices.
As an example, in a radar apparatus, if such timing synchronization is not realized, a shift in range (for example, a range of distance) may occur in each receiving apparatus.

  For this reason, a technique is used in which timing correction is performed by performing timing correction between a transmission device and a plurality of reception devices, but when there is a difference in delay amounts such as group delay amounts in a plurality of reception devices, timing correction is performed. In some cases, it could not be performed with high accuracy.

JP 2006-109357 A

  The problem to be solved by the present invention is to provide an array antenna apparatus and an array antenna processing method capable of accurately performing timing correction even when there is a difference in delay amounts among a plurality of receiving apparatuses.

  The array antenna device according to the embodiment includes a plurality of receiving devices, a detection unit, and a timing correction unit. The receiving apparatus includes a plurality of antennas, a receiver, and an A / D converter. The receiver processes signals received by a plurality of the antennas. The A / D converter performs A / D conversion on the signal processed by the receiver. The detection unit detects information regarding delay differences in processing in the plurality of receiving apparatuses. The timing correction unit corrects timing of A / D conversion performed by the A / D converter included in the reception device based on the information detected by the detection unit.

The figure which shows the array antenna apparatus of embodiment. The figure which shows the receiving part of the array antenna apparatus of embodiment. The figure which shows the timing after the correction | amendment of A / D conversion in the A / D converter of embodiment. The figure which shows the array antenna apparatus which concerns on a modification. The figure which shows the array antenna apparatus which concerns on another modification.

  Hereinafter, an array antenna apparatus and an array antenna processing method according to embodiments will be described with reference to the drawings.

FIG. 1 is a diagram illustrating an array antenna device 1 according to an embodiment.
The array antenna device 1 includes one transmission device 11 and n (in the present embodiment, n represents an integer of 2 or more) reception devices 21-1 to 21-n. Here, n may have various values.
The transmission device 11 includes M antennas 41-1 to 41-M (in the present embodiment, M represents an integer of 2 or more). The antenna may be referred to as an antenna.
The receiving device 21-1 includes L antennas 51-1 to 51-L (in this embodiment, L represents an integer of 2 or more).
Here, M and L may be various values. Further, M and L may be the same value or different values.

Each of the receiving devices 21-2 to 21-n includes a plurality of antennas.
In addition, the receiving device 21-1 and each of the receiving devices 21-2 to 21-n may include, for example, the same number of antennas (L antennas) or those having different numbers of antennas. May be.

Here, each of the reception devices 21-1 to 21-n receives a radio signal using an array antenna including a plurality of antennas (in the case of the reception device 21-1, antennas 51-1 to 51-L). It is an array antenna receiver. These n receiving apparatuses 21-1 to 21-n are provided separately, but are grouped together to realize an array antenna apparatus having a large number of antennas. As an array antenna apparatus having such a large number of antennas, in the example of FIG. 1, an array antenna apparatus having the number of antennas as a result of summing up the number of antennas of all the receiving apparatuses 21-1 to 21-n is realized. Is done.
Although it is possible to configure such an array antenna device having a large number of antennas with a single device, the degree of freedom of configuration or versatility may be reduced. For this reason, in this embodiment, a plurality of (in this embodiment, n) separate receiving devices 21-1 to 21-n are combined to be used as a single array antenna receiving device.
In the present embodiment, one transmitter 11 is shared by n receivers 21-1 to 21-n.

As described above, in the present embodiment, when a plurality of receiving devices 21-1 to 21-n are aggregated and used, individual receiving devices (reception devices 21-1 to 21-n, respectively) are used. As compared with, the number of antennas of the array antenna can be increased.
Each of the receiving devices 21-1 to 21-n may be a device that can be moved, or may be a device that is fixedly installed.
As an example, a plurality of receiving devices that can be moved (for example, devices constituting a radar) are used separately, but these are assembled to operate as a single array antenna device (for example, a radar). There may be cases.
As another example, when an array antenna device (for example, radar) is already provided on the ground or the like, one or more receiving devices are newly constructed near the array antenna device, and all of them are combined. Thus, it may be necessary to operate as one array antenna device (for example, radar) having a larger number of antennas than the array antenna device.

In this embodiment, the array antenna device 1 is used for a radar that detects an object. In this case, in the array antenna apparatus 1, the transmission apparatus 11 transmits signals wirelessly using the antennas 41-1 to 41-M, and the signals reflected by the object are transmitted to the plurality of reception apparatuses 21-1. ˜21-n receive using an antenna (antennas 51-1 to 51-L, etc.) and detect the object based on the received signal. In this detection, for example, the position (distance or angle) where the object is present is detected.
Note that any radar may be used as the radar. For example, a radar that is installed on the ground and detects an airplane flying in the air as an object may be used.

In the present embodiment, the array antenna device 1 includes the transmission device 11 and the n reception devices 21-1 to 21-n. However, the transmission device 11 may not be included as another configuration example.
In the present embodiment, a portion of the n receiving devices 21-1 to 21-n included in the array antenna device 1 is referred to as a receiving unit 101 and will be described. The receiving unit 101 may also include components other than the n receiving devices 21-1 to 21-n. When the array antenna device 1 does not include the transmission device 11, the array antenna device 1 and the reception unit 101 are the same.

FIG. 2 is a diagram illustrating the receiving unit 101 of the array antenna device 1 according to the embodiment.
The reception unit 101 includes a reference signal generation unit 111, a distribution circuit 112, a detection unit 113, and n reception devices 21-1 to 21-n.
The detection unit 113 includes a counter 131, a timing correction value generation unit 132, and a calibration signal generation unit 133. The detection unit 113 performs timing measurement (detection) and the like.
In FIG. 2, illustration of a plurality of antennas (antennas 51-1 to 51-L and the like) provided in each of the reception devices 21-1 to 21-n is omitted.

In the present embodiment, each of the receiving devices 21-1 to 21-n includes similar components.
Each receiving device 21-p (p represents each integer in the range of 1 to n) includes a timing correction unit 211-p, a sampling clock generation unit 212-p, a receiver 213-p, and an A / D ( An Analog to Digital) converter 214-p is provided.

In FIG. 2, reference triggers a1, a2, a3, reference signals b1, b2, b3, sampling clock c1, timing signal d1, timing correction value e1, reception RF (Radio Frequency) signal f1, calibration signal g1, reception Signals such as an IF (Intermediate Frequency) signal h1, a calibration IF signal i1, and a digital signal j1 are shown.
In addition, as a code | symbol of each of these signals, it is set as the code | symbol common in n receiving devices 21-1 to 21-n for convenience of explanation.
In addition, the reference trigger a1, the reference trigger a2, and the reference trigger a3 are signals having the same role, but different reference numerals are given to respective output source components.
Further, the reference signal a1, the reference signal a2, and the reference signal a3 are signals having the same role, but different reference numerals are given to respective output source components.

  Here, the reference signal generation unit 111, the distribution circuit 112, and the detection unit 113 may be provided separately from, for example, n receiving devices 21-1 to 21-n, or n May be provided in any one of the receivers 21-1 to 21-n, or may be provided in any two or more of the receivers 21-1 to 21-n. May be.

An example of processing performed in the reception unit 101 is shown.
In the present embodiment, since the n receiving devices 21-1 to 21-n perform the same processing, the processing performed by one receiving device 21-1 will be described as an example. The same applies to the processing performed by the other receiving devices 21-2 to 21-n.

The reference signal generation unit 111 generates a reference trigger a1 and a reference signal b1, and outputs the generated reference trigger a1 and reference signal b1 to the distribution circuit 112.
Here, the reference trigger a1 is a trigger signal serving as a reference, and is, for example, a signal such as a pulse wave having a predetermined period. As the predetermined period, an arbitrary period may be used. For example, a period such as 1 second may be used.
The reference signal b1 is a reference signal, for example, a signal such as a sine wave having a predetermined frequency. As the predetermined frequency, an arbitrary frequency may be used. For example, 10 MHz or 100 MHz may be used. For example, the reference signal generation unit 111 may include a crystal oscillator, and may generate the reference signal b1 using an oscillation signal from the crystal oscillator.

The distribution circuit 112 distributes the reference trigger a1 input from the reference signal generation unit 111 to n signals, and corrects the distributed reference trigger a2 to the timing correction of each receiving device 21-1 to 21-n. Output to the sections 211-1 to 211-n. Here, the reference trigger a2 is a signal to which the reference trigger a1 is distributed, and is substantially the same as the reference trigger a1.
In addition, the distribution circuit 112 distributes the reference signal b1 input from the reference signal generation unit 111 into n signals, and distributes each of the distributed reference signals b2 to each of the receiving devices 21-1 to 21-n. The data is output to the timing correction units 211-1 to 211-n. Here, the reference signal b2 is a signal to which the reference signal b1 is distributed, and is substantially the same as the reference signal b1.

The timing correction unit 211-1 corrects the timing of the reference trigger a <b> 2 input from the distribution circuit 112 based on the timing correction value e <b> 1 input from the timing correction value generation unit 132, and sets the corrected reference trigger a <b> 3. Output to the A / D converter 214-1. In the present embodiment, the timing correction unit 211-1 sets a signal obtained by shifting the timing of the reference trigger a2 based on the timing correction value e1 as the corrected reference trigger a3.
Further, the timing correction unit 211-1 outputs the reference signal b2 input from the distribution circuit 112 to the sampling clock generation unit 212-1 as the reference signal b3. Note that the reference signal b2 and the reference signal b3 are substantially the same signal, and may be the same signal.

  Here, in the present embodiment, the timing correction value e1 is information on a delay time of 0 or more (or may be an advance time of 0 or more). The timing correction unit 211-1 sets a signal obtained by shifting the timing of the reference trigger a2 by the delay time (or advance time) represented by the timing correction value e1 as the corrected reference trigger a3. In the case of the delay time, a process for delaying the timing of the reference trigger a2 is performed. In the case of the advance time, a process for advancing the timing of the reference trigger a2 is performed.

Any method may be used as a method of adjusting the timings of a plurality of signals in the timing correction unit 211-1.
As an example, the timing correction unit 211-1 includes a delay line, and adjusts the timing of a plurality of signals by passing a signal that needs to be delayed through a delay line having a length corresponding to the delay time. Techniques may be used.
When the delay line is used, when the timing of a predetermined signal is advanced, the timing of the predetermined signal is advanced by delaying the timing of other signals.

The sampling clock generation unit 212-1 generates a sampling clock c1 based on the reference signal b3 input from the timing correction unit 211-1 and outputs the generated sampling clock c1 to the A / D converter 214-1. .
Here, the sampling clock generation unit 212-1 includes, for example, a phase locked loop (PLL), and generates the sampling clock c1 by converting the reference signal b3 to the sampling clock c1 by the PLL. .

  Signals received by the respective antennas (here, L antennas 51-1 to 51-L provided in the reception device 21-1) are input to the receiver 213-1 as reception RF signals f1. The In the present embodiment, the reception RF signals f1 represent the same number of RF signals as the antenna (L for the reception device 21-1).

Based on the input received RF signal f1, the receiver 213-1 performs predetermined reception processing including frequency conversion of the received RF signal f1 from an RF signal to an IF signal, and generates a received IF signal h1. The generated reception IF signal h1 is output to the A / D converter 214-1. In the present embodiment, the reception IF signal h1 is a signal obtained from the reception RF signal f1, and represents the same number of signals as the antenna (L for the reception device 21-1).
The receiver 213-1 performs a predetermined reception process including a process of converting the frequency of the calibration signal g1 from the RF signal to the IF signal based on the input calibration signal g1, and generates a calibration IF signal i1. The generated calibration IF signal i1 is output to the A / D converter 214-1.

In the present embodiment, the reception RF signal f1 and the calibration signal g1 are RF signals having the same frequency (or a similar frequency). The reception IF signal h1 and the calibration IF signal i1 are IF signals having the same frequency (or a similar frequency).
In the present embodiment, in the receiver 213-1, the predetermined reception process performed on the reception RF signal f1 and the predetermined reception process performed on the calibration signal g1 are the same process.
Note that any processing may be used as the predetermined reception processing.

Here, in each of the receivers 213-1 to 213-n, a group delay is generated by a circuit that processes a signal (a circuit that performs reception processing). A circuit that mainly causes group delay is a filter. In this embodiment, each of the receivers 213-1 to 213-n includes a filter.
In the present embodiment, in each of the receivers 213-1 to 213-n, the amount of group delay generated in the reception IF signal h1 by reception processing and the amount of group delay generated in the calibration IF signal i1 by reception processing are , The same (or the same level).

Further, in each of the receivers 213-1 to 213-n, the type of components constituting the circuit is different, or the group of components constituting the circuit is the same, but there are individual differences. The amount of delay can be different.
In particular, in the present embodiment, since the configuration is a combination of a plurality of separate receiving devices 21-1 to 21-n, the performance of the receivers 213-1 to 213-n in each receiving device 21-1 to 21-n is In some cases, the delay amount (group delay amount in the present embodiment) in each of the receiving devices 21-1 to 21-n may be different.

  In the present embodiment, each of the receivers 213-1 to 213-n includes a plurality of input / output terminals (input / output terminals of a plurality of channels) so as to correspond to input / output of a plurality of signals. The number of input / output terminals is smaller than the number of antennas (the number of signals included in the received RF signal f1). In this embodiment, among the plurality of input / output terminals, an input / output terminal that is not used for input / output of the reception RF signal f1 (in this embodiment, one input / output terminal) is the calibration signal g1. Used for input / output.

The A / D converter 214-1 is input from the receiver 213-1 based on the reference trigger a3 input from the timing correction unit 211-1 and the sampling clock c1 input from the sampling clock generation unit 212-1. The received IF signal h1 is subjected to A / D conversion, and a digital signal j1 obtained by the A / D conversion is output. In the present embodiment, the digital signal j1 is a signal obtained from the reception IF signal h1, and represents the same number of signals as the antenna (L for the reception device 21-1).
The A / D converter 214-1 receives the receiver 213-1 based on the reference trigger a <b> 3 input from the timing correction unit 211-1 and the sampling clock c <b> 1 input from the sampling clock generation unit 212-1. A / D conversion is performed on the calibration IF signal i <b> 1 input from, and a timing signal d <b> 1 obtained by the A / D conversion is output to the counter 131.

Here, in the A / D converter 214-1, the sampling clock c1 is used as a timing for performing sampling, and the reference trigger a3 is used as an index indicating the timing for performing sampling. In this embodiment, the A / D converter 214-1 uses the same timing as the A / D conversion timing for the reception IF signal h1 and the calibration IF signal i1.
The digital signal j1 and the timing signal d1 output from the A / D converter 214-1 are digital signals having an in-phase component (I component) and a quadrature component (Q component), respectively.

  Here, the processing of the components (timing correction unit 211-1, sampling clock generation unit 212-1, receiver 213-1, A / D converter 214-1) in one reception device 21-1 has been described. Are configured in other receiving devices 21-2 to 21-n (timing correction units 211-2 to 211-n, sampling clock generation units 212-2 to 212-n, receivers 213-2 to 213-n, The same applies to the processing of the A / D converters 214-2 to 214-n).

The digital signals j1 obtained by the n receiving devices 21-1 to 21-n include digital signals corresponding to the total number of antennas provided in all the receiving devices 21-1 to 21-n. Processing is performed by a predetermined processing unit (not shown) provided in the receiving unit 101. For example, the predetermined processing unit considers that an array antenna having antennas corresponding to the total number of antennas provided in all of the reception devices 21-1 to 21-n is used, and the digital signal j1 that is a reception signal is used. Etc., and various processing in radar detection can be performed based on the result.
The predetermined processing unit may be provided at an arbitrary place. For example, in the receiving unit 101, the predetermined processing unit may be provided separately from the n receiving devices 21-1 to 21-n, or , Any one of the n receiving devices 21-1 to 21-n may be provided, or any two or more of the n receiving devices 21-1 to 21-n may be provided. It may be provided.

The counter 131 receives timing signals d1 (that is, n timing signals d1) from the A / D converters 214-1 to 214-n provided in the n receiving devices 21-1 to 21-n. The
The counter 131 has a function of detecting a timing difference between a plurality of signals. In the present embodiment, the counter 131 detects a phase difference with respect to the reference for each timing signal d1 other than the reference signal, with one timing signal d1 of the input n timing signals d1 as a reference.
As an example, when the timing signal d1 in the receiving device 21-1 is used as a reference, the counter 131 sets the reference timing signal d1 (receiving device 21-) for the timing signal d1 in each of the other receiving devices 21-2 to 21-n. 1 is detected with respect to the timing signal d1).

Then, the counter 131 outputs (n−1) pieces of phase difference detection result information to the timing correction value generation unit 132 as the phase difference detection result.
In the present embodiment, the counter 131 outputs zero (0) information to the timing correction value generation unit 132 as a detection result of the phase difference for the reference receiving device.
As described above, in the present embodiment, the counter 131 uses the information on the n phase difference detection results corresponding to the receiving apparatuses 21-1 to 21-n as the phase difference detection result, and the timing correction value generation unit 132. Output to.

Here, for receivers other than the reference (for example, the receivers 21-2 to 21-n), those having the same group velocity in the receiver (for example, the receivers 213-2 to 213-n) are detected. The phase difference is the same.
In this embodiment, a group delay is described as an example. However, in the case where it is influenced by any delay other than the group delay, the delay may be considered.
In the present embodiment, the signal delay (group delay in the present embodiment) in the receivers 213-1 to 213-n will be described as an example. However, the signal delay in other components is also affected. The delay may also be considered.

Note that a receiving device (any one of the receiving devices 21-1 to 21-n) used as a reference for the timing signal d1 may be set to an arbitrary receiving device.
Also, the receiving device (any one of the receiving devices 21-1 to 21-n) used as a reference for the timing signal d1 may be determined by the counter 131 or the like based on a predetermined condition, for example. Good. As an example, as the predetermined condition, the timing signal d1 (timing signal d1 generated from the same calibration signal portion) output from the A / D converters 214-1 to 214-n to the counter 131 is the earliest counter. A condition that the timing signal d1 that reaches 131 (that is, the timing signal d1 having the smallest delay) is used as a reference may be used.

  In the present embodiment, it is considered that a phase difference of 360 degrees (= 2π) or more does not occur, but the present invention may be applied to a situation where a phase difference of 2π or more occurs.

Based on the phase difference detection results (phase difference detection results corresponding to the receiving devices 21-1 to 21-n) input from the counter 131, the timing correction value generation unit 132 receives the receiving devices 21-1 to 21-1. The timing correction value e1 in 21-n is generated, and the generated timing correction value e1 in each receiving device 21-1 to 21-n is output to each receiving device 21-1 to 21-n.
Here, in this embodiment, the phase difference information detected for each of the receiving devices 21-1 to 21-n is converted into the time difference information as the timing correction value e1 in each of the receiving devices 21-1 to 21-n. Information is used.

For example, for another timing signal d1 that is slower than the reference timing signal d1, delay time information that is delayed by the phase difference is used as the timing correction value e1.
For other timing signals d1 that are earlier than the reference timing signal d1, information on the advance time that is advanced by the amount of the phase difference is used as the timing correction value e1.

  Here, as an example, when the earliest timing signal d1 is used as a reference, for the reference timing signal d1, the phase difference is zero (0) and the timing correction value e1 is zero (0). Further, regarding the timing signal d1 other than the reference, the phase difference is larger than 0 and the timing correction value e1 is information of the delay time larger than 0 as compared with the reference timing signal d1. In this example, a case where one timing signal d1 is used as a reference earlier than other timing signals d1 is shown.

The calibration signal generator 133 generates a predetermined calibration signal g1 and outputs the generated calibration signal g1 to the receivers 213-1 to 213-n provided in the respective receiving devices 21-1 to 21-n. .
Here, in the present embodiment, a signal having the same frequency as the frequency of the reception RF signal f1 is used as the calibration signal g1. As the waveform of the calibration signal g1, an arbitrary waveform may be used. For example, a continuous wave such as a sine wave may be used, or a discontinuous wave such as a pulse wave may be used. Note that the frequency of the calibration signal g1 and the frequency of the reception RF signal f1 may be slightly different if, for example, the accuracy of measurement (detection) of timing deviation (phase difference) in the detection unit 113 is practically effective. Good.
As another example, as the calibration signal g1, a signal transmitted from the transmission device 11 or a signal obtained by arbitrarily processing the signal may be used.

FIG. 3 is a diagram illustrating the timing after A / D conversion correction in the A / D converters 214-1 to 214-n according to the embodiment.
In the graph shown in FIG. 3, the horizontal axis represents times t0 to t11, and the vertical axis represents timing signals 311-1 to 311-n (calibration) for each of the n receiving devices 21-1 to 21-n. The timing T1 to Tn according to the time range of the timing signal d1) based on the signal g1 and the reference trigger a3 is shown. In FIG. 3, three receiving devices (receiving device 21-1, receiving device 21-2, receiving device 21-n) are illustrated, and the other receiving devices are not shown.

  The time range of the timing signals 311-1 to 311-n represents a time range in which A / D conversion is performed on the digital signal j1 corresponding to the timing signals 311-1 to 311-n. These time ranges do not necessarily represent the time range for delimiting the timing signal d1 or the digital signal j1, but are for convenience of explanation, and explain timing deviations in the receiving devices 21-1 to 21-n. Is to do. That is, in FIG. 3, the time range shift of the timing signals 311-1 to 311-n represents the time shift of the digital signal j1 in each of the receiving devices 21-1 to 21-n.

Here, times t0 to t11 represent times having a certain interval. The times t0 to t11 are timings based on the sampling clock c1 input to the A / D converters 214-1 to 214-n, and are timings based on the reference signal b3. This timing is common to all the receiving devices 21-1 to 21-n.
Timings T1 to Tn corresponding to the reference trigger a3 are timings corresponding to the reference trigger a1 input to the A / D converters 214-1 to 214-n. The said timing is a timing which can differ for each receiving device 21-1 to 21-n.

In the present embodiment, the A / D converters 214-1 to 214-n start sampling in A / D conversion at timings T1 to Tn corresponding to the input reference trigger a3. As the timings T1 to Tn according to the reference trigger a3, for example, the sampling clock generated first after the time range of the timing signals 311-1 to 311-n starts in the time t0 to t11 based on the sampling clock c1. Timings t0 to t11 based on c1 are used.
In the present embodiment, the generation of the timing correction value by the timing correction value generation unit 132 and the timing correction by the timing correction units 211-1 to 211-n so that the timing of the corrected reference trigger a3 is realized. Is done. For example, the timing correction units 211-1 to 211-n may generate a corrected reference trigger a3 that matches the timing of the reference signal b2 based on the input reference signal b2.

In the example of FIG. 3, the timing signal 311-1 in the receiving device 21-1 is a reference. For the receiving device 21-1, the time range of the timing signal 311-1 starts at a time between time t1 and time t2, and ends at a time between time t7 and time t8. The timing at time t2 is the timing T1 corresponding to the reference trigger a3.
In the example of FIG. 3, the timing signal 311-2 in the receiving device 21-2 is delayed compared to the reference timing signal 311-1. For the receiving device 21-2, the time range of the timing signal 311-2 starts at a time between time t4 and time t5 and ends at a time between time t10 and time t11. The timing at time t5 is timing T2 corresponding to the reference trigger a3.
In the example of FIG. 3, the timing signal 311-n in the receiving device 21-n is delayed compared to the reference timing signal 311-1. For the receiving device 21-n, the time range of the timing signal 311-n starts at a time between time t3 and time t4 and ends at a time between time t9 and time t10. The timing at time t4 is the timing Tn corresponding to the reference trigger a3.

According to the embodiment, the array antenna device 1 includes the plurality of receiving devices 21-1 to 21-n. Each of the reception devices 21-1 to 21-n includes a plurality of antennas, receivers 213-1 to 213-n that process signals received by the plurality of antennas, and receivers 213-1 to 213-n. A / D converters 214-1 to 214-n that perform A / D conversion on the processed signals. Further, in the array antenna device 1, a detection unit 113 that detects information regarding delay differences in processing in the plurality of reception devices 21-1 to 21-n, and the reception device 21- based on information detected by the detection unit 113. Timing correction units 211-1 to 211-n for correcting the timing of A / D conversion performed by the A / D converters 214-1 to 214-n included in 1-21-n.
Thereby, in the array antenna apparatus 1, the plurality of receiving apparatuses 21-1 to 21-n are combined and all the antennas provided in the plurality of receiving apparatuses 21-1 to 21-n are used as the array antenna. In addition, the timing difference can be synchronized by correcting the difference in the delay amount in each of the receiving devices 21-1 to 21-n, and the deterioration of the antenna performance caused by the timing shift can be prevented.

According to the above embodiment, in the array antenna device 1, the detection unit 113 detects the predetermined calibration signal g1 by the receivers 213-1 to 213-n and then performs A / D converters 214-1 to 214-n. Based on the signal resulting from the A / D conversion by, information on the phase difference of the signal is detected.
Thereby, in the array antenna apparatus 1, based on the information regarding the phase difference of a signal, the difference of the delay amount in each receiving apparatus 21-1 to 21-n can be correct | amended, and a timing synchronization can be taken.

According to the above embodiment, in the array antenna device 1, the delay difference includes a difference in the group delay amount.
Thereby, in the array antenna apparatus 1, the difference in the group delay amount in each receiving apparatus 21-1 to 21-n can be correct | amended, and timing synchronization can be taken.
Further, according to the above embodiment, it is possible to realize a processing method (array antenna processing method) performed in the array antenna device 1.

FIG. 4 is a diagram showing an array antenna device 401 according to a modification.
The configuration shown in FIG. 4 may be used instead of the configuration shown in FIG.
The array antenna device 401 includes n transmission devices 411-1 to 411-n, n reception devices 421-1 to 421-n, and n array antenna units 431-1 to 431-n.
In the example of FIG. 4, one transmission device 411-p (p represents each integer in the range of 1 to n), one reception device 421-p, one array antenna unit 431-p, Are combined, and there are n such combinations. In each combination, the transmission device 411-p and the reception device 421-p share the array antenna unit 431-p. In each combination, the transmission device 411-p transmits the signal wirelessly using the array antenna unit 431-p, and the reception device 421-p receives the signal reflected by the object, and the reception device 421-p receives the array antenna unit 431- Receive using p. Then, in the array antenna device 401, for example, by combining the reception signals (for example, digital signals after A / D conversion) acquired by the n reception devices 421-1 to 421-n for all antennas, The object is detected.

In addition, as a structure and operation | movement of each transmission apparatus 411-1 to 411-n, you may be the same or may differ.
In addition, the configuration and operation of each of the reception devices 421-1 to 421-n may be the same or different.
Also, the configuration and operation of each of the array antenna units 431-1 to 431-n may be the same or different. For example, the number of antennas included in each of the array antenna units 431-1 to 431-n may be the same or different.
In this modification, the array antenna device 401 includes n transmission devices 411-1 to 411-n and n reception devices 421-1 to 421-n, but as another configuration example, n One or more of the transmission devices 411-1 to 411-n may not be included.

FIG. 5 is a diagram showing an array antenna apparatus 501 according to another modification.
The configuration shown in FIG. 5 may be used instead of the configuration shown in FIG.
The array antenna device 501 includes one transmission device 511, n reception devices 521-1 to 521-n, and n array antenna units 531-1 to 531-n.
In the example of FIG. 5, one receiving device 521-p (p represents each integer in the range of 1 to n) and one array antenna unit 531-p are combined, and such a combination is n There are pieces.
In addition, the transmission apparatus 511 shares all the array antenna units 531-1 to 531-n with the reception apparatuses 521-1 to 521-n.
Then, the transmission device 511 transmits signals wirelessly using the n array antenna units 531-1 to 531-n. In each combination, the receiving device 521-p receives a signal in which the signal is reflected by the object using the array antenna unit 531-p. In the array antenna apparatus 501, for example, by combining the reception signals (for example, digital signals after A / D conversion) acquired by the n reception apparatuses 521-1 to 521-n for all antennas, The object is detected.

Note that the configurations and operations of the receiving devices 521-1 to 521-n may be the same or different.
Further, the configuration and operation of each array antenna unit 531-1 to 531-n may be the same or different. For example, the number of antennas included in each of the array antenna units 531-1 to 531-n may be the same or different.
In this modification, the array antenna device 501 includes the transmission device 511 and the n reception devices 521-1 to 521-n. However, the transmission device 511 may not be included as another configuration example.

  Here, in the transmission apparatus 11 shown in FIG. 1, the transmission apparatuses 411-1 to 411-n shown in FIG. 4, or the transmission apparatus 511 shown in FIG. 5, for example, a single antenna is used instead of the array antenna. The signal may be transmitted wirelessly using (one antenna).

  According to at least one embodiment described above, the array antenna device 1 includes a plurality of receiving devices 21-1 to 21-n, and each receiving device 21-1 to 21-n includes a plurality of antennas, Receivers 213-1 to 213-n that process signals received by a plurality of antennas, and A / D converters 214- that perform A / D conversion on signals processed by the receivers 213-1 to 213-n 1 to 214-n, and in the array antenna apparatus 1, a detection unit 113 that detects information about delay differences in processing in the plurality of reception devices 21-1 to 21-n, and a detection unit 113 detects the information. The timing for correcting the timing of A / D conversion performed by the A / D converters 214-1 to 214-n included in the receiving devices 21-1 to 21-n based on the received information And Tadashibu 211-1 to 211-n, by having the in when there is a difference in delay amount in a plurality of receiving devices 21 - 1 to 21-n also can perform timing correction with high accuracy.

Each apparatus (for example, transmitting apparatus 11, 411-1 to 411-n, 511 or receiving apparatus 21-1 to 21-n, 421 constituting the array antenna apparatus 1, 401, 501) according to the embodiment described above. 1 to 421-n, 521-1 to 521-n) is recorded on a computer-readable recording medium, and the program recorded on the recording medium is read into a computer system. By executing, processing can be performed.
Here, the “computer system” may include an operating system (OS) or hardware such as peripheral devices.
“Computer-readable recording medium” refers to a flexible disk, a magneto-optical disk, a ROM, a writable nonvolatile memory such as a flash memory, a portable medium such as a DVD (Digital Versatile Disc), and a built-in computer system. A storage device such as a hard disk.

Furthermore, the “computer-readable recording medium” refers to a volatile memory (for example, DRAM (DRAM) inside a computer system that becomes a server or a client when a program is transmitted via a network such as the Internet or a communication line such as a telephone line. Dynamic Random Access Memory)), etc., which hold programs for a certain period of time.
The program may be transmitted from a computer system storing the program in a storage device or the like to another computer system via a transmission medium or by a transmission wave in the transmission medium. Here, the “transmission medium” for transmitting the program refers to a medium having a function of transmitting information, such as a network (communication network) such as the Internet or a communication line (communication line) such as a telephone line.
Further, the above program may be for realizing a part of the functions described above. Further, the above program may be a so-called difference file (difference program) that can realize the above-described functions in combination with a program already recorded in the computer system.
As described above, each function unit may be a software function unit or a hardware function unit such as an LSI.

  Although several embodiments of the present invention have been described, these embodiments are presented by way of example and are not intended to limit the scope of the invention. These embodiments can be implemented in various other forms, and various omissions, replacements, and changes can be made without departing from the spirit of the invention. These embodiments and their modifications are included in the scope and gist of the invention, and are also included in the invention described in the claims and the equivalents thereof.

DESCRIPTION OF SYMBOLS 1, 401, 501 ... Array antenna apparatus 11, 411-1 to 411-n, 511 ... Transmission apparatus, 211-1 to 21-n, 421-1 to 421-n, 521-1 to 521-n ... Reception Devices, 41-1 to 41-M, 51-1 to 51-L ... antenna, 101 ... receiving unit, 111 ... reference signal generating unit, 112 ... distributing circuit, 113 ... detecting unit, 131 ... counter, 132 ... timing correction Value generation unit, 133 ... Calibration signal generation unit, 211-1 to 211-n ... Timing correction unit, 212-1 to 212-n ... Sampling clock generation unit, 213-1 to 213-n ... Receiver, 214-1 214-n A / D converter, 311-1 to 311-n, d1 Timing signal, 431-1 to 431-n, 531-1 to 531-n Array antenna section, T1 to Tn Reference trigger According to Timing, t0 to t11 ... time, a1 to a3 ... reference trigger, b1 to b3 ... reference signal, c1 ... sampling clock, e1 ... timing correction value, f1 ... received RF signal, g1 ... calibration signal, h1 ... received IF signal , I1 ... calibration IF signal, j1 ... digital signal

Claims (4)

A plurality of receiving devices including a plurality of antennas, a receiver that processes signals received by the plurality of antennas, and an A / D converter that performs A / D conversion on the signals processed by the receiver; ,
A detection unit for detecting information regarding delay differences in processing in a plurality of the reception devices;
A timing correction unit that corrects timing of A / D conversion performed by the A / D converter included in the reception device based on the information detected by the detection unit;
An array antenna apparatus comprising: The detection unit, based on a signal resulting from A / D conversion by the A / D converter after a predetermined calibration signal is processed by the receiver, as information, information relating to the phase difference of the signal To detect,
The array antenna apparatus according to claim 1. The delay difference includes a group delay amount difference,
The array antenna apparatus of any one of Claim 1 or Claim 2. A plurality of receiving apparatuses including a plurality of antennas, a receiver that processes signals received by the plurality of antennas, and an A / D converter that performs A / D conversion on the signals processed by the receiver ,
The detection unit detects information regarding delay differences in processing in the plurality of reception devices,
A timing correction unit for correcting timing of A / D conversion performed by the A / D converter included in the reception device based on the information detected by the detection unit;
Array antenna processing method.

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